Three-dimensional modeling processing method and system for via, computer device, program product

CN122510503BActive Publication Date: 2026-11-03JULIN TECH (SHANGHAI) CO LTD
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Patent Information

Application Number
CN202610992562.1
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2026-07-06
Publication Date
2026-11-03
Estimated Expiration
2046-07-06

AI Technical Summary

Technical Problem

In existing DC voltage drop simulation technologies for printed circuit boards, the via modeling uses a simplified equivalent resistance model, which leads to a large deviation between the simulation results of the DC voltage drop of the entire board and the actual operating conditions, making it difficult to adapt to the high-precision simulation requirements of high-density, high-current printed circuit boards.

Method used

A three-dimensional modeling method is used to determine the triangular prism element by obtaining the geometric parameters and conductivity of the via, and then divide it into tetrahedral elements. The conductivity value of each tetrahedral element is calculated using the finite element algorithm. The edge resistance of the three-dimensional mesh and the metal planar resistance network are integrated to determine the target physical quantity.

Benefits of technology

It improves the accuracy of current transmission characteristics simulation in via regions, significantly enhances the simulation accuracy of DC voltage drop across the entire board, solves the problems of uneven current distribution and local voltage drop differences in via regions, and adapts to the high-precision simulation requirements of high-density, high-current printed circuit boards.

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Abstract

The application relates to the technical field of printed circuit board DC voltage drop simulation, and further relates to a via three-dimensional modeling processing method and system, computer equipment and a program product. The method comprises the following steps: acquiring geometric parameters and conductivity of a printed circuit board; determining a three-prism unit corresponding to a via according to the geometric parameters; dividing the three-prism unit to obtain three tetrahedron units with equal volumes, wherein the tetrahedron units comprise upper base triangles or lower base triangles of the three-prism unit; calculating the conductivity values of the edges of each tetrahedron unit according to the conductivity and a finite element algorithm; determining via three-dimensional grid edge resistance according to the conductivity values of all tetrahedron units sharing the same edge; and determining full-board DC voltage drop according to the via three-dimensional grid edge resistance and a metal plane resistance network of the printed circuit board. The method avoids the technical problem that there is a large deviation between the simulation result of the full-board DC voltage drop and the actual working condition.
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Description

Technical Field

[0001] This application relates to the field of DC voltage drop simulation technology for printed circuit boards, and further to a three-dimensional modeling processing method and system for vias, computer equipment, and program products. Background Technology

[0002] In the field of printed circuit board (PCB) design and power integrity analysis, DC IR drop simulation is a core and critical step in ensuring the power supply stability and operational reliability of PCBs. Its simulation accuracy directly determines the rationality of the PCB design and the long-term stable operation capability of the product. Although the DC IR drop of the PCB's metal plane can be approximated using two-dimensional methods, its physical nature remains a three-dimensional steady current field problem. In particular, the uniformity of the internal current distribution and the local voltage drop characteristics of vias, which serve as core connecting components between different metal layers, have a decisive impact on the accuracy of the overall PCB DC IR drop simulation.

[0003] In current PCB DC voltage drop simulation technology, a simplified equivalent resistance model is commonly used for via modeling. The core idea is to calculate the overall equivalent resistance value of the via, treating it as a single lumped resistive element, thus achieving electrical connection between the upper and lower metal layers. However, this simplified modeling method has significant technical limitations. For example, the equivalent resistance only reflects the macroscopic resistance characteristics of the via and cannot capture the local voltage drop differences in different areas of the via, leading to a large deviation between the simulation results of the overall PCB DC voltage drop and actual operating conditions. Summary of the Invention

[0004] To address the aforementioned technical issues, this application provides a three-dimensional modeling processing method and system for vias, as well as computer equipment and program products. This avoids the technical problem that the simulation results of the DC voltage drop across the entire board deviate significantly from the actual operating conditions, making it difficult to adapt to the high-precision simulation requirements of high-density, high-current printed circuit boards.

[0005] In a first aspect, this application provides a three-dimensional modeling method for vias, comprising: obtaining the geometric parameters and conductivity of a printed circuit board, wherein the geometric parameters include the via diameter, via length, and connection position between the via and the metal plane; determining the triangular prism element corresponding to the via based on the geometric parameters; subdividing the triangular prism element to obtain three tetrahedral elements of equal volume, wherein the tetrahedral element includes the upper or lower base triangle of the triangular prism element; calculating the conductivity value of each edge of each tetrahedral element based on the conductivity and finite element algorithm; determining the edge resistance of the three-dimensional mesh of the via based on the conductivity values ​​of all tetrahedral elements sharing the same edge; and determining the target physical quantity based on the edge resistance of the three-dimensional mesh of the via and the metal plane resistance network of the printed circuit board, wherein the target physical quantity includes the DC voltage drop across the entire board.

[0006] The above-described 3D modeling method for vias obtains geometric parameters and conductivity, including via diameter, via length, and connection position between the via and the metal plane. Based on this, it determines triangular prism elements that closely fit the columnar physical structure of the via, and then divides them into three tetrahedral elements of equal volume, each containing a triangle on either the upper or lower base. By employing a mesh generation strategy of first creating triangular prisms and then tetrahedrals, it utilizes both the good geometric fit of triangular prism elements to the columnar structure of the via and the convenience of calculating the element conductivity matrix using tetrahedral elements. By dividing the triangular prism elements into regular tetrahedral elements, it avoids the generation of distorted elements, effectively improving the stability and efficiency of subsequent numerical solutions. Meanwhile, based on conductivity and finite element algorithm, the conductivity value of each edge of each tetrahedral element is accurately calculated, and the conductivity values ​​of all tetrahedral elements sharing the same edge are aggregated to determine the resistance of the three-dimensional mesh of the via. Finally, the resistance of the three-dimensional mesh of the via is integrated with the metal planar resistance network to determine the target physical quantity including the DC voltage drop of the whole board. This avoids the technical problem that the simulation results of the DC voltage drop of the whole board deviate greatly from the actual working conditions and are difficult to adapt to the high-precision simulation requirements of high-density, high-current printed circuit boards.

[0007] In one implementation, the target physical quantity also includes the current density distribution across the via cross-section; the target physical quantity is determined based on the edge resistance of the three-dimensional mesh of the via and the metal planar resistance network of the printed circuit board, specifically including: Based on the edge resistance of the via 3D mesh and the metal planar resistance network of the printed circuit board, a set of nodal potential equations is constructed; the nodal potential equations are solved to obtain the current density distribution of the via cross section and the DC voltage drop of the entire board.

[0008] The above-described 3D modeling method for vias integrates the edge resistance of the 3D mesh of the via with the metal planar resistance network to determine the current density distribution of the via cross-section. This achieves accurate characterization of the non-uniform distribution of current density within the via cross-section, captures the current transition effect in the connection area between the via and the metal planar, significantly improves the simulation accuracy of the local voltage drop of the via and the DC voltage drop of the entire board, and solves the technical problem of deviation in the simulation of current transmission characteristics in the via region.

[0009] In one implementation, the triangular prism element corresponding to the via is determined based on geometric parameters. Specifically, this includes: determining the columnar structure of the via based on geometric parameters; replacing the circular cross-section of the columnar structure with a regular polygon and performing triangular discretization on the regular polygon; and generating the triangular prism element based on the processed regular polygon.

[0010] In one implementation, the conductivity of each edge of each tetrahedral element is calculated based on conductivity and the finite element method. Specifically, this includes: determining the weak form of the finite element method based on conductivity, the potential of the steady current field, and the weighted residual method; discretizing the computational domain in the weak form of the finite element method for each tetrahedral element to obtain a system of linear equations; determining the tetrahedral shape function of each tetrahedral element based on the nodal coordinates of each tetrahedral element; and determining the element conductivity matrix and the conductivity of each edge of each tetrahedral element based on the system of linear equations and the gradient of the tetrahedral shape function.

[0011] In one implementation, the weak form of the finite element method is determined based on conductivity, the potential of the steady current field, and the weighted residual method. Specifically, this includes: constructing differential equations based on conductivity and the potential of the steady current field; and deriving the weak form of the finite element method by using the weighted residual method.

[0012] In one implementation, the tetrahedral shape function of each tetrahedral element is determined based on the node coordinates of each tetrahedral element. Specifically, this includes: determining the volume of each tetrahedral element based on the node coordinates of each tetrahedral element; and determining the tetrahedral shape function of each tetrahedral element based on the volume of each tetrahedral element.

[0013] In one implementation, the edge resistance of the via 3D mesh is determined based on the conductance values ​​of all tetrahedral elements sharing the same edge. Specifically, this includes: determining the total conductance value of the edge based on the conductance values ​​of all tetrahedral elements sharing the same edge; and determining the edge resistance of the via 3D mesh based on the total conductance value.

[0014] Secondly, this application provides a three-dimensional modeling processing system for vias, comprising: an acquisition module configured to acquire the geometric parameters and conductivity of a printed circuit board, the geometric parameters including the via diameter, via length, and connection position between the via and the metal plane; a three-dimensional mesh discretization module configured to: determine the triangular prism element corresponding to the via based on the geometric parameters; and partition the triangular prism element to obtain three tetrahedral elements of equal volume, the tetrahedral element including the upper or lower base triangle of the triangular prism element; and a processing module configured to: calculate the conductivity value of each edge of each tetrahedral element based on the conductivity and a finite element algorithm; determine the edge resistance of the three-dimensional mesh of the via based on the conductivity values ​​of all tetrahedral elements sharing the same edge; and determine a target physical quantity based on the edge resistance of the three-dimensional mesh of the via and the metal plane resistance network of the printed circuit board, the target physical quantity including the DC voltage drop across the entire board.

[0015] Thirdly, this application also provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the steps of the three-dimensional modeling processing method for vias as described above.

[0016] Fourthly, this application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of any of the above-described methods for three-dimensional modeling of vias.

[0017] Fifthly, this application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of any of the above-described methods for three-dimensional modeling of vias.

[0018] Compared with the prior art, the present invention has at least one of the following beneficial effects: 1. By obtaining geometric parameters and conductivity including via diameter, via length, and connection position between the via and the metal plane, a triangular prism element that closely fits the columnar physical structure of the via is determined, and it is then divided into three tetrahedral elements of equal volume, each containing a triangle on either the upper or lower base. By employing a mesh generation strategy of first creating triangular prisms and then tetrahedrals, the good geometric fit of the triangular prism element to the columnar via structure is utilized, along with the convenience of calculating the element conductivity matrix using tetrahedral elements. Dividing the triangular prism element into regular tetrahedral elements avoids the generation of distorted elements, effectively improving the stability and efficiency of subsequent numerical solutions. Meanwhile, based on conductivity and finite element algorithm, the conductivity value of each edge of each tetrahedral element is accurately calculated, and the conductivity values ​​of all tetrahedral elements sharing the same edge are aggregated to determine the resistance of the three-dimensional mesh of the via. Finally, the resistance of the three-dimensional mesh of the via is integrated with the metal planar resistance network to determine the target physical quantity including the DC voltage drop of the whole board. This avoids the technical problem that the simulation results of the DC voltage drop of the whole board deviate greatly from the actual working conditions and are difficult to adapt to the high-precision simulation requirements of high-density, high-current printed circuit boards.

[0019] 2. By integrating the three-dimensional mesh edge resistance of the via with the metal planar resistance network, the current density distribution of the via cross section is determined, thereby accurately depicting the non-uniform distribution characteristics of the current density within the via cross section, capturing the current transition effect in the connection area between the via and the metal planar, significantly improving the simulation accuracy of the local voltage drop of the via and the DC voltage drop of the entire board, and solving the technical problem of deviation in the simulation of the current transmission characteristics of the via region. Attached Figure Description

[0020] The preferred embodiments will now be described in a clear and easy-to-understand manner, in conjunction with the accompanying drawings, to further explain the above-mentioned characteristics, technical features, advantages, and implementation methods of the present invention.

[0021] Figure 1 A flowchart of a three-dimensional modeling method for vias provided in an embodiment of this application is shown; Figure 2This illustration shows a schematic diagram of a triangular prism element divided into tetrahedral elements according to an embodiment of this application; Figure 3 A flowchart illustrating a method for determining a target physical quantity, as provided in an embodiment of this application, is shown. Detailed Implementation

[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the specific implementation methods of the present invention will be described below with reference to the accompanying drawings. Obviously, the drawings described below are merely some embodiments of the present invention. For those skilled in the art, other drawings and other implementation methods can be obtained based on these drawings without any creative effort.

[0023] To keep the drawings concise, each figure only schematically shows the parts relevant to the invention, and these do not represent the actual structure of the product. Furthermore, to facilitate understanding, in some figures, only one of components with the same structure or function is schematically depicted, or only one is labeled. In this document, "one" not only means "only one," but can also mean "more than one."

[0024] It should also be further understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0025] In this document, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; and they can refer to the internal communication between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0026] Furthermore, in the description of this application, the terms "first," "second," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0027] It should be noted that the above embodiments can be freely combined as needed. The above are merely preferred embodiments of the present invention. It should be pointed out that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

[0028] In the field of printed circuit board (PCB) design and power integrity analysis, DC IR drop simulation is a core and critical step in ensuring the power supply stability and operational reliability of PCBs. Its simulation accuracy directly determines the rationality of the PCB design and the long-term stable operation capability of the product. Although the DC IR drop of the PCB's metal plane can be approximated using two-dimensional methods, its physical nature remains a three-dimensional steady current field problem. In particular, the uniformity of the internal current distribution and the local voltage drop characteristics of vias, which serve as core connecting components between different metal layers, have a decisive impact on the accuracy of the overall PCB DC IR drop simulation.

[0029] In current DC voltage drop simulation technology for printed circuit boards, simplified equivalent resistance models are commonly used for via modeling. The core idea is to calculate the overall equivalent resistance value of the via, treating it as a single lumped resistive element, thus achieving electrical connection between the upper and lower metal layers. However, this simplified modeling method has significant technical limitations, specifically in two aspects: First, it cannot accurately depict the non-uniform distribution of current density within the via cross-section and ignores the current transition effect in the connection area between the via and the metal plane, leading to deviations in the simulation of current transport characteristics in the via region. Second, the equivalent resistance only reflects the macroscopic resistance characteristics of the via and cannot capture the local voltage drop differences in different regions of the via, resulting in significant deviations between the overall DC voltage drop simulation results and actual operating conditions, making it difficult to meet the high-precision simulation requirements of high-density, high-current printed circuit boards.

[0030] Meanwhile, in the three-dimensional mesh discretization of vias, there are two main existing technologies, but both have obvious technical bottlenecks: one is to directly generate tetrahedral elements, which is prone to producing distorted elements, resulting in poor stability and low computational efficiency in subsequent numerical solutions; the other is to use triangular prism mesh discretization. Although triangular prism mesh is best suited to the columnar structure of vias and can accurately fit the sidewalls of vias, the calculation of its element matrix requires the use of Gaussian integrals, which greatly increases the computational complexity and cost.

[0031] In summary, existing PCB DC voltage drop simulation technologies suffer from insufficient accuracy, unreasonable mesh generation, and high computational costs in via modeling and mesh discretization. Therefore, there is an urgent need in this field for a via 3D modeling method that can balance mesh generation efficiency, geometric fit, and simulation accuracy to address many of the pain points of existing technologies.

[0032] The following explanation is based on the accompanying diagram: Reference Appendix Figure 1 The diagram illustrates a flowchart of a three-dimensional modeling method for vias provided in an embodiment of this application. Figure 1 As shown, it includes: S100: Obtain the geometric parameters and conductivity of the printed circuit board. The geometric parameters include the via diameter, via length, and the connection position between the via and the metal plane.

[0033] S110, based on geometric parameters, determine the triangular prism element corresponding to the through hole.

[0034] S120, the triangular prism element is subdivided to obtain three tetrahedral elements of equal volume. The tetrahedral elements include the upper or lower base triangle of the triangular prism element.

[0035] S130, calculate the conductivity of each edge of each tetrahedral element based on conductivity and finite element algorithm.

[0036] S140, determine the edge resistance of the via 3D mesh based on the conductivity values ​​of all tetrahedral elements sharing the same edge.

[0037] S150 determines the target physical quantity based on the edge resistance of the via 3D mesh and the metal planar resistance network of the printed circuit board. The target physical quantity includes the DC voltage drop across the entire board.

[0038] Obtain the geometric and material parameters of the printed circuit board. Geometric parameters include, but are not limited to, via diameter, via length, and the connection position between the via and the metal plane. Material parameters include, but are not limited to, the conductivity of the conductor material. .

[0039] Based on the geometric parameters, the corresponding triangular prism element is determined. The specific process involves determining the prismatic structure of the via based on the geometric parameters. Then, based on the prismatic structure of the via, the circular cross-section of the via is approximated by a regular polygon (e.g., a regular dodecagon), and this regular polygon is discretized into triangles. For the processed regular polygon, it is extruded along the height direction of the via (perpendicular to the metal plane) to generate a triangular prism element (e.g., a 6-node linear triangular prism element).

[0040] The triangular prism element is partitioned to obtain multiple tetrahedral elements of equal volume. Each tetrahedral element includes either the upper or lower base triangle of the triangular prism element. (See attached reference.) Figure 2Taking a 6-node linear triangular prism element as an example, the nodes of the lower base triangle of the triangular prism element are 1, 2, and 3, and the nodes of the upper base triangle are 4, 5, and 6. Node 1 is opposite to node 4, node 2 is opposite to node 5, and node 3 is opposite to node 6. While retaining the upper and lower base triangles of the triangular prism element, there are a total of 6 possible partitioning methods (any one of these methods can be chosen in this application). Each partitioning method divides the triangular prism element into 3 tetrahedrons of equal volume. A typical partitioning result is: tetrahedral element 1 (nodes 1, 2, 3, 4), tetrahedral element 2 (nodes 2, 4, 5, 6), and tetrahedral element 3 (nodes 2, 3, 4, 6).

[0041] Based on conductivity and the finite element method, the conductivity of each edge of each tetrahedral element is calculated. The specific calculation process is as follows: The differential equation satisfied by the DC voltage drop simulation is determined. This differential equation is: .................(1).

[0042] in, To stabilize the potential of the current field, Let be the electrical conductivity of the metal. The weak finite element form of equation (1) derived using the Galerkin weighted residual method is: .................(2).

[0043] in, The calculation area includes metal planes, transmission lines, and vias in the PCB. For the weight function, For current injection boundary, The current density injected onto the current boundary. The calculation process of formulas (1) and (2) is the process of determining the weak form of the finite element based on conductivity, the potential of the steady current field and the weighted residual method.

[0044] Discretizing the computational domain in the weak form of the finite element method for each tetrahedral element (each element has 4 unknown nodes) yields a system of linear equations. This system of linear equations is as follows: .................(3) .................(4) .................(5).

[0045] in, This is the element conductance matrix (or element stiffness matrix). For the current excitation vector, It is a tetrahedral unit. For tetrahedral shape functions, The surface of a tetrahedral unit.

[0046] The tetrahedral shape function of each tetrahedral element is determined based on its nodal coordinates. Specifically, the volume of each tetrahedral element is first determined based on its nodal coordinates. Then, the tetrahedral shape function is determined based on its volume. For example, the nodal coordinates of each tetrahedral element are defined as follows: Tetrahedral unit volume Calculated using the following formula: .................(6)

[0047] The tetrahedral shape function for each tetrahedral element is: .................(7).

[0048] Among them, coefficient It can be obtained by expanding the following determinant (after expanding both sides, let...) The coefficients must be equal. (The nodal potential of the tetrahedral element is unknown). ... (8.1), ... (8.2), ..........(8.3) ... (8.4).

[0049] According to formula (7), the shape function of the tetrahedral element is a linear function of the coordinates, and its gradient... For constant vectors: .................(9)

[0050] Then, substituting the gradient of the tetrahedral shape function in formula (9) into the element conductance matrix in formula (4), we can obtain the element conductance matrix of each tetrahedral element: .................(10)

[0051] in, .when , This refers to the electrical conductance of each edge of the tetrahedral element. For example, for a given edge containing nodes 1 and 2, then... That is, the conductivity value of that side.

[0052] For any shared mesh edge, the conductance values ​​of all tetrahedral elements sharing that edge are summed to obtain the total conductance (or total equivalent conductance) of that mesh edge. Taking the reciprocal of the total conductance value yields the resistance of the via 3D mesh edge (or the equivalent edge resistance of a single edge of the via 3D mesh). Based on the via 3D mesh edge resistance and the metal planar resistance network of the printed circuit board, target physical quantities are determined, including the DC voltage drop across the entire board.

[0053] This embodiment of the application obtains geometric parameters and conductivity, including via diameter, via length, and connection position between the via and the metal plane, to determine triangular prism elements that closely fit the columnar physical structure of the via. These elements are then divided into three tetrahedral elements of equal volume, each containing either a triangular upper or lower base. By employing a mesh generation strategy of first creating triangular prisms and then tetrahedral elements, the good geometric fit of the triangular prism elements to the columnar via structure is utilized, along with the convenience of calculating the element conductivity matrix using tetrahedral elements. By dividing the triangular prism elements into regular tetrahedral elements, the generation of distorted elements is avoided, effectively improving the stability and efficiency of subsequent numerical solutions. Simultaneously, based on conductivity and the finite element method, the conductivity value of each edge of each tetrahedral element is accurately calculated, and the conductivity values ​​of all tetrahedral elements sharing the same edge are aggregated to determine the edge resistance of the via 3D mesh. Finally, the edge resistance of the via 3D mesh is integrated with the metal planar resistance network to determine the target physical quantity, including the DC voltage drop of the entire board. This avoids the technical problem that the simulation results of the DC voltage drop of the entire board deviate significantly from the actual working conditions, making it difficult to adapt to the high-precision simulation requirements of high-density, high-current printed circuit boards. Furthermore, the 3D via modeling and solving algorithm provided in this application can be seamlessly integrated into the DC voltage drop module of existing EDA software without the need to reconstruct the core calculation framework.

[0054] Reference Appendix Figure 3 This illustrates a flowchart of a method for determining a target physical quantity, as provided in an embodiment of this application. Figure 3 As shown, it includes: S300 constructs a set of nodal potential equations based on the edge resistance of the via 3D mesh and the metal planar resistance network of the printed circuit board.

[0055] S310 solves the nodal potential equations to obtain the current density distribution across the via and the DC voltage drop across the entire plate.

[0056] By integrating the three-dimensional mesh edge resistance of vias and the planar metal resistance network of the printed circuit board, a set of nodal potential equations is obtained. Solving these equations yields target physical quantities such as the current density distribution across the via cross-section and the DC voltage drop across the entire board.

[0057] This application embodiment integrates the three-dimensional mesh edge resistance of the via with the metal planar resistance network to determine the current density distribution of the via cross section, thereby achieving accurate characterization of the non-uniform distribution characteristics of the current density within the via cross section, capturing the current transition effect in the connection area between the via and the metal planar, significantly improving the simulation accuracy of the local voltage drop of the via and the DC voltage drop of the entire board, and solving the technical problem of deviation in the simulation of the current transmission characteristics of the via region.

[0058] This application embodiment also provides a three-dimensional modeling processing system for vias, including: an acquisition module configured to acquire the geometric parameters and conductivity of a printed circuit board, the geometric parameters including the via diameter, via length, and connection position between the via and the metal plane; a three-dimensional mesh discretization module configured to: determine the triangular prism element corresponding to the via based on the geometric parameters; and partition the triangular prism element to obtain three tetrahedral elements of equal volume, the tetrahedral element including the upper or lower base triangle of the triangular prism element; and a processing module configured to: calculate the conductivity value of each edge of each tetrahedral element based on the conductivity and finite element algorithm; determine the edge resistance of the three-dimensional mesh of the via based on the conductivity values ​​of all tetrahedral elements sharing the same edge; and determine the target physical quantity based on the edge resistance of the three-dimensional mesh of the via and the metal plane resistance network of the printed circuit board, the target physical quantity including the DC voltage drop across the entire board.

[0059] This embodiment of the application obtains geometric parameters and conductivity, including via diameter, via length, and connection position between the via and the metal plane, to determine triangular prism elements that closely fit the columnar physical structure of the via. These elements are then divided into three tetrahedral elements of equal volume, each containing either a triangular upper or lower base. By employing a mesh generation strategy of first creating triangular prisms and then tetrahedral elements, the good geometric fit of the triangular prism elements to the columnar via structure is utilized, along with the convenience of calculating the element conductivity matrix using tetrahedral elements. By dividing the triangular prism elements into regular tetrahedral elements, the generation of distorted elements is avoided, effectively improving the stability and efficiency of subsequent numerical solutions. Meanwhile, based on conductivity and finite element algorithm, the conductivity value of each edge of each tetrahedral element is accurately calculated, and the conductivity values ​​of all tetrahedral elements sharing the same edge are aggregated to determine the resistance of the three-dimensional mesh of the via. Finally, the resistance of the three-dimensional mesh of the via is integrated with the metal planar resistance network to determine the target physical quantity including the DC voltage drop of the whole board. This avoids the technical problem that the simulation results of the DC voltage drop of the whole board deviate greatly from the actual working conditions and are difficult to adapt to the high-precision simulation requirements of high-density, high-current printed circuit boards.

[0060] This application provides a computer device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the program, it implements the steps of the three-dimensional modeling processing method for vias in any of the above embodiments.

[0061] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the steps of the three-dimensional modeling processing method for vias in any of the above embodiments.

[0062] This application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the three-dimensional modeling processing method for vias in any of the above embodiments.

[0063] It should be noted that the above embodiments can be freely combined as needed. The above are merely preferred embodiments of the present invention. It should be pointed out that for those skilled in the art, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A method for three-dimensional modeling of vias, characterized in that, include: Obtain the geometric parameters and conductivity of the printed circuit board, wherein the geometric parameters include the via diameter, via length, and the connection position between the via and the metal plane; Based on the geometric parameters, determine the triangular prism element corresponding to the through hole; The triangular prism unit is divided to obtain three tetrahedral units of equal volume, wherein the tetrahedral unit includes the upper base triangle or the lower base triangle of the triangular prism unit. Based on the conductivity and the finite element algorithm, calculate the conductivity value of each side of each of the tetrahedral elements; The edge resistance of the via 3D mesh is determined based on the conductivity values ​​of all the tetrahedral cells sharing the same edge. Based on the edge resistance of the via three-dimensional mesh and the metal planar resistance network of the printed circuit board, a target physical quantity is determined, which includes the DC voltage drop across the entire board.

2. The three-dimensional modeling method for vias according to claim 1, characterized in that, The target physical quantity also includes the current density distribution across the via cross-section; determining the target physical quantity based on the three-dimensional mesh edge resistance of the via and the metal planar resistance network of the printed circuit board specifically includes: Based on the edge resistance of the via three-dimensional mesh and the metal planar resistance network of the printed circuit board, a set of nodal potential equations is constructed; The nodal potential equations are solved to obtain the current density distribution across the via section and the DC voltage drop across the entire plate.

3. The three-dimensional modeling method for vias according to claim 1, characterized in that, The step of determining the triangular prism element corresponding to the through hole based on the geometric parameters specifically includes: Based on the aforementioned geometric parameters, determine the columnar structure of the via; The circular cross-section of the columnar structure is replaced with a regular polygon, and the regular polygon is discretized into triangles. The triangular prism unit is generated based on the processed regular polygon.

4. The three-dimensional modeling method for vias according to claim 1, characterized in that, The step of calculating the conductivity value of each edge of each tetrahedral element based on the conductivity and the finite element algorithm specifically includes: Based on the conductivity, the potential of the steady current field, and the weighted residual method, the weak form of the finite element method is determined; Discretize the computational domain in the finite element weak form based on each of the tetrahedral elements to obtain a system of linear equations; Based on the node coordinates of each tetrahedral element, determine the tetrahedral shape function of each tetrahedral element; Based on the linear equations and the gradient of the tetrahedral shape function, the element conductance matrix of each tetrahedral element and the conductance value of each edge are determined.

5. The three-dimensional modeling method for vias according to claim 4, characterized in that, The determination of the finite element weak form based on the conductivity, the potential of the steady current field, and the weighted residual method specifically includes: Based on the conductivity and the potential of the steady current field, construct a differential equation; The differential equation is derived using the weighted residual method to obtain the weak form of the finite element method.

6. The three-dimensional modeling method for vias according to claim 4, characterized in that, The step of determining the tetrahedral shape function of each tetrahedral element based on the node coordinates of each tetrahedral element specifically includes: The volume of each tetrahedral element is determined based on the node coordinates of each tetrahedral element. The tetrahedral shape function of each tetrahedral element is determined based on the volume of each tetrahedral element.

7. The three-dimensional modeling method for vias according to claim 1, characterized in that, The step of determining the edge resistance of the via three-dimensional mesh based on the conductivity values ​​of all tetrahedral units sharing the same edge specifically includes: The total conductivity of an edge is determined based on the conductivity values ​​of all the tetrahedral cells sharing the same edge. The edge resistance of the via three-dimensional mesh is determined based on the total conductivity value.

8. A three-dimensional modeling system for vias, characterized in that, include: The acquisition module is configured to acquire the geometric parameters and conductivity of the printed circuit board, the geometric parameters including via diameter, via length and connection position between the via and the metal plane; The three-dimensional mesh discretization module is configured to: determine the triangular prism element corresponding to the via based on the geometric parameters; and divide the triangular prism element to obtain three tetrahedral elements of equal volume, wherein the tetrahedral element includes the upper base triangle or the lower base triangle of the triangular prism element. The processing module is configured to: calculate the conductivity value of each edge of each of the tetrahedral elements based on the conductivity and the finite element algorithm; and determine the edge resistance of the via three-dimensional mesh based on the conductivity values ​​of all the tetrahedral elements sharing the same edge. Based on the edge resistance of the via three-dimensional mesh and the metal planar resistance network of the printed circuit board, a target physical quantity is determined, which includes the DC voltage drop across the entire board.

9. A computer device, comprising a memory, a processor, and a computer program stored in the memory, characterized in that, When the computer program is executed by the processor, it implements the steps of the three-dimensional modeling processing method for vias as described in any one of claims 1-7.

10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the steps of the three-dimensional modeling processing method for vias as described in any one of claims 1-7.

Citation Information

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