Bonding wire inductor capacitor voltage controlled oscillator with low phase noise

Abstract

This invention belongs to the field of integrated circuits and relates to a low-phase-noise bonded wire inductor-capacitor voltage-controlled oscillator, comprising: a cross-coupled transistor, a voltage-controlled variable capacitor, a switched capacitor array, a differential bonded wire inductor, a tail current transistor, an on-chip inductor, and a filter capacitor; the switched capacitor array, the voltage-controlled variable capacitor, and the differential bonded wire inductor are connected in parallel; the two ends of the differential bonded wire inductor are connected to one end of the cross-coupled transistor, the other end of the cross-coupled transistor is connected to one end of the on-chip inductor, the other end of the on-chip inductor is connected to the drain of the tail current transistor and one end of the filter capacitor, and the source of the tail current transistor and the other end of the filter capacitor are grounded; this invention achieves a voltage-controlled oscillator through a high-Q differential bonded wire inductor, increasing the Q value by 80% compared to an on-chip inductor; by adding an LC filter composed of a switched capacitor array, a voltage-controlled variable capacitor, and a differential bonded wire inductor between the drain of the tail current source and the source of the cross-coupled transistor, bias current power supply noise is reduced.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuits and relates to a low-phase-noise bonded wire inductor-capacitor voltage-controlled oscillator. Background Technology

[0002] Clock generators are indispensable components in both digital and analog integrated circuits. They are widely used in digital systems, as clock generation modules in data converters, for generating local oscillator signals in RF transceivers, and for generating phase / frequency modulation signals in polarized modulation transmitters. For RF transceivers, the phase noise performance of the clock generator affects the signal-to-noise ratio of the received signal and the power spectrum of the transmitted signal; frequency resolution determines the minimum channel frequency spacing; and lock-in time determines the channel switching speed. In digital systems, clock jitter determines the necessary setup time. Therefore, to enable digital systems to operate at higher frequencies, a clock generator with good jitter performance must be designed.

[0003] In the phase noise contribution of a clock generator, the reference buffer and charge pump are the most important contributing units for the near-end phase noise of the closed loop, while the VCO is the main contributing unit for the phase noise at the far-end frequency offset. However, when the PLL loop bandwidth is narrow, such as at 1kHz or less, the closed-loop phase noise is basically determined by the VCO phase noise, and the noise contribution of other units is greatly suppressed and can be almost ignored. When the clock generator operates in narrow loop bandwidth mode, the corresponding VCO must have excellent phase noise characteristics. Only by achieving low VCO phase noise can the closed-loop output phase noise performance of the product be achieved.

[0004] Traditional inductor-capacitor voltage-controlled oscillators (VCOs) use on-chip inductors as the resonant unit of the core oscillator, such as traditional on-chip spiral inductors. Traditional on-chip inductor-capacitor VCOs have the following drawbacks:

[0005] 1. The on-chip spiral inductor has a large area, making it the module with the largest area consumption in phase-locked loop chips;

[0006] 2. The Q value of the on-chip spiral inductor is relatively low, with an average Q value of around 15. The higher the Q value of the inductor, the lower the phase noise. Another important parameter is the inductance value, which affects the equivalent parallel impedance Rp=ω*L*Q of the LC resonant cavity Tank. Reducing the inductance will reduce the corresponding equivalent parallel impedance Rp (while keeping the Q value constant), thus improving the phase noise performance. Summary of the Invention

[0007] To address the aforementioned problems in the prior art, this invention employs a low-phase-noise bonded wire inductor-capacitor voltage-controlled oscillator, comprising: a cross-coupled transistor and a voltage-controlled variable capacitor C. VSwitched capacitor array, differential bonded wire inductor L B Tail current tube M N3 On-chip inductor L p and filter capacitor C p ;

[0008] Switched capacitor array, voltage-controlled variable capacitor C V With differential bonding wire inductor L B Parallel, differential bonded wire inductor L B The two ends are connected to one end of the cross-coupled transistor, and the other end of the cross-coupled transistor is connected to the on-chip inductor L. p One end, on-chip inductor L p The other end is connected to the tail current tube M N3 Drain and filter capacitor C p One end, tail current tube M N3 The source and filter capacitor C p The other end is grounded, and the tail current tube M N3 Gate connection bias voltage V B .

[0009] Differential bonded wire inductor L B Includes: a substrate and bonding wires 1-4. Pads PAD1, PAD2, PAD5, and PAD6 are arranged sequentially from top to bottom on the left side of the substrate's upper surface, and pads BYPASS1, PAD3, PAD4, and BYPASS2 are arranged sequentially from top to bottom on the right side of the substrate's upper surface. BYPASS1 is connected to PAD1 via bonding wire 1, PAD1 and PAD2 are connected via on-chip metal, PAD2 and PAD3 are connected via bonding wire 2, and PAD3 and PAD4 are connected via on-chip metal, and a bias voltage V is applied. BIAS PAD4 and PAD5 are connected by bonding wire 3, PAD5 and PAD6 are connected by on-chip metal, and PAD6 and BYPASS2 are connected by bonding wire 4. BYPASS1 and BYPASS2 are differential bonding wire inductors L. B The two ends.

[0010] Beneficial effects:

[0011] 1. This invention achieves a low-phase-noise voltage-controlled oscillator using a high-Q differential bonded wire inductor, with the Q value of the differential bonded wire inductor increasing by 80% compared to the Q value of an on-chip inductor; 2. This invention utilizes a tail current source M... N3 The drain and cross-coupled transistor M N1 M N2 An LC filter, namely a switched capacitor array and a voltage-controlled variable capacitor C, is added between the source stages. V and differential bonded wire inductor L BThe LC frequency tuning circuit is composed of a current source that diverts noise near twice the oscillation frequency, preventing it from entering the oscillation current, reducing bias current power supply noise, optimizing the phase noise of the voltage-controlled oscillator, and can be applied to low phase noise and low jitter phase-locked loop systems. Attached Figure Description

[0012] Figure 1 A schematic diagram of a low-phase-noise bonded wire inductor-capacitor voltage-controlled oscillator provided in an embodiment of the present invention;

[0013] Figure 2 This is a schematic diagram of a differential bonding wire inductor provided in an embodiment of the present invention;

[0014] Figure 3 This is a schematic diagram of a differential bonding wire inductor provided in an embodiment of the present invention;

[0015] Figure 4 A schematic diagram of a switched capacitor array provided in an embodiment of the present invention;

[0016] Figure 5 This is a schematic diagram of phase noise simulation for an on-chip inductor VCO provided in an embodiment of the present invention;

[0017] Figure 6 This is a schematic diagram of phase noise simulation for a differential bonded wire inductor VCO provided in an embodiment of the present invention. Detailed Implementation

[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] like Figure 1 As shown, this invention employs a low-phase-noise bonded wire inductor-capacitor voltage-controlled oscillator, comprising: a cross-coupled transistor and a voltage-controlled variable capacitor C. V Switched capacitor array, differential bonded wire inductor L B The tail current transistor M of the voltage-controlled oscillator N3 On-chip inductor L p and filter capacitor C p ;

[0020] Switched capacitor array, voltage-controlled variable capacitor C V With differential bonding wire inductor L B They are connected in parallel to form an LC frequency tuning circuit and connected to the power supply VDD; differential bonded wire inductor L B The two ends are connected to one end of the cross-coupled transistor, and the other end of the cross-coupled transistor is connected to the on-chip inductor L.p One end, on-chip inductor L p The other end is connected to the tail current tube M N3 Drain and filter capacitor C p One end, tail current tube M N3 The source and filter capacitor C p The other end is grounded, and the tail current tube M N3 Gate connection bias voltage V B .

[0021] The oscillation frequency of the VCO can be expressed as:

[0022]

[0023] Among them, C BANK C represents the capacitance of the switched capacitor array. V The capacitance value is the voltage-controlled variable capacitor. This represents the inductance value of the differential bonded wire inductor.

[0024] The cross-coupled transistor acts as a negative resistor to provide energy to the LC resonant circuit, specifically including: the first transistor M. N1 Second transistor M N2 First transistor M N1 Drain-connected differential bonding wire inductor L B One end and the second transistor M N2 The gate of the second transistor M; N2 Drain-connected differential bonding wire inductor L B The other end and the first transistor M N1 The gate of the first transistor M; N1 Second transistor M N2 The source of the on-chip inductor L p .

[0025] Voltage-controlled variable capacitor C V Includes: First voltage-controlled variable capacitor C V1 Second voltage-controlled variable capacitor C V2 The first voltage-controlled variable capacitor C V1 One end is connected to a differential bonding wire inductor L B One end, the second voltage-controlled variable capacitor C V2 One end is connected to a differential bonding wire inductor L B The other end; the first voltage-controlled variable capacitor C V1 The other end is connected to the second voltage-controlled variable capacitor C. V2 The other end is connected to the control voltage V. CTRL .

[0026] like Figure 2 As shown, the differential bonding wire inductor L BIncludes: a substrate IC and bonding wires 1-4. On the left side of the upper surface of the substrate IC, from top to bottom, are pads PAD1, PAD2, PAD5, and PAD6. On the right side of the upper surface of the substrate IC, from top to bottom, are pads BYPASS1, PAD3, PAD4, and BYPASS2. BYPASS1 is connected to PAD1 via bonding wire 1, PAD1 and PAD2 are connected via on-chip metal, PAD2 and PAD3 are connected via bonding wire 2, and PAD3 and PAD4 are connected via on-chip metal and connected to a bias voltage V. BIAS PAD4 and PAD5 are connected by bonding wire 3, PAD5 and PAD6 are connected by on-chip metal, and PAD6 and BYPASS2 are connected by bonding wire 4. BYPASS1 and BYPASS2 are differential bonding wire inductors L. B The two ends.

[0027] Pads PAD1, PAD2, PAD5, and PAD6 are in the same vertical position, and pads BYPASS1, PAD3, PAD4, and BYPASS2 are in the same vertical position. Pads BYPASS1, PAD3, PAD4, and BYPASS2 correspond one-to-one with pads PAD1, PAD2, PAD5, and PAD6 in the same horizontal position.

[0028] Bonding wire 1 and bonding wire 2 together form a differential bonding wire inductor L B At one end, bonding wires 3 and 4 form a differential bonding wire inductor L. B At the other end, the common-mode voltage of the differential line is V. BIAS The circuit model of a single-ended differential bonding wire inductor is as follows: Figure 3 As shown, the self-inductance L and mutual inductance M of a single-ended inductor are given by the formula:

[0029]

[0030]

[0031] Where r is the diameter of the bonding wire, d is the spacing between the bonding wires, and l is the length of the bonding wire.

[0032] Inductance value of a single-ended differential bonded wire inductor The quality factor Q of an inductor is shown in the formula:

[0033]

[0034] Among them, R bond Here, ω is the bonding wire resistance, ω is the oscillation angular frequency, and C is the oscillation frequency. PAD R is the parasitic capacitance of the pad PAD. PAD This represents the parasitic resistance of the pad.

[0035] The resistance R of the bonding wire bond The parasitic capacitance C of the pad is relatively small. PAD and parasitic resistance R PAD They are all relatively small, and can be set up through simulation. R bond =200mΩ, C PAD =270fF, R PAD =20Ω, r=25µm, d=50µm, l=700µm, the inductance Q of the differential bonding wire is obtained as 28.28. The Q value is 1.64nH, which is 80% higher than that of an on-chip inductor, while the area is reduced by 20%.

[0036] like Figure 4 As shown, the switched capacitor array includes N switched capacitor units connected in parallel; each switched capacitor unit n includes: a resistor R n1 R n2 R n3 transistor M n Capacitor C n1 C n2 Inverter INV n1 INV n2 and switch control code S n Resistance R n1 R n2 R n3 The same, capacitor C n1 C n2 Same; Inverter INV n1 The input terminal of the inverter INV n2 Input terminal, resistor R n3 One end is connected to the switch control code S n resistance R n3 The other end is connected to transistor M n The gate of the inverter INV n1 The output terminal is connected to resistor R n1 One end, inverter INV n2 The output terminal is connected to resistor R n2 One end, resistor R n1 The other end is connected to capacitor C n1 One end and transistor M n The source, resistor R n2 The other end is connected to capacitor C n2 One end and transistor M n The drain, capacitor C n1 C n2 The other end is connected to the differential bonding wire inductor L. B The two ends; among them, .

[0037] The capacitance C of the switched capacitor unit n n1 C n2 The capacitance value is transistor M n The number m of NMOS transistors connected in parallel is Where C is the capacitance C 01 C 02 The capacitance value.

[0038] Switch control codes S0~S N Control switching MOSFETs M0~M N The number of capacitors connected between BYPASS1 and BYPASS2 is increased by adding switching transistor M. n Width, reduce switching transistor M n The length increases the Q value of the switched capacitor array.

[0039] In this embodiment, N is 4.

[0040] Leeson's equation is a classic model formula characterizing VCO phase noise, as shown below:

[0041]

[0042] In the formula, k is the Boltzmann constant, T is the absolute temperature, and R is the absolute temperature. p Here, F is the equivalent parallel resonant cavity impedance of the LC resonant cavity, and F is the noise factor of the active device. The shift in angular frequency, The center angular frequency, This represents the amplitude of the oscillator's output signal.

[0043] As can be seen from the equation above, the VCO phase noise depends on the Q value of the inductor. However, based on the SiGe BiCMOS process, even with thick aluminum, the Q value of the inductor can only reach a maximum of 15. The Q value of the bonding wire inductor used in this invention can reach more than 28.

[0044] like Figure 5 and Figure 6 As shown, under the condition of a voltage-controlled oscillator oscillation frequency (relative frequency) of 2.95 GHz, the simulated output noise of the on-chip inductor is -115.07 dBc / Hz@1 MHz, and the phase noise of the bonded wire inductor is -121.28 dBc / Hz@1 MHz. A high Q value can improve the phase noise by -6 dBc / Hz.

[0045] Although embodiments of the invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A low-phase-noise bonded wire inductor-capacitor voltage-controlled oscillator, characterized in that, include: Cross-coupled transistor, voltage-controlled variable capacitor C V Switched capacitor array, differential bonded wire inductor L B Tail current tube M N3 On-chip inductor L p and filter capacitor C p ; Switched capacitor array, voltage-controlled variable capacitor C V With differential bonding wire inductor L B Parallel, differential bonded wire inductor L B The two ends are connected to one end of the cross-coupled transistor, and the other end of the cross-coupled transistor is connected to the on-chip inductor L. p One end, on-chip inductor L p The other end is connected to the tail current tube M N3 Drain and filter capacitor C p One end, tail current tube M N3 The source and filter capacitor C p The other end is grounded, and the tail current tube M N3 Gate connection bias voltage V B .

2. The low phase noise bonded wire inductor-capacitor voltage-controlled oscillator according to claim 1, characterized in that, Differential bonded wire inductor L B Includes: a substrate and bonding wires 1-4. Pads PAD1, PAD2, PAD5, and PAD6 are arranged sequentially from top to bottom on the left side of the substrate's upper surface, and pads BYPASS1, PAD3, PAD4, and BYPASS2 are arranged sequentially from top to bottom on the right side of the substrate's upper surface. BYPASS1 is connected to PAD1 via bonding wire 1, PAD1 and PAD2 are connected via on-chip metal, PAD2 and PAD3 are connected via bonding wire 2, and PAD3 and PAD4 are connected via on-chip metal, and a bias voltage V is applied. BIAS PAD4 and PAD5 are connected by bonding wire 3, PAD5 and PAD6 are connected by on-chip metal, and PAD6 and BYPASS2 are connected by bonding wire 4. BYPASS1 and BYPASS2 are differential bonding wire inductors L. B The two ends.

3. A low-phase-noise bonded wire inductor-capacitor voltage-controlled oscillator according to claim 2, characterized in that, Pads PAD1, PAD2, PAD5, and PAD6 are in the same vertical position, and pads BYPASS1, PAD3, PAD4, and BYPASS2 are in the same vertical position. Pads BYPASS1, PAD3, PAD4, and BYPASS2 correspond one-to-one with pads PAD1, PAD2, PAD5, and PAD6 in the horizontal direction.

4. A low-phase-noise bonded wire inductor-capacitor voltage-controlled oscillator according to claim 2, characterized in that, The diameter of the bonding wire is r=25µm, the spacing between the bonding wires is d=50µm, and the length of the bonding wire is l=700µm.

5. A low-phase-noise bonded wire inductor-capacitor voltage-controlled oscillator according to claim 1, characterized in that, The cross-coupled transistor includes: a first transistor M N1 Second transistor M N2 First transistor M N1 Drain-connected differential bonding wire inductor L B One end and the second transistor M N2 The gate of the second transistor M; N2 Drain-connected differential bonding wire inductor L B The other end and the first transistor M N1 The gate of the first transistor M; N1 Second transistor M N2 The source of the on-chip inductor L p .

6. A low-phase-noise bonded wire inductor-capacitor voltage-controlled oscillator according to claim 1, characterized in that, Voltage-controlled variable capacitor C V Includes: First voltage-controlled variable capacitor C V1 Second voltage-controlled variable capacitor C V2 The first voltage-controlled variable capacitor C V1 One end is connected to a differential bonding wire inductor L B One end, the second voltage-controlled variable capacitor C V2 One end is connected to a differential bonding wire inductor L B The other end; the first voltage-controlled variable capacitor C V1 The other end is connected to the second voltage-controlled variable capacitor C. V2 The other end is connected to the control voltage V. CTRL .

7. A low-phase-noise bonded wire inductor-capacitor voltage-controlled oscillator according to claim 1, characterized in that, The switched capacitor array comprises N switched capacitor units connected in parallel; each switched capacitor unit n includes: a resistor R n1 R n2 R n3 transistor M n Capacitor C n1 C n2 Inverter INV n1 INV n2 and switch control code S n Inverter INV n1 The input terminal of the inverter INV n2 Input terminal, resistor R n3 One end is connected to the switch control code S n resistance R n3 The other end is connected to transistor M n The gate of the inverter INV n1 The output terminal is connected to resistor R n1 One end, inverter INV n2 The output terminal is connected to resistor R n2 One end, resistor R n1 The other end is connected to capacitor C n1 One end and transistor M n The source, resistor R n2 The other end is connected to capacitor C n2 One end and transistor M n The drain, capacitor C n1 C n2 The other end is connected to the differential bonding wire inductor L. B The two ends; among them, .

8. The bonded-wire inductor-capacitor voltage-controlled oscillator of claim 7, wherein, All resistors R of all switched capacitor units n n1 R n2 R n3 The same capacitor C of the same switched capacitor unit n n1 and capacitor C n2 same.

9. A low-phase-noise bonded wire inductor-capacitor voltage-controlled oscillator according to claim 7, characterized in that, The capacitance of the capacitor of the switch capacitor unit n is , transistor M n The number m of parallel NMOS transistors is ; wherein C is the capacitance of the capacitor C 01 , C 02 .

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