A pure hardware keyless entry system and a control method thereof

Abstract

The application discloses a pure hardware non-inductive key system and a control method thereof, and core steps are independent of a general processor and independent of software or firmware execution. The system comprises a hardware distance comparator, a hardware state machine, a hardware security authentication flip-flop, a hardware timer for leaving a lock vehicle, a one-time programmable storage unit, a time-of-flight distance measurement circuit, an anti-disassembly detection loop, a multi-stage wake-up circuit, a hardware phase extraction circuit, a key permission hardware table and a key blacklist hardware table. The time-of-flight distance measurement circuit continuously acquires real-time distance values between a key and a vehicle, the hardware distance comparator outputs a trigger pulse when the distance exceeds a threshold, and the hardware state machine drives the hardware security authentication flip-flop to complete identity authentication, and outputs a vehicle door unlocking signal or a locking signal after authentication. The application can eliminate the attack surface at the software level, reduce the response delay, realize the anti-repeater attack capability at the physical layer, and cannot be modified through the software interface after the security parameters are fixed.

Description

Technical Field

[0001] This invention relates to the field of automotive electronic safety technology, specifically to a pure hardware-based keyless entry system and its control method that does not rely on a general-purpose processor, software, or firmware, covering the security protection technologies of the radio frequency physical layer, hardware circuit layer, and physical intrusion layer of the keyless entry system for automobiles. Background Technology

[0002] Current contactless entry systems for automobiles typically employ a general-purpose processor to run software programs. The processor executes software instructions stored in memory to perform distance determination, authentication, and vehicle locking / unlocking decisions.

[0003] The above implementation method has the following technical problems: First, distance determination and state transition are performed by software, and the response time is affected by processor task scheduling and interrupt response, resulting in significant latency fluctuations.

[0004] Second, during the authentication process, the key is accessed in the software environment of a general-purpose processor, which poses a risk of it being read or tampered with by the software.

[0005] Third, software-implemented seamless system entry requires the processor to periodically perform scanning and calculation tasks, resulting in high standby power consumption.

[0006] Fourth, security parameters are usually stored in rewritable memory and can be modified through a software interface, resulting in insufficient security.

[0007] In addition, existing contactless key systems with time-of-flight ranging capabilities rely heavily on software algorithms for ranging security verification, resulting in limited defense against professional radio frequency distance spoofing attacks such as advanced pulse injection and overlapping pulse forgery. Hardware encryption engines generally lack side-channel protection mechanisms, making it easy to extract keys through power consumption and electromagnetic radiation analysis. Single-wire tamper protection circuits are easily bypassed by conductive media, resulting in weaknesses in physical intrusion protection. State machine and timer circuits lack anti-interference design, making them susceptible to power supply glitches and electromagnetic interference, which can lead to abnormal states or functional failures. Summary of the Invention

[0008] This invention provides a pure hardware contactless key system and its control method, wherein distance judgment is performed by a hardware comparator, state transition is performed by a hardware state machine, and identity authentication is performed by a hardware security authentication trigger.

[0009] Compared with the prior art, the core difference of the present invention is that the prior art uses a general-purpose processor to execute software instructions to complete distance judgment, state transition and identity authentication; the present invention directly completes the above operations with a hardware distance comparator, a hardware state machine and a hardware security authentication trigger, without relying on a general-purpose processor and software firmware.

[0010] Furthermore, this invention employs pure hardware circuits to achieve security hardening in three dimensions: the radio frequency ranging layer, the circuit security layer, and the physical protection layer. The ranging layer resists distance spoofing attacks through encrypted scrambling timestamps and bilateral bidirectional ranging. The circuit layer resists side-channel attacks and power supply glitches through masking circuits, true random number generators, and high Hamming distance state coding. The physical layer resists physical intrusion and cracking through grid impedance-type tamper-proof loops and obfuscated storage mechanisms, thus supplementing the security protection capabilities of the pure hardware architecture in multiple dimensions.

[0011] The technical effects resulting from the above differences include: the response time for distance determination is no longer affected by processor task scheduling; the key does not enter the software environment during the authentication process; there is no need for the processor to periodically wake up in standby mode; security parameters cannot be modified through the software interface after being solidified; and it also has the ability to protect against radio frequency attacks, hardware attacks, and physical intrusion attacks. Beneficial effects

[0012] Compared with the prior art, the present invention has the following beneficial effects: 1. The hardware distance comparator performs a parallel comparison between the distance value output by the time-of-flight ranging circuit and a fixed threshold, outputting a trigger signal. The response delay is unaffected by processor load. The hardware comparator is a pure combinational logic circuit, with the distance value and threshold input in parallel, and the comparison result is output in real time.

[0013] 2. The hardware security authentication trigger directly reads the embedded identity identifier from the one-time programmable memory unit and generates an authentication frame through a hardware algorithm engine. The key does not pass through the software environment. The key and the calculation process are all completed within the hardware circuit, without passing through any software-accessible bus or register.

[0014] 3. After receiving the trigger pulse, the hardware state machine completes the state transition on the next clock edge, with a delay of one clock cycle and no instruction cycle overhead. The state transition is directly driven by the hardware state machine and does not involve software decision branches.

[0015] 4. The multi-stage wake-up circuit maintains only the low-power oscillator in standby mode, eliminating the need for periodic processor wake-up, and its static current can be less than 1 microamp. It only wakes up stage by stage when a specific wake-up signal is detected.

[0016] 5. The long-distance threshold, short-distance threshold, vehicle lock departure threshold, preset duration, identity identifier, and key data are stored in a one-time programmable storage unit. After leaving the factory, a physical circuit breaker is executed, and it cannot be modified at the physical level through conventional methods.

[0017] 6. The system does not rely on a general-purpose processor or an operating system, therefore there is no operating system-level attack surface such as system call hijacking, privilege escalation, memory overflow, or backdoor implantation.

[0018] 7. The anti-tamper detection circuit adopts a grid-like multi-point impedance design. Abnormal circuit impedance directly triggers the one-time programmable memory cell to blow. It is a purely physical response that does not rely on any software judgment and can resist short-circuit bypass attacks on conductive media.

[0019] 8. The vehicle lock hardware timer is driven by an independent temperature-controlled crystal clock and is equipped with a timing redundancy check circuit. There is no software interface to access it. The clock frequency is determined by the physical characteristics of the quartz crystal and is not affected by software clock tampering or external electromagnetic interference.

[0020] 9. The hardware phase extraction circuit directly extracts the micro-Doppler phase change from the time-of-flight ranging echo. It uses a multi-dimensional composite verification of respiratory rhythm and body micro-motion. It belongs to the signal processing of the radio frequency physical layer and does not go through image sensors and software algorithms. It can resist single-frequency vibration simulation attacks.

[0021] 10. The time-of-flight ranging circuit adopts an encrypted scrambling timestamp sequence and a bilateral bidirectional ranging mechanism. The hardware circuit verifies the legality of pulses and multipath peaks in real time, which can effectively suppress professional distance deception attacks such as leading pulse injection and overlapping pulse forgery. The anti-relay capability has been upgraded from basic delay detection to physical layer encrypted ranging.

[0022] 11. The hardware algorithm engine is equipped with a first-order masking circuit and a random clock jitter circuit, which can mask the power consumption and electromagnetic radiation characteristics during the encryption operation, suppress side-channel attacks such as differential power analysis, and reduce the risk of the key being extracted through physical leakage.

[0023] 12. Built-in hardware true random number generator enables two-way challenge-response authentication between the vehicle and the key. The authentication message is unpredictable and can resist replay attacks and one-way authentication forgery.

[0024] 13. The hardware state machine adopts high Hamming distance state coding, has built-in illegal state capture and automatic reset circuits, and is equipped with a power glitch suppression network at the front end, which can resist illegal state transitions and state deadlocks caused by voltage glitches, reducing the risk of the authentication process being directly bypassed.

[0025] 14. The key data is stored in a one-time programmable storage unit after being physically obfuscated and encrypted. Even if the fuse status is read by physical means, the plaintext key cannot be obtained directly, thus improving data security in physical intrusion scenarios.

[0026] 15. The key blacklist addition operation configuration includes a multi-level hardware permission verification and operation confirmation mechanism, coupled with a redundant fuse bit design, which can resist malicious writes and fuse exhaustion denial-of-service attacks, ensuring the reliability of system permission management. Detailed Implementation

[0027] The present invention will now be described in detail with reference to specific embodiments.

[0028] Example 1: Pure Hardware Seamless Unlocking Circuit The pure hardware contactless unlocking circuit in this embodiment includes a hardware distance comparator, a hardware state machine, and a hardware security authentication trigger, and does not rely on a general-purpose processor, software, or firmware execution throughout the entire process.

[0029] The hardware distance comparator has a pre-set unlock threshold internally, stored in a one-time programmable memory unit that cannot be modified after leaving the factory. The time-of-flight ranging circuit continuously acquires the real-time distance value between the key and the vehicle, inputting it in parallel as a digital signal to the hardware distance comparator. The hardware distance comparator is a pure combinational logic circuit, with the distance value and threshold input in parallel, and the comparison result output in real time.

[0030] When the distance value exceeds the preset unlock threshold, the hardware distance comparator outputs an unlock trigger pulse. The unlock trigger pulse is directly sent to the trigger input of the hardware state machine.

[0031] The hardware state machine employs high Hamming distance state encoding, internally defining four states: locked, standby, authenticated, and unlocked. The Hamming distance between each state encoding is no less than 3, reducing the probability of erroneous state transitions caused by single-bit jumps. The hardware state machine incorporates illegal state capture and automatic reset circuitry; upon detecting an undefined illegal state, it automatically resets to the locked state. The front-end of the hardware state machine features a power supply glitch suppression network, composed of multi-stage RC filters and clamping circuits, capable of filtering out nanosecond-level voltage glitches and preventing them from disrupting register setup and hold times.

[0032] Upon receiving the unlock trigger pulse, the hardware state machine automatically transitions from the locked state to the authenticated state on the next clock edge. This state transition is driven by the hardware trigger signal and does not rely on any software judgment.

[0033] After the hardware state machine enters the authentication state, it drives the hardware security authentication trigger to read the embedded identity identifier in the one-time programmable memory unit. The hardware security authentication trigger integrates a hardware algorithm engine with a key length of no less than 256 bits. The hardware algorithm engine is configured with a first-order masking circuit and a random clock jittering circuit. During the operation, a random mask is added to the intermediate data, and the operation timing is shuffled by random clock jittering to mask power consumption and electromagnetic radiation characteristics and suppress side-channel attacks.

[0034] The circuit incorporates a hardware true random number generator, which generates true random numbers based on the oscillator phase jitter principle to achieve two-way challenge-response authentication between the vehicle and the key. During the authentication process, the vehicle sends a random challenge value, and the key generates a response frame based on the hardware algorithm engine, which is then sent to the vehicle by the radio frequency transmission circuit; simultaneously, the key also sends a random challenge value to the vehicle, completing the two-way identity verification.

[0035] After the vehicle-side hardware security module completes authentication, it returns a confirmation signal. Upon receiving the confirmation signal, the hardware state machine transitions to the unlocked state and outputs a door unlock signal.

[0036] Example 2: Pure hardware-based removal of the automatic vehicle locking circuit The automatic vehicle locking circuit in this embodiment includes a hardware distance comparator, a hardware timer for vehicle locking upon departure, and a hardware state machine. It does not rely on a general-purpose processor, software, or firmware for execution.

[0037] The hardware distance comparator continuously acquires the real-time distance value between the key and the vehicle. The vehicle lock threshold and preset duration are both stored in a one-time programmable memory unit.

[0038] When the distance value remains above the vehicle departure threshold, the vehicle departure hardware timer begins to decrement. When the distance value returns to within the vehicle departure threshold, the timer automatically resets. When the timer decrements to zero, a single-cycle vehicle departure trigger pulse is output.

[0039] The vehicle departure lock hardware timer employs a temperature-controlled crystal oscillator and a timing redundancy check circuit, and is equipped with an electromagnetic shielding structure. The clock frequency is determined by the physical characteristics of the quartz crystal and is not accessible through a software interface, thus remaining unaffected by software clock tampering or external electromagnetic interference. The timing redundancy check circuit performs multi-sample verification of the timing results, reducing the probability of timing errors caused by a single interference event.

[0040] After receiving the vehicle lock trigger pulse, the hardware state machine automatically transitions from the unlocked state to the locked state on the next clock edge, outputting a door lock signal and an anti-theft activation signal.

[0041] Example 3: Schmitt trigger anti-shake feature The hardware distance comparator incorporates a Schmitt trigger feature: a preset difference exists between the unlock threshold and the lock threshold. The distance must be less than the unlock threshold to trigger unlocking, and greater than the lock threshold to trigger lock.

[0042] When the key moves back and forth near the threshold boundary, because the unlock threshold and the lock threshold are different, the hardware comparator will not repeatedly flip the output near a single distance value, thus preventing the key from repeatedly triggering the unlock and lock actions.

[0043] The Schmitt triggering characteristic is implemented by the hysteresis circuit of the hardware comparator, without the need for any software debouncing algorithm.

[0044] Example 4: Time-of-Flight Safe Ranging Mechanism The time-of-flight ranging circuit employs an encrypted scrambling timestamp sequence and a bilateral bidirectional ranging mechanism, all implemented entirely in hardware.

[0045] The ranging pulse sequence is equipped with an encrypted scrambling timestamp, which is generated by a hardware true random number generator and is different for each ranging round. The hardware verification circuit performs real-time matching and verification of the timestamp sequence of the received pulses. Pulses with mismatched sequences are directly identified as forged pulses and are not accepted, which can resist advance pulse injection attacks.

[0046] The ranging mechanism employs a bilateral, bidirectional ranging method. The vehicle and key terminals each transmit ranging pulses and measure the round-trip time. The bidirectional measurement results are cross-checked to prevent spoofing and offsetting of unidirectional ranging. A hardware multipath peak detection circuit sorts and analyzes the characteristics of multiple peaks in the received signal, identifying and eliminating spoofed overlapping pulses, thus reducing the probability of ranging result offsets caused by overlapping pulse attacks.

[0047] The additional transmission delay introduced by the relay device will be accurately detected and identified as an attack. If an attack is identified, the unlocking or locking operation will be refused.

[0048] Example 5: One-time programmable storage and identity solidification The one-time programmable memory unit uses a fuse-type programmable memory. All threshold parameters, such as long-distance threshold, short-distance threshold, vehicle lock departure threshold, and preset duration, are stored in the one-time programmable memory unit.

[0049] The hardware security chip is uniquely paired with the vehicle's security module at the factory. The hash values ​​of the public keys of both parties are stored in a one-time programmable memory unit. The key data is stored after being physically obfuscated and encrypted. Both the storage address and data bits are hardware-interchangeable and obfuscated, so even if the fuse status is physically read, the plaintext key cannot be directly recovered.

[0050] Once paired, the one-time programmable memory cell physically fuses; the fuse is burned by a large current, causing permanent migration of metal atoms, making physical recovery impossible. After the fuse is fused, it is impossible to add a new key through conventional methods, nor can the already embedded identity and key data be modified.

[0051] The storage unit is configured with redundant fuse bits to reserve sufficient fuse resources for write operations such as blacklist operations, thereby reducing the probability of functional failure due to fuse exhaustion.

[0052] Example 6: Anti-tamper detection and emergency fuse The inner wall of the key casing is equipped with a grid-like multi-point impedance-type tamper detection circuit. The circuit consists of a grid structure composed of multiple intersecting thin wires, with different reference impedances in different areas, and the overall impedance of the circuit is within a preset range.

[0053] When the casing is opened, any break in any wire will cause the loop impedance to exceed the threshold; even shorting a portion of the wire through a conductive medium will change the overall loop impedance and will be detected. An abnormal loop impedance signal directly triggers the one-time programmable memory unit to perform an emergency fuse, erasing all key and identity data.

[0054] The entire process is controlled by a purely physical circuit and a hardware impedance comparator; no software can intercept, delay, or spoof it. Impedance anomalies are physically objective and difficult to bypass using conventional methods.

[0055] Example 7: Multi-level wake-up circuit and low-power management The multi-stage wake-up circuit includes a low-power oscillator and a wake-up signal detector. Normally, only the low-power oscillator operates, with a quiescent current of less than 1 microamp and power consumption in the nanowatt range.

[0056] When the wake-up signal detector detects a specific wake-up signal emitted by the vehicle, it first wakes up the hardware security chip for pre-authentication. After successful pre-authentication, the main circuit is awakened, and after completing authentication, it immediately enters sleep mode.

[0057] The entire wake-up and hibernation process is controlled by a hardware state machine, eliminating the need for periodic processor wake-ups. Battery life can be extended to over ten years.

[0058] Example 8: Multidimensional composite liveness detection The echo signal from the time-of-flight ranging circuit is simultaneously fed into the hardware phase extraction circuit. The hardware phase extraction circuit extracts the micro-Doppler phase changes caused by the rise and fall of the human chest cavity from the echo signal, and at the same time extracts the phase fluctuation characteristics caused by limb micro-movements, forming a multi-dimensional feature of respiratory rhythm and body micro-movements.

[0059] The hardware comparator performs composite verification of multi-dimensional features: a liveness confirmation signal is output only when the respiratory phase change frequency falls within a preset respiratory frequency range and the body micro-movement characteristics conform to human activity patterns. A single-frequency vibration signal cannot simultaneously meet both verification conditions and therefore cannot pass the liveness confirmation.

[0060] The hardware state machine is only allowed to enter the authentication state upon receiving a liveness confirmation signal. Without a liveness confirmation signal, the hardware state machine remains in the locked state, even if the distance value meets the unlocking conditions.

[0061] Liveness detection is performed at the radio frequency physical layer, without going through image sensors and software algorithms.

[0062] Example 9: Multi-key hierarchical access control and blacklist The key access control hardware table permanently stores the access levels of each key in a one-time programmable storage unit. Access levels include owner key, family key, valet key, and temporary key. The owner key has access to all functions and can authorize other keys; the family key has access to driving functions but cannot authorize others; the valet key has speed limits and restricted function access within a specified time frame; and the temporary key has a preset expiration date. All access levels are permanently stored in hardware and cannot be modified via software.

[0063] The key blacklist hardware table allows vehicle owners to add lost keys to the blacklist using a legitimate key via a purely hardware-triggered method. Adding a key to the blacklist requires multi-level hardware permission verification: first, it verifies the access level of the key, ensuring only the vehicle owner's key has blacklist access privileges; second, it requires multiple consecutive confirmation triggers to reduce the probability of accidental or malicious actions.

[0064] The operation is achieved through hardware fuse breaking, with redundant fuse bits configured to ensure multiple operation capabilities, resisting malicious writes and fuse exhaustion denial-of-service attacks. Keys added to the blacklist cannot be authenticated.

[0065] Example 10: Overall Architecture of a Pure Hardware-Based Seamless Key System This embodiment provides the overall architecture of a purely hardware-based contactless key system. The system includes all the circuit modules described in the above embodiments, all implemented entirely in hardware, without relying on any general-purpose processor, software, or firmware.

[0066] The various circuit modules within the system are directly connected via hardware signal lines. Trigger signals are transmitted between modules in the form of pulses. State transitions are managed uniformly by a hardware state machine. All safety parameters and thresholds are stored in a one-time programmable memory unit.

[0067] The system continuously acquires the physical distance between the key and the vehicle through a time-of-flight ranging circuit. A hardware comparator determines in real time whether the distance exceeds a preset threshold, a hardware state machine manages all state transitions, a hardware security authentication trigger completes identity authentication, and a hardware timer manages the automatic locking sequence upon leaving the vehicle. The system integrates three layers of security mechanisms: ranging security, circuit security, and physical intrusion protection, enhancing overall system security from multiple dimensions.

[0068] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A control method for a contactless key system, characterized in that, The core steps of the method do not rely on general-purpose processors, nor on software or firmware execution; they are all implemented by pure hardware circuitry, including the following steps: The time-of-flight ranging circuit continuously acquires the real-time distance value between the key and the vehicle; The hardware distance comparator outputs a trigger pulse when the distance value crosses a preset threshold. After receiving a trigger pulse, the hardware state machine automatically switches to the working state and drives the hardware security authentication trigger to complete identity authentication. Once authentication is successful, a door control signal is output.

2. A purely hardware-based contactless unlocking circuit, characterized in that, The circuit does not rely on a general-purpose processor or software or firmware execution, and includes a hardware distance comparator, a hardware state machine, and a hardware security authentication trigger. The hardware distance comparator is used to receive the real-time distance value output by the time-of-flight ranging circuit and output an unlock trigger pulse when the distance value crosses a preset unlock threshold. The hardware state machine is connected to the output of the hardware distance comparator and automatically jumps to the authentication state after receiving the unlock trigger pulse. The hardware security authentication trigger is connected to the hardware state machine, which drives the identity authentication process. Once the authentication is successful, a door unlock signal is output.

3. A purely hardware-based automatic vehicle locking circuit, characterized in that: The circuit does not rely on a general-purpose processor, nor does it rely on software or firmware execution. It includes a hardware distance comparator, a hardware timer for leaving the vehicle lock, and a hardware state machine. The hardware distance comparator is used to continuously acquire the real-time distance value between the key and the vehicle; The vehicle lock departure hardware timer is connected to the hardware distance comparator. When the distance value is continuously greater than the vehicle lock departure threshold for a preset duration, a vehicle lock trigger pulse is output. The hardware state machine is connected to the output of the vehicle lock release hardware timer. After receiving the vehicle lock trigger pulse, it outputs a door lock signal and an anti-theft activation signal.

4. The pure hardware contactless unlocking circuit according to claim 2, characterized in that, The preset unlock thresholds include a long-distance threshold and a short-distance threshold; when the distance value jumps from greater than the long-distance threshold to less than the short-distance threshold, the hardware distance comparator outputs an unlock trigger pulse; the hardware distance comparator has a built-in hysteresis circuit, forming a Schmitt trigger anti-shake characteristic; the time-of-flight ranging circuit adopts an encrypted scrambling timestamp sequence and a bilateral bidirectional ranging mechanism, and the hardware circuit verifies the pulse legality and multipath peaks to suppress distance spoofing attacks such as leading pulse injection and overlapping pulse forgery.

5. The pure hardware contactless unlocking circuit according to claim 2, characterized in that, The hardware security authentication trigger has a built-in hardware algorithm engine with a key length of no less than 256 bits. The hardware algorithm engine is equipped with a first-order mask circuit and a random clock jitter circuit to suppress side-channel power leakage. It features a built-in hardware true random number generator, enabling two-way challenge-response authentication between the vehicle and the key, resisting replay attacks and one-way authentication forgery.

6. The pure hardware contactless unlocking circuit according to claim 2, characterized in that, The hardware state machine adopts high Hamming distance state encoding and has a built-in illegal state capture and automatic reset circuit; the front end is configured with a power glitch suppression network to resist illegal state transitions and state deadlocks caused by voltage glitch.

7. The circuit according to claim 2 or 3, characterized in that, It also includes a one-time programmable storage unit; the preset threshold, identity identifier and key data are all fixed in the one-time programmable storage unit, and cannot be modified after physical fuse breaking after leaving the factory; the key data is stored after being physically obfuscated and encrypted, and the plaintext key cannot be directly obtained by physically reading the fuse status; a grid-like multi-point impedance-type anti-tamper detection circuit is configured and deployed on the inner wall of the key shell. When the circuit impedance is abnormal, the one-time programmable storage unit is directly triggered to perform emergency fuse breaking to resist anti-tamper bypass attacks with conductive short circuits.

8. The pure hardware contactless unlocking circuit according to claim 2, characterized in that, It also includes a hardware phase extraction circuit, which extracts respiratory rhythm and body micro-motion multi-dimensional micro-Doppler phase features from the echo signal of the time-of-flight ranging circuit, and performs composite verification of the liveness attribute; a single frequency vibration signal cannot be verified by the liveness test, and the hardware state machine is only allowed to enter the authentication state after the composite verification is passed.

9. The circuit according to claim 7, characterized in that, The one-time programmable storage unit also contains a key permission hardware table and a key blacklist hardware table; the key permission hardware table stores the permission level of each key; the key blacklist addition operation requires multi-level hardware permission verification and operation confirmation, and is configured with redundant fuse bits to resist malicious writing and fuse exhaustion denial-of-service attacks.

10. The pure hardware automatic vehicle locking circuit according to claim 3, characterized in that, The departure lock hardware timer uses a temperature-controlled crystal oscillator and a timing redundancy check circuit, and is equipped with an electromagnetic shielding structure to resist timing offset and oscillator stop failure caused by electromagnetic interference.