Micro-ring device with thermal isolation

Abstract

The application discloses a micro-ring device with heat isolation effect, comprising a substrate layer; a micro-ring layer is arranged above the substrate layer, the micro-ring layer comprises a silicon layer, and a micro-ring waveguide is arranged on the silicon layer; a heat insulation layer is arranged below the silicon layer, the heat insulation layer comprises a first heat insulation layer and a second heat insulation layer arranged in sequence, and the heat insulation capacity of the first heat insulation layer is smaller than that of the second heat insulation layer; the second heat insulation layer is obtained by expanding a release hole; a cladding layer is arranged above the silicon layer, and a heating layer is arranged on the cladding layer; the micro-ring device is provided with a plurality of release holes, the release holes in the region of the second heat insulation layer are expanded by etching to correspondingly form a plurality of heat insulation cavities, and a support bridge is reserved between at least two adjacent heat insulation cavities; the vertical projection area of a heat insulation space formed by the plurality of heat insulation cavities is greater than the area of the vertical projection ring of the micro-ring waveguide, and the release holes are arranged away from the micro-ring wave and the heating layer. Advantageous effects: through the arrangement of the heat insulation cavities and the release holes, the heat insulation effect and the structural stability are considered.

Description

Technical Field

[0001] This invention relates to the field of integrated optical technology, and more specifically to a microring device with thermal isolation function. Background Technology

[0002] In integrated optical systems, micro-ring resonators (micro-rings) have become an indispensable fundamental component due to their compact structure, high quality factor, and diverse functions. The basic working principle of micro-ring devices is as follows: an optical signal is coupled into a closed ring waveguide cavity through a waveguide. When the wavelength of the light wave satisfies the ring's resonance condition (i.e., an integer multiple of the wavelength equals the optical path length of the ring), the optical field undergoes coherent enhancement within the ring, thereby achieving selective passage or filtering of specific wavelengths. Based on this mechanism, micro-ring devices can precisely select optical signals of specific wavelengths and are widely used in several key areas, including wavelength selection in wavelength division multiplexing systems, high-speed electro-optic modulation, optical switch array construction, biosensing detection, and optical filtering.

[0003] However, the practical application of micro-ring devices faces a key technical challenge—the temperature sensitivity of the operating wavelength. Temperature changes can cause thermo-optic effects in waveguide materials, meaning that the refractive index of the material changes with temperature.

[0004] In existing technologies, a common approach is to place a heater (such as a heating resistor or a micro heater) on top of the microring device to control its operating temperature. By precisely controlling the electrical properties of the heater, the microring can be stably operated at the temperature point corresponding to the target wavelength, thereby achieving wavelength locking and tuning.

[0005] However, in typical optical chip integrated structures, micro-ring devices are usually placed directly on the top layer of the optical chip, with a silicon substrate with high thermal conductivity underneath. Due to the lack of an effective thermal isolation structure, a large portion of the heat generated by the heater is directly dissipated into the silicon substrate through heat conduction. The high thermal conductivity of the silicon substrate makes it an efficient "heat sink," making it difficult for the heat generated by the heater to accumulate effectively in the micro-ring region. On the one hand, this makes it difficult to maintain a stable temperature for the micro-ring device, making it highly susceptible to fluctuations in ambient temperature and changes in substrate temperature, thereby weakening the modulation stability and wavelength locking accuracy of the micro-ring. On the other hand, in order to maintain the micro-ring at a specific operating temperature to compensate for the temperature drop caused by substrate heat dissipation, the input power of the heater must be increased. This not only increases the power consumption burden of the entire photonic chip but may also lead to local overheating of the chip, affecting the normal operation of other adjacent devices. Summary of the Invention

[0006] The purpose of this invention is to provide a microring device with thermal isolation function, which partially solves or alleviates the above-mentioned shortcomings in the prior art, and can maintain a stable temperature environment so that the microring can operate stably.

[0007] To solve the aforementioned technical problems, the present invention specifically adopts the following technical solution: The present invention provides a microring device with thermal isolation function, comprising: Substrate layer; A microring layer disposed above the substrate layer, wherein the microring layer comprises: a silicon layer, and a microring waveguide disposed on the silicon layer; A heat insulation layer is disposed below the silicon layer. The heat insulation layer includes a first heat insulation layer and a second heat insulation layer disposed sequentially along the direction close to the substrate layer, and the heat insulation capacity of the first heat insulation layer is less than that of the second heat insulation layer; wherein, the second heat insulation layer is extended by a release hole; A cladding layer is disposed above the silicon layer, and a heating layer is disposed on the cladding layer. The heating layer is wrapped by the cladding layer for thermal insulation. The micro-ring device has multiple release holes, which penetrate the cladding, silicon layer and thermal insulation layer. The release holes also partially penetrate the substrate layer. The area of ​​the release holes in the second thermal insulation layer is expanded by etching to form multiple thermal insulation cavities. A support bridge is reserved between at least two adjacent thermal insulation cavities. The vertical projected area of ​​the heat insulation space formed by the multiple heat insulation cavities is larger than the area of ​​the vertical projected ring of the micro-ring waveguide, and the release hole is set away from the micro-ring waveguide and the heating layer.

[0008] Furthermore, at least one of the release holes is located in the area outside the vertical projection ring, and at least one of the release holes is located in the area inside the vertical projection ring.

[0009] Furthermore, the thickness of the first heat insulation layer is 2-3 μm.

[0010] Furthermore, the first insulation layer is an oxygen-buried layer.

[0011] Furthermore, the support bridge is formed in the area outside the vertical projection ring.

[0012] Furthermore, the support bridge is formed at the end away from the heating element.

[0013] Furthermore, the vertical projection ring of the micro-ring wave is located within the vertical projection plane of the thermal insulation space.

[0014] Furthermore, the thickness ratio between the first insulation layer and the second insulation layer is 1:10 to 1:100.

[0015] Furthermore, the radius of the micro-ring waveguide ranges from 3 to 7 μm.

[0016] Furthermore, the spacing between the release hole and the micro-ring waveguide is ≥1.5μm.

[0017] Beneficial technical effects: This invention creatively constructs a sandwich-style composite support system consisting of a first thermal insulation layer, a second thermal insulation layer, and a substrate layer beneath the micro-ring layer through an etching process, thus cleverly integrating thermal management efficiency and mechanical stability. In this structure, the first thermal insulation layer is tightly attached to the underside of the micro-ring layer, providing not only uniform and stable surface support to ensure the stability of the overall structure, but also acting as the first thermal barrier to initially block heat transfer downwards, preventing heat from being directly absorbed by the highly thermally conductive substrate layer. Building on this, multiple thermal insulation cavities formed within the second thermal insulation layer through an etching process further play a crucial role. These cavities utilize the low thermal conductivity of air to effectively cut off the main path of heat conduction from the first thermal insulation layer to the substrate layer, thereby significantly improving the overall thermal insulation performance of the device.

[0018] Meanwhile, to address the potential for the insulation cavity to weaken the structural strength, this invention provides support bridges between adjacent insulation cavities. These support bridges provide additional mechanical support for the upper first insulation layer, effectively preventing structural collapse or deformation caused by etching and ensuring the long-term reliability of the device.

[0019] In other words, it is this collaborative design of the thermal insulation cavity and the support bridge that enables the present invention to significantly improve the thermal insulation effect to ensure the stability of the working wavelength of the micro-ring waveguide, while also effectively taking into account the overall structural strength of the device. Attached Figure Description

[0020] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. In all the drawings, similar elements or parts are generally identified by similar reference numerals. The elements or parts in the drawings are not necessarily drawn to scale. Obviously, the drawings described below are some embodiments of the present invention, and those skilled in the art can obtain other drawings based on these drawings without any creative effort.

[0021] Figure 1 This is a cross-sectional schematic diagram of the microring structure; Figure 2 This is a top view of the microring structure; Figure 3 To illustrate the structure of the release hole; Figure 4 This is a schematic diagram of the chip structure; Figure 5 A structural schematic diagram showing the location of the second thermal insulation zone; Figure 6 A flowchart illustrating the etching design method for micro-ring thermal insulation spaces.

[0022] Summary of attached labeling and identification: 1. Substrate layer; 2. Micro-ring layer; 21. Silicon layer; 22. Micro-ring waveguide; 3. Thermal insulation layer; 31. First thermal insulation layer; 32. Second thermal insulation layer; 321. Thermal insulation cavity; 322. Support bridge; 3221. First support bridge; 4. Cladding layer; 5. Heating layer; 6. Release hole; 61. First release hole; 62. Second release hole; 63. Third release hole; 7. Straight waveguide; 8. First air isolation groove; 9. Metal interconnect; 10. Second air isolation groove. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0024] In this document, suffixes such as "module," "part," or "unit" used to denote elements are used only for the purpose of illustrative purposes and have no specific meaning in themselves. Therefore, "module," "part," or "unit" may be used interchangeably.

[0025] In this document, the terms "upper," "lower," "inner," "outer," "front," "rear," "one end," and "the other end," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the present invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the present invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0026] In this document, unless otherwise explicitly specified and limited, the terms "installed," "equipped with," "connected," etc., should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, a direct connection, or an indirect connection through an intermediate medium; it can be a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0027] In this document, "and / or" includes any and all combinations of one or more of the listed related items.

[0028] In this article, "multiple" means two or more, that is, it includes two, three, four, five, etc.

[0029] As used in this specification, the term "about" typically means + / -5% of the value, more typically + / -4% of the value, more typically + / -3% of the value, more typically + / -2% of the value, even more typically + / -1% of the value, and even more typically + / -0.5% of the value.

[0030] In this specification, certain embodiments may be disclosed in a range-bound format. It should be understood that this "range-bound" description is merely for convenience and brevity and should not be construed as a rigid limitation on the disclosed range. Therefore, the description of a range should be considered as having specifically disclosed all possible subranges and the individual numerical values ​​within those ranges. For example, a description of the range 1-6 should be considered as having specifically disclosed subranges such as from 1 to 3, from 1 to 4, from 1 to 5, from 2 to 4, from 2 to 6, from 3 to 6, etc., and the individual numbers within those ranges, such as 1, 2, 3, 4, 5, and 6. This rule applies regardless of the breadth of the range.

[0031] Example 1: A microring device with thermal isolation function, see [link / reference] Figure 1 As shown, the system includes a substrate layer 1, which primarily serves a supporting function and is preferably a silicon substrate. A micro-ring layer 2 is disposed above the substrate layer 1, and the micro-ring layer 2 includes a silicon layer 21. A micro-ring waveguide 22 is disposed on the silicon layer 21. Specifically, the micro-ring waveguide 22 is embedded within the silicon layer 21 using integrated circuit manufacturing technology (i.e., CMOS technology). A heat insulation layer 3 is also disposed below the silicon layer 21. The heat insulation layer 3 includes a first heat insulation layer 31 and a second heat insulation layer 32 sequentially disposed along the direction close to the substrate layer 1. The first heat insulation layer 31 is a buried oxide layer, and its heat insulation capacity is less than that of the second heat insulation layer 32. For example, the thermal conductivity of the first heat insulation layer is greater than that of the second heat insulation layer.

[0032] Furthermore, a cladding layer 4 is disposed above the silicon layer 21, and a heating layer 5 is disposed on the cladding layer 4. The heating layer 5 is used to heat the microring waveguide 22. Preferably, the heating layer 5 is enclosed by the cladding layer 4 for thermal isolation. Specifically, the heating layer 5 is embedded inside the cladding layer 4 using a CMOS process. It should be noted that the cladding layer 4 is entirely made of silicon dioxide, and the heating layer 5 is preferably a heating resistor with an overall arc-shaped structure, disposed above the microring waveguide 22, so that the heat generated by the heating layer 5 can act on the microring waveguide 22.

[0033] It should be noted that, Figure 2 , Figure 4 , Figure 5 This is a top view of a micro-ring device or a chip containing a micro-ring device, providing a reference example of the positions of the release hole 6 and the support bridge 322. However, the section of the release hole 6 that penetrates the second heat insulation layer 32 is actually an intermediate structure before the formation of the support bridge 322. That is, after the release hole 6 is etched and expanded, the remaining unetched structure is the support bridge 322. Furthermore, the specific arrangement of the release hole 6 and the support bridge 322 is related to specific arrangement parameters; the figure only provides a general example of their distribution area, not a specific limitation.

[0034] The thermal insulation layer architecture of the microring device is completed through an etching process. Specifically, the etching process involves obtaining an initial microring device, which includes a substrate layer 1, on which a buried oxide layer (i.e., the first thermal insulation layer 31) and a microring layer 2 are sequentially disposed. The microring layer 2 includes a silicon layer 21, on which a microring waveguide 22 is disposed. Subsequently, multiple release holes 6 are formed on the initial microring device (i.e., the device without the second thermal insulation layer 32), and the release holes 6 are arranged along the vertical direction of the microring device (i.e.,...). Figure 1 (In the direction indicated by the middle arrow a), the release hole 6 sequentially penetrates the cladding layer 4, the silicon layer 21, and the thermal insulation layer 3, and also partially penetrates the substrate layer 1 below the release hole 6. Specifically, the location of the release hole between layers can be found in [reference needed]. Figure 2 and Figure 3 As shown.

[0035] Furthermore, the area of ​​the release hole 6 located in the second heat insulation layer 32 is expanded by etching to form a plurality of heat insulation cavities 321, and a support bridge 322 is reserved between at least two adjacent heat insulation cavities 321 (that is, at least two heat insulation cavities are not completely connected, but a reserved part of the material is used as a support bridge).

[0036] Specifically, etching solution is dripped into the location of the second heat insulation layer 32 through the release hole 6. The etching solution dissolves the second heat insulation layer 32 to achieve lateral expansion, thereby forming multiple heat insulation cavities 321.

[0037] It should be noted that the heat insulation layer 3 is made entirely of silicon dioxide, and hydrofluoric acid is preferred as the etching solution.

[0038] It should also be noted that the present invention aims to form multiple heat insulation cavities 321 in the area where the second heat insulation layer 32 is located through an etching process. The etching process can control / select the reaction area and etching depth by selecting the type, amount, drop speed, and position of the etching solution. Specifically, the detailed parameters of the etching process can be selected according to the etching precision under different working conditions. That is to say, the boundary between the first heat insulation layer 31 and the second heat insulation layer 32 can ideally be solved as a horizontal plane. Alternatively, even if there are differences in the specific details after etching of different release holes, it is acceptable as long as it is within the controllable range of the etching process. For example, even if there is partial etching at the position of the first heat insulation layer 31 corresponding to the release hole 6, it is acceptable as long as it does not exceed the error tolerance range. Furthermore, as will be further described in some of the following embodiments, the present invention can improve the strength stability during the etching process by setting the release holes or support bridges, thereby also improving the tolerance for process errors to a certain extent.

[0039] The vertical projected area of ​​the heat insulation space formed by the multiple heat insulation cavities 321 is larger than the area of ​​the vertical projected ring of the micro-ring waveguide 22, and the release hole 6 is set to avoid the micro-ring waveguide 22 and the heating layer 5.

[0040] Furthermore, the vertical projection ring of the micro-ring waveguide 22 is located within the vertical projection plane of the thermal insulation space.

[0041] It should be noted that the above vertical projection is along... Figure 1 The projection made in the direction pointed to by the middle arrow 'a', that is... Figure 2 As shown, the area of ​​the vertical projection ring of the micro-ring waveguide 22 is the area enclosed by the ring structure formed by the projection of the micro-ring waveguide 22 in the vertical direction.

[0042] This invention creatively constructs a sandwich-style composite support system consisting of a first thermal insulation layer 31, a second thermal insulation layer 32, and a substrate layer 1 beneath the micro-ring layer 2 through an etching process, thus cleverly integrating thermal management efficiency with mechanical stability. In this structure, the first thermal insulation layer 31 is tightly attached to the underside of the micro-ring layer 2, providing not only uniform and stable surface support to ensure the stability of the overall structure, but also serving as the first thermal barrier to initially block heat transfer downwards, preventing heat from being directly absorbed by the highly thermally conductive substrate layer 1. On this basis, multiple thermal insulation cavities 321 formed within the second thermal insulation layer 32 through an etching process further play a crucial role. These cavities utilize the low thermal conductivity of air to effectively cut off the main path of heat conduction from the first thermal insulation layer 31 to the substrate layer 1, thereby significantly improving the overall thermal insulation performance of the device. Meanwhile, to address the potential for the thermal insulation cavity 321 to weaken the structural strength, this invention incorporates support bridges 322 between adjacent thermal insulation cavities 321. These support bridges 322 provide additional mechanical support to the upper first thermal insulation layer 31, effectively preventing structural collapse or deformation caused by etching and ensuring the long-term reliability of the device. In other words, it is this collaborative design of the thermal insulation cavity 321 and the support bridges 322 that enables this invention to significantly improve the thermal insulation effect to ensure the stability of the operating wavelength of the micro-ring waveguide 22 while effectively maintaining the overall structural strength of the device.

[0043] In this embodiment, the thickness of the first heat insulation layer 31 is preferably 2-3 μm, and the thickness ratio between the first heat insulation layer 31 and the second heat insulation layer 32 is between 1:10 and 1:100, that is, the thickness of the second heat insulation layer 32 is preferably 20-200 μm.

[0044] Furthermore, at least one release hole 6 is disposed in the area outside the vertical projection ring and at least one release hole 6 is disposed in the area inside the vertical projection ring. Based on this structure, by distributing the release hole 6 outside the vertical projection ring, the second heat insulation layer 32 below the micro-ring waveguide 22 can be etched from the outside, ensuring that the edge area of ​​the second heat insulation layer 32 corresponding to the micro-ring waveguide 22 can be fully etched, thereby effectively cutting off the path of heat conduction downward from the edge area of ​​the micro-ring waveguide 22.

[0045] Furthermore, a straight waveguide 7 is coupled to one side of the micro-ring waveguide 22. It should be noted that the height of the straight waveguide 7 is flush with the height of the micro-ring waveguide 22. In the layout of the release hole 6, its placement must not only avoid the areas where the micro-ring waveguide 22 and the heating layer 5 are located, but also follow the following optimization principles: Using the center of the micro-ring waveguide 22 as a reference, draw a virtual straight line parallel to the extension direction of the straight waveguide 7 (i.e.,...). Figure 4(As shown, the line connecting the centers of each microring waveguide 22) should also avoid the area traversed by the release hole 6. This design avoids stress concentration areas in the overall structure, reduces the impact of the etching process on the original structural strength, and enhances the overall structure's fracture resistance.

[0046] Preferably, the support bridge 322 is formed in the area outside the vertical projection ring. Compared with the area where the support bridge 322 is set inside the vertical projection ring, setting the support bridge 322 in the area outside the vertical projection ring allows the support bridge 322 to mainly play a supporting role, reducing the heat conduction to the substrate layer 1 through the "shortcut" of the support bridge 322.

[0047] It should be noted that the support bridge 322 can actually serve the dual functions of load-bearing and heat conduction. Since the thermal conductivity of solid materials is much higher than that of air, the support bridge 322 actually becomes a low thermal resistance "shortcut" across the heat insulation cavity 321, that is, after heat is conducted to the first heat insulation layer 31, it can be directly conducted vertically to the substrate layer 1 via the support bridge 322.

[0048] In order to utilize both load-bearing and heat-conducting functions, it is preferable to place at least two support bridges 322 in the area outside the vertical projection ring, so that a continuous and complete heat insulation cavity 321 is formed directly below the micro-ring waveguide 22. The heat insulation cavity 321 allows heat to be confined in the micro-ring waveguide 22 area for as long as possible, enabling the micro-ring waveguide 22 to operate at a relatively stable temperature.

[0049] The support bridges 322 located outside the vertical projection ring are preferably arranged with at least two of them parallel to the straight waveguide 7 (in other words, they are as parallel as possible to the straight line direction of the multiple micro-ring waveguides 22). This ensures that even if some heat escapes from the micro-ring waveguide 22 region, its main escape direction is along the direction of the straight line 7. Figure 2 The direction indicated by the middle arrow b should be avoided as much as possible from the direction of the micro-ring arrangement (the direction of the micro-ring arrangement can be referred to here). Figure 4 As shown, Figure 4 (The micro-rings are arranged laterally).

[0050] In other words, the main direction of temperature escape is the direction intersecting with the micro-ring arrangement direction or the extension direction of the straight waveguide 7, such as... Figure 2 As shown in direction b. Preferably, the main escape direction is perpendicular (or approximately perpendicular) to the microring arrangement direction. By limiting the main escape direction to this vertical direction, the diffusion of temperature in the lateral direction can be reduced (i.e., temperature crosstalk between adjacent microrings can be reduced).

[0051] Therefore, in this embodiment, the distribution of the support bridges not only enhances strength, but also further improves the thermal isolation between adjacent rings through temperature guidance.

[0052] It's important to understand that some of the heat escaping from region 22 of the micro-ring waveguide doesn't necessarily escape entirely in the direction indicated by arrow b; it can deviate slightly from arrow b, as long as its rapid conduction in the lateral direction is sufficiently limited. For example, Figure 2 The middle arrows b1 and b2 indicate the escape directions of heat from the micro-ring waveguide 22 to the sides where the two support bridges 322 are located.

[0053] Specifically, when heat is conducted downwards from the micro-ring waveguide 22, it must first pass laterally through the first thermal insulation layer 31 to reach the support bridge 322 outside the ring, and then be transferred to the substrate layer 1 via the support bridge 322. This lateral conduction path significantly increases the thermal resistance and effectively cuts off the vertical direct channel for heat transfer. Thus, while maximizing the use of the low thermal conductivity of air, the heat leakage caused by the support structure is controlled to a minimum, ensuring the thermal stability of the operating wavelength of the micro-ring waveguide 22.

[0054] The reserved support bridge 322 reduces the probability of collapse inside the heat insulation cavity 321. In actual use, there is a certain amount of moisture inside the heat insulation cavity 321 (which may be due to the etching process). With temperature changes, thermal expansion and contraction can easily lead to changes in internal stress of the heat insulation cavity 321, which in turn makes the heat insulation cavity 321 risky to collapse. The reserved support bridge 322 can form a support structure between the substrate 1 and the first heat insulation layer 31, increasing the overall internal structural strength and thus reducing the probability of collapse inside the heat insulation cavity 321.

[0055] Furthermore, the support bridge 322 is also formed at the end away from the heating layer 5. Based on this, the distance between the support bridge 322 and the heat source can be increased, thereby reducing the probability and magnitude of heat source conduction to the support bridge 322 and ensuring the overall thermal isolation effect.

[0056] Furthermore, the radius of the micro-ring waveguide 22 is preferably in the range of 3-7 μm, and the spacing between the release hole 6 and the micro-ring waveguide 22 is ≥1.5 μm.

[0057] Example 2: A chip with thermal isolation function includes a substrate layer 1 (preferably a silicon substrate), a micro-ring region A and an electrically driven region B are disposed on the upper surface of the substrate layer 1, and a first thermal isolation region is disposed between the micro-ring region A and the electrically driven region B. See [reference needed] for details. Figure 4 .

[0058] It should be noted that the micro-ring region A is composed of multiple micro-ring devices as described in Embodiment 1. That is, the structure of the micro-ring region A can be referred to in Embodiment 1. The relevant structures in this embodiment will not be discussed one by one.

[0059] The micro-ring region A includes at least one micro-ring portion (equivalent to the micro-ring layer 2 described in Embodiment 1). The micro-ring portion includes a silicon layer 21, on which a micro-ring waveguide 22 is disposed. Specifically, the micro-ring waveguide 22 is embedded inside the silicon layer 21 through an integrated circuit manufacturing process (i.e., CMOS process). A heat insulation layer 3 is also disposed below the silicon layer 21. The heat insulation layer 3 includes a first heat insulation layer 31 and a second heat insulation layer 32 disposed sequentially along the direction close to the substrate layer 1. The first heat insulation layer 31 is a buried oxide layer, and the heat insulation capacity of the first heat insulation layer 31 is less than that of the second heat insulation layer 32.

[0060] Furthermore, a cladding layer 4 is disposed above the silicon layer 21, and a heating layer 5 is disposed on the cladding layer 4. The heating layer 5 is used to heat the microring waveguide 22. Preferably, the heating layer 5 is enclosed by the cladding layer 4 for thermal isolation. Specifically, the heating layer 5 is embedded inside the cladding layer 4 using a CMOS process. It should be noted that the cladding layer 4 is entirely made of silicon dioxide, and the heating layer 5 is preferably a heating resistor with an overall arc-shaped structure, disposed above the microring waveguide 22, so that the heat generated by the heating layer 5 can act on the microring waveguide 22.

[0061] Similarly, the second heat insulation layer 32 is extended from the release hole 6. Specifically, during the etching process, a plurality of first release holes 61 (equivalent to the release hole 6 in Embodiment 1) are first provided on the micro-ring portion. The first release holes 61 are arranged along the vertical direction of the chip (i.e., Figure 1 (In the direction indicated by the middle arrow a), the first release hole 61 passes through the cladding layer 4, the silicon layer 21 and the heat insulation layer 3 in sequence, and also partially passes through the substrate layer 1 below the first release hole 61.

[0062] Furthermore, the area of ​​the first release hole 61 located in the second heat insulation layer 32 is expanded by etching to form a plurality of heat insulation cavities 321, and a first support bridge 3221 (equivalent to the support bridge 322 in Embodiment 1) is reserved between at least two adjacent heat insulation cavities 321.

[0063] Specifically, etching solution is dripped into the location of the second heat insulation layer 32 through the first release hole 61. The second heat insulation layer 32 is dissolved by the etching solution to achieve lateral expansion, thereby forming multiple heat insulation cavities 321.

[0064] The vertical projected area of ​​the heat insulation space formed by the multiple heat insulation cavities 321 is larger than the area of ​​the vertical projected ring of the micro-ring waveguide 22, and the release hole 6 is set to avoid the micro-ring waveguide 22 and the heating layer 5.

[0065] Specifically, the vertical projection ring of the micro-ring waveguide 22 is located within the vertical projection plane of the heat insulation space formed by multiple heat insulation cavities 321, thus ensuring that there is a complete heat insulation space below each micro-ring portion of the micro-ring waveguide 22, thereby ensuring the thermal insulation effect.

[0066] Furthermore, the first thermal isolation region includes a first air isolation groove 8 formed on the substrate layer 1. The first air isolation groove 8 is formed by etching multiple second release holes 62, and the second release holes 62 partially penetrate the substrate layer 1. It should be understood that a support bridge (not shown in the figure) can also be reserved inside the first air isolation groove 8. The design of the support bridge is to ensure the overall structural strength of the first thermal isolation region and reduce the probability of collapse inside the first thermal isolation region.

[0067] Furthermore, the electric drive region B and the micro-ring region A are connected by a metal interconnect 9, which enables the electric drive region B to control the electric drive of the micro-ring region A.

[0068] This application cleverly integrates thermal management efficiency and mechanical stability by constructing a sandwich-style composite support system consisting of a first thermal insulation layer 31, a second thermal insulation layer 32, and a substrate layer 1 beneath each microring portion of the microring region A. In this structure, the first thermal insulation layer 31 is tightly attached to the underside of the microring portion, providing uniform and stable surface support to ensure the stability of the overall structure. It also acts as the first thermal barrier to initially block heat transfer downwards, preventing heat from being directly absorbed by the highly thermally conductive substrate layer 1. On this basis, multiple thermal insulation cavities 321 formed by etching within the second thermal insulation layer 32 play a crucial role. These cavities effectively cut off the main path of heat conduction from the first thermal insulation layer 31 to the substrate layer 1 by utilizing the low thermal conductivity of air, thereby significantly improving the overall thermal insulation performance of the device. Meanwhile, to address the potential for the thermal insulation cavity 321 to weaken the structural strength, this invention provides first support bridges 3221 between adjacent thermal insulation cavities 321. These first support bridges 3221 provide additional mechanical support for the upper first thermal insulation layer 31, effectively preventing structural collapse or deformation caused by etching and ensuring the long-term reliability of the device. In other words, it is this synergistic design of the thermal insulation cavity 321 and the first support bridges 322 that enables this invention to significantly improve the thermal insulation effect to ensure the stability of the operating wavelength of the micro-ring waveguide 22 while effectively maintaining the overall structural strength of the device.

[0069] In addition, the present invention creatively sets a first thermal isolation region between the micro-ring region A and the electrically driven region B. Similarly, a first air isolation groove 8 is formed by etching process. By utilizing the low thermal conductivity of air, the probability of heat being conducted laterally to the electrically driven region B is reduced, thereby enabling each micro-ring waveguide 22 to have a stable working environment.

[0070] Furthermore, a second thermal insulation zone is provided between at least two adjacent micro-rings, as detailed in [reference needed]. Figure 5The second thermal isolation region includes a second air isolation groove 10 formed in the substrate layer 1. The second air isolation groove 10 is formed by extending multiple third release holes 63 through an etching method, and the third release holes 63 partially penetrate the substrate layer 1. It should be understood that the second air isolation groove 10 also has a reserved support bridge (not shown in the figure). The design of the support bridge is to ensure the overall structural strength of the second thermal isolation region and reduce the probability of collapse inside the second thermal isolation region.

[0071] Based on the above structure, by setting a second thermal isolation zone between two adjacent microrings, the probability of lateral heat conduction between each microring is further reduced, and the probability of temperature crosstalk between each microring is also reduced, thereby ensuring the working stability of the entire chip.

[0072] Furthermore, at least two first support bridges 3221 are formed outside the vertical projection ring, and the arrangement of the corresponding at least two first support bridges 3221 is located away from the heating layer 5, and the arrangement direction intersects with the direction of the adjacent micro-ring. It should be noted that the direction of the adjacent micro-ring is... Figure 2 The direction indicated by arrow b, which is the extension direction of the second thermal insulation zone, is designed to first limit heat loss through the air grooves below the micro-rings (i.e., the second thermal insulation layer 32), that is, by using air grooves with low thermal conductivity to reduce the efficiency of heat diffusion outward. Simultaneously, along the inner edge of the second thermal insulation layer 32... Figure 2 The first support bridge 3221 is arranged in the indicated direction, which can create a strong guiding region in the second heat insulation layer 32. Specifically, since the first support bridge 3221 has a higher thermal conductivity than air, temperature is more easily conducted outward through the first support bridge 3221. Therefore, the first support bridge 3221 is equivalent to forming a strong guiding region, while the air groove below the micro-ring waveguide 22 can be regarded as a weak guiding region.

[0073] In particular, the guiding effect of the strong guiding zone can, to a certain extent, ensure that even if some heat is rapidly conducted outward, it is mainly conducted along the longitudinal direction b, and is not easily concentrated in the lateral direction, thus enabling a certain degree of thermal isolation between the rings.

[0074] Here, the longitudinal direction b mainly refers to the direction that is parallel or approximately parallel to the first air isolation groove. Alternatively, the longitudinal direction b refers to the direction that is perpendicular or approximately perpendicular to the straight waveguide 7 (or the lateral arrangement direction of the microrings).

[0075] In other words, the insulation layer beneath the microrings focuses on cutting off vertical heat channels (for example, by having fewer first support bridges 3221 to form a weak guiding zone). This maximizes the use of air's low thermal conductivity while minimizing heat leakage from the support structure, ensuring the thermal stability of the microring waveguide 22's operating wavelength. Furthermore, the overall heat transfer path extends roughly along the longitudinal direction b, reducing the probability of heat transfer along the arrangement direction of each microring, thereby reducing the probability of heat crosstalk between adjacent microrings.

[0076] Therefore, as a preferred embodiment, the scheme of using the first support bridge 3221 to strongly or weakly guide temperature conduction includes: like Figure 5 As shown, the density (or width or number) of the first support bridges 3221 on the side of the straight waveguide 7 away from the microring is greater than the density of the first support bridges 3221 below the microring waveguide 22. This creates a strong guiding region on the side of the straight waveguide 7 away from the microring and a weak guiding region below the microring waveguide 22. The distribution of strong and weak guiding regions reduces or limits the probability of lateral temperature diffusion, thus promoting relatively reliable thermal isolation between the rings.

[0077] Furthermore, the metal interconnects 9 pass through the first air isolation groove 8. Specifically, at least one heat insulation portion is provided within the first air isolation groove 8, and multiple metal interconnects 9 pass through the heat insulation portion to pass through the first air isolation groove 8. It should be understood that the electrical drive region B is arranged at a height higher than the first thermal isolation region on the chip. That is to say, the metal interconnects 9 are arranged above the first air isolation groove 8, and multiple metal interconnects 9 pass through the heat insulation portion from above the heat insulation portion (for example, the heat insulation portion is a bridging area arranged at the top of the first air isolation groove 8, thereby allowing the metal interconnects 9 to pass through from above the first air isolation groove 8). It should also be understood that the location of the second release hole 62 must avoid the metal interconnects 9 to reduce the probability of contamination of the metal interconnects 9 during the etching process.

[0078] Furthermore, the chip also includes a straight waveguide 7 connecting each microring, which is located at the end of the microring away from the heating layer 5. In addition, the straight waveguide 7 is also located at the end of the microring away from the electrically driven region B. That is to say, the heating layer 5 is located at the end close to the electrically driven region B. Based on this, the probability of heat from the microring being transferred to adjacent microrings through the straight waveguide 7 can be reduced, thereby ensuring that each microring has a stable working environment.

[0079] It should be noted that the straight waveguide 7 extends along the arrangement direction of each micro-ring, and the straight waveguide 7 and the micro-ring are located at the same arrangement height of the chip. Based on this, the straight waveguide 7 can be coupled to each micro-ring waveguide 22.

[0080] Preferably, the first support bridge 3221 is formed in the area outside the vertical projection ring. The specific effects and reasons can be referred to the discussion in Embodiment 1 on the support bridge 322 being formed in the area outside the vertical projection ring, and will not be repeated here.

[0081] Furthermore, the number of first support bridges 3221 near the straight waveguide 7 end of the microring is greater than the number of first support bridges 3221 away from the straight waveguide 7 end. At least two first support bridges 3221 near the straight waveguide 7 end are formed outside the vertical projection ring, and the arrangement direction of the corresponding arrangement of at least two first support bridges 3221 intersects with the direction of the adjacent microring. Based on this, a row of stable support structures can be formed on the side near the straight waveguide 7. That is, the first support bridges 3221 form a strong guiding region at the end of the microring near the straight waveguide 7. Through the guiding effect of the strong guiding region, even if some heat may be quickly conducted outward, it is mainly conducted along the longitudinal direction b, and it is not easy to concentrate and transfer it to the electric drive region B and the adjacent microring in the lateral direction, thereby reducing the probability of temperature crosstalk.

[0082] It should be noted that the arrangement of the first release hole 61 and the third release hole 63 should also avoid the area through which the straight line connecting the centers of each micro-ring waveguide 22 passes. This design can avoid the stress concentration area of ​​the overall structure, reduce the impact of the etching process on the strength of the original structure, and enhance the fracture resistance of the overall structure.

[0083] In this embodiment, a sandwich-style composite support system consisting of a first thermal insulation layer, a second thermal insulation layer, and a substrate layer is constructed below each microring of the chip through an etching process, cleverly integrating thermal management efficiency and mechanical stability. In this structure, the first thermal insulation layer 31 (i.e., the buried oxide layer) is tightly attached to the bottom of each microring, not only providing uniform and stable surface support to ensure the stability of the overall structure, but also acting as the first thermal barrier to initially block heat transfer downwards, preventing heat from being directly absorbed by the highly thermally conductive substrate layer 1. On this basis, multiple thermal insulation cavities 321 formed by etching within the second thermal insulation layer 32 further play a crucial role. These cavities utilize the low thermal conductivity of air to effectively cut off the main path of heat conduction from the first thermal insulation layer 31 to the substrate layer 1, thereby significantly improving the overall thermal insulation performance of the device. Meanwhile, in response to the potential for the insulation cavity 321 to weaken the structural strength, this embodiment reserves a first support bridge 3221 between adjacent insulation cavities 321. These first support bridges 3221 provide additional mechanical support for the upper first insulation layer 31, effectively preventing structural collapse or deformation caused by etching and ensuring the long-term reliability of the device.

[0084] Furthermore, in this embodiment, the first thermal isolation region formed by etching between the micro-ring region A and the electric heating region B, and the second thermal isolation region formed between each micro-ring portion by etching, both utilize the low thermal conductivity of air to block the main path of heat conduction laterally to the electric heating region B and adjacent micro-ring portions, thereby reducing the probability of thermal crosstalk.

[0085] In summary, this invention systematically cuts off and isolates the heat conduction path in both the longitudinal and transverse dimensions through etching processes. This minimizes unnecessary heat loss, ensures that each micro-ring can maintain a stable and independent operating temperature, and also takes into account the mechanical strength of the overall structure.

[0086] Example 3: This application creatively constructs a sandwich-type composite support system composed of a first heat insulation layer 31, a second heat insulation layer 32, and a substrate layer 1 under the micro-ring layer. Relying on the heat insulation cavities 321 in the second heat insulation layer 32, the main path of heat conduction from the first heat insulation layer 31 to the substrate layer 1 is effectively cut off by taking advantage of the low thermal conductivity of air, thereby significantly improving the overall heat insulation performance of the micro-ring device.

[0087] From a process perspective, it is necessary to first open a release hole 6 on the surface of the micro-ring device, and then inject etching solution into the release hole 6 to use the etching process to extend multiple heat insulation cavities 321 horizontally within the second heat insulation layer 32.

[0088] The applicant noted that, due to the asymmetry of the micro-ring structure itself, the distribution of the release holes 6 varies in different areas, and these differences affect the forming effect of the heat insulation cavity 321.

[0089] This application focuses on the distribution design of the release holes 6 to reduce the impact of the distribution location of the release holes 6 on the forming of the insulation space.

[0090] It should be noted that the heat insulation space described in this application is disposed between the substrate layer 1 and the silicon layer 21, wherein a micro-ring waveguide 22 is disposed on the silicon layer 21, and the heat insulation space is disposed corresponding to the micro-ring waveguide 22.

[0091] This application provides an etching design method for micro-ring thermal insulation spaces, details of which can be found in [reference needed]. Figure 6 This includes the following specific steps: S101 is used to define the etching area for the micro-ring waveguide 22; For example, in some embodiments, the etched region may have an area similar to that of a microring waveguide.

[0092] For example, in some embodiments, the etched area may cover the microring waveguide and extend a certain space to the periphery of the microring waveguide.

[0093] S102, multiple release holes 6 are opened in the etched area; S103, etching solution is injected into the release hole 6, and an etching process is performed on the release hole 6 to expand it laterally to form a heat insulation cavity 321. It should be noted that a support bridge 322 is formed between at least two adjacent heat insulation cavities 321, and multiple heat insulation cavities 321 form a heat insulation space, and the vertical projection of the heat insulation space (i.e., according to...) Figure 1 Projecting along the direction of the middle arrow 'a', that is... Figure 2 The area of ​​the micro-ring waveguide 22 (as shown) is larger than the area of ​​its vertical projection ring. Specifically, the vertical projection ring of the micro-ring waveguide 22 is located within the vertical projection plane of the thermal insulation space.

[0094] For example, when there is a large gap between the two release holes 6, so that the two release holes 6 are not connected after etching, that is, there is still an unetched buried oxide layer between the two heat insulation cavities, the remaining unetched buried oxide layer is a support bridge.

[0095] S102 includes: S1021 divides the etching area into multiple sub-etching areas; S1022, identify the load element above the sub-etched area; it should be noted that the load element includes at least one of the following: a metal element (e.g., a heating layer 5 disposed above the micro-ring waveguide 22, or a metal wire connected to the heating layer 5 or the micro-ring waveguide 22), a micro-via (e.g., a copper pillar via disposed on or attached to the micro-ring for connecting the metal wire), or a doped region.

[0096] S1023, determine the arrangement parameters of the release holes 6 in the sub-etched area according to the properties of the load element, wherein the arrangement parameters include the number of release holes 6 and the width of the release holes 6 (i.e., the diameter of each release hole 6); the properties include load strength and / or clearance requirements, the load strength is used to represent the magnitude of the load applied by the load element to the sub-etched area, and the clearance requirements are used to define the minimum clearance distance that the load element needs to maintain with the release holes 6 (also referred to as etched holes).

[0097] When the load element is mounted onto the microring device, its own weight may exert a load force on the sub-etched area, or to ensure the structural strength of the load element itself, an additional load force may be introduced when the load element is mounted onto the microring device. During etching, it is necessary to measure the impact of these load forces on the thermal insulation space to avoid the thermal insulation space from collapsing due to these load forces.

[0098] Specifically, based on engineers' experience or historical process data, there are preset recommended values ​​for the arrangement parameters of the release holes 6, such as the selectable number of holes in a certain area, the width of the holes, or the minimum spacing between holes. Based on this, once the etching area for the release holes is determined, a recommended arrangement scheme for the release holes can be provided according to the recommended values, i.e., the recommended arrangement parameters can be selected.

[0099] For example, in some embodiments, the number or distribution density of release holes allowed to be opened during the etching process needs to be different due to the difference in load force, resulting in different setting specifications.

[0100] S1024, predict the support parameters of the support bridge 322 based on the selected etching ratio and arrangement parameters. The support parameters include the width of the support bridge 322 and the number of support bridges 322.

[0101] It should be understood that this application mainly performs vertical etching when creating the release hole 6, while mainly performing lateral etching when expanding the heat insulation cavity. Lateral etching refers to the etching process in which the etching solution preferentially hollows out the cavity along the horizontal direction of the second heat insulation layer 32, and stops or significantly decelerates when it reaches the first heat insulation layer 31 in the vertical direction. This forms a complete heat insulation cavity 321 while avoiding damage to the micro-ring waveguide 22 above it by penetrating the first heat insulation layer 31 to a certain extent.

[0102] In response, taking into account the differences in wafer materials, processing environment, or etching requirements, different etching solutions can be selected to hollow out the second heat insulation layer 32.

[0103] S1025, determine whether the support parameters meet the set strength standards.

[0104] The strength standard can be determined by referring to the factory strength standard of insulation layer 3 or by relying on the engineer's experience.

[0105] For example, in some embodiments, engineers can produce small batches of micro-ring thermal insulation space chip products based on strength design experience before mass production. These chip products can have various specifications for different types of release holes and support bridges. Therefore, by judging or verifying the strength of the actual chip products, a design specification table for strength standards can be constructed in reverse. For example, for support bridges designed with different widths and numbers, there are predicted strength stability values. If the strength stability value meets the current engineer's design requirements, then the strength standard is considered met.

[0106] Furthermore, in some embodiments, the design specification table can be further refined according to the chip type (such as the number of microrings and the chip area size), that is, a more refined classification design of strength stability can be carried out. In other words, different strength standard specifications can be given for different chip types.

[0107] It should be noted that if step S1025 determines that the support parameters do not meet the set strength standard, then the process jumps to step S1023; if step S1025 determines that the support parameters meet the set strength standard, then step S1026 is executed.

[0108] S1026, release holes 6 are formed on the etched area according to the arrangement parameters. It should be noted that the release holes 6 in at least two sub-etched areas have different widths (i.e., hole diameters).

[0109] It should be noted that the opening of the release hole 6 must avoid the load element to prevent the release hole 6 from affecting the normal structure of the micro-ring device. The influence of metal components on the micro-ring structure is particularly important. Taking metal components as an example, S1023 includes: S10231, Determine the avoidance zone based on the properties of the metal element. The properties of the metal element include the load exerted by the metal element on the sub-etched area (i.e., the weight of the metal element within the sub-etched area) and the vertical projection position of the metal element in the sub-etched area.

[0110] S10232, determine the operable area of ​​the sub-etching area (i.e., the area of ​​the sub-etching area other than the avoidance area) based on the avoidance area.

[0111] S10233, Determine the arrangement parameters of the release hole 6 in the operable area.

[0112] Since the proportion of load elements in each sub-etched area is different, that is, the operable area of ​​each sub-etched area is different, after the arrangement parameters of the release hole 6 in each sub-etched area are determined, there may be a large difference in the number of holes in adjacent sub-etched areas. If the subsequent steps are continued based on the arrangement parameters obtained in step S10233, it may lead to uneven stress in the final heat insulation space, affecting the overall structural strength of the micro-ring device.

[0113] Therefore, S1023 also includes: S10234, identify the number of release holes in the current sub-etched area; if the number of release holes in the current sub-etched area is greater than or equal to the set threshold, then execute S1024; if the number of release holes in the current sub-etched area is less than the set threshold, then trigger the verification step.

[0114] The verification steps include: Calculate the difference in aperture area between the current sub-etched area and the adjacent etched area. It is important to understand that the aperture area refers to the sum of the areas of all release apertures 6 within the sub-etched area on the vertical projection plane.

[0115] Determine whether the difference in the area of ​​the holes exceeds the set area threshold.

[0116] If not, proceed to S1024. It should be understood that if the above-mentioned hole area difference is less than or equal to the set area threshold, it means that the release holes 6 in adjacent sub-etched areas are relatively uniform and no adjustment of the release holes is required.

[0117] If so, then execute: Update the arrangement parameters of the release holes 6 in the current sub-etched area and / or adjacent etched areas. It should be understood that if the above hole area difference is greater than the set area threshold, it means that the distribution of release holes 6 in adjacent sub-etched areas is uneven and needs to be optimized for uniformity.

[0118] Specifically, if it is noted that a certain sub-etched area may have a very small number of release holes 6 due to avoidance relationships, which may lead to excessive stress differences and the risk of reduced strength, and the avoidance risk of the load element in the sub-etched area is relatively reliable, the number and diameter of the release holes 6 may be moderately increased. If the avoidance risk of the load element in the sub-etched area is slightly higher, it can be adjusted synchronously with its adjacent sub-etched areas.

[0119] In other words, in this embodiment, local or related adjustments will be made based on the magnitude of the avoidance risk of the load element (such as synchronous adjustment of adjacent sub-etched areas), thereby improving the reliability of the automatic arrangement of the release hole 6 while minimizing the adjustment range.

[0120] It is important to understand that the risk of avoidance depends on the importance of the load element relative to the overall microring structure. For example, the risk of avoidance is higher when the load element is an electrical wire that provides a drive signal.

[0121] For example, in some embodiments, different avoidance risk levels can be preset for different types of load elements (specifically, different work tasks).

[0122] For example, in some embodiments, taking the load element as an electrical conductor as an example, the detailed method for determining its avoidance risk is explained: different electrical conductors may be used to transmit electrical signals of different specifications (specifically, signals of different frequencies). The higher the frequency of the signal, the higher the avoidance risk. For example, for high-frequency, high-speed signal transmission conductors, on the one hand, they are often of higher importance, and on the other hand, even slight environmental fluctuations (such as slight fluctuations in the device structure) may be more likely to affect them. Therefore, setting a higher avoidance risk for them is also intended to pay more attention to the structural impact of etching during etching.

[0123] Furthermore, the step of updating the arrangement parameters of the release holes 6 in the current sub-etched area and / or adjacent etched areas includes: Identify the avoidance risks of load elements in the current sub-etched area.

[0124] When the avoidance risk of the load element is less than or equal to the set risk threshold, the number of corresponding release holes 6 is increased, and the width of the release holes 6 is decreased (i.e., the diameter of the release holes 6 is decreased). This is a small-scale local adjustment.

[0125] When the avoidance risk of the load element exceeds the set risk threshold, the number of release holes 6 in the current sub-etched area is increased, and the width of the release holes 6 is decreased; simultaneously, the hole area of ​​the release holes 6 in adjacent sub-etched areas is decreased, or the hole spacing between adjacent etched areas is increased. This allows for a slightly expanded adjustment range and correlated adjustments. It's important to understand that when the avoidance risk of the load element exceeds the set risk threshold, it means the adjustable range of the release holes 6 in the current sub-etched area is small, requiring adjustments to the release holes 6 in adjacent sub-etched areas to ensure a relatively balanced distribution of release holes 6 across all sub-etched areas.

[0126] In some embodiments, S1024 specifically includes: The width of the heat insulation cavity 321 is predicted based on the etching ratio of the etching process and the width of the release hole 6. The number of insulation cavities 321 is predicted based on the release hole 6; The width and number of support bridges 322 are predicted based on the number and width of the insulation cavity 321.

[0127] For example, if an etching ratio of 1:10 is selected and the width (i.e., aperture) of the release hole 6 is 1μm, then the width of the heat insulation cavity 321 is approximately 10μm. Based on the distribution number and position of the release holes 6, the final number of heat insulation cavities 321 can be calculated. Then, based on the number and width of the heat insulation cavities 321, the number and width of the support bridges 322 can be calculated accordingly.

[0128] This embodiment provides an etching design method for the micro-ring thermal insulation space of a micro-ring waveguide chip. It aims to establish a scientific balance between thermal isolation effect and structural strength through systematic etching region division and release hole layout optimization, thereby comprehensively improving the chip's overall performance and process reliability.

[0129] Specifically, the etching process requires first creating release holes 6 on the chip surface. The location of these release holes 6 determines the formation position of the heat insulation cavity 321 and the support bridge 322, as well as the final structural strength of the chip. This embodiment divides the etching area and determines the arrangement parameters of the release holes 6 (number and width) based on the properties of the load elements (load strength and clearance requirements) within each sub-etched area. This ensures that the etching design of each local area matches the actual needs of that area, neither excessively weakening the support structure nor sacrificing the effective expansion of the heat insulation space.

[0130] Building upon this, this embodiment further addresses the layout complexity resulting from the inherent asymmetry of the microring structure. Since the distribution density of the release holes 6 naturally differs across regions, without intervention, significant unevenness in cavity dimensions between different sub-etched areas can easily occur during the etching process, leading to localized stress concentration or excessively large stress gradients, adversely affecting the overall structural strength. Therefore, this embodiment further provides a method for verifying and dynamically adjusting the arrangement parameters of the release holes 6.

[0131] Specifically, when it is detected that a sub-etched area may have a very small number of release holes 6 due to avoidance relationships, potentially leading to excessive stress differences and a risk of reduced strength, the number or diameter of the release holes 6 can be moderately increased, provided the device risk is relatively reliable. If the device risk in the sub-etched area is slightly higher, it can be synchronously adjusted in conjunction with its surrounding adjacent areas.

[0132] In summary, this invention employs three steps: first, it differentiates the arrangement of release holes in each sub-etched area; second, it verifies the uniformity of the overall distribution of release holes 6; and finally, it performs risk coordination adjustment for local areas. This fully ensures that the heat insulation cavity 321 effectively blocks the heat conduction path, improves the thermal stability of the micro-ring waveguide 22, and also ensures the reasonable distribution of the support bridge 322 in terms of structural load-bearing capacity.

[0133] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0134] The embodiments of the present invention have been described above with reference to the accompanying drawings. However, the present invention is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of the present invention without departing from the spirit and scope of the claims. All of these forms are within the protection scope of the present invention.

Claims

1. A microring device with thermal isolation function, characterized in that, include: Substrate (1); A micro-ring layer (2) is disposed above the substrate layer (1), and the micro-ring layer (2) includes: a silicon layer (21), on which a micro-ring waveguide (22) is disposed; A heat insulation layer (3) is disposed below the silicon layer (21). The heat insulation layer (3) includes a first heat insulation layer (31) and a second heat insulation layer (32) disposed sequentially along the direction close to the substrate layer (1), and the heat insulation capacity of the first heat insulation layer (31) is less than that of the second heat insulation layer (32); wherein the second heat insulation layer (32) is extended by a release hole (6); A cladding layer (4) is disposed above the silicon layer (21), and a heating layer (5) is disposed on the cladding layer (4). The heating layer (5) is wrapped by the cladding layer (4) for thermal insulation. The micro-ring device is provided with a plurality of release holes (6), and the release holes (6) penetrate the cladding (4), the silicon layer (21) and the heat insulation layer (3). The release holes (6) also partially penetrate the substrate layer (1). The area of ​​the release holes (6) located in the second heat insulation layer (32) is expanded by etching to form a plurality of heat insulation cavities (321). A support bridge (322) is reserved between at least two adjacent heat insulation cavities (321). The vertical projection area of ​​the heat insulation space formed by the multiple heat insulation cavities (321) is greater than the area of ​​the vertical projection ring of the micro-ring waveguide (22), and the release hole (6) is set away from the micro-ring waveguide (22) and the heating layer (5).

2. The micro-ring device with thermal isolation function according to claim 1, characterized in that, At least one of the release holes (6) is located in the area outside the vertical projection ring, and at least one of the release holes (6) is located in the area inside the vertical projection ring.

3. The micro-ring device with thermal isolation function according to claim 1, characterized in that, The thickness of the first heat insulation layer (31) is 2-3 μm.

4. The micro-ring device with thermal isolation function according to claim 1, characterized in that, The first heat insulation layer (31) is an oxygen-buried layer.

5. The microring device with thermal isolation function according to claim 1, characterized in that, The support bridge (322) is formed in the area outside the vertical projection ring.

6. The microring device with thermal isolation function according to claim 5, characterized in that, The support bridge (322) is formed at one end away from the heating layer (5).

7. The microring device with thermal isolation function according to claim 1, characterized in that, The vertical projection ring of the micro-ring waveguide (22) is located within the vertical projection plane of the thermal insulation space.

8. The microring device with thermal isolation function according to claim 1, characterized in that, The thickness ratio between the first heat insulation layer (31) and the second heat insulation layer (32) is 1:10 to 1:

100.

9. The microring device with thermal isolation function according to claim 1, characterized in that, The radius of the micro-ring waveguide (22) ranges from 3 to 7 μm.

10. The microring device with thermal isolation function according to claim 1, characterized in that, The distance between the release hole (6) and the micro-ring waveguide (22) is ≥1.5μm.

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