A multifunctional recording wave electric energy meter and a recording wave management method

Abstract

The application discloses a multifunctional recording wave electric energy meter and a recording wave management method, which comprises an electric energy meter body and a protocol conversion module; the electric energy meter body comprises an ADC sampling circuit, a metering unit and a management unit; the protocol conversion module is connected with the metering unit through a first SPI interface, the protocol conversion module is connected with the management unit through a second SPI interface, and the protocol conversion module is in communication connection with a master station through an Ethernet interface; an output end of the ADC sampling circuit is connected with an input end of the metering unit, the metering unit outputs ADC sampling original data to the protocol conversion module in real time through the first SPI interface, and the management unit bidirectionally interacts with the protocol conversion module through the second SPI interface, and the electric energy meter parameters, equipment states and control instructions are exchanged. The application solves the technical problems of insufficient communication capacity of a traditional electric energy meter, limited recording wave function implementation and lack of differentiated storage management.

Description

Technical Field

[0001] This invention relates to the field of electricity metering equipment technology, and in particular to a multifunctional waveform recording electricity meter and a waveform recording management method. Background Technology

[0002] With the rapid development of smart grids and digital substations, the functional requirements for electricity meters have expanded from simple energy metering to multiple dimensions such as data acquisition, waveform recording, and protocol conversion. IEC 61850, as the international standard for substation communication networks and systems, has become the core communication specification for smart substations.

[0003] Currently, the existing technologies mainly suffer from the following problems: First, the communication capabilities of traditional electricity meters are insufficient; the management MCUs of existing gated electricity meters (such as Juquan HT6033) are industrial-grade microcontrollers, whose hardware architecture and resources (clock speed, RAM / Flash capacity) are mainly geared towards bare-metal or lightweight RTOS applications, and cannot support the high computing power requirements of the IEC 61850 protocol stack for operating systems (requiring a Linux environment), memory management, and complex multi-task scheduling; if the IEC protocol stack is forcibly ported to existing MCUs... Firstly, the 61850 protocol stack presents serious risks such as protocol response timeouts and system instability. Secondly, the implementation of waveform recording is limited. Existing energy meters typically rely on external waveform recorders or manual data collection, which is costly, susceptible to electromagnetic interference, complex to operate, and lacks flexibility in data acquisition and storage, failing to meet the high-precision requirements of complex operating conditions. While some energy meters have simple waveform recording functions, they usually only support fault waveform recording, lacking the ability to acquire and store continuous real-time waveforms, making it difficult to meet the comprehensive power quality monitoring requirements of smart substations. Thirdly, the separation of protocol conversion and data acquisition leads to system complexity. In existing technologies, to simultaneously implement IEC 61850 protocol communication and waveform recording functions, it is usually necessary to configure an independent protocol conversion gateway and waveform recording device outside the energy meter, increasing system complexity and hardware costs, and making data synchronization and clock alignment between devices difficult. Fourthly, the storage management of waveform recording data is inadequate. Existing waveform recording solutions typically store real-time waveform recording data and fault waveform recording data together, lacking differentiated storage strategies, resulting in low storage space utilization and easy overwriting of critical fault data. Chinese patent application CN202123454757.2 discloses a metering system for an electricity meter, but it does not solve the aforementioned technical problems. Therefore, there is an urgent need to propose a multifunctional waveform recording electricity meter and a waveform recording management method. Summary of the Invention

[0004] The main objective of this invention is to propose a multifunctional waveform recording energy meter and a waveform recording management method, which aims to solve the technical problems of insufficient communication capabilities, limited waveform recording function implementation, and lack of differentiated storage management in traditional energy meters.

[0005] To achieve the above objectives, the present invention provides a multi-functional waveform recording energy meter, wherein the multi-functional waveform recording energy meter includes an energy meter body and a protocol conversion module; the energy meter body includes an ADC sampling circuit, a metering unit, and a management unit;

[0006] The protocol conversion module is connected to the metering unit via a first SPI interface, and to the management unit via a second SPI interface. The protocol conversion module is also connected to the master station via an Ethernet interface. The output of the ADC sampling circuit is connected to the input of the metering unit. The metering unit outputs the raw ADC sampling data to the protocol conversion module in real time via the first SPI interface. The management unit interacts bidirectionally with the protocol conversion module via the second SPI interface to exchange meter parameters, device status, and control commands.

[0007] In one preferred embodiment, the protocol conversion module includes a main control processor, running memory, a non-volatile storage unit, an SD card interface, an Ethernet interface, a first SPI interface, and a second SPI interface;

[0008] The main control processor is connected to the running memory, non-volatile storage unit, SD card interface, Ethernet interface, first SPI interface and second SPI interface respectively; the main control processor receives raw ADC sampling data from the metering unit through the first SPI interface, and the main control processor communicates with the master station through the Ethernet interface.

[0009] In one preferred embodiment, the protocol conversion module performs protocol conversion, specifically as follows:

[0010] Initialization: The module is powered on, and the main control processor performs initialization operations.

[0011] Data acquisition: The main control processor periodically acquires electrical parameter data according to the data category through the first SPI interface and the second SPI interface, and performs CRC16 verification.

[0012] Data mapping: The main control processor looks up the sAddr corresponding to the base table data item according to the data mapping table, obtains the data pointer corresponding to sAddr in the data area of ​​the IEC61850 data model, and writes the base table data value into the model data area;

[0013] MMS server processing and GOOSE / SV service processing: The main control processor processes client requests from the master station through the IEC61850 MMS server; and processes real-time data transmission through the IEC61850 GOOSE / SV service.

[0014] Data and clock synchronization: The main control processor, acting as the SPI master, interacts with the base table to split the parsed data items into values, quality bits, and time stamps, and writes them into the synchronization buffer. After being located in the IEC 61850 model data area through data mapping, the data is refreshed and a change report and log are sent. The main control processor synchronizes with the station's clock source through the SNTP protocol and synchronizes the synchronization result to the management unit through the second SPI interface.

[0015] In one preferred embodiment, the non-volatile memory cell includes NAND Flash memory and eMMC memory;

[0016] The SD card interface is used to connect an external SD card; the main control processor writes real-time waveform recording data to the SD card and fault waveform recording data to the eMMC memory.

[0017] In one preferred embodiment, the ADC sampling circuit uses a 24-bit Σ-Δ ADC conversion chip.

[0018] One preferred embodiment is that the Ethernet interface uses an RMII interface Ethernet PHY chip to provide an RJ45 Ethernet interface.

[0019] In one preferred embodiment, the SD card uses a circular caching strategy to store real-time waveform data, and automatically overwrites the oldest historical waveform data when the storage space is full.

[0020] A method for recording waveform management based on the aforementioned multi-functional waveform recording energy meter includes the following steps:

[0021] S1. Data reception: Receive the raw data frame sampled by the ADC from the metering unit through the first SPI interface;

[0022] S2, Frame parsing and verification: Parse the received ADC sampled raw data frames, extract the frame sequence number, frame time stamp, voltage sample value, current sample value and electrical parameter data, and perform CRC16 verification on each frame of data.

[0023] S3, Frame Sequence Number Detection: Detects whether the current frame sequence number is consecutive to the previous frame sequence number. If they are not consecutive, the frame loss event is recorded.

[0024] S4. Real-time waveform recording and storage: The raw data frames sampled by the ADC are written to the SD card through the SD card interface and stored using a circular caching strategy.

[0025] S5. Fault detection: Perform fault detection based on the raw data sampled by the ADC and the meter status information obtained from the management unit.

[0026] S6. Fault recording and storage: When a fault event is detected, the original ADC sampling data frames of the N cycles before and the M cycles after the fault time are extracted and written into the eMMC memory.

[0027] One preferred embodiment, the frame parsing and verification step S2, specifically includes:

[0028] S21. The main control processor scans the data in the receive buffer to locate the start character and verifies whether the command character matches.

[0029] S22. The main control processor extracts the length field, calculates the expected length of the whole frame based on the length field, and determines whether the amount of data in the receiving buffer has reached the expected length. If it has not reached the expected length, it is determined to be an incomplete frame and the corresponding frame is discarded. The frame length is recorded as abnormal. If it has reached the expected length, the next step is executed.

[0030] S23. Sequentially extract the frame sequence number, frame time stamp, voltage sample value sequence, current sample value sequence, electrical parameter data field, and frame verification field;

[0031] S24. Calculate the CRC16 check value for all bytes from the command character up to the frame check field and compare it with the frame check field. If they match, the check is considered successful. If they do not match, discard the data and increment the communication error counter.

[0032] One preferred embodiment is that the fault detection includes at least one of the following: voltage sag detection, voltage dip detection, overcurrent detection, undervoltage detection, overvoltage detection, phase loss detection, reverse phase sequence detection, neutral wire loss detection, phase imbalance detection, and current reverse detection.

[0033] In the above technical solution of the present invention, the multifunctional waveform recording energy meter includes an energy meter body and a protocol conversion module; the energy meter body includes an ADC sampling circuit, a metering unit, and a management unit; the protocol conversion module is connected to the metering unit through a first SPI interface, the protocol conversion module is connected to the management unit through a second SPI interface, and the protocol conversion module is connected to the master station via an Ethernet interface; the output terminal of the ADC sampling circuit is connected to the input terminal of the metering unit, the metering unit outputs the raw ADC sampling data to the protocol conversion module in real time through the first SPI interface, and the management unit interacts bidirectionally with the protocol conversion module through the second SPI interface to exchange meter parameters, device status, and control commands. The present invention solves the technical problems of insufficient communication capability, limited waveform recording function implementation, and lack of differentiated storage management in traditional energy meters.

[0034] In this invention, by adding an independent protocol conversion module to the outside of the electricity meter and interconnecting it with the base meter via the SPI interface, metering and management are separated, and the flexible architecture with external protocol processing is achieved. The base meter only needs to output data via SPI according to the agreed protocol without modifying the original hardware design. Compared with the original MCU, which forcibly ported the IEC61850 protocol stack, the risks of protocol response timeout and system instability are avoided.

[0035] In this invention, the raw ADC sampling data obtained from the metering unit is split into two streams: one stream is uploaded to the main station via Ethernet or cached to an SD card, while the other stream is persistently saved to an eMMC memory, thus fully meeting the power quality monitoring needs of smart substations.

[0036] In this invention, different data types are stored using SD cards and eMMC memory. For example, real-time waveform data is stored on the SD card and a cyclic overwrite method is used to meet the needs of long-term continuous monitoring. Fault waveform data is stored in the eMMC memory and permanently saved to ensure that critical fault data is not overwritten. This differentiated storage strategy ensures storage space utilization while maximizing the security of fault data. Attached Figure Description

[0037] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the structures shown in these drawings without creative effort.

[0038] Figure 1 This is a schematic diagram of a multifunctional waveform recording energy meter according to an embodiment of the present invention;

[0039] Figure 2 This is a schematic diagram of the data flow of the multifunctional waveform recording energy meter according to an embodiment of the present invention;

[0040] Figure 3 This is a schematic diagram of the software layering of the protocol conversion module according to an embodiment of the present invention;

[0041] Figure 4 This is a schematic diagram of a waveform recording management method for a multifunctional waveform recording energy meter according to an embodiment of the present invention;

[0042] Figure 5 This is a schematic diagram of the protocol conversion process of the protocol conversion module in an embodiment of the present invention;

[0043] Figure 6 This is a schematic diagram of the upstream base table data synchronization data flow according to an embodiment of the present invention;

[0044] Figure 7 This is a schematic diagram of the downlink client write / control data synchronization data flow according to an embodiment of the present invention.

[0045] The realization of the objective, functional characteristics and advantages of the present invention will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0046] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0047] Furthermore, the technical solutions of the various embodiments of the present invention can be combined with each other, but only if they are based on the ability of those skilled in the art to implement them. When the combination of technical solutions is contradictory or cannot be implemented, it should be considered that such combination of technical solutions does not exist and is not within the scope of protection claimed by the present invention.

[0048] See Figure 1 The present invention provides a multi-functional waveform recording energy meter, wherein the multi-functional waveform recording energy meter includes an energy meter body and a protocol conversion module; the energy meter body includes an ADC sampling circuit, a metering unit and a management unit;

[0049] The protocol conversion module is connected to the metering unit via a first SPI interface, and to the management unit via a second SPI interface. The protocol conversion module is also connected to the master station via an Ethernet interface. The output of the ADC sampling circuit is connected to the input of the metering unit. The metering unit outputs the raw ADC sampling data to the protocol conversion module in real time via the first SPI interface. The management unit interacts bidirectionally with the protocol conversion module via the second SPI interface to exchange meter parameters, device status, and control commands.

[0050] Specifically, in this embodiment, the ADC sampling circuit is connected to the input terminals of the power grid voltage and current signals, and is used to perform analog-to-digital conversion sampling of the voltage and current signals of each phase and output digital sampling data. The ADC sampling circuit adopts a 24-bit Σ-Δ ADC conversion chip. In this invention, the ADC sampling circuit adopts an ADS1287 ADC conversion chip, which supports synchronous sampling of voltage and current data of 8 channels. The reference voltage of the ADC sampling circuit is 2.5V, and 128 points are sampled per power frequency cycle, with a sampling frequency of 6.4kHz.

[0051] Specifically, in this embodiment, the metering unit is connected to the ADC sampling circuit. The metering unit includes a digital signal processor, which is a TMS320C6748 processor used to receive the raw ADC sampling data and execute the power metering algorithm to calculate electrical parameters such as power, energy, and demand. The metering unit outputs the raw ADC sampling data to the protocol conversion module in real time through the first SPI interface, and the metering unit is connected to the management unit through the UART serial port.

[0052] Specifically, in this embodiment, the management unit includes a management MCU, which uses the Juquan HT6033 management chip; the management unit is used for the business management, parameter configuration and local event recording of the electricity meter; the management unit is connected to the protocol conversion module through the second SPI interface to interact with the meter parameters, device status and control commands.

[0053] Specifically, in this embodiment, the protocol conversion module is an IEC61850 communication protocol conversion module; the protocol conversion module includes a main control processor, running memory, a non-volatile storage unit, an SD card interface, an Ethernet interface, a first SPI interface, and a second SPI interface; the main control processor is connected to the running memory, the non-volatile storage unit, the SD card interface, the Ethernet interface, the first SPI interface, and the second SPI interface respectively; the main control processor receives the raw ADC sampling data from the metering unit through the first SPI interface, and the main control processor communicates with the master station through the Ethernet interface.

[0054] Specifically, in this embodiment, the main control processor is an NXP i.MX6ULL processor with an ARM Cortex-A7 architecture and a main frequency of 800MHz; the main control processor serves as the core computing platform.

[0055] Specifically, in this embodiment, the running memory is a DDR3 memory. In this invention, the DDR3 memory is 256MB. This invention does not impose a specific limitation, and the specific setting can be made according to needs. The running memory is connected to the main control processor and serves as a program running and data cache space.

[0056] Specifically, in this embodiment, the non-volatile storage unit includes a NAND Flash memory and an eMMC memory. The NAND Flash memory is used to store system firmware and boot files, and the eMMC memory is used to persistently store fault waveform data. In this invention, the NAND Flash memory is 256MB and the eMMC memory is 16GB. The NAND Flash memory and eMMC memory can be selected according to the user's storage needs, and this invention does not impose any specific limitations.

[0057] Specifically, in this embodiment, the SD card interface is used to connect an external SD card to realize the cyclic buffer storage of real-time waveform data; the main control processor writes the real-time waveform data to the SD card, the capacity of which is 128GB. This invention does not impose a specific limitation, and it can be set according to needs; fault waveform data is written to the eMMC memory.

[0058] Specifically, in this embodiment, the Ethernet interface uses an RMII interface Ethernet PHY chip to provide an RJ45 Ethernet interface for communication with the master station using the IEC61850 protocol.

[0059] Specifically, in this embodiment, the protocol conversion module further includes a 4G communication module and / or an HPLC carrier module; the 4G communication module and / or the HPLC carrier module are connected to the main control processor.

[0060] Specifically, in this embodiment, the SD card uses a circular caching strategy to store real-time waveform data, and automatically overwrites the oldest historical waveform data when the storage space is full.

[0061] Specifically, in this embodiment, see Figure 2 The data flow of the multi-functional waveform recording energy meter is as follows:

[0062] The three-phase voltage and current signals from the power grid are input to the corresponding channels of the ADC sampling circuit. The ADC sampling circuit synchronously samples the voltage and current signals of each phase, sampling 128 points per power frequency cycle at a sampling frequency of 6.4kHz. The ADC sampling circuit transmits the raw ADC sampling data to the digital signal processor of the metering unit via the SPI bus. After receiving the raw ADC sampling data, the digital signal processor of the metering unit executes the energy metering algorithm and basic event detection, and calculates the following electrical parameter data:

[0063] Instantaneous quantities: phase voltage, phase current, active / reactive / apparent power of each phase and total, power factor, grid frequency, current active / reactive demand;

[0064] Electrical energy: forward / reverse active energy, forward / reverse reactive energy, four-quadrant reactive energy, forward / reverse apparent energy, including total and phase energy, total and rate energy, current and at least the energy settled in the past 3 months;

[0065] The metering unit transmits the aforementioned electrical parameter data to the management unit's MCU via UART serial port for data storage, event assembly, curve archiving, reporting, and protocol processing; the following events and data can be obtained:

[0066] Demand: Forward / Reverse Active / Reactive / Apparent Maximum Demand;

[0067] Recorded data: load curve, power quality curve, various event records (power failure / power on / time synchronization / battery replacement / time-of-use tariff activation / fault register clearing / alarm register clearing / firmware readiness and activation / standby tariff table programming / meter cover opening / terminal cover opening / strong magnetic interference / parameter programming / undervoltage / overvoltage / phase loss / reverse phase sequence / neutral wire loss / phase imbalance / current reversal, etc.).

[0068] The digital signal processor of the metering unit outputs the raw data sampled by the ADC to the main control processor of the IEC 61850 communication protocol conversion module in real time through the first SPI interface in a one-way communication mode. The length of one frame of data is 3330 bytes. At a communication rate of 6Mbps, each frame of data transmission takes about 4.44ms.

[0069] The main control processor of the IEC 61850 communication protocol conversion module receives the raw ADC sampling data from the metering unit via the first SPI interface and performs split processing: First channel real-time waveform recording: The main control processor converts the raw ADC sampling data according to IEC... The 61850 standard encapsulates the data into SV (sampled value) messages, which are uploaded to the master station in real time via the RMII Ethernet interface to achieve remote real-time waveform monitoring. Simultaneously, when the backend / master station network is disconnected or not connected, the system automatically writes the real-time waveform data to an SD card for cyclic buffering. The SD card uses a cyclic storage strategy to ensure at least 7 days of waveform recording capacity; once the storage space is full, it automatically overwrites the oldest historical waveform data. The second fault waveform recording function: the main control processor, based on the received ADC sampled raw data and the meter status information obtained from the management unit, determines in real time whether a fault event has occurred in the power grid. When fault triggering conditions are met (such as voltage spurt / sag, overcurrent, undervoltage, overvoltage, phase loss, etc.), the system automatically triggers the fault waveform recording function, capturing waveform data before and after the fault moment. The fault waveform data is not written to the SD card but is persistently stored in the eMMC memory. Unlike the SD card's cyclic overwrite storage, the eMMC memory prioritizes the retention of fault waveform data, preventing it from being overwritten. The specific method for determining fault events is not specifically limited in this invention; conventional methods are sufficient.

[0070] After the main control processor obtains electrical parameter data from the management unit through the second SPI interface, it establishes a one-to-one correspondence between the base table data items and sAddr (short address) in the IEC 61850 data model according to the pre-configured data mapping table; it writes the electrical parameter data into the data area of ​​the IEC 61850 data model; it encapsulates the data into a standard IEC 61850 message through the IEC 61850 protocol stack (including MMS server, GOOSE publish / subscribe, SV publish); and it uploads the IEC 61850 message to the master station through the RMII Ethernet interface.

[0071] Specifically, in this embodiment, see Figure 3 The protocol conversion module is structured from bottom to top as a hardware layer, driver layer, operating system layer, protocol stack layer, and application layer. The hardware layer includes hardware devices such as a main control processor, running memory, non-volatile storage units, SD card interface, Ethernet interface, first SPI interface, and second SPI interface. The driver layer implements SPI device drivers, Ethernet device drivers, SD / MMC drivers, NAND Flash drivers, and eMMC drivers based on the Linux kernel standard subsystem. The operating system layer is an embedded Linux operating system with kernel version 4.9 or higher, loaded with the PREEMPT_RT real-time preemption patch, providing task scheduling, network protocol stack, and file system services. The protocol stack layer includes the IEC 61850 protocol dynamic library (implementing MMS server model, GOOSE model, SV model, etc.) and ICD model files. The application layer includes a data synchronization module, a data mapping module, a clock management module, a system management module, and a waveform management module.

[0072] See Figure 4 According to another aspect of the present invention, the present invention provides a waveform recording management method based on the aforementioned multifunctional waveform recording energy meter, comprising the following steps:

[0073] S1. Data reception: The main control processor receives the raw data frame of ADC sampling from the metering unit through the first SPI interface.

[0074] S2. Frame parsing and verification: The main control processor parses the received ADC sampled raw data frames, extracts the frame sequence number, frame time stamp, voltage sample value, current sample value and electrical parameter data, and performs CRC16 verification on each frame of data.

[0075] S3, Frame Sequence Number Detection: The main control processor detects whether the current frame sequence number is continuous with the previous frame sequence number. If they are not continuous, it records the frame loss event and updates the communication quality statistics.

[0076] S4. Real-time waveform recording and storage: The main control processor writes the raw data frames sampled by the ADC to the SD card through the SD card interface and uses a circular cache strategy for storage. First, it checks the available storage space on the SD card. If the available space is insufficient, it overwrites the oldest historical waveform recording data in the order from oldest to newest. If the available space is sufficient, it directly appends the data. The storage of real-time waveform recording data meets the capacity requirement of at least 7 consecutive days.

[0077] S5. Fault detection: Perform fault detection based on the raw data sampled by the ADC and the meter status information obtained from the management unit.

[0078] S6. Fault recording and storage: When a fault event is detected, the original ADC sampling data frames of the N cycles before and the M cycles after the fault time are extracted and written into the eMMC memory.

[0079] Specifically, in this embodiment, the main control processor receives the raw ADC sampling data frames from the metering unit at a rate of 6Mbps through the first SPI interface. Each data frame is 3330 bytes long and the transmission time is 4.44ms.

[0080] Specifically, in this embodiment, in S1, the main control processor has received the raw ADC sampling data frame from the metering unit through the first SPI interface and stored it in the receive buffer of the DDR3 running memory. The frame parsing and verification step S2 is as follows:

[0081] S21. Frame header detection: The main control processor scans the data positioning start character 0x68H in the receive buffer. After finding the start character, it captures the subsequent bytes and verifies whether the command character matches. If they do not match, it determines that the data positioning start character 0x68H is a pseudo frame header in the data stream. It then rescans the data positioning start character from the next byte until a valid frame header is detected and subsequent parsing is performed or the receive data scan is completed.

[0082] S22. The main control processor extracts the length field (2 bytes, using small segment byte order) to represent the number of frame bytes excluding the start and end characters; it calculates the expected length of the entire frame (2 bytes of length field + 1 byte of start character + 1 byte of end character) based on the length field, and determines whether the amount of data in the receive buffer has reached the expected length. If it has not reached the expected length, it is determined to be an incomplete frame, and the corresponding frame is discarded and the frame length is recorded as abnormal. If it has reached the expected length, it proceeds to the next step.

[0083] S23. After confirming the frame is complete, the main control processor extracts the frame sequence number, frame time stamp, voltage sample value sequence, current sample value sequence, electrical parameter data field and frame check field in sequence according to the protocol format.

[0084] Frame sequence number (1 byte): Extracted and stored for frame loss detection;

[0085] Frame timestamp (8 bytes): Extract the year, month, day, hour, minute, second, and millisecond fields in sequence and combine them into a UTC time format for storage;

[0086] Voltage sampling value sequence: Extracting 4 bytes from each phase (A, B, C) in phase order, for a total of 12 bytes, stored as a 32-bit unsigned integer, representing the original AD sampling values. For N sets of sampling points, the extraction is repeated N times.

[0087] Current sampling value sequence: 4 bytes are extracted from each phase in the order of A, B, and C, for a total of 12 bytes, and stored in 32-bit signed integer format; for N sets of sampling points, the extraction is repeated N times.

[0088] Electrical parameter data field: Extract the following fields in sequence: full-wave active power (total and 4 bytes each for A / B / C phases), fundamental active power, full-wave reactive power, fundamental reactive power, full-wave apparent power, fundamental apparent power, full-wave current RMS value, fundamental current RMS value, harmonic current RMS value, full-wave voltage RMS value, fundamental voltage RMS value, harmonic voltage RMS value, full-wave power factor, fundamental power factor, voltage phase angle, current phase angle, active energy, etc. Each field is parsed in little-endian byte order;

[0089] Frame check field (2 bytes): Extracts the CRC16 check value before the frame tail;

[0090] S24. Calculate the CRC16 checksum for all bytes from the command character up to the frame checksum field and compare it with the frame checksum field. If they match, the checksum passes; otherwise, discard the data and increment the communication anomaly counter. The CRC16 uses CRC-16 / IBM (polynomial 0x8005, input / output reflection, initial value 0x0000), implemented in a right-shift manner, with the corresponding reflection polynomial 0xA001. Specifically:

[0091] Assign the initial value 0x0000 to the CRC register;

[0092] For each byte involved in the verification, perform an XOR operation with the lower 8 bits of the CRC register, and write the result back to the register;

[0093] The CRC register is shifted right 8 times: each time the shift-out bit (i.e., the least significant bit) is checked. If the shift-out bit is 1, it is shifted right by one bit and then XORed with the reflection polynomial 0xA001; if the shift-out bit is 0, it is shifted right by only one bit.

[0094] After processing all bytes, the calculated value of the CRC register is compared with the frame check field in little-endian byte order.

[0095] If the two match, the verification is considered successful, and the extracted fields are stored in the corresponding storage area for subsequent waveform management and fault detection. If they do not match, the frame is discarded, the communication anomaly counter is incremented, and the communication anomaly event is recorded.

[0096] Specifically, in this embodiment, the fault detection includes at least one of the following: voltage sag detection, voltage drop detection, overcurrent detection, undervoltage detection, overvoltage detection, phase loss detection, reverse phase sequence detection, neutral wire loss detection, phase imbalance detection, and current reverse detection.

[0097] Specifically, in this embodiment, the voltage sag detection is as follows:

[0098] The main control processor reads the effective value of each phase voltage from the parsed electrical parameter data; and compares the effective values ​​of the three phase voltages A, B, and C with the sag threshold (default value is 110% of the rated voltage, configurable range is 105% to 140%).

[0099] Triggering condition: The effective value of any phase voltage exceeds the spurious rise threshold for a set delay (default 3 cycles, i.e. 60ms, configurable).

[0100] Termination condition: The spurt event is considered to have ended when the effective value of the phase voltage drops to equal to or less than (spurt threshold - hysteresis value).

[0101] The hysteresis value is set to 2% of the rated voltage by default to prevent frequent triggering at threshold boundaries.

[0102] The voltage sag detection specifically includes:

[0103] The main control processor reads the effective value of each phase voltage from the parsed electrical parameter data and compares the effective values ​​of the three phase voltages A, B, and C with the sag threshold (default value is 90% of the rated voltage, configurable range is 75% to 95%).

[0104] Triggering condition: The effective value of any phase voltage remains below the sag threshold for a set delay (default 3 cycles, i.e. 60ms, configurable).

[0105] Termination condition: When the effective value of the phase voltage rises to equal to or greater than (sag threshold + hysteresis value), the sag event is determined to have ended.

[0106] The overvoltage detection specifically includes:

[0107] The main control processor reads the effective values ​​of each phase voltage from the parsed electrical parameter data. It then compares the effective values ​​of the three-phase voltages (A, B, and C) with the overvoltage threshold (default value is 120% of the rated voltage, configurable range is 110% to 150%).

[0108] Triggering condition: The effective value of any phase voltage exceeds the overvoltage threshold for a set delay (default 3 cycles, configurable).

[0109] Termination condition: When the effective value of the phase voltage drops to equal to or less than (overvoltage threshold - hysteresis value), the overvoltage event is determined to end.

[0110] The undervoltage detection specifically includes:

[0111] The main control processor reads the effective values ​​of each phase voltage from the parsed electrical parameter data. It then compares the effective values ​​of the three-phase voltages (A, B, and C) with the undervoltage threshold (default value is 80% of the rated voltage, configurable range is 60% to 85%).

[0112] Triggering condition: The effective value of any phase voltage remains below the undervoltage threshold for a set delay (default 3 cycles, configurable).

[0113] Termination condition: When the effective value of the phase voltage rises to equal to or greater than (undervoltage threshold + hysteresis value), the undervoltage event is determined to end.

[0114] The overcurrent detection specifically includes:

[0115] The main control processor reads the effective value of the current of each phase from the parsed electrical parameter data; and compares the effective values ​​of the three-phase currents A, B, and C with the overcurrent threshold (default value is 120% of the rated current, configurable range is 110% to 200%).

[0116] Triggering condition: The effective value of any phase current exceeds the overcurrent threshold for a set delay (default 3 cycles, configurable).

[0117] Termination condition: When the effective value of the phase current drops to equal to or less than (overcurrent threshold - hysteresis value), the overcurrent event is determined to have ended.

[0118] The phase loss detection specifically includes:

[0119] The main control processor reads the effective value of each phase voltage from the parsed electrical parameter data; and compares the effective values ​​of the three phase voltages A, B, and C with the phase loss threshold (default value is 10% of the rated voltage, configurable range is 5% to 15%).

[0120] Triggering condition: The effective value of any phase voltage is continuously lower than the phase loss threshold for a set delay (default 5 cycles, i.e. 100ms, configurable).

[0121] Termination condition: When the effective value of the phase voltage rises to equal to or greater than (phase failure threshold + hysteresis value), the phase failure event is determined to end.

[0122] The reverse phase sequence detection specifically includes:

[0123] The main control processor reads the voltage phase angle field (4 bytes each for phases A, B, and C) from the parsed electrical parameter data; it determines the phase sequence based on the phase angle relationship of the three-phase voltages: in the positive sequence, the voltage of phase B lags phase A by 120°, and the voltage of phase C lags phase B by 120° (i.e., phase C lags phase A by 240°); if phase B is detected to lead phase A by 120° (i.e., the phase sequence is A→C→B), it determines that a reverse phase sequence event has occurred.

[0124] The zero-line detection specifically includes:

[0125] The main control processor reads the effective value of each phase voltage from the parsed electrical parameter data and calculates the vector sum of the three-phase voltages (considering the phase relationship of each phase). When the amplitude of the vector sum of the three-phase voltages continuously exceeds the set percentage of the rated voltage (default 5%, configurable range is 3% to 10%), it determines that a neutral wire drop event has occurred.

[0126] The phase imbalance detection specifically includes:

[0127] The main control processor reads the effective value of each phase voltage from the parsed electrical parameter data and calculates the three-phase voltage imbalance: the three-phase voltage imbalance = (maximum three-phase voltage - minimum three-phase voltage) / average three-phase voltage × 100%;

[0128] A phase imbalance event is determined to have occurred when the three-phase voltage imbalance continuously exceeds the set threshold (default 5%, configurable range 1% to 10%) and the duration reaches the set delay (default 5 cycles, configurable).

[0129] The reverse current detection specifically includes:

[0130] The main control processor reads the active power values ​​of each phase (A, B, and C phase values ​​in the full-wave active power field) from the parsed electrical parameter data; when the active power of any phase is negative (indicating that the power direction is opposite to the preset positive direction) and the duration exceeds the set delay (default 5 cycles, configurable), a current reversal event is determined to have occurred.

[0131] The comprehensive processing of test results is as follows:

[0132] Each test item is executed independently once per power frequency cycle, and each test item maintains an independent timer for delay confirmation; if any test item meets the trigger condition, a corresponding fault event flag is generated, and step S406 is entered to perform fault recording trigger judgment; the threshold parameters (surge threshold, slump threshold, overvoltage threshold, undervoltage threshold, overcurrent threshold, phase loss threshold, unbalance threshold, etc.) and delay parameters of each test item are all remotely configured through the management unit, and the configuration values ​​are stored in the configuration partition of NAND Flash and are automatically loaded when the system starts.

[0133] Specifically, in this embodiment, the main control processor extracts the raw ADC sampling data frames for the 5 cycles before and 10 cycles after the fault time in the fault waveform storage, writes the extracted fault waveform data into the eMMC memory, and generates a fault waveform record, including information such as fault type, fault occurrence time, and fault duration. The main control processor determines the Ethernet connection status with the station control layer master station. If the connection is normal, it encapsulates the raw ADC sampling data according to the IEC 61850 SV message format and uploads it to the master station in real time through the RMII Ethernet interface. If the connection is abnormal, the data is cached to the SD card and automatically re-uploaded after the connection is restored. The main control processor encapsulates the electrical parameter data according to the IEC 61850 MMS service format and uploads it to the master station through the RMII Ethernet interface. The MMS service is based on the TCP / IP protocol (port) and supports services such as association, read / write, reporting, control, setting groups, logs, file transfer, and time synchronization.

[0134] Specifically, in this embodiment, the present invention adopts a three-level storage architecture:

[0135] DDR3 RAM serves as the program execution space and data cache space for the main controller processor. Its uses include: running the embedded Linux operating system and IEC 61850 protocol stack; caching the raw data frames sampled by the ADC; caching the IEC 61850 data model; and acting as a transmit / receive buffer for SPI communication.

[0136] The SD card is used for real-time waveform recording storage. It connects to the main control processor via an SD card interface and is used for cyclic buffering of real-time waveform recording data. The stored content includes raw AD sampling data (such as voltage and current waveforms). The storage method is cyclic overwrite and first-in-first-out (FIFO). The storage capacity is 128GB, sufficient for at least 7 consecutive days of waveform recording. Full processing automatically overwrites the oldest historical data. The data is used for power quality analysis, trend analysis, and post-event traceability.

[0137] eMMC memory, fault waveform storage, is connected to the main control processor for persistent storage of fault waveform data; the stored content includes waveform data before and after the fault moment and fault records; the storage method is persistent saving, without circular overwriting; the storage capacity is 16GB, and manual cleanup or archiving according to strategy is required when the storage is full; the data is mainly used for fault analysis, protection setting verification, and accident tracing.

[0138] NAND Flash, the system firmware storage, is connected to the main controller processor and is used to store system firmware and boot files. The stored content includes: bootloader; Linux kernel image; root file system; system configuration files (RS61850.cfg, ICD model file, data mapping table); and runtime logs. The configuration files employ a dual-backup strategy, automatically reverting to the backup version in case of damage. NAND flash and eMMC storage are customizable based on customer requirements; eMMC storage is selected if fault recording is required, and NAND flash is selected if fault recording is not required.

[0139] Specifically, in this embodiment, see Figure 5 The IEC61850 communication protocol conversion module performs IEC61850 protocol conversion. It establishes a mapping relationship between base table data items and the IEC 61850 data model sAddr through a data mapping module, and achieves efficient direct writing of large batches of data through data area pointers. Compared to the traditional method of item-by-item conversion, this significantly improves data conversion efficiency. Specifically:

[0140] After the IEC 61850 communication protocol conversion module is powered on, the main control processor performs the following initialization operations: loads the boot program, starts the Linux kernel, mounts the root file system, loads the SPI driver, Ethernet driver, SD / MMC driver, reads the system configuration file RS61850.cfg, parses the ICD model file, establishes the IEC 61850 data model, establishes the mapping relationship between sAddr (short address) and base table data items, initializes the data area, starts network services, and starts the data synchronization thread.

[0141] After system initialization is complete, the module will be powered on and IEC 61850 service will be available within 30 seconds.

[0142] SPI data acquisition: The main control processor performs data acquisition through the first SPI interface and the second SPI interface: instantaneous quantity, electrical energy, and demand data are acquired at a cycle of no more than 1 second; record-type data (load curve, event record, etc.) are acquired according to the freeze / record cycle (typical value 15 minutes); event-type data is acquired immediately triggered by the base table reporting flag; each frame of SPI data is checked with CRC16, and if the check fails, it is retransmitted (no more than 3 times).

[0143] Data mapping: The main control processor maps the collected base table data items to the IEC 61850 data model: It looks up the corresponding sAddr for each base table data item in the data mapping table; sAddr is a short address in the IEC 61850 protocol, and the GetDataPtr function is used to obtain the data pointer corresponding to sAddr in the model data area; the base table data value is written to the model data area; and the NotifyDataChg function is called to trigger data change reports and log recording.

[0144] MMS server processing: The main control processor processes client requests from the station control layer master station via the IEC 61850 MMS server; specifically: association establishment and release; data read / write; setting and enabling of report control blocks (BRCB / URCB); control commands (select / execute / cancel); setpoint group operations; log query; file transfer; time synchronization;

[0145] The main control processor handles real-time data transmission via the IEC 61850 GOOSE / SV service: GOOSE message publishing and subscription: used to transmit rapid events such as status changes; SV message publishing (multicast / unicast): used to transmit raw AD sampling data; enabling and disabling GOOSE / SV is controlled by the client through callback functions.

[0146] Data and clock synchronization is achieved between the module and the base table. The main control processor acts as an SPI master, initiating requests to the base table according to a custom protocol and sending and receiving data using DMA. Each frame is checked with CRC16 and retransmitted after a timeout. The main control processor periodically schedules acquisition tasks according to data categories, splits the parsed data items into values, quality bits, and timestamps, and writes them to the synchronization buffer. After the data mapping module locates the IEC 61850 model data area, the data is refreshed, and change reports and logs are triggered. The main control processor synchronizes with the station's clock source via the SNTP protocol, and synchronizes the synchronization result to the management unit through the second SPI interface, providing the data with a UTC timestamp and clock accuracy quality identifier. (Data flow details omitted). Figures 6-7 Specifically:

[0147] SPI Communication Management: The module acts as the SPI master (with the base table as the slave), organizes request frames according to a custom protocol and receives response frames, using DMA for transmission and reception; it performs frame-level CRC16 verification, retransmission after timeout (no more than 3 times), and counts communication anomalies.

[0148] Synchronous scheduling: Data acquisition tasks are scheduled periodically according to data category (instantaneous data 1s, electrical energy / demand 5s, record-type data according to freeze / record cycle, parameters and clock as needed); event-type data is triggered by the base table reporting flag for immediate acquisition;

[0149] Protocol parsing and data caching: Parse the response frame, split it into "value + quality bit + timestamp" according to the data item and write it to the synchronization buffer; when communication continues to fail, the corresponding data quality is set to invalid.

[0150] Data writing: The cached data is located in the model data area through the data mapping module, the data update interface is called to refresh it, and reports and logs are sent for the changed data;

[0151] Module system time maintenance: synchronize time with the station's clock source via SNTP (period is configurable, default 60 s); synchronize the time synchronization result to the base table via the SPI channel (time synchronization command); provide UTC time stamp and clock accuracy quality indicator for the data; invalidate time stamp quality and record the event when time synchronization fails.

[0152] Specifically, in this embodiment, remote upgrades are performed through two methods: base table upgrade and network port upgrade. The base table upgrade involves sending a remote upgrade request, firmware transmission, verification, and activation commands to the base table in IEC 62056 protocol format. The base table then notifies the IEC 61850 communication protocol conversion module via the downlink SPI interface and transmits the firmware and corresponding upgrade commands to the module using a custom protocol. The module performs firmware integrity verification and activates the firmware. The network port upgrade extends the IEC 61850 protocol by defining new logical nodes and data objects to manage the upgrade process, including storing and reading upgrade history records, storing new firmware data, and controlling objects such as triggering upgrades and querying status. Alternatively, a custom protocol from other protocol conversion software can be used. This invention supports remote firmware upgrades via both the base table (IEC 62056 protocol) and the network port (IEC 61850 protocol extension). The upgrade package undergoes integrity verification, and automatic rollback occurs upon upgrade failure, ensuring the safety and maintainability of field equipment.

[0153] Specifically, in this embodiment, the present invention can be widely applied to electricity meter products in fields such as smart substations, digital substations, and gate electricity metering. By adding an independent IEC61850 communication protocol conversion module to the existing electricity meter, the traditional electricity meter can be equipped with IEC61850 protocol communication capability and waveform recording function, which has good compatibility and scalability.

[0154] The above are merely preferred embodiments of the present invention and do not limit the patent scope of the present invention. All equivalent structural transformations made using the contents of the present invention's specification and drawings under the inventive concept of the present invention, or direct / indirect applications in other related technical fields, are included within the patent protection scope of the present invention.

Claims

1. A multifunctional waveform recording energy meter, characterized in that, include: The energy meter body and the protocol conversion module; the energy meter body includes an ADC sampling circuit, a metering unit, and a management unit. The protocol conversion module is connected to the metering unit via a first SPI interface, and to the management unit via a second SPI interface. The protocol conversion module is also connected to the master station via an Ethernet interface. The output of the ADC sampling circuit is connected to the input of the metering unit. The metering unit outputs the raw ADC sampling data to the protocol conversion module in real time via the first SPI interface. The management unit interacts bidirectionally with the protocol conversion module via the second SPI interface to exchange meter parameters, device status, and control commands.

2. The multifunctional waveform recording energy meter according to claim 1, characterized in that, The protocol conversion module includes a main control processor, running memory, non-volatile storage unit, SD card interface, Ethernet interface, first SPI interface and second SPI interface; The main control processor is connected to the running memory, non-volatile storage unit, SD card interface, Ethernet interface, first SPI interface and second SPI interface respectively; the main control processor receives raw ADC sampling data from the metering unit through the first SPI interface, and the main control processor communicates with the master station through the Ethernet interface.

3. A multifunctional waveform recording energy meter according to claim 2, characterized in that, The protocol conversion module performs protocol conversion, specifically as follows: Initialization: The module is powered on, and the main control processor performs initialization operations. Data acquisition: The main control processor periodically acquires electrical parameter data according to the data category through the first SPI interface and the second SPI interface, and performs CRC16 verification. Data mapping: The main control processor looks up the sAddr corresponding to the base table data item according to the data mapping table, obtains the data pointer corresponding to sAddr in the data area of ​​the IEC61850 data model, and writes the base table data value into the model data area; MMS server processing and GOOSE / SV service processing: The main control processor processes client requests from the master station through the IEC61850 MMS server. Real-time data transmission is handled via the IEC61850 GOOSE / SV service. Data and clock synchronization: The main control processor, acting as the SPI master, interacts with the base table to split the parsed data items into values, quality bits, and time stamps, and writes them into the synchronization buffer. After being located in the IEC 61850 model data area through data mapping, the data is refreshed and a change report and log are sent. The main control processor synchronizes with the station's clock source through the SNTP protocol and synchronizes the synchronization result to the management unit through the second SPI interface.

4. A multifunctional waveform recording energy meter according to claim 2, characterized in that, The non-volatile memory unit includes NAND Flash memory and eMMC memory; The SD card interface is used to connect an external SD card; the main control processor writes real-time waveform recording data to the SD card and fault waveform recording data to the eMMC memory.

5. A multifunctional waveform recording energy meter according to any one of claims 1-3, characterized in that, The ADC sampling circuit uses a 24-bit Σ-Δ ADC conversion chip.

6. A multifunctional waveform recording energy meter according to any one of claims 1-3, characterized in that, The Ethernet interface uses an RMII interface Ethernet PHY chip to provide an RJ45 Ethernet interface.

7. A multifunctional waveform recording energy meter according to claim 4, characterized in that, The SD card uses a circular caching strategy to store real-time waveform data, and automatically overwrites the oldest historical waveform data when the storage space is full.

8. A method for managing the recording waveform of a multi-functional recording energy meter, applied to the multi-functional recording energy meter according to any one of claims 1-7, characterized in that, Includes the following steps: S1. Data reception: Receive the raw data frame sampled by the ADC from the metering unit through the first SPI interface; S2, Frame parsing and verification: Parse the received ADC sampled raw data frames, extract the frame sequence number, frame time stamp, voltage sample value, current sample value and electrical parameter data, and perform CRC16 verification on each frame of data. S3, Frame Sequence Number Detection: Detects whether the current frame sequence number is consecutive to the previous frame sequence number. If they are not consecutive, the frame loss event is recorded. S4. Real-time waveform recording and storage: The raw data frames sampled by the ADC are written to the SD card through the SD card interface and stored using a circular caching strategy. S5. Fault detection: Perform fault detection based on the raw data sampled by the ADC and the meter status information obtained from the management unit. S6. Fault recording and storage: When a fault event is detected, the original ADC sampling data frames of the N cycles before and the M cycles after the fault time are extracted and written into the eMMC memory.

9. The waveform recording management method for a multifunctional waveform recording energy meter according to claim 8, characterized in that, The frame parsing and verification step S2 is as follows: S21. The main control processor scans the data in the receive buffer to locate the start character and verifies whether the command character matches. S22. The main control processor extracts the length field, calculates the expected length of the whole frame based on the length field, and determines whether the amount of data in the receiving buffer has reached the expected length. If it has not reached the expected length, it is determined to be an incomplete frame and the corresponding frame is discarded. The frame length is recorded as abnormal. If it has reached the expected length, the next step is executed. S23. Sequentially extract the frame sequence number, frame time stamp, voltage sample value sequence, current sample value sequence, electrical parameter data field, and frame verification field; S24. Calculate the CRC16 check value for all bytes from the command character up to the frame check field and compare it with the frame check field. If they match, the check is considered successful. If they do not match, discard the data and increment the communication error counter.

10. The waveform recording management method for a multifunctional waveform recording energy meter according to claim 8, characterized in that, The fault detection includes at least one of the following: voltage sag detection, voltage drop detection, overcurrent detection, undervoltage detection, overvoltage detection, phase loss detection, reverse phase sequence detection, neutral wire loss detection, phase imbalance detection, and current reverse detection.

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