Self-identifying parallel burning system and method

Abstract

The application discloses a self-identification parallel burning system and method, and belongs to the technical field of chip and module production testing and program downloading. The system comprises a master control module, an identification module, a drive loading module, a task management module, a scheduling module, a parallel burning channel module, a breakpoint continuous burning module, a data verification module and a man-machine module. The identification module is used for automatically identifying the communication protocol of a to-be-burned object, and the drive loading module dynamically loads corresponding burning drivers and parameter templates according to the communication protocol. The task management module generates a task queue of the to-be-burned object, the scheduling module performs parallel scheduling and channel allocation on multiple tasks based on an improved ant colony optimization algorithm, and the parallel burning channel module executes erasing, writing, reading and verifying. The application can adapt to a multi-protocol, multi-variety and small-batch mixed production scene, and improves burning efficiency, channel utilization and result reliability.

Description

Technical Field

[0001] This invention relates to the field of circuit programming technology, and in particular to an automatic identification parallel programming system and method. Background Technology

[0002] With the rapid development of smart terminals, automotive electronics, industrial control, IoT devices, and various embedded modules, the demand for programming and testing of chips, modules, and control boards has increased significantly. Especially in scenarios such as R&D pilot production, small-batch customization, mixed-model production, and integration of multi-protocol devices, programming stations often need to deal with multiple communication interfaces such as UART, SPI, I2C, CAN, JTAG, and SWD, and different chips or modules vary greatly in terms of capacity, programming speed, erasure methods, and verification requirements.

[0003] Existing programming equipment is typically designed for a single model or fixed protocol. Before starting the equipment, manual selection of the protocol type, loading of the corresponding driver, setting of baud rate or clock parameters, and channel allocation are often required. When multiple different models of chips or modules exist on the production line, this manual configuration method easily leads to slow changeover speed, complex operation, and high misconfiguration rate. If a fixed polling or simple queuing method is used for multi-channel programming, it is often impossible to optimize based on task capacity, programming file size, protocol transmission rate, and actual channel load, resulting in long tasks blocking short tasks, some channels being idle, and low overall throughput.

[0004] Furthermore, the ability to recover from interruptions during the programming process is a weak point in existing technologies. If a power outage, communication failure, workstation pause, or single-channel failure occurs during programming, many existing devices need to be reprogrammed from scratch, resulting in wasted time and increased impact on device lifespan and yield due to repeated erasing and rewriting. On the other hand, the verification methods after programming are often relatively simple, possibly relying only on a single readback or a limited range of comparisons, making it difficult to detect problems such as local write anomalies, protocol communication errors, or mismatches between firmware files and device information in a timely manner.

[0005] Therefore, there is an urgent need for a self-identifying parallel programming system and method that can automatically identify the communication protocol of the object to be programmed, dynamically load the corresponding driver, schedule multiple programming tasks in parallel, support breakpoint resume programming, and complete multi-layer data verification, so as to improve programming efficiency, adaptability and reliability under multi-variety, small-batch and mixed-line production conditions. Summary of the Invention

[0006] To address the aforementioned issues, this invention provides an automatic identification parallel programming system and method that can adapt to mixed production scenarios involving multiple protocols, multiple product types, and small batches, thereby improving programming efficiency, channel utilization, and result reliability.

[0007] The technical solution adopted in this invention is: a self-identifying parallel programming system, comprising: a main control module, an identification module, a driver loading module, a task management module, a scheduling module, a parallel programming channel module, a breakpoint resume programming module, a data verification module, and a human-machine interface module. The identification module is used to automatically identify the communication protocol of the object to be programmed, wherein the communication protocol includes at least one of UART, SPI, I2C, and CAN. The driver loading module is used to dynamically load the corresponding programming driver and / or parameter template according to the identification result of the identification module. The task management module is used to generate programming tasks for the object to be programmed and form a task queue.

[0008] The scheduling module is used to perform parallel scheduling and channel allocation of the programming tasks based on the task queue, channel status, and estimated task duration. The parallel programming channel module includes multiple independent programming channels, each of which is used to establish communication with the object to be programmed and perform erase, write, read, and / or verification operations. The breakpoint resume programming module is used to record the progress of the programming task and resume programming from the breakpoint after a programming interruption. The data verification module is used to perform readback comparison, CRC verification, and / or signature verification on the programming results. The human-machine interface module is used to display protocol identification results, task status, channel status, abnormal information, and programming statistics. The main control module is communicatively connected to the identification module, driver loading module, task management module, scheduling module, parallel burning channel module, breakpoint recovery module, and data verification module to realize automatic identification, driver loading, parallel burning, breakpoint recovery, and result verification of the object to be burned.

[0009] A further improvement to the above solution is that the identification module includes one or more of the following: a pin identification unit, a response identification unit, an electrical identification unit, and an identification information identification unit; The pin identification unit is used to identify the communication pin connection method of the object to be programmed; the pin identification unit identifies the pin connection method based on a preset pin mapping table or standard interface definition.

[0010] The response identification unit is used to send probe commands or test waveforms to the object to be programmed and determine the protocol type based on the characteristics of the return packets; The electrical identification unit is used to detect pull-up / pull-down status, level window, clock response, and / or bus occupancy characteristics; The identification information recognition unit is used to read carrier identification, QR code, barcode, tray information and / or device description information and match it with the protocol template.

[0011] A further improvement to the above scheme is that the identification module is configured to output protocol type, baud rate or frequency range, address format, verification method and / or read / write timing parameters; The driver loading module automatically selects one or more of the following drivers based on the protocol type and / or the parameters: UART driver, SPI driver, I2C driver, CAN driver, JTAG driver, SWD driver, or other dedicated interface driver.

[0012] A further improvement to the above solution is that the task management module is used to create a task entry for each object to be programmed. The task entry includes at least the task ID, chip or module model, protocol type, programming file, target capacity, estimated programming time, priority, target channel constraint, programming continuation status, and verification status.

[0013] A further improvement to the above scheme is that the scheduling module is configured to optimize channel allocation and startup order based on an improved ant colony optimization algorithm, wherein: The improved ant colony optimization algorithm adopts a two-layer pheromone update mechanism that combines local pheromone updates and global pheromone updates. After each ant completes a task-channel allocation, a local pheromone update is immediately performed on the allocated path to reduce the repeated attraction of the selected path to subsequent ants. After completing a full round of scheduling iteration, global pheromone enhancement is performed only on each task-channel allocation path in the current global optimal scheduling scheme. The heuristic function of the improved ant colony optimization algorithm is a multi-dimensional weighted heuristic function, which comprehensively considers the task's estimated time consumption factor, protocol switching cost factor, channel load balancing factor, and / or task priority factor. The improved ant colony optimization algorithm adopts an adaptive pheromone evaporation factor, which is dynamically adjusted according to the search stagnation state—increasing the evaporation factor when the global optimal solution has not improved in several consecutive iterations, and decreasing the evaporation factor when the global optimal solution continues to improve. The scheduling module maintains a constraint taboo table during the path search process of each ant. The constraint taboo table records the assigned tasks, the current protocol status of each channel, and the exclusive occupancy status of the channel, so as to exclude channels that do not meet the protocol compatibility constraints and / or channel concurrency conflict constraints when selecting paths. The scheduling module, during optimization, comprehensively considers chip capacity, programming file size, protocol transmission rate, erase time, verification time, current channel load, and / or concurrent conflict constraints. The optimization objective includes at least a combination of the following two or more: Maximize the programming throughput per unit time; Minimize channel idle time; Reduce the blocking effect of long tasks on short tasks; Reduce the number of protocol switching times; Balance the load of each programming channel; The scheduling module outputs the burning channel and startup order for each task.

[0014] A further improvement to the above scheme is that the parallel programming channel module includes multiple independent programming channels, each programming channel having a physical connection interface, a communication signal output interface, an erase execution unit, a write execution unit, a read execution unit, a verification execution unit, and an anomaly monitoring unit; The anomaly monitoring unit is used to monitor communication timeouts, error frames, electrical anomalies, and / or communication interruptions.

[0015] A further improvement to the above solution is that the breakpoint resume module is used to record the completed address range, current write progress, verification progress and / or last successful frame sequence number by page, block or segment. When a channel is abnormally disconnected, power is lost, or the user pauses the process, the breakpoint resume module saves the burning status. When resuming the burning process, the system continues burning from the last successful address instead of burning from the beginning.

[0016] A further improvement to the above scheme is that the breakpoint resume module generates a breakpoint table for each task, and the breakpoint table includes at least the burned section, the failed section, the section to be retried, and the verification section.

[0017] A further improvement to the above scheme is that the data verification module includes a readback comparison unit, a CRC verification unit, a signature verification unit, a length and address verification unit, and / or a multiple reread consistency verification unit; When verification fails, the system automatically retryes the specified address range and marks the burning task as unqualified.

[0018] A further improvement to the above solution is that the human-machine module is used to display the protocol identification result, task queue, channel status, abnormal alarm, burning time and / or verification result, and to record the identification result, driver loading information, scheduling decision result, interruption reason, burning record and verification result.

[0019] A further improvement to the above solution is that the main control module is an industrial PC, an embedded controller, or a host computer server; The parallel programming channel module supports simultaneous programming of multiple tasks and batch parallel processing of tasks with the same protocol.

[0020] A self-identifying parallel programming method, applied to a self-identifying parallel programming system, the method comprising the following steps: S1. Detect the object to be programmed into the programming station and establish a physical connection; S2. Automatically identify the communication protocol type and generate protocol parameters based on pin characteristics, handshake response, electrical characteristics and / or identification information; S3. Automatically load the corresponding driver and burning parameter template based on the recognition results; S4. Generate an independent burning task for each object to be burned, and record the protocol, capacity, file size, priority and estimated time. S5. Optimize channel allocation and startup order for programming tasks based on the improved ant colony optimization algorithm; S6. Each programming channel performs erase, write, and / or partial verification in parallel; S7. Record the completed address range and intermediate states in real time during the burning process; S8. If an interruption, timeout, or verification failure occurs, continue burning from the breakpoint or retry the failed section. S9. Perform readback comparison, CRC and / or integrity verification on the burning results; S10: Output the burning completion status, error reasons, and statistical reports.

[0021] A further improvement to the above scheme is that, in step S2, the protocol identification includes at least one of the following methods: Identify the protocol based on the communication pin connections; The protocol is identified based on the characteristics of the return packets from the probe commands; The protocol is identified based on the level response and bus occupancy characteristics; Match the protocol template based on the vehicle identifier or device identifier.

[0022] A further improvement to the above scheme is that, in step S5, the scheduling cost function of the improved ant colony optimization algorithm includes at least the task completion time, channel waiting time, protocol switching cost, load balancing factor, and / or task priority factor.

[0023] The beneficial effects of this invention are: Compared to existing technologies, this invention eliminates the need for manual selection of protocol drivers such as UART, SPI, I2C, and CAN. Instead, it automatically determines the communication protocol type of the object to be programmed through an identification module and dynamically loads the corresponding driver and parameter template. This reduces manual configuration errors and changeover preparation time, making it suitable for multi-protocol mixed production lines. By using a task management module and a scheduling module to uniformly model multiple programming tasks and allocate them in parallel based on channel status and estimated time, multiple independent programming channels can work simultaneously, reducing waiting and idle time and improving processing capacity per unit time.

[0024] This invention incorporates chip capacity, programming file size, protocol transmission rate, erase time, verification time, and channel load into the scheduling model, effectively balancing throughput, load balancing, and protocol switching costs, avoiding resource waste caused by traditional fixed polling. This invention can record completed address ranges by page, block, or segment, and resume programming from the last successful address after abnormal disconnection, power failure, or manual pause, instead of starting from scratch, significantly reducing repeated programming time and improving equipment utilization and yield. Through multi-level verification including readback comparison, CRC check, signature verification, address length verification, and multiple reread consistency checks, it can promptly detect local byte write anomalies, communication errors, or file version errors, improving programming reliability.

[0025] This invention is applicable to situations where different protocols, capacities, and batches of chips or modules exist simultaneously at the same workstation, exhibiting high versatility and flexibility. It is particularly suitable for production testing scenarios involving small batches, multiple product types, and high-frequency switching. The human-machine interface module can completely record protocol identification results, driver loading information, scheduling decision results, interruption reasons, burn-in records, and verification results, facilitating process traceability, quality analysis, and equipment maintenance.

[0026] This invention reduces reliance on manual protocol configuration, channel arrangement, and re-inspection by operators through protocol identification, automatic driver loading, automatic task scheduling, and automatic verification, thereby lowering the probability of human error. The scheduling module can reasonably interleave short tasks, long tasks, and tasks with different protocols, minimizing channel waiting and switching, especially in multi-channel devices, fully releasing the hardware's parallel capabilities. This invention not only focuses on programming speed but also on recovery capability and result consistency, maintaining high stability under conditions of power fluctuations, temporary interruptions, and abnormal timeouts in industrial settings. Attached Figure Description

[0027] Figure 1 This is a schematic diagram of the overall structure of the self-identifying parallel programming system of the present invention; Figure 2 This is a schematic diagram of the structure in which the identification module and the driver loading module work together in this invention; Figure 3 This is a schematic diagram illustrating the task allocation relationship between the parallel programming channel module and the scheduling module in this invention; Figure 4 This is a schematic diagram illustrating how the interruption point resume burning module of the present invention records and restores the burning progress; Figure 5 This is a schematic diagram of the data verification module and the abnormal retry closed loop in this invention; Figure 6 This is a flowchart illustrating the self-identifying parallel programming method of the present invention.

[0028] Explanation of reference numerals in the attached figures: Main control module 1; Identification module 2, pin identification unit 21, response identification unit 22, electrical identification unit 23, and identification information identification unit 24; Driver loading module 3; Task Management Module 4; Scheduling module 5; Parallel programming channel module 6, first programming channel 61, second programming channel 62, and Nth programming channel 63; Breakpoint resume module 7; Data verification module 8; Human-machine module 9; Object to be burned: 10. Detailed Implementation

[0029] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Preferred embodiments of the invention are shown in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of the invention.

[0030] It should be noted that when a component is said to be "fixed to" another component, it can be directly attached to the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component.

[0031] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

[0032] like Figures 1-6 As shown, this invention provides a self-identifying parallel programming system, primarily addressing the multi-protocol, multi-task parallel processing needs of chips, modules, and control boards during production testing, firmware download, mass production programming, and maintenance upgrades. The system as a whole includes a main control module 1, an identification module 2, a driver loading module 3, a task management module 4, a scheduling module 5, a parallel programming channel module 6, a breakpoint resume programming module 7, a data verification module 8, and a human-machine interface module 9.

[0033] The main control module 1, serving as the core control unit of the system, is preferably an industrial PC, embedded controller, or host server. Main control module 1 is responsible for receiving access signals from the object to be programmed 10, scheduling the programming process, managing the status of each module, and issuing control commands to each programming channel. Identification module 2 determines the communication protocol type used by the object to be programmed 10. Driver loading module 3 automatically loads the corresponding driver and parameter template based on the identification results. Task management module 4 maps each object to be programmed as an independent programming task and manages the task lifecycle. Scheduling module 5 allocates tasks to each programming channel based on the task queue, channel load, estimated time, and priority. Parallel programming channel module 6 performs the actual erasure, writing, reading, and verification operations. Breakpoint resume programming module 7 resumes programming after an anomaly or interruption. Data verification module 8 ensures the accuracy and reliability of the programming results. Human-machine interface module 9 displays the status, records history, and provides traceability information.

[0034] Specifically, the workflow of this invention is as follows: first, identify the protocol, then dynamically load the driver; first, establish a task model, then perform parallel scheduling; record the progress in real time during the burning process, and continue from the breakpoint in case of an anomaly; and perform multi-layer verification and closed-loop confirmation upon completion.

[0035] The identification module 2 is used to automatically identify the communication protocol of the object to be programmed 10. Since different interface types such as UART, SPI, I2C, CAN, JTAG, and SWD may exist in actual production lines, relying on manual selection and configuration can easily lead to low efficiency and misconfiguration problems. Therefore, this invention adopts a multi-path protocol identification method, enabling the system to automatically determine the protocol type and output relevant parameters after the object to be programmed is connected.

[0036] In one embodiment, the identification module 2 includes a pin identification unit 21, a response identification unit 22, an electrical identification unit 23, and an identification information identification unit 24.

[0037] The pin identification unit 21 makes a preliminary judgment by detecting the communication pin connection mode of the object to be programmed 10. For example, if a TX / RX dual-line structure is detected along with start and stop bit characteristics, it can be preliminarily identified as the UART protocol; if an SCL / SDA dual-line structure is detected, it can be preliminarily identified as I2C; if MOSI / MISO / SCK and chip select lines are detected, it can be identified as SPI; if CANH / CANL differential bus is detected, it can be identified as the CAN protocol. For dedicated interfaces such as JTAG or SWD, the judgment can also be made based on the pin characteristics such as TCK, TMS, TDI, TDO or SWDIO, SWCLK.

[0038] The response identification unit 22 sends a probe command, initialization command, or test waveform to the object to be programmed, and further confirms the protocol type based on the characteristics of the returned packets. For example, the system can first send a low-risk general probe message, and then determine whether the object responds and what type of protocol the response belongs to based on the returned data frame format, response timing, and level changes. For some interfaces, if a standard identification frame can be returned, the protocol and its supported baud rate range, checksum method, and address format can be directly determined.

[0039] The electrical identification unit 23 is used to detect pull-up / pull-down status, level window, clock response, bus occupancy characteristics, and input impedance characteristics. Through electrical feature detection, the system can further verify the protocol type. For example, I2C typically has open-drain pull-up characteristics, SPI has a significant clock response, and CAN has differential level characteristics. This method can enhance identification reliability when some identification information is missing or the interface definition is incomplete.

[0040] The identification information recognition unit 24 can read the carrier, tray, QR code, barcode, or device description information and match it with the protocol template database. For example, if the carrier has a product model QR code, the system can automatically associate the corresponding communication protocol, programming parameters, and verification template, thereby accelerating the identification process and reducing detection time.

[0041] Through the above multi-path identification method, the identification module 2 can not only output the protocol type, but also output parameters such as baud rate or frequency range, address format, verification method and read / write timing, providing a foundation for driver loading and subsequent burning.

[0042] The driver loading module 3 automatically loads the corresponding programming driver, communication library, and parameter template based on the protocol type and related parameters output by the identification module 2. The driver may include UART, SPI, I2C, CAN, JTAG, SWD, or other dedicated interface drivers. For different chip series, the driver loading module 3 can further invoke different erase strategies, page write strategies, and verification strategies.

[0043] For example, for UART-type programming objects, the system can load the serial communication driver and corresponding baud rate configuration; for SPI-type programming objects, it can load parameters such as SPI clock mode, bit width, and chip select timing; for I2C-type objects, it can configure the address bit width, acknowledgment processing, and transmission rate; and for CAN-type objects, it can configure the baud rate, frame format, and retransmission strategy. The driver template not only determines the underlying communication method but also the upper-layer programming command sequence and verification logic.

[0044] The purpose of this module is to eliminate the need for the system to manually switch the programming software environment for each protocol. Instead, it can automatically complete the loading based on the identification results, thereby improving the automation level of the production line and the efficiency of changeover.

[0045] The task management module 4 is used to manage the programming task queue. Each object 10 to be programmed is converted into an independent task. The task entry includes at least the task ID, chip or module model, protocol type, programming file, target capacity, estimated programming time, priority, target channel constraint, programming continuation status, and verification status.

[0046] Task management module 4 supports multiple tasks entering the queue simultaneously and manages the task lifecycle status, such as pending assignment, burning in progress, paused, failed, pending retry, and completed. Through state machine management, the system can accurately locate the current task stage when an exception occurs and decide whether to re-queue, partially retry, or resume burning from the breakpoint.

[0047] In some implementations, the task management module 4 can also group tasks according to product batch, order priority, or process time limit. For example, urgent orders can be given higher priority, and batches of tasks with the same protocol can be aggregated so that the scheduling module 5 can arrange parallel channels for batch processing.

[0048] The scheduling module 5 is the key to improving the parallel programming efficiency of this invention. It dynamically allocates tasks based on the task queue, channel status, and estimated time, with the core idea of ​​balancing "shortest task completion time" and "channel load balancing".

[0049] Preferably, the scheduling module 5 employs an improved ant colony optimization algorithm to optimize channel allocation and startup order. Compared to the standard ant colony optimization algorithm, this algorithm is improved in the following four main aspects: First, a two-layer pheromone update mechanism. Standard ant colony algorithms typically perform a global pheromone update only after completing a full iteration, resulting in slow convergence and a tendency to get trapped in local optima. This invention employs a two-layer mechanism combining local and global pheromone updates: After each ant completes a task-path allocation, it immediately performs a local pheromone update on that allocation path. The local update rule is τ_ij←(1-ρ_l)·τ_ij+ρ_l·τ_0, where ρ_l is the local pheromone evaporation factor and τ_0 is the initial pheromone concentration. The role of local updates is to reduce the repetitive attraction of the selected path for subsequent ants, forcing them to explore different task-path combinations, thereby increasing search diversity. After completing one full scheduling iteration (i.e., all ants have completed the channel allocation for all tasks), the system only performs global pheromone enhancement on each task-channel allocation path in the current globally optimal scheduling scheme. The global update rule is τ_ij←(1-ρ_g)·τ_ij+ρ_g·Δτ_ij^best, where ρ_g is the global pheromone evaporation factor, and Δτ_ij^best is inversely proportional to the total cost of the current globally optimal scheduling scheme—that is, the smaller the total cost, the larger the pheromone increment. Through the two-layer update mechanism, the algorithm can maintain sufficient search breadth while maintaining the convergence direction.

[0050] Second, a multi-dimensional weighted heuristic function. Standard ant colony algorithms typically consider only the single factor of path "distance" (which usually manifests as task processing time in scheduling problems). This invention extends the heuristic function to a multi-dimensional weighted form, comprehensively considering the following factors: estimated task time factor (1 / T_i, i.e., the shorter the estimated time, the higher the heuristic value, which is beneficial for prioritizing short tasks), protocol switching cost factor (1 / S_ij, if the current protocol of channel j is the same as the protocol of task i, then S_ij takes the value of 1; if they are different, S_ij takes a switching cost value greater than 1, thus guiding ants to prioritize assigning tasks to channels that do not require protocol switching), channel load balancing factor (1 / L_j, the larger the total estimated time of tasks currently assigned to channel j, the larger the value of L_j, and the lower the heuristic value of that channel, thus suppressing excessive concentration of tasks in a few channels), and task priority factor (P_i, the higher the priority of the task, the higher the heuristic value). The heuristic function takes the form η_ij=(1 / T_i)^α·(1 / S_ij)^β·(1 / L_j)^γ·(P_i)^δ, where α, β, γ, and δ are the weight exponents of each factor, which can be configured according to the actual production line characteristics. This multidimensional heuristic function enables Ant Financial to consider not only the task's time consumption but also protocol switching overhead, channel load balancing, and task urgency when selecting a channel.

[0051] Third, the adaptive pheromone evaporation factor. The pheromone evaporation factor ρ in standard ant colony algorithms is usually a fixed constant. If ρ is too large, the algorithm converges too quickly and is prone to getting trapped in local optima; if ρ is too small, convergence is too slow and search efficiency is low. This invention employs an adaptive evaporation factor: after each iteration, the system checks the improvement status of the global optimal solution. If the global optimal solution does not improve after N_s iterations (e.g., N_s=5), it indicates that the search may be trapped in a local optimum. In this case, the global evaporation factor ρ_g is adjusted to ρ_g(t+1)=min(ρ_g(t)×1.2, ρ_max). Increasing the evaporation factor reduces the guidance intensity of historical pheromones on ants, enhancing the algorithm's ability to escape local optima. If the global optimal solution continues to improve, ρ_g is adjusted to ρ_g(t+1)=max(ρ_g(t)×0.9, ρ_min). Decreasing the evaporation factor strengthens the guidance of historical optimal paths, accelerating convergence. ρ_max and ρ_min are the preset upper and lower limits of the volatile factor, respectively, for example, ρ_max=0.8 and ρ_min=0.1. This adaptive mechanism enables the algorithm to achieve a dynamic balance between "exploration" and "utilization".

[0052] Fourth, the constraint taboo table is expanded. Each ant maintains an expanded taboo table, which records not only the assigned tasks to avoid duplicate allocation, but also the current protocol state and exclusive occupancy status of each programming channel. When an ant selects a candidate channel for the current task, it first checks whether the channel has been marked as exclusively occupied (e.g., a task must exclusively occupy a channel due to hardware limitations), or whether there is a conflict between the current protocol of the channel and the protocol required by the task. If the channel does not meet the constraints, it is excluded from the candidate channel set. This mechanism ensures that every scheduling scheme generated by the ants is a feasible solution, avoiding the problem that the standard ant colony algorithm may generate a large number of infeasible paths under constraints, thus improving the search efficiency and the reliability of the scheduling results.

[0053] In the scheduling model, the optimization objectives include at least two or more of the following combinations: maximizing the programming throughput per unit time, minimizing channel idle time, reducing the blocking of short tasks by long tasks, reducing the number of protocol switching times, and balancing the load of each programming channel. During optimization, scheduling module 5 comprehensively considers factors such as chip capacity, programming file size, protocol transmission rate, erase time, verification time, current channel load, and whether concurrent conflicts are supported, ultimately outputting the programming channel and startup order for each task.

[0054] For example, if a task file is small and its expected execution time is short, the (1 / T_i) factor in the multidimensional heuristic function will assign a higher heuristic value to the task, allowing the system to prioritize its allocation to channels with lighter current loads. If a long task coexists with multiple short tasks, the load balancing factor (1 / L_j) will prevent all tasks from concentrating on the same channel, forcing ants to allocate the long task to channels with lower loads. If multiple tasks share the same protocol, the protocol switching cost factor (1 / S_ij) will guide ants to allocate these tasks to the same channel or the same group of channels, reducing the number of protocol switching operations. Through these improved mechanisms, the system can achieve higher throughput, less waiting time, and more rational resource allocation under multi-channel conditions.

[0055] The parallel programming channel module 6 includes multiple independent programming channels, such as the first programming channel 61, the second programming channel 62, and the Nth programming channel 63. Each programming channel has a physical connection interface, a communication signal output interface, an erase execution unit, a write execution unit, a read execution unit, a verification execution unit, and an anomaly monitoring unit.

[0056] Each channel can independently establish a connection with the object to be programmed, output communication signals, erase, write, read, and verify. Channels are isolated from each other, thus supporting simultaneous programming of multiple tasks and batch parallel processing of tasks with the same protocol. An anomaly monitoring unit is used to monitor communication timeouts, error frames, electrical anomalies, and communication interruptions in real time.

[0057] In some implementations, the programming channel also supports single-channel pause / resume functionality. When a channel temporarily malfunctions, its corresponding task can retain its state and be resumed by the breakpoint resume module 7, without affecting the continued operation of other channels, thereby improving the overall fault tolerance.

[0058] The breakpoint resume module 7 is used to recover after a programming interruption or failure. Its implementation can record the completed address range, current writing progress, verification progress, and last successful frame sequence number by page, block, or segment. When a channel disconnection, power failure, or user pause occurs, the system saves the programming state; upon recovery, it resumes programming from the last successful address instead of starting from the beginning.

[0059] In one embodiment, the breakpoint resume module 7 generates a breakpoint table 72 for each task. The breakpoint table includes at least the already programmed section, the failed section, the section to be retried, and the verification section. This breakpoint table is used to quickly rebuild the task progress during recovery and determine whether it is necessary to continue writing from a certain page, a certain block, or a certain segment.

[0060] For example, if a task is interrupted due to a communication error while writing to an intermediate address segment, the breakpoint resume module will record the last successfully written address and the sequence number of the last successful frame. After recovery, the system does not need to rewrite the previous data; it only needs to continue writing the remaining data and performing subsequent verification from the breakpoint address. This can significantly reduce repetitive operation time and lower production losses.

[0061] The data verification module 8 is used to confirm reliability after the programming is completed. It preferably includes a readback comparison unit, a CRC verification unit, a signature verification unit, a length and address verification unit, and a multiple reread consistency verification unit.

[0062] The read-back comparison unit is responsible for comparing the written data with the read-back data page by page to check for byte-level differences. The CRC check unit performs cyclic redundancy check on the programmed blocks to quickly detect transmission errors. The signature check unit performs digital signature verification on the firmware package to prevent file version errors or tampering. The length and address check unit is used to confirm that the programming range has not exceeded the limits to prevent writing to illegal address areas. The multiple reread consistency check unit is used to prevent transient communication errors or occasional read anomalies.

[0063] When any verification fails, the system can automatically retry the specified address range; if the retry still fails, the task is marked as unqualified and the reason for the exception is output. This closed-loop verification mechanism can significantly reduce the risk of incorrect burning, missed burning, and hidden data errors.

[0064] The HMI module 9 displays protocol identification results, task queue, channel status, abnormal alarms, programming time, and verification results. It also records identification results, driver loading information, scheduling decision results, interruption reasons, continued programming records, and verification results. Through log recording, the system provides data support for production management, quality traceability, and process optimization.

[0065] For example, when a product frequently times out on a certain channel, the log module can help locate whether it is due to poor cable contact, protocol parameter mismatch, or excessive device load; when the verification failure rate is high, it can also analyze historical logs to determine whether the retry strategy or communication timing should be adjusted.

[0066] like Figure 6 As shown, the present invention also provides a self-identifying parallel programming method, applicable to the above-mentioned system. The method includes the following steps: S1 Object to be burned in The system detects the insertion of the chip or module to be programmed into the programming station and establishes a physical connection. The system can confirm that the object to be programmed is in place via an insertion detection switch, carrier identification, or interface connection.

[0067] S2 Protocol Identification The system automatically identifies the communication protocol type and generates protocol parameters by analyzing pin characteristics, handshake responses, electrical characteristics, and / or identification information. It can first perform low-risk probing, and then confirm the protocol by combining return packets and electrical characteristics.

[0068] S3 driver loading The corresponding driver and programming parameter template are automatically loaded based on the identification results. If SPI is identified, the SPI driver and its parameters are loaded; if CAN is identified, the CAN driver and its frame format parameters are loaded.

[0069] S4 Task Modeling Each object to be programmed is generated into an independent programming task, and the protocol, capacity, file size, priority, and estimated time are recorded. Once the task model is complete, it enters the task queue to await scheduling. The estimated time is calculated based on the ratio of the programmed file size to the protocol transmission rate, plus the erase time and verification time.

[0070] S5 Parallel Scheduling The system optimizes channel allocation and startup order for programming tasks based on an improved ant colony optimization algorithm. The system comprehensively considers task completion time, channel idle time, protocol switching cost, load balancing factor, and task priority factor to generate scheduling results.

[0071] S6 execution burning Each programming channel performs erase, write, and / or partial verification in parallel. Different tasks can be processed simultaneously on different channels, and tasks with the same protocol can be programmed in batches in parallel.

[0072] S7 Breakpoint Recording During the programming process, the completed address range and intermediate states are recorded in real time. The system updates the breakpoint table 72 page by page or block for subsequent recovery.

[0073] S8 Error Handling and Continued Burning If an interruption, timeout, or verification failure occurs, the programming process will resume from the breakpoint or retry the failed segment. The system prioritizes recovery from the last successful address to reduce duplicate programming.

[0074] S9 completes verification Perform readback comparison, CRC, and / or integrity checks on the programming results. If the checks pass, the task is considered complete; if they fail, a retry is triggered or the result is marked as unqualified.

[0075] S10 Result Output Output the programming completion status, cause of any abnormalities, and statistical reports to provide a basis for subsequent production management, quality tracking, and process optimization.

[0076] Example 1: Automatic Identification and Parallel Scheduling of Multi-Protocol Hybrid Production Lines A certain IoT module production and testing station is equipped with four independent programming channels (channels A, B, C, and D). The same batch of modules to be programmed includes: ① 8 WiFi communication modules using the UART protocol (model ESP32-C3, Flash capacity 4MB, programming file size approximately 1.8MB, UART baud rate 921600bps, estimated programming time per module approximately 22 seconds, including 5 seconds for erasure + 14 seconds for writing + 3 seconds for verification); ② 5 NOR Flash memory chips using the SPI protocol (model W25Q64, capacity 8MB, programming file size approximately 6.2MB, SPI clock frequency 80MHz, estimated programming time per module approximately 48 seconds, including 15 seconds for erasure + 28 seconds for writing + 5 seconds for verification); ③ Three vehicle motor control modules using the CAN protocol (model TC387, 2MB Flash capacity, approximately 0.9MB programming file size, 500kbps CAN baud rate, estimated programming time per module approximately 15 seconds, including 3 seconds for erasing + 10 seconds for writing + 2 seconds for verification). These three types of devices share the same workstation. Traditionally, operators need to manually switch programming software and protocol configurations, with a changeover time of approximately 2-3 minutes per cycle, and programming failures are easily caused by manual protocol selection errors.

[0077] After adopting the system of this invention, the operator only needs to load the three types of devices into the corresponding carriers and insert them into the workstations. The identification module 2 detects the TX / RX dual-line pin characteristics of the WiFi module, the MOSI / MISO / SCK / CS four-line characteristics of the memory chip, and the CANH / CANL differential pin characteristics of the vehicle module through the pin identification unit 21. It also performs cross-verification by reading the QR code information on the carrier in conjunction with the identification information identification unit 24. The protocol identification and parameter extraction of all 16 devices are completed in about 0.8 seconds. The driver loading module 3 loads the UART driver + ESP32 programming template, the SPI driver + W25Q64 programming template, and the CAN driver + TC387 programming template respectively. The task management module 4 models the 16 devices into tasks T01~T16 in sequence, and records the protocol type, estimated time and priority respectively (the vehicle module is set to high priority due to the urgent order, P_i=3; the WiFi module and the memory chip are set to normal priority, P_i=1).

[0078] The scheduling module 5 initiates the improved ant colony optimization algorithm: Initialize the ant count m=20, maximum iteration count I_max=100, local evaporation factor ρ_l=0.1, initial global evaporation factor ρ_g=0.3, ρ_max=0.8, ρ_min=0.1, and stagnation detection threshold N_s=5. Each ant, guided by the constraint tabu table, selects channels for T01~T16 sequentially. For high-priority vehicle module tasks (T14~T16), the priority factor P_i=3 in the heuristic function yields a higher comprehensive heuristic value, and ants prioritize allocating channels to them. Simultaneously, the protocol switching cost factor causes WiFi module tasks (all UART protocol) to tend to concentrate on channels A and B, and storage chip tasks (all SPI protocol) to tend to concentrate on channels C and D, thereby reducing the number of protocol switching times from 15 in the worst case to approximately 3. After 43 iterations, the global optimal solution stabilized (after 5 consecutive iterations where the trigger factor was adaptively adjusted to ρ_g=0.36, the search was reactivated). The final scheduling scheme is as follows: Channel A and Channel B are each responsible for the serial programming of 4 WiFi modules (Channel A: T01→T03→T05→T07, Channel B: T02→T04→T06→T08), Channel C is responsible for 5 memory chips (T09→T10→T11→T12→T13), and Channel D is responsible for 3 vehicle modules (T14→T15→T16, with higher priority tasks starting first). Channels C and D alternate between starting based on the memory chip erasure waiting time and the vehicle module verification waiting time. The total completion time is estimated to be approximately 198 seconds, with an average channel utilization of 87.3%, representing an efficiency improvement of approximately 33.6% compared to the traditional fixed polling scheduling method (estimated 298 seconds, utilization approximately 58%). The actual execution results were consistent with the scheduling predictions, and no manual intervention was required to switch protocol configurations throughout the process.

[0079] Example 2: Resuming Burning After Communication Interruption During Burning A batch of 200 EEPROM memory chips (model AT24C256, capacity 256Kb, i.e., 32KB, 64 bytes per page, totaling 512 pages) using the I2C protocol were programmed in batches on channel B. The single-chip programming process is as follows: erase (chip erase, taking about 5ms, negligible) → write to pages (each page write takes about 3ms, totaling about 1536ms for 512 pages) → read back and verify the entire chip (about 800ms), with a total time of about 2.4 seconds per chip.

[0080] During the programming of the 87th chip, when channel B was writing to page 328 (addresses 0x5200~0x523F), an I2C communication timeout occurred due to a momentary voltage drop in the power supply line of the workstation (lasting approximately 120ms, caused by a surge initiated by a nearby device). After three consecutive unsuccessful ACK retries, the anomaly monitoring unit of channel B determined that the communication was interrupted and reported the abnormal event to the main control module 1.

[0081] The breakpoint resume module 7 updated the breakpoint table 72 page by page in real time before the exception occurred. The specific records are as follows: The burned sections: Page 0 to Page 327 (addresses 0x0000~0x51FF), all written successfully, CRC check passed; Current write progress: Page 328 (address 0x5200) is being written, byte 18 of data frame has been sent (total 64 bytes / page), and the last successful frame sequence number is #20996 (global frame count). Failure section: The first 18 bytes of page 328 are unacknowledged (may have been written, may not have been written); Retry section: Pages 328 to 511 (addresses 0x5200~0x7FFF); Verification section: to be executed after writing is complete.

[0082] After power is restored (approximately 3.2 seconds), main control module 1 reads breakpoint table 72 and determines that the write status of page 328 is uncertain. Therefore, a conservative recovery strategy is executed: all 64 bytes of page 328 are rewritten from the starting address (0x5200) (overwrite, repeated writing to already written areas will not cause data corruption). After confirming that the write to page 328 is correct through readback comparison, subsequent writing continues from page 329 until page 511 is completed. Finally, a full-chip CRC check is performed. The check result is CRC32=0xA7F3E21C, which is consistent with the CRC value of the original firmware file, and the task is marked as completed.

[0083] During the entire interrupt recovery process, only page 328 (64 bytes) is actually rewritten, instead of rewriting all 512 pages from the beginning, saving approximately 1.5 seconds (i.e., eliminating the rewriting time for the first 327 pages). In devices using traditional uninterrupted burn-in solutions, this interruption would cause the entire chip to be rewritten from the beginning (adding approximately 2.4 seconds) and adding an unnecessary full-chip erase-write cycle, further impacting the EEPROM's durability (typically rated at 1 million erase / write cycles). Based on a batch size of 200 chips, if the interruption rate is 2% (i.e., 4 chips malfunction), this invention can cumulatively save approximately 6 seconds of direct burn-in time and reduce 4 invalid erase / write cycles.

[0084] The above embodiments merely illustrate several implementation methods of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this patent should be determined by the appended claims.

Claims

1. A self-identifying parallel programming system, characterized in that, include: Main control module (1); The identification module (2) is used to automatically identify the communication protocol of the object to be programmed, wherein the communication protocol includes at least one of UART, SPI, I2C and CAN; The driver loading module (3) is used to dynamically load the corresponding burning driver and / or parameter template according to the recognition result of the recognition module (2); The task management module (4) is used to generate burning tasks for objects to be burned and form a task queue; The scheduling module (5) is used to perform parallel scheduling and channel allocation of the burning tasks according to the task queue, channel status and expected task time. The parallel programming channel module (6) includes multiple independent programming channels, each programming channel is used to establish communication with the object to be programmed and perform erase, write, read and / or verification operations; The breakpoint resume module (7) is used to record the progress of the burning task and resume burning from the breakpoint after the burning is interrupted. The data verification module (8) is used to perform readback comparison, CRC verification and / or signature verification on the burning results; The human-machine module (9) is used to display protocol identification results, task status, channel status, abnormal information and burning statistics. The main control module (1) is connected to the identification module (2), driver loading module (3), task management module (4), scheduling module (5), parallel burning channel module (6), breakpoint recovery burning module (7) and data verification module (8) to realize automatic identification, driver loading, parallel burning, breakpoint recovery and result verification of the object to be burned.

2. The self-identifying parallel programming system according to claim 1, characterized in that, The identification module (2) includes one or more of the following: a pin identification unit, a response identification unit, an electrical identification unit, and an identification information identification unit; The pin identification unit is used to identify the communication pin connection method of the object to be programmed; the pin identification unit identifies the pin connection method based on a preset pin mapping table or standard interface definition; The response identification unit is used to send probe commands or test waveforms to the object to be programmed and determine the protocol type based on the characteristics of the return packets; The electrical identification unit is used to detect pull-up / pull-down status, level window, clock response, and / or bus occupancy characteristics; The identification information recognition unit is used to read vehicle identification, QR code, barcode, tray information and / or device description information and match it with the protocol template.

3. The self-identifying parallel programming system according to claim 1, characterized in that, The identification module (2) is configured to output protocol type, baud rate or frequency range, address format, verification method and / or read / write timing parameters; The driver loading module (3) automatically selects one or more of the following drivers based on the protocol type and / or the parameters: UART driver, SPI driver, I2C driver, CAN driver, JTAG driver, SWD driver, or other dedicated interface driver.

4. The self-identifying parallel programming system according to claim 1, characterized in that, The task management module (4) is used to create a task entry for each object to be burned. The task entry includes at least the task ID, chip or module model, protocol type, burning file, target capacity, expected burning time, priority, target channel constraint, burning status and verification status.

5. The self-identifying parallel programming system according to claim 1, characterized in that, The scheduling module (5) is configured to optimize channel allocation and startup order based on an improved ant colony optimization algorithm, wherein: The improved ant colony optimization algorithm adopts a two-layer pheromone update mechanism that combines local pheromone updates and global pheromone updates. After each ant completes a task-channel allocation, a local pheromone update is immediately performed on the allocated path to reduce the repeated attraction of the selected path to subsequent ants. After completing a full round of scheduling iteration, global pheromone enhancement is performed only on each task-channel allocation path in the current global optimal scheduling scheme. The heuristic function of the improved ant colony optimization algorithm is a multi-dimensional weighted heuristic function, which comprehensively considers the task's estimated time consumption factor, protocol switching cost factor, channel load balancing factor, and / or task priority factor. The improved ant colony optimization algorithm adopts an adaptive pheromone evaporation factor, which is dynamically adjusted according to the search stagnation state—increasing the evaporation factor when the global optimal solution has not improved in several consecutive iterations, and decreasing the evaporation factor when the global optimal solution continues to improve. The scheduling module (5) maintains a constraint taboo table during the path search process of each ant. The constraint taboo table records the assigned tasks, the current protocol status of each channel, and the exclusive occupancy status of the channel, so as to exclude channels that do not meet the protocol compatibility constraints and / or channel concurrency conflict constraints when selecting a path. The scheduling module (5) comprehensively considers chip capacity, burning file size, protocol transmission rate, erase time, verification time, current channel load and / or concurrent conflict constraints during optimization. The optimization objectives include at least a combination of the following two or more: Maximize the programming throughput per unit time; Minimize channel idle time; Reduce the blocking effect of long tasks on short tasks; Reduce the number of protocol switching times; Balance the load of each programming channel; The scheduling module (5) outputs the burning channel and startup sequence corresponding to each task.

6. The self-identifying parallel programming system according to claim 1, characterized in that, The parallel programming channel module (6) includes multiple independent programming channels. Each programming channel has a physical connection interface, a communication signal output interface, an erase execution unit, a write execution unit, a read execution unit, a verification execution unit, and an anomaly monitoring unit. The anomaly monitoring unit is used to monitor communication timeouts, error frames, electrical anomalies, and / or communication interruptions. The programming channel module (6) establishes communication with the object to be programmed based on the baud rate or frequency range, address format, verification method and / or read / write timing parameters output by the identification module (2).

7. The self-identifying parallel programming system according to claim 1, characterized in that, The breakpoint resume module (7) is used to record the completed address range, current writing progress, verification progress and / or last successful frame sequence number by page, block or segment. When a channel is abnormally disconnected, power is lost, or the user pauses the process, the breakpoint resume module (7) saves the burning status; During the recovery process, the system continues the programming from the last successful address instead of starting from the beginning. The breakpoint resume module (7) generates a breakpoint table for each task. The breakpoint table includes at least the burned section, the failed section, the section to be retried, and the verification section.

8. The self-identifying parallel programming system according to claim 1, characterized in that, The data verification module (8) includes a readback comparison unit, a CRC verification unit, a signature verification unit, a length and address verification unit, and / or a multiple reread consistency verification unit; When verification fails, the system automatically retryes the specified address range and marks the burning task as unqualified.

9. The self-identifying parallel programming system according to claim 1, characterized in that, The human-machine module (9) is used to display the protocol identification result, task queue, channel status, abnormal alarm, burning time and / or verification result, and to record the identification result, driver loading information, scheduling decision result, interruption reason, burning record and verification result; The main control module (1) is an industrial PC, an embedded controller, or a host computer server; The parallel programming channel module (6) supports simultaneous programming of multiple tasks and batch parallel processing of tasks with the same protocol.

10. A self-identifying parallel programming method, characterized in that, The method, applied to the self-identifying parallel programming system according to any one of claims 1 to 9, comprises the following steps: S1. Detect the object to be programmed into the programming station and establish a physical connection; S2. Automatically identify the communication protocol type and generate protocol parameters based on pin characteristics, handshake response, electrical characteristics and / or identification information; S3. Automatically load the corresponding driver and burning parameter template based on the recognition results; S4. Generate an independent burning task for each object to be burned, and record the protocol, capacity, file size, priority and estimated time. S5. Optimize channel allocation and startup order for programming tasks based on the improved ant colony optimization algorithm; S6. Each programming channel performs erase, write, and / or partial verification in parallel; S7. Record the completed address range and intermediate states in real time during the burning process; S8. If an interruption, timeout, or verification failure occurs, continue burning from the breakpoint or retry the failed section. S9. Perform readback comparison, CRC and / or integrity verification on the burning results; S10. Output the burning completion status, error reasons, and statistical reports; In step S2, the protocol identification includes at least one of the following methods: Identify the protocol based on the communication pin connections; The protocol is identified based on the characteristics of the return packets from the probe commands; The protocol is identified based on the level response and bus occupancy characteristics; Match the protocol template based on the vehicle identifier or device identifier; In step S5, the scheduling cost function of the improved ant colony optimization algorithm includes at least the task completion time, channel waiting time, protocol switching cost, load balancing factor and / or task priority factor; the improved ant colony optimization algorithm adopts a two-layer pheromone update mechanism that combines local pheromone update and global pheromone update, its heuristic function is a multi-dimensional weighted heuristic function, and it adopts an adaptive pheromone evaporation factor that is dynamically adjusted according to the search stagnation state.

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