Display device

Abstract

The display device includes a display layer and a sensor layer sensing an external input. The display layer includes a plurality of pixels and a plurality of sensors, each of the plurality of sensors including a sensing element and a sensor driving circuit connected to the sensing element. The sensor driving circuit includes a reset transistor, an output transistor, and a switching transistor including a first electrode connected to the sub-readout line, a second electrode connected to the readout line, and a third electrode for receiving a switching signal generated based on an external input.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and all benefits derived from Korean Patent Application No. 10-2023-0012094, filed on January 30, 2023, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] Embodiments of the present disclosure described herein relate to a display device capable of recognizing biometric information and a method for driving the display device. Background Art

[0004] The display device provides various functions for providing information to a user by displaying an image or for organically communicating with the user (eg, detecting a user input). Nowadays, the display device includes a function for detecting biometric information of a user.

[0005] The biometric information recognition schemes include a capacitive scheme that detects a change in capacitance between electrodes, an optical scheme that detects incident light by using an optical sensor, and an ultrasonic scheme that detects vibration by using a piezoelectric material or the like. Utility Model Content

[0006] Embodiments of the present disclosure provide a display device capable of reducing the number of readout wirings for receiving a bio-sensing signal including externally input bio-information and a method for driving the display device.

[0007] According to an embodiment, a display device includes: a display layer and a sensor layer configured to sense an external input and arranged on the display layer. The display layer includes: a plurality of pixels, each of the plurality of pixels includes a light-emitting element and a pixel driving circuit connected to the light-emitting element; and a plurality of sensors, each of the plurality of sensors includes a sensing element and a sensor driving circuit connected to the sensing element. The sensor driving circuit includes: a reset transistor including a first electrode for receiving a reset voltage, a second electrode connected to a first sensing node, and a third electrode for receiving a first scanning signal; an amplifying transistor including a first electrode for receiving a first driving voltage, a second electrode connected to a second sensing node, and a third electrode connected to the first sensing node; an output transistor including a first electrode connected to a second sensing node, a second electrode connected to a secondary readout line, and a third electrode for receiving a second scanning signal; and a switching transistor including a first electrode connected to a secondary readout line, a second electrode connected to a readout line, and a third electrode for receiving a switching signal generated based on an external input.

[0008] The sensor layer may include a plurality of first sensing electrodes and a plurality of second sensing electrodes crossing the plurality of first sensing electrodes. The display device may further include a sensor controller configured to drive the sensor layer and including a signal generating circuit configured to send a transmission signal to the plurality of first sensing electrodes, an input detection circuit configured to receive a sensing signal from the plurality of second sensing electrodes, and a sensor control circuit.

[0009] The sensor controller may generate a switch signal based on the sensing signal. The sensor controller may output the switch signal to the switch transistor.

[0010] The sensor controller may sense the external input based on the sensing signal. A switching transistor included in each of sensors overlapping the external input in a plan view among the plurality of sensors may be turned on in response to the switching signal.

[0011] A switching transistor included in each of sensors that do not overlap the external input in a plan view among the plurality of sensors may be turned off in response to the switching signal.

[0012] The display device may further include a driving controller driving the display layer. The driving controller may control a pixel among the plurality of pixels overlapping with the external input to emit light.

[0013] The display layer may further include a fingerprint controller electrically connected to the plurality of sensors and a multiplexer connected between the plurality of readout lines and the fingerprint controller.

[0014] An active area in which a plurality of pixels are arranged and a peripheral area adjacent to the active area may be defined in the display layer. The display layer may further include a sensing circuit arranged in the peripheral area. The sensing circuit may generate a switching signal based on the sensing signal. The sensing circuit may output the switching signal to the switching transistor.

[0015] The pixel driving circuit may include: a first transistor connected between the light emitting element and a first voltage line for receiving a first driving voltage; a second transistor connected between a data line and a first electrode of the first transistor and for receiving a second scanning signal; a third transistor connected between the second electrode of the first transistor and a first node and for receiving the first scanning signal; and a fourth transistor connected between the first node and an initialization voltage line and receiving a third scanning signal. The third transistor and the fourth transistor may have a transistor type different from that of the first transistor and the second transistor.

[0016] The reset transistor may have the same transistor type as those of the third transistor and the fourth transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above and other aspects and features of the present disclosure will become apparent by describing in detail embodiments of the present disclosure with reference to the attached drawings.

[0018] Figure 1 is a perspective view of a display device according to an embodiment of the present disclosure.

[0019] Figure 2 is an exploded perspective view of a display device according to an embodiment of the present disclosure.

[0020] Figure 3 is a block diagram illustrating the operation of a display device according to an embodiment of the present disclosure.

[0021] Figure 4A is a cross-sectional view of a display device according to an embodiment of the present disclosure.

[0022] Figure 4B is a cross-sectional view of a display device according to an embodiment of the present disclosure.

[0023] Figure 5 According to the embodiment of the present disclosure Figure 1 A cross-sectional view of the display device taken along line II'.

[0024] Figure 6 is a block diagram of a display device according to an embodiment of the present disclosure.

[0025] Figure 7 is an equivalent circuit diagram of a pixel and a sensor according to an embodiment of the present disclosure.

[0026] Figure 8 is a block diagram illustrating a sensor layer and a sensor controller according to an embodiment of the present disclosure.

[0027] Fig. 9 is a flowchart illustrating a method of driving a display device according to an embodiment of the present disclosure.

[0028] Fig.10 is a block diagram illustrating a display device provided with an external input according to an embodiment of the present disclosure.

[0029] Fig.11 is a block diagram illustrating a plurality of sensors, a sensor controller, and a fingerprint controller according to an embodiment of the present disclosure.

[0030] Fig.12 is a cross-sectional view showing a light emitting element and a sensing element of a display layer according to an embodiment of the present disclosure.

[0031] Fig.13 A display device provided with an external input according to an embodiment of the present disclosure is shown.

[0032] FIG. 14A to FIG. 14Cis a circuit diagram illustrating the operation of the first sensor according to an embodiment of the present disclosure.

[0033] Fig.15 is a block diagram of a display device according to an embodiment of the present disclosure.

[0034] Fig.16 is a block diagram illustrating a plurality of sensors, a sensing circuit, a multiplexer, and a fingerprint controller according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0035] In the specification, the statement that a first component (or region, layer, portion, part, etc.) is “on”, “connected to” or “coupled to” a second component means that the first component is directly on, directly connected to or directly coupled to the second component, or that a third component is interposed therebetween.

[0036] The same reference numerals refer to the same components. In addition, in the drawings, the thickness, proportion and size of the components are exaggerated for the effectiveness of describing the technical content. The term "and / or" includes one or more combinations, and related elements are defined in each combination.

[0037] Although the terms "first", "second", etc. may be used to describe various components, the components should not be interpreted as being limited by the terms. The terms are only used to distinguish one component from another component. In an embodiment, for example, a first component may be referred to as a second component, and similarly, a second component may be referred to as a first component without departing from the scope and spirit of the present disclosure. The articles "a", "an", and "the" are singular forms with a single referent, but the use of the singular form in the specification should not exclude the presence of more than one referent.

[0038] Furthermore, the terms “under,” “beneath,” “on,” “over,” etc. are used to describe the relationship of components shown in the drawings. Conceptually relative terms are described based on the directions shown in the drawings.

[0039] It will be understood that the terms “include”, “comprising”, “having”, etc. indicate the existence of the features, quantities, steps, operations, elements or parts or a combination thereof described in the specification, and do not exclude the possibility of the existence or addition of one or more other features, quantities, steps, operations, elements or parts or a combination thereof.

[0040] Unless otherwise defined, all terms (including technical terms and scientific terms) used in the specification have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. In addition, terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning consistent with the meaning in the context of the relevant technology, and should not be interpreted in an ideal or overly formal sense unless explicitly defined herein.

[0041] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0042] Figure 1 is a perspective view of a display device according to an embodiment of the present disclosure.

[0043] refer to Figure 1 In this specification, a display device 1000 that can be applied to a mobile phone terminal is shown. Although not shown in the drawings, the mobile phone terminal can be implemented by placing an electronic module, a camera module, or a power module mounted on a mainboard together with the display device 1000 in a bracket or a housing. However, this is an example, and the display device 1000 according to an embodiment of the present disclosure is not limited thereto. In another embodiment, for example, the display device 1000 can be applied to small and medium-sized display devices such as a tablet personal computer, a vehicle navigation system, a game console, or a smart watch, and large display devices such as a television or a monitor.

[0044] An active area 1000A and a peripheral area 1000NA may be defined in the display device 1000. The display device 1000 may display an image IM through the active area 1000A. An icon image is shown as an example of the image IM. The active area 1000A may be parallel to a plane defined by a first direction DR1 and a second direction DR2. A normal direction of the active area 1000A (that is, a thickness direction of the display device 1000) may be defined as a third direction DR3. In the specification, "when viewed from above a plane", "on a plane" or "in a plan view" may mean "when viewed in a third direction DR3". The front surface (or upper surface) and the rear surface (or lower surface) of each layer or unit described later may be divided by a third direction DR3.

[0045] The peripheral area 1000NA may be adjacent to the active area 1000A. The peripheral area 1000NA may be an area in which the image IM is not displayed. However, it is not limited thereto. In another embodiment, the peripheral area 1000NA may be adjacent to one side of the active area 1000A, or may be omitted.

[0046] Figure 2 is an exploded perspective view of a display device according to an embodiment of the present disclosure.

[0047] refer to Figure 2, the display device 1000 may include a window WM, a display layer 100 , a sensor layer 200 , a data driver DIC, a circuit board PB, a sensor controller 200C, and a receiving member BC.

[0048] The window WM may be arranged on the sensor layer 200. The window WM may transmit an image provided from the display layer 100 to the outside. The window WM may include a transmission area TA and a non-transmission area NTA. The transmission area TA may be aligned with the active area 1000A of the display device 1000 (see FIG. 1 ) in a plan view. Figure 1 The transmissive area TA may have a shape overlapping with the active area 1000A (see Figure 1 ) corresponding to the shape. Displayed in the active area 1000A of the display device 1000 (see Figure 1 ) on the image IM (see Figure 1 ) can be visible from the outside through the transmission area TA of the window WM.

[0049] In a plan view, the non-transmission area NTA may be aligned with the peripheral area 1000NA of the display device 1000 (see Figure 1 The non-transmission area NTA may have a shape overlapping with the peripheral area 1000NA (see Figure 1 ) corresponding to the shape. The non-transmission area NTA may be an area having a transmittance lower than that of the transmission area TA. However, the window WM according to an embodiment of the present disclosure is not limited thereto, and the non-transmission area NTA may be omitted in another embodiment.

[0050] The window WM may be formed of glass, sapphire, plastic, etc. In addition, the window WM may be composed of a single layer or multiple layers. The window WM may include a base layer and at least one printed layer overlapping the non-transmission area NTA in a plan view and arranged on the rear surface of the base layer. The printed layer may have a given color. In an embodiment, for example, the printed layer may be provided in black or in a color other than black.

[0051] The display layer 100 and the sensor layer 200 may be interposed between the window WM and the receiving member BC. The sensor layer 200 may be disposed on the display layer 100. This will be described later.

[0052] The data driver DIC may be mounted on the display layer 100. The circuit board PB is arranged at one end of the display layer 100 and may be electrically connected to the display layer 100. The circuit board PB may be rigid or flexible. In an embodiment, for example, when the circuit board PB is flexible, the circuit board PB may be provided as a flexible printed circuit board. The circuit board PB may include a sensor controller 200C, which controls the operation of the sensor layer 200. The sensor controller 200C may be mounted on the circuit board PB in the form of an integrated chip. In addition, although not shown in the drawings, the circuit board PB may further include a circuit for controlling the display layer 100.

[0053] Figure 3 is a block diagram illustrating the operation of a display device according to an embodiment of the present disclosure.

[0054] refer to Figure 3 , the display device 1000 may include a display layer 100 , a sensor layer 200 , a driving controller 100C, a sensor controller 200C, and a main driver 1000C.

[0055] The display layer 100 may be a component that substantially generates an image. The display layer 100 may be a light-emitting display layer. In an embodiment, for example, the display layer 100 may be an organic light-emitting display layer, a quantum dot display layer, a micro-LED display layer, or a nano-LED display layer. The display layer 100 may be referred to as a "display panel".

[0056] The sensor layer 200 may be arranged on the display layer 100. The sensor layer 200 may sense an external input 2000 applied from the outside. The external input 2000 may include any input device capable of providing a capacitance change. In an embodiment, for example, the sensor layer 200 may sense not only an input through a passive input device such as a user's body, but also an input through an active input device that provides a transmission signal. The sensor layer 200 may be referred to as a "sensor", "touch layer", "touch panel", "input sensing layer", or "input sensing panel".

[0057] The main driver 1000C may control the overall operation of the display device 1000. In an embodiment, for example, the main driver 1000C may control the operation of the driving controller 100C and the sensor controller 200C. The main driver 1000C may include at least one microprocessor, and the main driver 1000C may be referred to as a "host". The main driver 1000C may further include a graphics controller.

[0058] The driving controller 100C may drive the display layer 100. The driving controller 100C may receive the image data RGB and the control signal D-CS from the main driver 1000C. The control signal D-CS may include various signals. In an embodiment, for example, the control signal D-CS may include an input vertical synchronization signal, an input horizontal synchronization signal, a main clock, and a data enable signal. The driving controller 100C may generate a scanning control signal and a data control signal for controlling the driving of the display layer 100 based on the control signal D-CS.

[0059] The sensor controller 200C may drive the sensor layer 200. The sensor controller 200C may receive a control signal I-CS from the main driver 1000C. The control signal I-CS may include a clock signal of the sensor layer 200.

[0060] The sensor controller 200C may calculate the input coordinate information based on the signal received from the sensor layer 200, and may provide a coordinate signal I-SS having the coordinate information to the main driver 1000C. The main driver 1000C performs an operation corresponding to the user input based on the coordinate signal I-SS. In an embodiment, for example, the main driver 1000C may operate the driving controller 100C to display a new application image on the display layer 100.

[0061] Figure 4A is a cross-sectional view of a display device according to an embodiment of the present disclosure.

[0062] refer to Figure 4A The display layer 100 may include a base layer 110 , a circuit layer 120 , a light emitting element layer 130 and an encapsulation layer 140 .

[0063] The base layer 110 may be a member providing a base surface on which the circuit layer 120 is arranged. The base layer 110 may be a glass substrate, a metal substrate, a polymer substrate, etc. However, the embodiment is not limited thereto, and in another embodiment, the base layer 110 may be an inorganic layer, an organic layer, or a composite material layer.

[0064] The base layer 110 may have a multi-layer structure. In an embodiment, for example, the base layer 110 may include a first synthetic resin layer, a silicon oxide (SiO x ) layer, an amorphous silicon (a-Si) layer disposed on the silicon oxide layer, and a second synthetic resin layer disposed on the amorphous silicon layer. The silicon oxide layer and the amorphous silicon layer may be referred to as a "base barrier layer".

[0065] Each of the first synthetic resin layer and the second synthetic resin layer may include a polyimide-based resin. In addition, each of the first synthetic resin layer and the second synthetic resin layer may include at least one of an acrylate-based resin, a methacrylate-based resin, a polyisoprene-based resin, a vinyl-based resin, an epoxy-based resin, a urethane-based resin, a cellulose-based resin, a siloxane-based resin, a polyamide-based resin, and a perylene-based resin. Meanwhile, the "~~"-based resin in the specification means a functional group including "~~".

[0066] The circuit layer 120 may be arranged on the base layer 110. The circuit layer 120 may include an insulating layer, a semiconductor pattern, a conductive pattern, and a signal wiring. The insulating layer, the semiconductor layer, and the conductive layer may be formed on the base layer 110 in a manner such as coating or evaporation. Thereafter, the insulating layer, the semiconductor layer, and the conductive layer may be selectively patterned by performing a photolithography process multiple times. Thereafter, the semiconductor pattern, the conductive pattern, and the signal wiring included in the circuit layer 120 may be formed.

[0067] The light emitting element layer 130 may be disposed on the circuit layer 120. The light emitting element layer 130 may include a light emitting element. In an embodiment, for example, the light emitting element layer 130 may include an organic light emitting material, a quantum dot, a quantum rod, a micro-LED, or a nano-LED.

[0068] The encapsulation layer 140 may be disposed on the light emitting element layer 130. The encapsulation layer 140 may protect the light emitting element layer 130 from foreign substances such as moisture, oxygen, and dust particles.

[0069] The sensor layer 200 may be arranged on the display layer 100. The sensor layer 200 may sense an external input applied from the outside. The external input may be a user input. The user input may include various types of external inputs, such as a part of a user's body, light, heat, a pen, or pressure.

[0070] The sensor layer 200 may be formed on the display layer 100 through a continuous process. In this case, the sensor layer 200 may be expressed as being directly disposed on the display layer 100. "Directly disposed" may mean that a third component is not interposed between the sensor layer 200 and the display layer 100. That is, a separate bonding member may not be interposed between the sensor layer 200 and the display layer 100. Alternatively, the sensor layer 200 may be coupled to the display layer 100 through a bonding member. The bonding member may include a general adhesive or a general adhesive.

[0071] Although not shown in the drawings, the display device 1000 may further include an anti-reflection layer and an optical layer disposed on the sensor layer 200. The anti-reflection layer may reduce the reflectivity of external light incident from the outside of the display device 1000. The optical layer may improve the front brightness of the display device 1000 by controlling the direction of light incident from the display layer 100.

[0072] Figure 4B is a cross-sectional view of a display device according to an embodiment of the present disclosure.

[0073] refer to Figure 4B , the display device 1000_1 may include a display layer 100_1 and a sensor layer 200_1. The display layer 100_1 may include a base substrate 110_1, a circuit layer 120_1, a light emitting element layer 130_1, a package substrate 140_1, and a coupling member 150_1.

[0074] Each of the base substrate 110_1 and the encapsulation substrate 140_1 may be a glass substrate, a metal substrate, or a polymer substrate, but is not particularly limited thereto.

[0075] The coupling member 150_1 may be inserted between the base substrate 110_1 and the encapsulation substrate 140_1. The coupling member 150_1 may couple the encapsulation substrate 140_1 to the base substrate 110_1 or the circuit layer 120_1. The coupling member 150_1 may include an inorganic material or an organic material. In an embodiment, for example, the inorganic material may include a glass frit seal, and the organic material may include a photocurable resin or a photoplastic resin. However, the material constituting the coupling member 150_1 is not limited to the example.

[0076] The sensor layer 200_1 may be directly disposed on the encapsulation substrate 140_1. "Directly disposed" may mean that no third component is inserted between the sensor layer 200_1 and the encapsulation substrate 140_1. That is, a separate adhesive member may not be inserted between the sensor layer 200_1 and the display layer 100_1. However, the embodiment is not limited thereto, and in another embodiment, an adhesive layer may be further inserted between the sensor layer 200_1 and the encapsulation substrate 140_1.

[0077] Figure 5 According to the embodiment of the present disclosure Figure 1 A cross-sectional view of the display device taken along line II'.

[0078] refer to Figure 5 , the display device 1000 may include a display layer 100 and a sensor layer 200 disposed on the display layer 100 .

[0079] The display layer 100 may include a base layer 110 , and a circuit layer 120 , a light emitting element layer 130 , and an encapsulation layer 140 disposed on the base layer 110 .

[0080] The base layer 110 may include a synthetic resin layer. The synthetic resin layer may include a thermosetting resin. Specifically, the synthetic resin layer may be a polyimide resin layer, and its material is not particularly limited thereto. The synthetic resin layer may include at least one of an acrylate resin, a methacrylate resin, a polyisoprene resin, a vinyl resin, an epoxy resin, a urethane resin, a cellulose resin, a siloxane resin, a polyamide resin, and a perylene resin. In addition, the base layer 110 may include a glass substrate, a metal substrate, an organic / inorganic composite substrate, etc.

[0081] At least one inorganic layer is arranged on the upper surface of the base layer 110. The inorganic layer may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide. The inorganic layer may be formed of multiple layers. The multiple inorganic layers may constitute a barrier layer BRL and / or a buffer layer BFL to be described later. The barrier layer BRL and the buffer layer BFL may be selectively arranged.

[0082] The barrier layer BRL prevents foreign matter from entering from the outside. The barrier layer BRL may include a silicon oxide layer and a silicon nitride layer. Each of the silicon oxide layer and the silicon nitride layer may include a plurality of layers, and the plurality of silicon oxide layers and silicon nitride layers may be alternately stacked.

[0083] The buffer layer BFL may be disposed on the barrier layer BRL. The buffer layer BFL improves the bonding force between the base layer 110 and the semiconductor pattern and / or the conductive pattern. The buffer layer BFL may include a silicon oxide layer and a silicon nitride layer. The silicon oxide layer and the silicon nitride layer may be alternately stacked.

[0084] The semiconductor pattern is arranged on the buffer layer BFL. Hereinafter, the semiconductor pattern directly arranged on the buffer layer BFL is defined as a first semiconductor pattern. The first semiconductor pattern may include a silicon semiconductor. The first semiconductor pattern may include polycrystalline silicon. However, the embodiment is not limited thereto. In another embodiment, for example, the first semiconductor pattern may include amorphous silicon.

[0085] The first semiconductor pattern has different electrical characteristics depending on whether the first semiconductor pattern is doped. The first semiconductor pattern may include a doped region and an undoped region. The doped region may be doped with an N-type dopant or a P-type dopant. The P-type transistor may include a doped region doped with a P-type dopant, and the N-type transistor includes a doped region doped with an N-type dopant.

[0086] The doped region has a higher conductivity than that of the undoped region and operates substantially as an electrode or a signal line. The undoped region substantially corresponds to an active region (or a channel) of a transistor. In other words, a portion of the first semiconductor pattern may be an active region of a transistor. Another portion of the first semiconductor pattern may be a source or a drain of a transistor. Another portion of the first semiconductor pattern may be a connection signal line (or a connection electrode). Figure 5 A first transistor T1 is shown as an example of a first semiconductor pattern.

[0087] The first electrode S1, the channel portion A1, and the second electrode D1 of the first transistor T1 are formed of the first semiconductor pattern. The first electrode S1 and the second electrode D1 of the first transistor T1 may extend from the channel portion A1 in opposite directions.

[0088] exist Figure 5 FIG. 4 shows a portion of a connection signal line CSL formed by a semiconductor pattern. Although not shown separately in the drawings, the connection signal line CSL may be electrically connected to the sixth transistor T6 (see FIG. 4 ) on a plane. Figure 7 )'s second electrode.

[0089] The first insulating layer 10 is disposed on the buffer layer BFL. The first insulating layer 10 is aligned with the plurality of pixels PX (see FIG. Figure 6 ) overlap together so as to cover the first semiconductor pattern. The first insulating layer 10 may be an inorganic layer and / or an organic layer, and may have a single-layer or multi-layer structure. The first insulating layer 10 may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide. In an embodiment, the first insulating layer 10 may be a silicon oxide layer having a single-layer structure. Not only the first insulating layer 10 but also the insulating layer of the circuit layer 120 to be described later may also be an inorganic layer and / or an organic layer, and may have a single-layer structure or a multi-layer structure. The inorganic layer may include at least one of the above materials.

[0090] The third electrode G1 of the first transistor T1 is arranged on the first insulating layer 10. The third electrode G1 may be a part of the metal pattern. The third electrode G1 of the first transistor T1 overlaps the channel portion A1 of the first transistor T1 in a plan view. The third electrode G1 of the first transistor T1 may be used as a mask in the process of doping the first semiconductor pattern.

[0091] The second insulating layer 20 covering the third electrode G1 is disposed on the first insulating layer 10. The second insulating layer 20 is aligned with the plurality of pixels PX (see FIG. Figure 6 ) overlap together. The second insulating layer 20 may be an inorganic layer and / or an organic layer, and may have a single-layer structure or a multi-layer structure. In an embodiment, the second insulating layer 20 may be a silicon oxide layer having a single-layer structure.

[0092] The upper electrode UE may be disposed on the second insulating layer 20. The upper electrode UE may overlap the third electrode G1 in a plan view. The upper electrode UE may be a portion of a metal pattern or a portion of a doped semiconductor pattern. A portion of the third electrode G1 and the upper electrode UE overlapping a portion of the third electrode G1 in a plan view may define a capacitor Cst (see Figure 7 ). In the embodiment of the present disclosure, the upper electrode UE may be omitted.

[0093] In an embodiment of the present disclosure, the second insulating layer 20 may be replaced with an insulating pattern. The upper electrode UE is disposed on the insulating pattern. The upper electrode UE may be used as a mask for forming the insulating pattern from the second insulating layer 20.

[0094] The third insulating layer 30 covering the upper electrode UE is arranged on the second insulating layer 20. In an embodiment, the third insulating layer 30 may be a silicon oxide layer having a single-layer structure. The semiconductor pattern is disposed on the third insulating layer 30. Hereinafter, the semiconductor pattern directly arranged on the third insulating layer 30 is defined as a second semiconductor pattern. The second semiconductor pattern may include a metal oxide. The oxide semiconductor may include a crystalline or amorphous oxide semiconductor. In an embodiment, for example, the oxide semiconductor may include an oxide of a metal (e.g., zinc (Zn), indium (In), gallium (Ga), tin (Sn), or titanium (Ti), etc.) or a mixture of an oxide of a metal (e.g., zinc (Zn), indium (In), gallium (Ga), tin (Sn), and titanium (Ti), etc.) and an oxide of a metal. The oxide semiconductor may include indium tin oxide ("ITO"), indium gallium zinc oxide ("IGZO"), zinc oxide (ZnO), indium zinc oxide ("IZO"), zinc indium oxide ("ZIO"), indium oxide (In 2 O 3 ), titanium oxide (TiO 2 ), indium zinc tin oxide ("IZTO") or zinc tin oxide ("ZTO"), etc.

[0095] The second semiconductor pattern may include a plurality of regions identified according to whether the metal oxide is reduced. The region in which the metal oxide is reduced (hereinafter, referred to as a "reduction region") has a higher conductivity than the region in which the metal oxide is not reduced (hereinafter, referred to as a "non-reduction region"). The reduction region substantially has the function of an electrode or a signal line. The non-reduction region substantially corresponds to a channel portion of a transistor. In other words, a portion of the second semiconductor pattern may be a channel portion of a transistor, and another portion of the second semiconductor pattern may be a first electrode or a second electrode of the transistor. Figure 5 A third transistor T3 is shown as an example of a second semiconductor pattern.

[0096] The first electrode S3, the channel portion A3, and the second electrode D3 of the third transistor T3 are formed by the second semiconductor pattern. The first electrode S3 and the second electrode D3 include a metal reduced from a metal oxide semiconductor. The first electrode S3 and the second electrode D3 may have a predetermined thickness from an upper surface of the second semiconductor pattern and may include a metal layer including the reduced metal.

[0097] A fourth insulating layer 40 covering the second semiconductor pattern is arranged on the third insulating layer 30. In an embodiment, the fourth insulating layer 40 may be a silicon oxide layer having a single-layer structure. A third electrode G3 of the third transistor T3 is arranged on the fourth insulating layer 40. The third electrode G3 may be a part of the metal pattern. The third electrode G3 of the third transistor T3 overlaps with a channel portion A3 of the third transistor T3 in a plan view.

[0098] In an embodiment of the present disclosure, the fourth insulating layer 40 may be replaced by an insulating pattern. The third electrode G3 of the third transistor T3 is arranged on the insulating pattern. In an embodiment, the third electrode G3 may have the same shape as the insulating pattern in a plan view. In an embodiment, for ease of description, one third electrode G3 is shown, but the third transistor T3 may include two third electrodes.

[0099] The fifth insulating layer 50 covering the third electrode G3 is disposed on the fourth insulating layer 40. In an embodiment, the fifth insulating layer 50 may include a silicon oxide layer and a silicon nitride layer. The fifth insulating layer 50 may include a plurality of silicon oxide layers and a plurality of silicon nitride layers alternately stacked.

[0100] At least one insulating layer is further arranged on the fifth insulating layer 50. In an embodiment, a sixth insulating layer 60 and a seventh insulating layer 70 may be arranged on the fifth insulating layer 50. The sixth insulating layer 60 and the seventh insulating layer 70 may be organic layers and may have a single-layer or multi-layer structure. The sixth insulating layer 60 and the seventh insulating layer 70 may be polyimide resin layers having a single-layer structure. However, the present disclosure is not limited thereto. In another embodiment, for example, the sixth insulating layer 60 and the seventh insulating layer 70 may include at least one of an acrylate resin, a methacrylate resin, a polyisoprene resin, a vinyl resin, an epoxy resin, a urethane resin, a cellulose resin, a siloxane resin, a polyamide resin, and a perylene resin.

[0101] The first connection electrode CNE10 may be disposed on the fifth insulating layer 50. The first connection electrode CNE10 may be connected to the connection signal line CSL through a first contact hole CH1 penetrating the first insulating layer 10 to the fifth insulating layer 50. The second connection electrode CNE20 may be connected to the first connection electrode CNE10 through a contact hole CH-60 penetrating the sixth insulating layer 60. In an embodiment of the present disclosure, at least one of the fifth insulating layer 50 and the sixth insulating layer 60 may be omitted.

[0102] The light emitting element layer 130 includes a light emitting element ED and a pixel defining layer PDL. The anode AE ​​of the light emitting element ED is disposed on the seventh insulating layer 70. The anode AE ​​of the light emitting element ED may be connected to the second connection electrode CNE20 through a contact hole CH-70 penetrating the seventh insulating layer 70. The light emitting element ED may include an organic light emitting diode.

[0103] The opening OP of the pixel defining layer PDL exposes at least a portion of the anode AE ​​of the light emitting element ED. The opening OP of the pixel defining layer PDL may define an emission area PXA. In an embodiment, for example, a plurality of pixels PX (see Figure 6 ) can be arranged on the display layer 100 based on specific rules (see Figure 6 ) plane. A region in which a plurality of pixels PX are arranged may be defined as a pixel region. One pixel region may include an emission region PXA and a non-emission region NPXA adjacent to the emission region PXA. The non-emission region NPXA may surround the emission region PXA.

[0104] The hole control layer HCL may be commonly disposed in the emission region PXA and the non-emission region NPXA. A common layer such as the hole control layer HCL may be commonly formed in a plurality of pixels PX. The hole control layer HCL may include a hole transport layer and a hole injection layer.

[0105] The light emitting layer EML is disposed on the hole control layer HCL. The light emitting layer EML may be disposed only in a region corresponding to the opening OP. The light emitting layer EML may be formed in each of the plurality of pixels PX, respectively.

[0106] In the embodiment, a patterned light emitting layer EML is shown. However, the light emitting layer EML may be disposed together in a plurality of pixels PX. At this time, the light emitting layer EML may generate white light or blue light. In addition, the light emitting layer EML may have a multi-layer structure.

[0107] The electron control layer ECL is arranged on the light emitting layer EML. The electron control layer ECL may include an electron transport layer and an electron injection layer. The cathode CE of the light emitting element ED is arranged on the electron control layer ECL. The electron control layer ECL and the cathode CE are arranged together in a plurality of pixels PX.

[0108] The encapsulation layer 140 is disposed on the cathode CE. The encapsulation layer 140 may cover a plurality of pixels PX (see Figure 6 ). In an embodiment, the encapsulation layer 140 directly covers the cathode CE. In an embodiment of the present disclosure, the display layer 100 may further include a capping layer directly covering the cathode CE. In an embodiment of the present disclosure, the stacking structure of the light emitting element ED may have Figure 5 The structure shown in Figure 1 is a vertically inverted structure.

[0109] The encapsulation layer 140 may be disposed on the light emitting element layer 130. The encapsulation layer 140 may include an inorganic layer, an organic layer, and an inorganic layer sequentially stacked, and the layers constituting the encapsulation layer 140 are not limited thereto.

[0110] The inorganic layer can protect the light emitting element layer 130 from moisture and oxygen, and the organic layer can protect the light emitting element layer 130 from foreign matter such as dust particles. The inorganic layer may include a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer, etc. The organic layer may include an acrylic organic layer, but is not limited thereto.

[0111] The sensor layer 200 may include a base layer 201 , a first conductive layer 202 , a sensing insulating layer 203 , a second conductive layer 204 , and a cover insulating layer 205 .

[0112] The base layer 201 may be an inorganic layer including at least one of silicon nitride, silicon oxynitride, and silicon oxide. Alternatively, the base layer 201 may be an organic layer including epoxy resin, acrylate resin, or imide resin. The base layer 201 may have a single-layer structure, or may have a multi-layer structure stacked in the third direction DR3.

[0113] Each of the first conductive layer 202 and the second conductive layer 204 may have a single-layer structure, or may have a multi-layer structure stacked in the third direction DR3.

[0114] The conductive layer of the single-layer structure may include a metal layer or a transparent conductive layer. The metal layer may include molybdenum, silver, titanium, copper, aluminum or an alloy thereof. The transparent conductive layer may include a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO) or indium zinc tin oxide (IZTO). In addition, the transparent conductive layer may include a conductive polymer such as PEDOT, a metal nanowire and graphene.

[0115] The conductive layer of the multi-layer structure may include a metal layer. In an embodiment, for example, the metal layer may have a three-layer structure of titanium / aluminum / titanium. The conductive layer of the multi-layer structure may include at least one metal layer and at least one transparent conductive layer.

[0116] At least one of the sensing insulating layer 203 and the capping insulating layer 205 may include an inorganic film. The inorganic film may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0117] At least one of the sensing insulating layer 203 and the cover insulating layer 205 may include an organic film. The organic film may include at least one of acrylate resin, methacrylate resin, polyisoprene resin, vinyl resin, epoxy resin, urethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin.

[0118] Figure 6 is a block diagram of a display device according to an embodiment of the present disclosure.

[0119] refer to Figure 6 , the display device 1000 (see Figure 1 ) may include a display layer 100, a driving controller 100C, a data driver DIC, a scan driver SD, an emission driver EDC, a voltage generator VI, and a fingerprint controller ROC.

[0120] The driving controller 100C may receive the image data RGB and the control signal D-CS. The driving controller 100C may generate the image data signal DATA obtained by converting the data format of the image data RGB so as to be suitable for the interface specification of the data driver DIC. The driving controller 100C may output the first control signal SCS, the second control signal ECS, the third control signal DCS, and the fourth control signal RCS.

[0121] The scan driver SD may receive a first control signal SCS from the drive controller 100C. The scan driver SD may output scan signals to the scan lines SILn, SCLn, SBLn, and SWLn in response to the first control signal SCS. The scan lines SILn, SCLn, SBLn, and SWLn may include initialization scan lines SIL1 to SILn, compensation scan lines SCL1 to SCLn, write scan lines SWL1 to SWLn, and black scan lines SBL1 to SBLn.

[0122] The emission driver EDC may receive the second control signal ECS from the driving controller 100C. The emission driver EDC may output the emission control signal to the emission control lines EML1 to EMLn in response to the second control signal ECS.

[0123] The data driver DIC may receive the third control signal DCS and the image data signal DATA from the driving controller 100C. The data driver DIC may convert the image data signal DATA into a data signal and may output the data signal to the data lines DL1 to DLm. The data signal may be an analog voltage corresponding to the grayscale value of the image data signal DATA.

[0124] The voltage generator VI may generate voltages required for the operation of the display layer 100. In an embodiment, the voltage generator VI may generate a first driving voltage ELVDD, a second driving voltage ELVSS, a first initialization voltage VINT1, a second initialization voltage VINT2, and a reset voltage VRST. However, the voltages generated by the voltage generator VI are not limited thereto.

[0125] The display layer 100 may include a plurality of pixels PX arranged in a display area DA and a plurality of sensors FX arranged in the display area DA. When viewed from above a plane, the display area DA of the display layer 100 may be aligned with the display device 1000 (see FIG. Figure 1 ) effective area 1000A (see Figure 1 ) overlap. In an embodiment of the present disclosure, each of the plurality of sensors FX may be inserted between two pixels PX adjacent to each other. The pixels PX and the sensors FX may be alternately positioned in the first direction DR1 and the second direction DR2. However, the embodiment is not necessarily limited thereto. In an embodiment, for example, two or more pixels PX may be positioned between two sensors FX adjacent to each other among the sensors FX in the first direction DR1, and two or more pixels PX may be positioned between two sensors FX adjacent to each other among the sensors FX in the second direction DR2. The plurality of sensors FX may be arranged on the entire surface of the display area DA.

[0126] Initialization scan lines SIL1 to SILn, compensation scan lines SCL1 to SCLn, write scan lines SWL1 to SWLn, black scan lines SBL1 to SBLn, and emission control lines EML1 to EMLn may extend in the first direction DR1 and may be spaced apart from each other in the second direction DR2. Data lines DL1 to DLm and readout lines RL1 to RLh may extend in the second direction DR2 and be spaced apart from each other in the first direction DR1.

[0127] A plurality of pixels PX may be electrically connected to initialization scan lines SIL1 to SILn, compensation scan lines SCL1 to SCLn, write scan lines SWL1 to SWLn, black scan lines SBL1 to SBLn, emission control lines EML1 to EMLn, and data lines DL1 to DLm. Each of the plurality of pixels PX is electrically connected to four scan lines. However, the number of scan lines connected to each of the pixels PX is not limited thereto. In an embodiment, for example, the number of scan lines may be changed.

[0128] A plurality of sensors FX may be electrically connected to write scan lines SWL1 to SWLn and readout lines RL1 to RLh. It is shown that each of the plurality of sensors FX is electrically connected to one scan line, but is not limited thereto. In an embodiment, for example, the number of scan lines connected to each of the sensors FX may be changed. The number of readout lines RL1 to RLh may be less than or equal to the number of data lines DL1 to DLm. In an embodiment, for example, the number of readout lines RL1 to RLh may correspond to 1 / 2 of the number of data lines DL1 to DLm. In an embodiment, for example, two sensors FX may be electrically connected to one readout line. However, this is an example. In an embodiment, for example, the number of readout lines RL1 to RLh according to an embodiment of the present disclosure may correspond to 1 / 4 or 1 / 8 of the number of data lines DL1 to DLm.

[0129] The scan driver SD may be positioned in the peripheral area NDA of the display layer 100. In response to the first control signal SCS received from the drive controller 100C, the scan driver SD may output the initialization scan signal to the initialization scan lines SIL1 to SILn, and may output the compensation scan signal to the compensation scan lines SCL1 to SCLn. In addition, in response to the first control signal SCS, the scan driver SD may output the write scan signal to the write scan lines SWL1 to SWLn, and may output the black scan signal to the black scan lines SBL1 to SBLn. In an embodiment, the scan driver SD may include a first scan driver that outputs the initialization scan signal and the compensation scan signal, and a second scan driver that outputs the write scan signal and the black scan signal. However, the embodiment is not limited thereto.

[0130] The emission driver EDC may be located in the peripheral area NDA of the display layer 100. The emission driver EDC may output an emission control signal to the emission control lines EML1 to EMLn in response to a second control signal ECS received from the drive controller 100C. In an embodiment, the scan driver SD and the emission driver EDC are shown to be distinguished from each other, but are not limited thereto. In another embodiment, for example, the scan driver SD is connected to the emission control lines EML1 to EMLn to output the emission control signal and the emission driver EDC may be omitted.

[0131] The fingerprint controller ROC may receive the biometric sensing signal from the readout lines RL1 to RLh in response to the fourth control signal RCS received from the drive controller 100C. The fingerprint controller ROC may process the biometric sensing signal received from the readout lines RL1 to RLh and may provide the processed biometric sensing signal S_FS to the drive controller 100C. The drive controller 100C may recognize the biometric information based on the biometric sensing signal S_FS.

[0132] According to an embodiment of the present disclosure, biological information can be recognized in the entire display area DA by a plurality of sensors FX positioned on the entire surface of the display area DA. Therefore, a display device 1000 with improved reliability can be provided (see Figure 1 ).

[0133] Alternatively, the fingerprint controller ROC may respond to the request from the sensor controller 200C (see Figure 3 ) receives the second sensing signal from the readout lines RL1 to RLh. The fingerprint controller ROC may process the second sensing signal received from the readout lines RL1 to RLh, and may provide the processed second sensing signal to the sensor controller 200C (see Figure 3 ). Sensor controller 200C (see Figure 3 ) can recognize external input 2000 based on the second sensing signal (see Figure 3 )’s coordinate information.

[0134] Figure 7 is an equivalent circuit diagram of a pixel and a sensor according to an embodiment of the present disclosure.

[0135] refer to Figure 7 , the pixel PX may be connected to the i-th data line DLi among the data lines DL1 to DLm, the j-th initialization scan line SILj among the initialization scan lines SIL1 to SILn, the j-th compensation scan line SCLj among the compensation scan lines SCL1 to SCLn, the j-th write scan line SWLj among the write scan lines SWL1 to SWLn, the j-th black scan line SBLj among the black scan lines SBL1 to SBLn, and the j-th emission control line EMLj among the emission control lines EML1 to EMLn. Here, each of "i" and "j" is a natural number greater than 0.

[0136] The pixel PX may include a light emitting element ED and a pixel driving circuit P_PD. The light emitting element ED may be a light emitting diode. In an embodiment, for example, the light emitting element ED may be an organic light emitting diode including an organic light emitting layer. The pixel driving circuit P_PD may be connected to the light emitting element ED to control the amount of current flowing through the light emitting element ED. The light emitting element ED may generate light having a predetermined brightness according to the amount of current supplied.

[0137] The pixel driving circuit P_PD may include a first transistor T1 to a seventh transistor T7 and a capacitor Cst. Each of the first transistor T1 to the seventh transistor T7 may be a transistor having a low temperature polycrystalline silicon (LTPS) semiconductor layer or a transistor having an oxide semiconductor layer. In addition, each of the first transistor T1 to the seventh transistor T7 may be a P-type transistor or an N-type transistor. In an embodiment, for example, the first transistor T1, the second transistor T2, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 may be PMOS transistors, each having an LTPS semiconductor layer, and the third transistor T3 and the fourth transistor T4 may be NMOS transistors, each having an oxide semiconductor layer. However, this is merely an example, and the embodiments of the first transistor T1 to the seventh transistor T7 are not limited thereto.

[0138] The jth initialization scan line SILj, the jth compensation scan line SCLj, the jth write scan line SWLj, the jth black scan line SBLj, and the jth emission control line EMLj can transmit the jth initialization scan signal SIj, the jth compensation scan signal SCj, the jth write scan signal SWj, the jth black scan signal SBj, and the jth emission control signal EMj to the pixel PX, respectively. The i-th data line DLi can transmit the i-th data signal Di to the pixel PX. The i-th data signal Di can have the same value as that input to the driving controller 100C (see Figure 3 ) image data RGB (see Figure 3 ) corresponding to the voltage level.

[0139] The first and second voltage lines VL1 and VL2 may transmit the first and second driving voltages ELVDD and ELVSS to the pixels PX, respectively, and further, the third and fourth voltage lines VL3 and VL4 may transmit the first and second initialization voltages VINT1 and VINT2 to the pixels PX, respectively.

[0140] The light emitting element ED may include a first electrode and a second electrode. The first electrode of the light emitting element ED may be electrically connected to a first voltage line VL1 for receiving a first driving voltage ELVDD via at least one transistor. The second electrode of the light emitting element ED may be electrically connected to a second voltage line VL2 for receiving a second driving voltage ELVSS. In an embodiment, the first electrode of the light emitting element ED may correspond to an anode electrode, and the second electrode of the light emitting element ED may correspond to a cathode electrode.

[0141] Each of the first transistor T1 to the seventh transistor T7 may include a first electrode, a second electrode and a gate electrode. According to an embodiment of the present disclosure, the first electrode and the second electrode may be defined as an input electrode or an output electrode (or a source electrode or a drain electrode), respectively. In this specification, "electrically connected between a transistor and a signal line or electrically connected between a transistor and a transistor" means "the electrode of the transistor is integrated with the signal line or connected by a connecting electrode".

[0142] The first transistor T1 may be electrically connected between a first voltage line VL1 for receiving a first driving voltage ELVDD and the light emitting element ED. The first transistor T1 may include a first electrode connected to the first voltage line VL1 via a fifth transistor T5, a second electrode connected to the first electrode of the light emitting element ED via a sixth transistor T6, and a gate electrode connected to one end of the capacitor Cst. The first transistor T1 may receive an i-th data signal Di transmitted through an i-th data line DLi according to a switching operation of the second transistor T2, and may then supply a driving current Id to the light emitting element ED. In an embodiment, the first transistor T1 may be defined as a driving transistor.

[0143] The second transistor T2 may be electrically connected between the i-th data line DLi and the first electrode of the first transistor T1. The second transistor T2 may include a first electrode connected to the i-th data line DLi, a second electrode connected to the first electrode of the first transistor T1, and a gate electrode connected to the j-th write scan line SWLj. The second transistor T2 may be turned on in response to the j-th write scan signal SWj transmitted through the j-th write scan line SWLj, and then may transmit the i-th data signal Di transmitted from the i-th data line DLi to the first electrode of the first transistor T1. In an embodiment, the second transistor T2 may be defined as a switching transistor.

[0144] The third transistor T3 may be electrically connected between the second electrode of the first transistor T1 and the first node N1 connected to the gate electrode of the first transistor T1. The third transistor T3 may include a first electrode connected to the first node N1, a second electrode connected to the second electrode of the first transistor T1, and a gate electrode connected to the jth compensation scan line SCLj. The third transistor T3 may be turned on in response to the jth compensation scan signal SCj transmitted through the jth compensation scan line SCLj to connect the gate electrode of the first transistor T1 and the second electrode of the first transistor T1. In this case, the first transistor T1 may be diode-connected. In an embodiment, the third transistor T3 may be defined as a compensation transistor.

[0145] The fourth transistor T4 may be electrically connected between the third voltage line VL3 supplied with the first initialization voltage VINT1 and the first node N1. The third voltage line VL3 may be referred to as a first initialization voltage line. The fourth transistor T4 may include a first electrode connected to the third voltage line VL3, a second electrode connected to the first node N1, and a gate electrode connected to the jth initialization scan line SILj. The fourth transistor T4 may be turned on in response to the jth initialization scan signal SIj transmitted through the jth initialization scan line SILj to transmit the first initialization voltage VINT1 to the first node N1, and may initialize the potential of the gate electrode of the first transistor T1. In an embodiment, the fourth transistor T4 may be defined as an initialization transistor.

[0146] The fifth transistor T5 may be electrically connected between the first voltage line VL1 and the first transistor T1. The fifth transistor T5 may include a first electrode connected to the first voltage line VL1, a second electrode connected to the first electrode of the first transistor T1, and a gate electrode connected to the jth emission control line EMLj.

[0147] The sixth transistor T6 may be electrically connected between the first transistor T1 and the light emitting element ED. The sixth transistor T6 may include a first electrode connected to the second electrode of the first transistor T1, a second electrode connected to the first electrode of the light emitting element ED, and a gate electrode connected to the jth emission control line EMLj.

[0148] The fifth transistor T5 and the sixth transistor T6 may be turned on in response to the jth emission control signal EMj transmitted through the jth emission control line EMLj. The emission time of the light emitting element ED may be controlled by the jth emission control signal EMj. When the fifth transistor T5 and the sixth transistor T6 are turned on, a driving current Id according to a voltage difference between a gate voltage of the gate electrode of the first transistor T1 and the first driving voltage ELVDD may be generated and supplied to the light emitting element ED through the sixth transistor T6, and thus the light emitting element ED may emit light. In an embodiment, the fifth transistor T5 and the sixth transistor T6 may be defined as emission control transistors.

[0149] The seventh transistor T7 may be electrically connected between the fourth voltage line VL4 supplied with the second initialization voltage VINT2 and the sixth transistor T6. The seventh transistor T7 may include a first electrode connected to the fourth voltage line VL4, a second electrode connected to the second electrode of the sixth transistor T6, and a gate electrode connected to the j-th black scan line SBLj. In an embodiment, the seventh transistor T7 may be defined as an initialization transistor.

[0150] The seventh transistor T7 may be turned on in response to the jth black scan signal SBj transmitted through the jth black scan line SBLj. A portion of the drive current Id may be discharged as a bypass current Ibp through the seventh transistor T7. When a black image is displayed, a current corresponding to the result of subtracting the bypass current Ibp flowing through the seventh transistor T7 from the drive current Id (i.e., the light emitting current Ied) is provided to the light emitting element ED, and thus a black image may be clearly displayed. That is, the display device 1000 (see FIG. 1 ) may be improved by realizing an accurate black brightness image through the seventh transistor T7. Figure 1 In an embodiment, the seventh transistor T7 may be turned on in response to the j-th black scan signal SBj having a low level as a bypass signal, but is not necessarily limited thereto.

[0151] One end of the capacitor Cst may be connected to the gate electrode of the first transistor T1, and the other end of the capacitor Cst may be connected to the first voltage line VL1. Charge corresponding to the voltage difference between the one end and the other end may be stored in the capacitor Cst. When the fifth transistor T5 and the sixth transistor T6 are turned on, the amount of current flowing to the first transistor T1 may be determined according to the voltage stored in the capacitor Cst.

[0152] Meanwhile, the configuration of the pixel driving circuit P_PD according to the embodiment of the present disclosure is not limited to Figure 7 The embodiment shown in . Figure 7 The configuration of the pixel driving circuit P_PD shown in FIG. 1 is only an example. In the embodiment, for example, the configuration of the pixel driving circuit P_PD may be modified and implemented.

[0153] The sensor FX may be connected to the dth readout line RLd, the jth write scan line SWLj, the reset control line RCL, and the switch signal line GTL among the readout lines RL1 to RLh. Here, "d" may be a natural number greater than 0.

[0154] The sensor driving circuit O_SD may include four transistors ST1 to ST4. The four transistors ST1 to ST4 may be a reset transistor ST1, an amplifying transistor ST2, an output transistor ST3, and a switching transistor ST4, respectively. Each of the reset transistor ST1, the amplifying transistor ST2, the output transistor ST3, and the switching transistor ST4 may be a transistor having an LTPS semiconductor layer or a transistor having an oxide semiconductor layer. In addition, each of the reset transistor ST1, the amplifying transistor ST2, the output transistor ST3, and the switching transistor ST4 may be a P-type transistor or an N-type transistor. In an embodiment, for example, the reset transistor ST1 may be an NMOS transistor having an oxide semiconductor layer, and each of the amplifying transistor ST2, the output transistor ST3, and the switching transistor ST4 may be a PMOS transistor having an LTPS semiconductor layer. However, this is merely an example. In an embodiment, for example, the embodiments of the transistors ST1 to ST4 included in the sensor driving circuit O_SD are not limited thereto.

[0155] The reset control line RCL may receive the reset control signal RST to transmit the reset control signal RST to the sensor FX, and the fifth voltage line VL5 may receive the reset voltage VRST to transmit the reset voltage VRST to the sensor FX.

[0156] The sensing element OPD may include a first electrode and a second electrode. The first electrode of the sensing element OPD may be connected to the first sensing node SN1, and the second electrode of the sensing element OPD may be connected to a second voltage line VL2 for receiving a second driving voltage ELVSS. The second electrode of the sensing element OPD may be electrically connected to a second electrode of the light emitting element ED. In an embodiment, for example, the second electrode of the sensing element OPD and the second electrode of the light emitting element ED may be integrated with each other to form a common cathode CE (see Figure 5 ). In an embodiment, the first electrode of the sensing element OPD may correspond to a sensing anode electrode, and the second electrode may correspond to a sensing cathode electrode. The sensing element OPD may include an organic photodiode.

[0157] Each of the transistors ST1 to ST4 of the sensor driving circuit O_SD may include a first electrode, a second electrode, and a gate electrode. According to an embodiment of the present disclosure, each of the first electrode and the second electrode may be defined as an input electrode or an output electrode (or a source electrode or a drain electrode).

[0158] The reset transistor ST1 may include a first electrode connected to a fifth voltage line VL5 for receiving a reset voltage VRST, a second electrode connected to the first sensing node SN1, and a gate electrode connected to a reset control line RCL for receiving a reset control signal RST. The reset transistor ST1 may reset the potential of the first sensing node SN1 to the reset voltage VRST in response to the reset control signal RST. The reset control signal RST may be a signal provided by the reset control line RCL. However, the embodiment is not limited thereto. In an embodiment, for example, the reset control signal RST may be a jth compensation scan signal SCj supplied by the jth compensation scan line SCLj. That is, according to an embodiment, the reset transistor ST1 may receive the jth compensation scan signal SCj supplied by the jth compensation scan line SCLj as the reset control signal RST.

[0159] As an example of the present disclosure, during at least the activation period of the reset control signal RST, the reset voltage VRST may have a voltage level lower than the second driving voltage ELVSS. The reset voltage VRST may be a DC voltage maintained at a voltage level lower than the second driving voltage ELVSS.

[0160] The amplifying transistor ST2 may include a first electrode receiving the sensing driving voltage SLVD, a second electrode connected to the second sensing node SN2, and a gate electrode connected to the first sensing node SN1. The amplifying transistor ST2 is turned on in response to the potential of the first sensing node SN1 to apply the sensing driving voltage SLVD to the second sensing node SN2.

[0161] The sensing drive voltage SLVD may correspond to one of the first drive voltage ELVDD, the first initialization voltage VINT1, and the second initialization voltage VINT2. When the sensing drive voltage SLVD corresponds to the first drive voltage ELVDD, the first electrode of the amplifying transistor ST2 may be electrically connected to the first voltage line VL1. When the sensing drive voltage SLVD corresponds to the first initialization voltage VINT1, the first electrode of the amplifying transistor ST2 may be electrically connected to the third voltage line VL3. When the sensing drive voltage SLVD corresponds to the second initialization voltage VINT2, the first electrode of the amplifying transistor ST2 may be electrically connected to the fourth voltage line VL4.

[0162] The output transistor ST3 may include a first electrode connected to the second sensing node SN2, a second electrode connected to the sub-readout line SRL, and a gate electrode receiving an output control signal. The output transistor ST3 may transmit the biosensing signal FSd to the sub-readout line SRL in response to the output control signal. The output control signal may be a j-th write scan signal SWj supplied through the j-th write scan line SWLj. That is, the output transistor ST3 may receive the j-th write scan signal SWj supplied from the j-th write scan line SWLj as the output control signal.

[0163] During the emission period of the light emitting element ED, the sensing element OPD of the sensor FX may be exposed to light output from the light emitting element ED.

[0164] The switching transistor ST4 may include a first electrode connected to the sub-readout line SRL, a second electrode connected to the third sensing node SN3, and a gate electrode receiving a switching signal GTj. The third sensing node SN3 may be connected to the dth readout line RLd. The switching transistor ST4 may send the biosensing signal FSd to the dth readout line RLd in response to the switching signal GTj. The switching signal GTj may be supplied through a switching signal line GTL. The switching signal line GTL may be connected to the sensor controller 200C. This will be described later.

[0165] A second electrode of the switch transistor ST4 of another adjacent sensor FX may be connected to the third sensing node SN3 .

[0166] According to an embodiment of the present disclosure, one d-th readout line RLd may be connected to a plurality of sensors FX. In an embodiment, for example, one d-th readout line RLd may be electrically connected to two sensors FX adjacent to each other in a row through a third sensing node SN3. Therefore, the number of wirings of the readout lines RL1 to RLh may be reduced. The number of wirings arranged in the peripheral area NDA (see FIG. 1 ) may be reduced. Figure 6 ) in the readout lines RL1 to RLh. Therefore, it is possible to provide a peripheral area NDA (see Figure 6 ) is effectively reduced in size (see Figure 1 ).

[0167] In addition, according to an embodiment of the present disclosure, the fingerprint controller ROC (see Figure 6 ) can be electrically connected to the readout lines RL1 to RLh. The sensor layer 200 can sense the external input 2000 (see Figure 3) to generate a sensing signal. The sensor controller 200C may generate a switching signal GTj based on the sensing signal. The switching transistor ST4 may provide a biometric sensing signal FSd to the readout lines RL1 to RLh based on the switching signal GTj, and the biometric sensing signal FSd may be provided to the fingerprint controller ROC (see Figure 6 ). That is, only the sensor FX to be operated can be driven by using the switching transistor ST4. Therefore, the fingerprint controller ROC (see Figure 6 ) can receive the biosensing signal FSd from the readout line electrically connected to the sensor FX to be operated among the plurality of readout lines RL1 to RLh. Since the number of readout lines RL1 to RLh sensed by the fingerprint controller ROC is reduced, the time required for sensing the biosensing signal FSd can be shortened. The time required to obtain biometric information can be reduced. Therefore, a display device 1000 with improved reliability can be provided (see Figure 1 ).

[0168] Meanwhile, the configuration of the sensor driving circuit O_SD according to the embodiment of the present disclosure is not limited to Figure 7 The embodiment shown in . Figure 7 The configuration of the sensor driving circuit O_SD shown in FIG. 1 is merely an example, and the configuration of the sensor driving circuit O_SD may be modified and implemented.

[0169] Figure 8 is a block diagram illustrating a sensor layer and a sensor controller according to an embodiment of the present disclosure.

[0170] refer to Figure 8 , the sensor layer 200 may include a plurality of sensing electrodes SE. The plurality of sensing electrodes SE may include a plurality of first sensing electrodes 210 and a plurality of second sensing electrodes 220. The plurality of second sensing electrodes 220 may cross the plurality of first sensing electrodes 210. Although not shown in the drawings, the sensor layer 200 may further include a plurality of signal wirings connected to the plurality of first sensing electrodes 210 and the plurality of second sensing electrodes 220.

[0171] The plurality of first sensing electrodes 210 may be arranged in the first direction DR1. Each of the plurality of first sensing electrodes 210 may extend in the second direction DR2. Each of the plurality of first sensing electrodes 210 may include a sensing pattern 211 and a bridge pattern 212. Two sensing patterns 211 adjacent to each other may be electrically connected to each other by two bridge patterns 212, but is not particularly limited thereto. The sensing pattern 211 may include a first conductive layer 204 (see Figure 5 ), and the bridge pattern 212 may be included in the first conductive layer 202 (see Figure 5 )middle.

[0172] The plurality of second sensing electrodes 220 may be arranged in the second direction DR2. Each of the plurality of second sensing electrodes 220 may extend in the first direction DR1. Each of the plurality of second sensing electrodes 220 may include a first portion 221 and a second portion 222. The two bridge patterns 212 may cross the second portion 222 in an insulating scheme. The first portion 221 and the second portion 222 may have a shape integral with each other and may be arranged on the same layer. In an embodiment, for example, the first portion 221 and the second portion 222 may be included in the second conductive layer 204 (see Figure 5 )middle.

[0173] The sensor controller 200C may receive the control signal I-CS, and may provide a coordinate signal I-SS and a switch signal GT.

[0174] The sensor controller 200C may be implemented as an integrated circuit ("IC"). The sensor controller 200C may be mounted on a separate circuit board PB (see Figure 2 ) and may be electrically connected to the sensor layer 200, or may be directly mounted in a predetermined area of ​​the sensor layer 200.

[0175] The sensor controller 200C may include a sensor control circuit 200C1 , a signal generating circuit 200C2 , and an input detecting circuit 200C3 .

[0176] The signal generating circuit 200C2 may output the transmission signal TS to the sensor layer 200, in an embodiment, for example, a plurality of first sensing electrodes 210. However, this is an example. In an embodiment, for example, the signal generating circuit 200C2 according to an embodiment of the present disclosure may send the transmission signal TS to a plurality of second sensing electrodes 220. The signal generating circuit 200C2 may sequentially output the transmission signal TS to the first sensing electrodes 210.

[0177] The input detection circuit 200C3 may receive a sensing signal SS from the sensor layer 200. In an embodiment, for example, the input detection circuit 200C3 may receive a sensing signal SS from a plurality of second sensing electrodes 220. However, this is an example. In an embodiment, for example, the input detection circuit 200C3 according to an embodiment of the present disclosure may receive a sensing signal SS from a plurality of first sensing electrodes 210.

[0178] The sensor control circuit 200C1 may convert an analog signal received from the input detection circuit 200C3 into a digital signal. In an embodiment, for example, the sensor control circuit 200C1 may reduce or remove noise of the received sensing signal SS in an analog format, may amplify and filter the signal in which the noise is reduced or removed, and may convert the filtered signal into a digital signal.

[0179] The sensor control circuit 200C1 may generate a switch signal GT based on the sensing signal SS. The sensor control circuit 200C1 may output the switch signal GT to the sensor FX (see Figure 7 ) of the switching transistor ST4 (see Figure 7 )’s switch signal line GTL.

[0180] Fig. 9 is a flowchart illustrating a method of driving a display device according to an embodiment of the present disclosure.

[0181] refer to Figure 3 , Figure 6 and Fig. 9 , the sensor layer 200 can detect external input 2000 (step S100).

[0182] The sensor controller 200C may detect the position of the external input 2000 (step S200 ).

[0183] The sensor controller 200C may generate a switch signal GT (step S300 ).

[0184] The sensor controller 200C may output the switch signal GT to the plurality of sensors FX (step S400 ).

[0185] Some of the plurality of sensors FX may be electrically connected to the fingerprint controller ROC (step S500 ).

[0186] The fingerprint controller ROC may obtain biometric information of the external input 2000 (step S600 ).

[0187] Fig.10 is a block diagram illustrating a display device provided with an external input according to an embodiment of the present disclosure. Fig.11 is a block diagram showing a plurality of sensors, a sensor controller, and a fingerprint controller according to an embodiment of the present disclosure. Fig.11 In the description of Figure 7 The same components are described herein and thus their description is omitted to avoid redundancy.

[0188] Fig.11 shows multiple sensors FX (see Figure 6 ) includes a first sensor FX1 arranged in a first area AA and a second sensor FX2 arranged in a second area BB.

[0189] refer to Figures 8 to 11, the external input 2000 may be provided to the active area 1000A of the display device 1000. In the active area 1000A, an area overlapping with the external input 2000 in a plan view may be defined as a first area AA, and an area not overlapping with the external input 2000 in a plan view may be defined as a second area BB. That is, the first area AA may be an area where the external input 2000 is detected, and the second area BB may be an area where the external input 2000 is not detected.

[0190] The sensor layer 200 may detect the external input 2000 (step S100). The transmission signal TS may be transmitted to the plurality of first sensing electrodes 210. The capacitance between the transmission signal TS and the external input 2000 may be changed. The sensing signal SS may be generated based on the change in capacitance. The sensing signal SS may be received from the plurality of second sensing electrodes 220.

[0191] The sensor layer 200 may provide a sensing signal SS to the sensor controller 200C.

[0192] The sensor controller 200C may calculate coordinate information of the input based on the sensing signal SS received from the sensor layer 200, and may then calculate the position of the external input 2000 based on the coordinate information. That is, the sensor controller 200C may detect the position of the external input 2000 based on the sensing signal SS (step S200).

[0193] Multiple Sensor FX (see Figure 6 Each of the sensors arranged in the first area AA among the plurality of sensors FX1 may be referred to as a “first sensor FX1”. Figure 6 ) each of the sensors arranged in the second area BB may be referred to as a “second sensor FX2”.

[0194] The readout line RL can be electrically connected to a plurality of sensors FX (see Figure 6 ) of each of at least two or more sensors FX1 and FX2.

[0195] According to an embodiment of the present disclosure, the display layer 100 (see Figure 6 ) of the peripheral region NDA (see Figure 6 ) can be reduced by the switch transistor ST4. That is, a circuit such as a multiplexer may not be required to reduce the number of readout lines RL in the display device 1000 (see Figure 1) The number of wirings provided to the fingerprint controller ROC. In addition, when the circuit is deleted, the resistance of the readout line RL can be reduced. In the biosensing signal FS sent through the readout line RL, the noise generated by the resistance can be effectively reduced or eliminated. Therefore, the display device 1000 with improved reliability can be provided.

[0196] The sensor controller 200C may generate a switch signal GT based on the sensing signal SS (step S300). The sensor controller 200C may determine the position of the external input 2000 and may generate the switch signal GT based on the position. In an embodiment, for example, the position may be calculated by coordinate information or the like.

[0197] In response to the switch signal GT, a plurality of sensors FX arranged in a region overlapping with the external input 2000 in a plan view may be driven (see Figure 6 ), and a plurality of sensors FX arranged in an area not overlapping with the external input 2000 in a plan view may not be driven (see Figure 6 ).

[0198] In addition, in response to the switch signal GT, a plurality of sensors FX can be driven in a time division method (see Figure 6 ). In an embodiment, for example, the fingerprint controller ROC may receive a biosensing signal of one sensor according to an on / off operation of the switch transistor ST4, and may then receive a biosensing signal of another adjacent sensor connected through the third sensing node SN3.

[0199] According to the embodiment of the present disclosure, due to the time division driving, the number of cells arranged on the display layer 100 (see Figure 6 ) of the peripheral region NDA (see Figure 6 ) in the readout line RL. Therefore, it is possible to provide a peripheral area NDA (see Figure 6 ) is effectively reduced in size (see Figure 1 ).

[0200] In addition, according to the embodiments of the present disclosure, the peripheral area NDA (see Figure 6 ), thereby reducing or eliminating short circuits among the readout lines RL adjacent to each other in a process of manufacturing the display device 1000. Therefore, the display device 1000 having improved reliability can be provided.

[0201] The sensor controller 200C may output a switch signal GT to the plurality of sensors FX1 and FX2 (step S400 ).

[0202] In response to the switching signal GT, the switching transistor ST4 of the first sensor FX1 may be turned on, and the switching transistor ST4 of the second sensor FX2 may be turned off.

[0203] In an embodiment, for example, a plurality of first sensors FX1 may be provided. Figure 6 ) in which the switching transistor ST4 included in each of the plurality of first sensors FX1 overlapping the external input 2000 when viewed from above the plane may be turned on in response to the switching signal GT. In an embodiment, for example, a plurality of second sensors FX2 may be provided. Figure 6 ) The switching transistor ST4 included in each of the plurality of second sensors FX2 that do not overlap the external input 2000 when viewed from above the plane may be turned off in response to the switching signal GT.

[0204] The first sensor FX1 may be electrically connected to the fingerprint controller ROC (step S500). The biometric sensing signal FS generated by the first sensor FX1 may be output to the fingerprint controller ROC. Based on the biometric sensing signal FS obtained by the first sensor FX1, the fingerprint controller ROC may obtain biometric information of the external input 2000 provided to the first area AA (step S600).

[0205] According to an embodiment of the present disclosure, the fingerprint controller ROC can only receive information from multiple sensors FX (see Figure 6 ) that overlaps with the external input 2000 on a plane receives the biometric sensing signal FS. Since the number of readout lines RL sensed by the fingerprint controller ROC is reduced, the time required to sense the biometric sensing signal FS can be shortened. The time required to obtain biometric information can be effectively reduced. Therefore, a display device 1000 with improved reliability can be provided.

[0206] Fig.12 is a cross-sectional view showing a light emitting element and a sensing element of a display layer according to an embodiment of the present disclosure. Fig.12 In the description of Figure 2 and 5 The same components are described herein and thus their description is omitted to avoid redundancy.

[0207] refer to Fig.12, the first electrode layer may be arranged on the circuit layer 120. The pixel defining layer PDL may be arranged on the first electrode layer and the circuit layer 120. The first electrode layer may include a first anode to a third anode AE1, AE2, and AE3. The first opening to the third opening OP1, OP2, and OP3 of the pixel defining layer PDL may expose at least a portion of the first anode to the third anode AE1, AE2, and AE3, respectively. In an embodiment of the present disclosure, the pixel defining layer PDL may further include a black material. The pixel defining layer PDL may further include a black organic dye / pigment such as carbon black or aniline black. The pixel defining layer PDL may be formed by mixing a blue organic material and a black organic material. The pixel defining layer PDL may further include a liquid-repellent organic material.

[0208] The display layer 100 may include first to third emission areas PXA-R, PXA-G, and PXA-B and first to third non-emission areas NPXA-R, NPXA-G, and NPXA-B adjacent to the first to third emission areas PXA-R, PXA-G, and PXA-B, respectively. The non-emission areas NPXA-R, NPXA-G, and NPXA-B may surround the corresponding emission areas PXA-R, PXA-G, and PXA-B, respectively. In an embodiment, the first emission area PXA-R may be defined as a partial area exposed by the first opening OP1 corresponding to the first anode AE1. The second emission area PXA-G may be defined as a partial area exposed by the second opening OP2 corresponding to the second anode AE2. The third emission area PXA-B may be defined as a partial area exposed by the third opening OP3 corresponding to the third anode AE3. The non-pixel area NPA may be defined between the first to third non-emission areas NPXA-R, NPXA-G, and NPXA-B.

[0209] The light emitting layer may be arranged on the first electrode layer. The light emitting layer may include first to third light emitting layers EML1 to EML3. The first to third light emitting layers EML1 to EML3 may be arranged in regions corresponding to the first to third openings OP1, OP2, and OP3, respectively. Each of the first to third light emitting layers EML1 to EML3 may include an organic material and / or an inorganic material. The first to third light emitting layers EML1 to EML3 may generate light of a predetermined color. In an embodiment, for example, the first light emitting layer EML1 may generate red light, the second light emitting layer EML2 may generate green light, and the third light emitting layer EML3 may generate blue light.

[0210] In the embodiment, patterned first to third light-emitting layers EML1 to EML3 are shown. However, one light-emitting layer may be arranged in the first to third emission regions PXA-R, PXA-G, and PXA-B. In this case, the light-emitting layer may generate white light or blue light. In addition, the light-emitting layer may have a multilayer structure called "tandem".

[0211] Alternatively, each of the first to third light-emitting layers EML1 to EML3 may include a low molecular weight organic material or a high molecular weight organic material as a light-emitting material. Alternatively, each of the first to third light-emitting layers EML1 to EML3 may include a quantum dot material as a light-emitting material. The core of the quantum dot may be selected from II-VI group compounds, III-V group compounds, IV-VI group compounds, IV group elements, IV group compounds, and combinations thereof.

[0212] The second electrode layer may be arranged on the light emitting layer. The second electrode layer may include the first cathode to the third cathode CE1, CE2 and CE3. The first cathode to the third cathode CE1, CE2 and CE3 may be electrically connected to each other. As an example of the present disclosure, the first cathode to the third cathode CE1, CE2 and CE3 may be integrated with each other. In this case, the first cathode to the third cathode CE1, CE2 and CE3 may be arranged together in the first emission area to the third emission area PXA-R, PXA-G and PXA-B, the first non-emission area to the third non-emission area NPXA-R, NPXA-G and NPXA-B and the non-pixel area NPA.

[0213] The light emitting element layer 130 may further include sensing elements OPD. Each of the sensing elements OPD may include an organic photodiode. A fourth opening OP4 provided to correspond to the sensing element OPD may be further defined in the pixel defining layer PDL.

[0214] Each of the sensing elements OPD may include a fourth anode AE4, a photoelectric conversion layer ORL, and a fourth cathode CE4. The fourth anode AE4 may be arranged at the same layer as the first electrode layer. That is, the fourth anode AE4 is arranged on the circuit layer 120 and may be formed simultaneously with the first to third anodes AE1, AE2, and AE3 through the same process.

[0215] The fourth opening OP4 of the pixel defining layer PDL may expose at least a portion of the fourth anode AE4. The photoelectric conversion layer ORL may be arranged on the fourth anode AE4 exposed by the fourth opening OP4. The photoelectric conversion layer ORL may include an organic light sensing material. The fourth cathode CE4 may be arranged on the photoelectric conversion layer ORL. The fourth cathode CE4 may be formed simultaneously with the first cathode CE1 to the third cathode CE3 by the same process. As an example of the present disclosure, the fourth cathode CE4 may be integrated with the first cathode CE1 to the third cathode CE3.

[0216] Each of the fourth anode AE4 and the fourth cathode CE4 may receive an electrical signal. The fourth cathode CE4 may receive a signal different from the signal of the fourth anode AE4. Therefore, a predetermined electric field may be formed between the fourth anode AE4 and the fourth cathode CE4. The photoelectric conversion layer ORL may generate an electrical signal corresponding to the light incident on the sensor. The photoelectric conversion layer ORL may generate charges by absorbing the energy of the incident light. In an embodiment, for example, the photoelectric conversion layer ORL may include a photosensitive semiconductor material.

[0217] The charges generated by the photoelectric conversion layer ORL change the electric field between the fourth anode AE4 and the fourth cathode CE4. The amount of charges generated by the photoelectric conversion layer ORL may change depending on whether light is incident on the sensing element OPD or depending on the amount and intensity of light incident on the sensing element OPD. Therefore, the electric field formed between the fourth anode AE4 and the fourth cathode CE4 may change. The sensing element OPD according to an embodiment of the present disclosure may obtain the fingerprint information of the user by changing the electric field between the fourth anode AE4 and the fourth cathode CE4.

[0218] However, this is shown by way of example. Each of the sensing elements OPD may include a phototransistor using the photoelectric conversion layer ORL as an active layer. In this case, each of the sensing elements OPD may obtain fingerprint information by sensing the amount of current flowing through the phototransistor. Each of the sensing elements OPD according to an embodiment of the present disclosure may include various photoelectric conversion elements capable of generating electrical signals in response to changes in the amount of light, but is not limited to the embodiments.

[0219] According to the embodiment of the present disclosure, since the configuration for obtaining biological information is included in the display layer 100, the display device 1000 (see Figure 1 ) may not require a separate electronic module for obtaining biometric information. In an embodiment, for example, the electronic module may include an ultrasonic fingerprint sensor. Figure 1 ) may not require a separate space for accommodating an electronic module. The manufacture of the display device 1000 (see Figure 1 ) process.

[0220] Display device 1000 (see Figure 1 ) may include a sensor layer 200 disposed on the display layer 100 and a color filter layer CFL disposed on the sensor layer 200 .

[0221] The color filter layer CFL may be directly disposed on the cover insulating layer 205. The color filter layer CFL may include a first color filter CF_R, a second color filter CF_G, and a third color filter CF_B. The first color filter CF_R has a first color, the second color filter CF_G has a second color, and the third color filter CF_B has a third color. As an example of the present disclosure, the first color may be red, the second color may be green, and the third color may be blue.

[0222] The color filter layer CFL may further include a dummy color filter DCF. As an example of the present disclosure, when the area where the photoelectric conversion layer ORL is arranged is defined as the sensing area SA and the periphery of the sensing area SA is defined as the non-sensing area NSA, the dummy color filter DCF may be arranged to correspond to the sensing area SA. The dummy color filter DCF may overlap with the sensing area SA and the non-sensing area NSA in a plan view. As an example of the present disclosure, the dummy color filter DCF may have the same color as one of the first to third color filters CF_R, CF_G, and CF_B. As an example of the present disclosure, the dummy color filter DCF may have the same green color as the second color filter CF_G.

[0223] The color filter layer CFL may further include a black matrix BM. The black matrix BM may be arranged to correspond to the non-pixel area NPA. The black matrix BM may be arranged to overlap with the first conductive layer 202 and the second conductive layer 204 in the non-pixel area NPA in a plan view. As an example of the present disclosure, the black matrix BM may overlap with the non-pixel area NPA and the first to third non-emission areas NPXA-R, NPXA-G, and NPXA-B. In a plan view, the black matrix BM may not overlap with the first to third emission areas PXA-R, PXA-G, and PXA-B.

[0224] The color filter layer CFL may further include a protective layer OCL. The protective layer OCL may include an organic insulating material. The protective layer OCL may have a thickness sufficient to eliminate the steps between the first to third color filters CF_R, CF_G, and CF_B. The material of the protective layer OCL may not be particularly limited as long as the material can planarize the upper surface of the color filter layer CFL having a given thickness, and may include, for example, an acrylate organic material in an embodiment.

[0225] The window WM may be arranged on the overlay layer OCL.

[0226] Fig.13A display device provided with an external input according to an embodiment of the present disclosure is shown. Fig.13 In the description of Fig.12 The same components are described herein and thus their description is omitted to avoid redundancy.

[0227] refer to Figure 6 , Fig.10 and Fig.13 , the driving controller 100C may control the plurality of pixels PX arranged in the first area AA overlapping the external input 2000 to emit light.

[0228] Each of the first to third light emitting elements ED_R, ED_G, and ED_B arranged in the first area AA may emit light. The first light emitting element ED_R emits a first light, the second light emitting element ED_G emits a second light, and the third light emitting element ED_B emits a third light. Here, the first light Lr1 may be light in a red band, the second light Lg1 may be light in a green band, and the third light may be light in a blue band.

[0229] Each of the sensing elements OPD can receive light from a specific light-emitting element (e.g., a second light-emitting element ED_G) among the first to third light-emitting elements ED_R, ED_G, and ED_B. That is, each of the sensing elements OPD can receive the second reflected light Lg2 from the second light Lg1 output from the second light-emitting element ED_G reflected by the fingerprint of the user. The second light Lg1 and the second reflected light Lg2 can be light in the green band. The dummy color filter DCF is arranged on the sensing element OPD. The dummy color filter DCF can have a green color. Therefore, the second reflected light Lg2 can pass through the dummy color filter DCF and can be incident on the sensing element OPD.

[0230] At the same time, the first light Lr1 and the third light output from the first light emitting element ED_R and the third light emitting element ED_B, respectively, may also be reflected by the external input 2000. In an embodiment, for example, when the light obtained by reflecting the first light Lr1 output by the first light emitting element ED_R from the external input 2000 is defined as the first reflected light Lr2, the first reflected light Lr2 may be absorbed without passing through the dummy color filter DCF. Therefore, the first reflected light Lr2 may not pass through the dummy color filter DCF, and therefore may not be incident on the sensing element OPD. Similarly, even if the third light is reflected by the external input 2000, the third light may be absorbed by the dummy color filter DCF. Therefore, only the second reflected light Lg2 may be provided to the sensing element OPD. The external input 2000 may include a user's hand, and the biometric information detected by the external input 2000 may include a fingerprint of the user's hand.

[0231] According to an embodiment of the present disclosure, in response to the switch signal GT and the switch transistor ST4 (see Fig.11 ) switching operation, the fingerprint controller ROC can only receive data from multiple sensors FX (see Figure 6 ) in the plane that overlaps with the external input 2000 receives the biosensing signal FS. That is, the fingerprint controller ROC can receive the biosensing signal FS only from the multiple sensors FX arranged in the first area AA. In this case, the driving controller 100C can control only the multiple pixels PX arranged in the first area AA to emit light. That is, because the pixels PX overlapping with the second area BB in the plan view do not emit light, power consumption can be effectively reduced compared with the case where the entire active area 1000A emits light.

[0232] FIG. 14A to FIG. 14C is a circuit diagram showing the operation of the first sensor according to an embodiment of the present disclosure. Figures 14A to 14C In the description of Fig.11 The same components are described herein and thus their description is omitted to avoid redundancy.

[0233] refer to Fig. 9 and FIG. 14A to FIG. 14C , get external input 2000 (see Fig.10 The step S600 of obtaining biological information of the sensor may include: a sensor initialization step, in which the reset transistor ST1 is turned on; a sensor activation step, in which the sensing element OPD receives an input signal from the outside 2000 (see Fig.10 ) reflected by the second reflected light Lg2 (see Fig.13 ); and a sensor sensing step, in which the amplifying transistor ST2 and the output transistor ST3 are turned on, and the bio-sensing signal FS is provided to the readout line RL.

[0234] refer to Fig.14A , when a high-level reset control signal RST is supplied through the reset control line RCL in the sensor initialization step, the reset transistor ST1 may be turned on. The sensor initialization step may be defined as an activation period (i.e., a high-level period) of the reset control line RCL. However, the embodiment is not limited thereto. In another embodiment, for example, when the reset transistor ST1 is a PMOS transistor, a low-level reset control signal RST may be supplied to the reset control line RCL during the reset period. During the reset period, the potential of the first sensing node SN1 may be reset to a potential corresponding to the reset voltage VRST.

[0235] refer to Figure 7 and Fig. 14BIn the sensor activation step, the sensing element OPD of the sensor FX may be exposed to light output from the light emitting element ED during the emission period of the light emitting element ED. Fig.10 The external input 2000 in the display device 1000 (see Figure 1 ), the sensing element OPD may generate photocharges corresponding to light reflected by the ridges of the fingerprint or the valleys between the ridges of the fingerprint. The amount of current flowing through the sensing element OPD may be changed by the generated photocharges.

[0236] refer to Figure 7 and Fig. 14C In the sensor sensing step, the amplifying transistor ST2 may be a source follower amplifier that generates a source-drain current proportional to the potential of the first sensing node SN1 input to the gate electrode of the amplifying transistor ST2. When the j-th write scanning signal SWj having a low level is supplied to the output transistor ST3, the output transistor ST3 may be turned on and may output a biosensing signal FS corresponding to the current flowing through the amplifying transistor ST2 to the sub-readout line SRL.

[0237] In this case, in the sensor controller 200C, the switch signal GT can be output to the plurality of sensors FX (see Figure 6 ) in a plane overlapping with the external input 2000, so that the switching transistor ST4 is turned on.

[0238] The biometric sensing signal FS can be provided to the fingerprint controller ROC through the readout line RL. The fingerprint controller ROC can process the biometric sensing signal FS. The processed biometric sensing signal S_FS (see Figure 6 ) can be provided to the drive controller 100C (see Figure 6 ). Drive controller 100C (see Figure 6 ) can be based on the biosensing signal S_FS (see Figure 6 ) to identify biological information.

[0239] Fig.15 is a block diagram of a display device according to an embodiment of the present disclosure. Fig.16 is a block diagram showing a plurality of sensors, a sensing circuit, a multiplexer, and a fingerprint controller according to an embodiment of the present disclosure. Fig.15 In the description of Figure 6 The same components as described above are described herein, and thus their description is omitted to avoid redundancy. Fig.16 In the description of Fig.11 The same components are described herein and thus their description is omitted to avoid redundancy.

[0240] refer to Figure 2 , Fig.15 and Fig.16 , the display layer 100 may further include a sensing circuit DTC arranged in the peripheral area NDA.

[0241] The sensing circuit DTC can be directly from the sensor layer 200 (see Figure 8 ) receives the sensing signal SS. That is, the sensing circuit DTC can receive the sensing signal SS without passing through the sensor controller 200C.

[0242] The sensing circuit DTC may generate a switch signal GT-1 based on the sensing signal SS. In an embodiment, for example, the sensing circuit DTC may sense the external input 2000 (see Figure 3 ) and can be based on external input 2000 (see Figure 3 ) position and determines the switch transistor ST4 of the sensor FX to be driven. In this way, the sensing circuit DTC can generate a switch signal GT-1 for driving the switch transistor ST4.

[0243] The sensing circuit DTC may be disposed in a region adjacent to the data driver DIC.

[0244] According to an embodiment of the present disclosure, compared with a case where a switch signal is generated by a sensor controller 200C located on a circuit board PB and the switch signal is transmitted to a switch transistor ST4, a distance for transmitting a signal can be relatively reduced, thereby reducing a time required for sensing a biosensing signal FS. The time required for obtaining bio-information can be reduced. Therefore, a display device 1000 with improved reliability can be provided.

[0245] In the active area 1000A (see Figure 1 ) in the plan view with external input 2000 (see Figure 3 ) can be defined as a first area AA, and does not overlap with the external input 2000 (see Figure 3 ) can be defined as the second area BB. That is, the first area AA can be the area where the external input 2000 is detected (see Figure 3 ) zone, and the second zone BB may be a zone where no external input is detected 2000 (see Figure 3 ) area.

[0246] Display device 1000 (see Figure 1 ) may further include a multiplexer MP connected between the readout line RL and the fingerprint controller ROC. The fingerprint controller ROC and the multiplexer MP may be included in the display layer 100.

[0247] There may be a plurality of readout lines RL. The multiplexer MP may connect the plurality of readout lines RL to a pad wiring electrically connected to the fingerprint controller ROC in a P:1 manner ("P" is an integer greater than or equal to 2) in response to a MUX control signal. In an embodiment, for example, the multiplexer MP may sequentially connect "P" readout lines RL to one pad wiring in response to a MUX control signal. The plurality of readout lines RL may be driven in a time-division manner by the multiplexer MP.

[0248] According to an embodiment of the present disclosure, compared with a case where a plurality of readout lines RL are directly connected to the fingerprint controller ROC through a multiplexer MP, pad wiring reduced by 1 / P can be electrically connected to the fingerprint controller ROC. The number of wirings arranged in the peripheral area NDA of the display layer 100 can be reduced. Therefore, a display device 1000 (see FIG. 1 ) in which the area size of the peripheral area NDA is effectively reduced can be provided. Figure 1 ).

[0249] However, this is an example, and the multiplexer MP according to the embodiment of the present disclosure may be omitted.

[0250] The sensing circuit DTC may output a switching signal GT- 1 to the switching transistor ST4 .

[0251] In response to the switching signal GT- 1 , the switching transistor ST4 of the first sensor FX1 may be turned on, and the switching transistor ST4 of the second sensor FX2 may be turned off.

[0252] The first sensor FX1 may be electrically connected to the fingerprint controller ROC. The biometric sensing signal FS generated by the first sensor FX1 may be output to the fingerprint controller ROC. Based on the biometric sensing signal FS obtained by the first sensor FX1, the fingerprint controller ROC may obtain biometric information of the external input 2000 provided to the first area AA.

[0253] According to an embodiment of the present disclosure, the fingerprint controller ROC can only receive the external input 2000 (see Figure 3 ) overlapped sensors receive the biosensing signal FS. Since the number of readout lines RL sensed by the fingerprint controller ROC is reduced, the time required for sensing the biosensing signal FS can be shortened. The time required to obtain bio-information can be effectively reduced. Therefore, even if the sensing time increases when the display device 1000 is driven in a time-division manner while including the multiplexer MP, the total sensing time can be maintained or reduced. Therefore, the display device 1000 with improved reliability can be provided.

[0254] Although the embodiments of the present disclosure are described for illustrative purposes, it will be appreciated by those skilled in the art that various modifications and substitutions are possible without departing from the scope and spirit of the present disclosure disclosed in the claims. Therefore, the technical scope of the present disclosure is not limited to the detailed description of this specification, but should be defined by the claims.

[0255] As described above, one readout line can be connected to a plurality of sensors. In an embodiment, for example, one readout line can be electrically connected to two sensors adjacent to each other in a row through a third sensing node. Therefore, the number of wirings of the readout line can be reduced. The number of readout lines arranged in the peripheral area can be effectively reduced. Therefore, a display device having a reduced peripheral area size can be provided.

[0256] In addition, as described above, the fingerprint controller can be electrically connected to the readout line. The sensor layer can generate a sensing signal by detecting an external input. The sensor controller can generate a switching signal based on the sensing signal. The switching transistor can provide a biosensing signal to the readout line based on the switching signal, and the biosensing signal can be provided to the fingerprint controller. That is, only the sensor to be operated can be driven by using a switching transistor. Therefore, the fingerprint controller can receive the biosensing signal only from the readout line electrically connected to the sensor to be operated among the multiple readout lines. Since the number of readout lines sensed by the fingerprint controller is reduced, the time required for sensing the biosensing signal can be shortened. The time required to obtain biometric information can be effectively reduced. Therefore, a display device with improved reliability can be provided.

[0257] While the present disclosure has been described with reference to the embodiments thereof, it will be apparent to those skilled in the art that various changes and modifications may be made thereto without departing from the spirit and scope of the present disclosure as set forth in the claims.

Claims

1. A display device, include: Display layer; as well as A sensor layer, configured to sense external input and arranged on the display layer, characterized in that: The display layer comprises: a plurality of pixels, each of the plurality of pixels comprising a light emitting element and a pixel driving circuit connected to the light emitting element; and a plurality of sensors, each of the plurality of sensors comprising a sensing element and a sensor driving circuit connected to the sensing element, Wherein, the sensor driving circuit comprises: a reset transistor including a first electrode for receiving a reset voltage, a second electrode connected to the first sensing node, and a third electrode for receiving a first scan signal; an amplifying transistor including a first electrode for receiving a first driving voltage, a second electrode connected to a second sensing node, and a third electrode connected to the first sensing node; an output transistor including a first electrode connected to the second sensing node, a second electrode connected to the sub-readout line, and a third electrode for receiving a second scan signal; and The switch transistor includes a first electrode connected to the sub-readout line, a second electrode connected to the readout line, and a third electrode for receiving a switch signal generated based on the external input.

2. The display device according to claim 1, in, The sensor layer includes a plurality of first sensing electrodes and a plurality of second sensing electrodes crossing the plurality of first sensing electrodes. Wherein, the display device further comprises: A sensor controller is configured to drive the sensor layer and includes a signal generating circuit configured to send a transmission signal to the plurality of first sensing electrodes, an input detecting circuit configured to receive a sensing signal from the plurality of second sensing electrodes, and a sensor control circuit.

3. The display device according to claim 2, in, The sensor controller generates the switch signal based on the sensing signal, and The sensor controller outputs the switch signal to the switch transistor.

4. The display device according to claim 2, in, The sensor controller senses the external input based on the sensing signal, and The switching transistor included in each of the sensors overlapping the external input in a plan view among the plurality of sensors is turned on in response to the switching signal.

5. The display device according to claim 4, in, The switching transistor included in each of the sensors that do not overlap the external input in the plan view among the plurality of sensors is turned off in response to the switching signal.

6. The display device according to claim 4, It is characterized in that The display device further comprises: a driving controller configured to drive the display layer, The driving controller controls pixels among the plurality of pixels that overlap with the external input to emit light.

7. The display device according to claim 1, in, The display layer further comprises: a fingerprint controller electrically connected to the plurality of sensors; and A multiplexer is connected between the plurality of readout lines and the fingerprint controller.

8. The display device according to claim 1, in, wherein an active area in which the plurality of pixels are arranged and a peripheral area adjacent to the active area are defined in the display layer, Wherein, the display layer further comprises: a sensing circuit disposed in the peripheral region, The sensing circuit generates the switch signal based on the sensing signal, and The sensing circuit outputs the switching signal to the switching transistor.

9. The display device according to claim 1, in, The pixel driving circuit comprises: a first transistor connected between the light emitting element and a first voltage line for receiving the first driving voltage; a second transistor connected between the data line and the first electrode of the first transistor and configured to receive the second scanning signal; a third transistor connected between the second electrode of the first transistor and the first node and configured to receive the first scan signal; and a fourth transistor connected between the first node and the initialization voltage line and configured to receive a third scan signal, and The third transistor and the fourth transistor have a transistor type different from a transistor type of the first transistor and the second transistor.

10. The display device according to claim 9, in, The reset transistor has a same transistor type as the transistor types of the third transistor and the fourth transistor.

Images