Power management system and display device
By using a boost circuit and a combination of charge pump module, voltage amplification module and voltage stabilization module in the power management system, a relatively small data driving voltage is generated, which solves the problem of poor gate opening voltage safety in the existing technology, and improves the Voltage stability and safety.
Patent Information
- Application Number
- CN202421010190.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-10
- Publication Date
- 2024-12-24
- Estimated Expiration
- 2034-05-10
AI Technical Summary
In the prior art, the safety of generating gate opening voltage is poor, resulting in a higher operating temperature of the components.
A power management system is designed, including a power management chip and a boost circuit, which outputs the common electrode voltage through a common pin group, and uses the boost circuit to combine it with a charge pump module, a voltage amplification module, and a voltage stabilization module to generate relative data. The gate opening voltage with a smaller driving voltage improves the stability and safety of the voltage.
By reducing the operating temperature of the boost circuit, the stability and safety of the generated gate opening voltage are improved, and the problem of excessive temperature due to excessive data driving voltage is avoided.
Smart Images
Figure CN222233281U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display driving technology, and in particular to a power management system and a display device. Background Art
[0002] In the related art, the power management system provides various voltages for the display device, such as the power supply voltage VDD, the analog voltage AVDD, the gate-on voltage VGH, the gate-off voltage VGL, the data drive voltage VAA, and the common electrode voltage VCOM, so as to drive the liquid crystal display device to display the picture. Among them, the gate-on voltage VGH is usually generated by the data drive voltage VAA. However, due to the excessive data drive voltage VAA, the operating temperature of the components that use the data drive voltage VAA to generate the gate-on voltage VGH is high, and the safety is poor. Utility Model Content
[0003] In view of the deficiencies in the prior art, the present application provides a power management system and a display device, aiming to solve the technical problem of poor safety in generating gate turn-on voltage in the prior art.
[0004] To solve the above problems, in a first aspect, the present application provides a power management system for providing voltage to a display panel, the power management system comprising:
[0005] A power management chip, comprising a common pin group, the common pin group comprising a first common pin and a second common pin for outputting a common electrode voltage, the first common pin being electrically connected to a common electrode of the display panel to provide the common electrode voltage to the common electrode;
[0006] The boost circuit is configured to boost the common electrode voltage output by the second common pin, the input end of the boost circuit is electrically connected to the second common pin, and the output end of the boost circuit is electrically connected to the input end of the gate driving module of the display panel.
[0007] Further, in the power management system, the boost circuit includes a charge pump module;
[0008] The charge pump module is configured to boost the voltage output by the second common pin, the input end of the charge pump module is electrically connected to the second common pin, and the output end of the charge pump module is electrically connected to the input end of the gate driving module of the display panel.
[0009] Furthermore, in the power management system, the boost circuit further includes a voltage amplification module;
[0010] Among them, the voltage amplification module is configured to amplify the voltage output by the output end of the charge pump module, the input end of the voltage amplification module is electrically connected to the output end of the charge pump module, and the output end of the voltage amplification module is electrically connected to the input end of the gate driving module of the display panel.
[0011] Furthermore, in the power management system, the power management chip also includes a first output end, and the first output end is electrically connected to the control end of the charge pump module.
[0012] Furthermore, in the power management system, the charge pump module includes: a first diode, a second diode, a third diode, a fourth diode, a fifth diode, a sixth diode, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor and a sixth capacitor;
[0013] Wherein, the anode of the first diode is electrically connected to the second common pin; the cathode of the first diode is electrically connected to the anode of the second diode and one end of the first capacitor respectively; the cathode of the second diode is electrically connected to one end of the second capacitor and the anode of the third diode respectively; the cathode of the third diode is electrically connected to one end of the third capacitor and the anode of the fourth diode respectively; the cathode of the fourth diode is electrically connected to one end of the fourth capacitor and the anode of the fifth diode respectively; the cathode of the fifth diode is electrically connected to one end of the fifth capacitor and the anode of the sixth diode respectively; the cathode of the sixth diode is electrically connected to one end of the sixth diode and the input end of the gate driving module of the display panel respectively;
[0014] The other end of the first capacitor, the other end of the third capacitor, and the other end of the fourth capacitor are all electrically connected to the first output end; the other end of the second capacitor, the other end of the fourth capacitor, and the other end of the sixth capacitor are all grounded.
[0015] Furthermore, in the power management system, the power management chip also includes a second output end, and the second output end is electrically connected to the control end of the voltage amplification module.
[0016] Furthermore, in the power management system, the voltage amplification module includes a triode, a first resistor and a second resistor;
[0017] Among them, the emitter of the transistor is electrically connected to the output end of the charge pump module and one end of the first resistor, the collector of the transistor is electrically connected to the input end of the gate driving module of the display panel, the base of the transistor is electrically connected to the other end of the first resistor and one end of the second resistor, and the other end of the second resistor is electrically connected to the second output end.
[0018] Furthermore, in the power management system, the boost circuit further includes a voltage stabilization module;
[0019] Among them, the input end of the voltage stabilizing module is electrically connected to the output end of the voltage amplifying module, the output end of the voltage stabilizing module is electrically connected to the input end of the gate driving module of the display panel, and the voltage stabilizing module is configured to output a stable voltage output by the output end of the voltage amplifying module.
[0020] Furthermore, in the power management system, the voltage stabilizing module includes a voltage stabilizing diode, a seventh capacitor, an eighth capacitor, a ninth capacitor and a third resistor;
[0021] Among them, the positive electrode of the voltage-stabilizing diode, one end of the seventh capacitor, one end of the eighth capacitor, one end of the ninth capacitor and one end of the third resistor are respectively electrically connected to the output end of the voltage amplification module and the input end of the gate driving module of the display panel; the negative electrode of the voltage-stabilizing diode, the other end of the seventh capacitor, the other end of the eighth capacitor, the other end of the ninth capacitor and the other end of the third resistor are all grounded.
[0022] In a second aspect, the present application further provides a display device, which includes a display panel, a driving system, and the power management system described in the first aspect.
[0023] The power management system provided in the present application is used to provide voltage to the display panel, and includes a power management chip and a boost circuit. The power management chip includes a common pin group, and the common pin group includes a first common pin and a second common pin for outputting a common electrode voltage. The first common pin is electrically connected to the common electrode of the display panel to provide the common electrode voltage to the common electrode; the boost circuit is configured to boost the common electrode voltage output by the second common pin, the input end of the boost circuit is electrically connected to the second common pin, and the output end of the boost circuit is electrically connected to the input end of the gate drive module of the display panel, thereby realizing the use of a voltage smaller than the data drive voltage in the boost circuit to generate a gate turn-on voltage, thereby improving the stability and safety of the gate turn-on voltage. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0025] Figure 1 A schematic block diagram of a power management system provided in an embodiment of the present application;
[0026] Figure 2 A schematic block diagram of a power management chip provided in an embodiment of the present application;
[0027] Figure 3 A schematic block diagram of a boost circuit provided in an embodiment of the present application;
[0028] Figure 4 A circuit diagram of a boost circuit provided in an embodiment of the present application;
[0029] Figure 5 A schematic block diagram of a display device provided in an embodiment of the present application. DETAILED DESCRIPTION
[0030] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0031] It should be understood that when used in this specification and the appended claims, the terms "include" and "comprises" indicate the presence of described features, integers, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or combinations thereof.
[0032] It should also be understood that the terms used in this application specification are only for the purpose of describing specific embodiments and are not intended to limit the application. As used in this application specification and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.
[0033] It should be further understood that the term “and / or” used in the specification and appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations.
[0034] See also Figure 1 , Figure 1 This is a schematic block diagram of a power management system provided in an embodiment of the present application. Figure 1 As shown, a power management system 100 is used to provide voltage to a display panel. The power management system 100 includes:
[0035] The power management chip 101 includes a common pin group, the common pin group includes a first common pin and a second common pin for outputting a common electrode voltage VCOM, the first common pin is electrically connected to a common electrode of the display panel to provide the common electrode voltage VCOM to the common electrode;
[0036] The boost circuit 102 is configured to boost the common electrode voltage VCOM outputted from the second common pin. The input end of the boost circuit 102 is electrically connected to the second common pin, and the output end of the boost circuit 102 is electrically connected to the input end of the gate driving module of the display panel.
[0037] In this embodiment, the common electrode voltage VCOM output by the first common pin and the second common pin in the common pin group of the power management chip 101 is lower than the data driving voltage VAA. After the common electrode voltage VCOM is input into the boost circuit 102, the operating temperature of the boost circuit 102 can be reduced, thereby improving the stability and safety of generating the gate turn-on voltage VGH.
[0038] Among them, the power management chip 101 can use Figure 2 It is implemented by the power management chip (PMIC, Power Management IC) shown in the figure.
[0039] like Figure 2 As shown, the model of the power management chip 101 may be CS601, which includes pin CLK_ON, pin CLK_OFF, pin STV, pin NC_6, pin LC, pin AGND_1, pin VSS, pin NC_7, pin VGL, pin DRVN, pin VIN, pin PGND_1, pin LXB, pin VDD, pin EN, pin INVL, pin COMPA, pin NC_8, pin VL, pin BANK_SEL, pin NC_9, pin SDA, pin SCL, pin PGND_2, pin LXA, pin SWI, pin SWO, pin OPO, pin NC_11, pin NC_12, pin VCOM2, pin NC_13, Pin GND, Pin DCHG, Pin CLKOUT1, Pin CLKOUT2, Pin CLKOUT3, Pin CLKOUT4, Pin CLKOUT5, Pin CLKOUT6, Pin CLKOUT7, Pin CLKOUT8, Pin STVOUT, Pin NC_16, Pin LC1, Pin LC2, Pin VGH, Pin PGND_CS, Pin AGND_2, Pin G01, Pin G02, Pin G03, Pin G04, Pin G05, Pin G06, Pin G07, Pin G08, Pin G09, Pin G010, Pin G011, Pin G012, Pin G013, Pin G014, Pin VCOM1, and Pin NC_14.
[0040] Specifically, when the power management chip 101 adopts Figure 2 When the power management chip 101 is used, pin COM1 and pin VCOM2 can be respectively used as the first common pin and the second common pin in the common pin group in the present application, wherein pin VCOM2 can be the second common pin, which can output the common electrode voltage VCOM, so that the boost circuit 102 can generate the gate turn-on voltage VGH according to the voltage output by the second common pin, avoiding the technical problem of excessive temperature in the process of generating the gate turn-on voltage VGH by using the data drive voltage VAA.
[0041] The power management system 100 provided in the present application is used to provide voltage to the display panel 300, and includes a power management chip 101 and a boost circuit 102. The power management chip 101 includes a common pin group, and the common pin group includes a first common pin and a second common pin for outputting a common electrode voltage VCOM. The first common pin is electrically connected to the common electrode of the display panel to provide the common electrode voltage VCOM to the common electrode; the boost circuit 102 is configured to boost the common electrode voltage VCOM output by the second common pin, and the input end of the boost circuit 102 is electrically connected to the second common pin, and the output end of the boost circuit 102 is electrically connected to the input end of the gate drive module of the display panel, thereby achieving the use of a voltage smaller than the data drive voltage VAA in the boost circuit 102 to generate the gate turn-on voltage VGH, thereby improving the stability and safety of the gate turn-on voltage VGH.
[0042] In some embodiments, Figure 3 As shown, the boost circuit 102 includes: a charge pump module 1021, the input end of the charge pump module 1021 is electrically connected to the second common pin; a voltage amplification module 1022, the input end of the voltage amplification module 1022 is electrically connected to the output end of the charge pump module 1021, and the output end of the voltage amplification module 1022 is electrically connected to the input end of the gate drive module of the display panel 300.
[0043] In this embodiment, the charge pump module 1021 is configured to receive the common electrode voltage VCOM output by the second common pin and boost it, and the voltage amplifier module 1022 is configured to amplify the voltage output by the output end of the charge pump module 1021. Specifically, the charge pump charges the capacitor through an external fast charging capacitor (Flying Capacitor), switches internally at a certain frequency, and performs a boost (or buck) conversion together with the input voltage, and finally outputs a constant voltage. The present application cooperates with the charge pump module 1021 and the voltage amplifier module 1022, and can accurately generate the gate turn-on voltage VGH based on the common electrode voltage VCOM output by the second common pin.
[0044] In some embodiments, the power management chip 101 further includes a first output terminal, and the first output terminal is electrically connected to a control terminal of the charge pump module 1021 .
[0045] In this embodiment, the charge pump module 1021 is provided with a control terminal, which is mainly used to realize switching at a certain frequency, so as to charge the capacitor in the charge pump module 1021 to realize boost conversion. Among them, the control terminal of the charge pump module 1021 can be directly electrically connected to the first output terminal of the power management chip 101, and then the power management chip 101 can cooperate with the charge pump module 1021 to boost the voltage.
[0046] In some embodiments, Figure 4 As shown, the charge pump module 1021 includes: a first diode D1, a second diode D2, a third diode D3, a fourth diode D4, a fifth diode D5, a sixth diode D6, a first capacitor C1, a second capacitor C2, a third capacitor C3, a fourth capacitor C4, a fifth capacitor C5 and a sixth capacitor C6; wherein the anode of the first diode D1 is electrically connected to the second common pin; the cathode of the first diode D1 is electrically connected to the anode of the second diode D2 and one end of the first capacitor C1; the cathode of the second diode D2 is electrically connected to one end of the second capacitor C2 and the anode of the third diode D3; the cathode of the third diode D3 is electrically connected to the positive electrode of the second diode D2 and one end of the first capacitor C1; One end of the third capacitor C3 and the positive electrode of the fourth diode D4 are connected; the negative electrode of the fourth diode D4 is electrically connected to one end of the fourth capacitor C4 and the positive electrode of the fifth diode D5 respectively; the negative electrode of the fifth diode D5 is electrically connected to one end of the fifth capacitor C5 and the positive electrode of the sixth diode D6 respectively; the negative electrode of the sixth diode D6 is electrically connected to one end of the sixth diode D6 and the input end of the voltage amplification module 1022 respectively; the other end of the first capacitor C1, the other end of the third capacitor C3, and the other end of the fourth capacitor C4 are all electrically connected to the first output end; the other end of the second capacitor C2, the other end of the fourth capacitor C4, and the other end of the sixth capacitor C6 are all grounded.
[0047] In this embodiment, the first capacitor C1, the third capacitor C3 and the fifth capacitor C5 can be coupling capacitors, the second capacitor C2 and the fourth capacitor C4 can be parasitic capacitors, the sixth capacitor C6 can be a load capacitor, and the other end of the first capacitor C1, the other end of the third capacitor C3 and the other end of the fifth capacitor C5 can be electrically connected to the first output end of the power management chip 101 through the resistor R5. The first output end of the power management chip 101 can be Figure 2The pin SWI of the power management chip 101 can output an LX signal to realize the boost conversion of the charge pump. At the same time, a resistor R3 can be set between the anode of the third diode D3 and the cathode of the fourth diode D4, and a resistor R2 can be set between the anode of the fifth diode D5 and the cathode of the sixth diode D6, so as to play a shunting role. In addition, there is a grounded capacitor C10 between the anode of the first diode D1 and the input end of the charge pump module 1021.
[0048] In some embodiments, the power management chip 101 further includes a second output terminal, and the second output terminal is electrically connected to the control terminal of the voltage amplification module 1022 .
[0049] In this embodiment, the voltage amplifier module 1022 is provided with a control terminal, which can control the conduction of the voltage amplifier module 1022 and realize amplification of the voltage after the boost conversion of the charge pump module 1021, so as to realize accurate generation of the gate turn-on voltage VGH. Figure 2 The pin VGH of the power management chip 101 can output a VGH_CS signal.
[0050] In some embodiments, Figure 4 As shown, the voltage amplification module 1022 includes a transistor Q1, a first resistor R6 and a second resistor R4; wherein the emitter of the transistor Q1 is electrically connected to the output end of the charge pump module 1021 and one end of the first resistor R6, respectively, the collector of the transistor Q1 is electrically connected to the input end of the gate driving module of the display panel 300, the base of the transistor Q1 is electrically connected to the other end of the first resistor R6 and one end of the second resistor R4, respectively, and the other end of the second resistor R4 is electrically connected to the second output end.
[0051] Specifically, the present application can use transistor Q1 to amplify the voltage boosted by the charge pump module 1021 to achieve boosting, thereby obtaining the required gate turn-on voltage VGH, and further ensuring that the operating temperature of the transistor Q1 is around 70°C.
[0052] In some embodiments, Figure 3 As shown, the boost circuit 102 also includes a voltage stabilizing module 1023; wherein, the input end of the voltage stabilizing module 1023 is electrically connected to the output end of the voltage amplifying module 1022, the output end of the voltage stabilizing module 1023 is electrically connected to the input end of the gate driving module of the display panel 300, and the voltage stabilizing module 1023 is configured to stabilize the voltage output by the output end of the output voltage amplifying module 1022.
[0053] In this embodiment, by providing a voltage stabilizing module 1023 at the output end of the voltage amplifying module 1022 , the boosting circuit 102 can generate a stable gate-on voltage VGH, thereby ensuring that the display panel 300 can work normally.
[0054] In some embodiments, Figure 4 As shown, the voltage stabilizing module 1023 includes a voltage stabilizing diode D7, a seventh capacitor C7, an eighth capacitor C8, a ninth capacitor C9 and a third resistor R1; wherein, the positive electrode of the voltage stabilizing diode D7, one end of the seventh capacitor C7, one end of the eighth capacitor C8, one end of the ninth capacitor C9 and one end of the third resistor R1 are electrically connected to the output end of the voltage amplification module 1022 and the input end of the gate driving module of the display panel 300; the negative electrode of the voltage stabilizing diode D7, the other end of the seventh capacitor C7, the other end of the eighth capacitor C8, the other end of the ninth capacitor C9 and the other end of the third resistor R1 are all grounded. Specifically, the voltage stabilizing diode D7 can play a role in stabilizing the voltage, and the seventh capacitor C7, the eighth capacitor C8, the ninth capacitor C9 and the third resistor R1 can play a role in filtering. At the same time, a resistor R7 is also provided at the output end of the voltage stabilizing module 1023, one end of the resistor R7 is electrically connected to the output end of the voltage stabilizing module 1023, and the other end of the resistor R7 is electrically connected to the output end of the boost circuit 102.
[0055] In some embodiments, Figure 5 As shown, the present application further provides a display device 10, which includes a display panel 300, a driving system 200, and the power management system 100 mentioned above.
[0056] In this embodiment, one end of the driving system 200 is electrically connected to the display panel 300, and the other end of the driving system 200 is electrically connected to the power management system 100. The display panel 300 includes a plurality of gate lines and a plurality of data lines, and the plurality of gate lines and the plurality of data lines are arranged in an insulated manner and cross-wise to form a plurality of sub-pixels arranged in an array. Two adjacent gate lines and two adjacent data lines crossing the gate lines together define a sub-pixel, and a thin film transistor is provided in each sub-pixel to drive the sub-pixel for display. Taking a thin film transistor (TFT) liquid crystal display device as an example, each pixel unit includes at least one TFT.
[0057] Meanwhile, the display panel 300 may be a liquid crystal display panel 300. It should be noted that the present application does not limit the type of the display panel 300. The liquid crystal display panel 300 mentioned in the present application may be a horizontal electric field type liquid crystal display panel 300, such as a Fringe Field Switching (FFS) type liquid crystal display panel 300 or an In-Plane Switching (IPS) type liquid crystal display panel 300, or a vertical electric field type liquid crystal display panel 300, such as a twisted nematic (TN) type liquid crystal display panel 300 or a multi-domain vertical alignment (MVA) type liquid crystal display panel 300.
[0058] In addition, the display panel 300 mentioned in the present application can be used in mobile phones, tablet computers, desktop computers, laptop computers, e-readers, handheld computers, electronic display screens, notebook computers, ultra-mobile personal computers (UMPC), netbooks, as well as cellular phones, personal digital assistants (PDA), augmented reality (AR) and virtual reality (VR) devices, media players, wearable devices, digital cameras, car navigation systems, etc.
[0059] Further, the driving system 200 includes a timing control module, a source driving module and a gate driving module, wherein the timing control module may be a screen driving board (Timer Control Register, TCON), the source driving module may be a source driving chip (Source driver IC), and the gate driving module may be a gate driving chip (Gate driver IC). At the same time, the driving system 200 may also include a gamma chip (Gamma IC).
[0060] In addition, the gate driving module may be a GOA (Gate Driven on Array, gate driving integration on array substrate) circuit or a gate chip, which may be selected according to actual application and is not specifically limited in this application.
[0061] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed in the present application, and these modifications or replacements should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.
Claims
1. A power management system for providing voltage to a display panel, characterized in that: The power management system comprises: A power management chip, comprising a common pin group, the common pin group comprising a first common pin and a second common pin for outputting a common electrode voltage, the first common pin being electrically connected to a common electrode of the display panel to provide the common electrode voltage to the common electrode; The boost circuit is configured to boost the common electrode voltage output by the second common pin, the input end of the boost circuit is electrically connected to the second common pin, and the output end of the boost circuit is electrically connected to the input end of the gate driving module of the display panel.
2. The power management system according to claim 1, characterized in that: The boost circuit includes a charge pump module; The charge pump module is configured to boost the voltage output by the second common pin, the input end of the charge pump module is electrically connected to the second common pin, and the output end of the charge pump module is electrically connected to the input end of the gate driving module of the display panel.
3. The power management system according to claim 2, characterized in that: The boost circuit also includes a voltage amplification module; Among them, the voltage amplification module is configured to amplify the voltage output by the output end of the charge pump module, the input end of the voltage amplification module is electrically connected to the output end of the charge pump module, and the output end of the voltage amplification module is electrically connected to the input end of the gate driving module of the display panel.
4. The power management system according to claim 2, characterized in that: The power management chip also includes a first output terminal, which is electrically connected to the control terminal of the charge pump module.
5. The power management system according to claim 4, characterized in that: The charge pump module includes: a first diode, a second diode, a third diode, a fourth diode, a fifth diode, a sixth diode, a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor and a sixth capacitor; Wherein, the anode of the first diode is electrically connected to the second common pin; the cathode of the first diode is electrically connected to the anode of the second diode and one end of the first capacitor respectively; the cathode of the second diode is electrically connected to one end of the second capacitor and the anode of the third diode respectively; the cathode of the third diode is electrically connected to one end of the third capacitor and the anode of the fourth diode respectively; the cathode of the fourth diode is electrically connected to one end of the fourth capacitor and the anode of the fifth diode respectively; the cathode of the fifth diode is electrically connected to one end of the fifth capacitor and the anode of the sixth diode respectively; the cathode of the sixth diode is electrically connected to one end of the sixth diode and the input end of the gate driving module of the display panel respectively; The other end of the first capacitor, the other end of the third capacitor, and the other end of the fourth capacitor are all electrically connected to the first output end; the other end of the second capacitor, the other end of the fourth capacitor, and the other end of the sixth capacitor are all grounded.
6. The power management system according to claim 3, characterized in that: The power management chip also includes a second output terminal, which is electrically connected to the control terminal of the voltage amplification module.
7. The power management system according to claim 6, characterized in that: The voltage amplification module includes a triode, a first resistor and a second resistor; Among them, the emitter of the transistor is electrically connected to the output end of the charge pump module and one end of the first resistor, the collector of the transistor is electrically connected to the input end of the gate driving module of the display panel, the base of the transistor is electrically connected to the other end of the first resistor and one end of the second resistor, and the other end of the second resistor is electrically connected to the second output end.
8. The power management system according to claim 3, characterized in that: The boost circuit also includes a voltage stabilizing module; Among them, the input end of the voltage stabilizing module is electrically connected to the output end of the voltage amplifying module, the output end of the voltage stabilizing module is electrically connected to the input end of the gate driving module of the display panel, and the voltage stabilizing module is configured to output a stable voltage output by the output end of the voltage amplifying module.
9. The power management system according to claim 8, characterized in that: The voltage stabilizing module includes a voltage stabilizing diode, a seventh capacitor, an eighth capacitor, a ninth capacitor and a third resistor; Among them, the positive electrode of the voltage-stabilizing diode, one end of the seventh capacitor, one end of the eighth capacitor, one end of the ninth capacitor and one end of the third resistor are respectively electrically connected to the output end of the voltage amplification module and the input end of the gate driving module of the display panel; the negative electrode of the voltage-stabilizing diode, the other end of the seventh capacitor, the other end of the eighth capacitor, the other end of the ninth capacitor and the other end of the third resistor are all grounded.
10. A display device, characterized in that: The display device comprises a display panel, a driving system, and a power management system according to any one of claims 1-9.