230 MHz wireless high-speed digital radio station

Abstract

The utility model discloses a 230MHz wireless high-speed digital radio station, relates to the technical field of wireless communication, and solves the technical problems of high cost and difficulty in maintenance caused by the fact that the circuit of the existing radio station is complicated and various analog devices are used. The device comprises a communication SoC chip, a main control chip MCU, a voice coding and decoding chip and a power supply circuit module, the communication SoC chip and the voice coding and decoding chip are both in communication connection with the main control chip MCU, and the power supply circuit module is connected with the main control chip MCU and the voice coding and decoding chip through an external communication interface; the communication SoC chip is in communication connection with the voice coding and decoding chip; and the communication SoC chip is used for simulating radio frequency transceiving and digital modulation and demodulation. The radio frequency analog baseband and the digital baseband are integrated through the communication SoC chip, simultaneous transmission of digital signals and voice signals is achieved, analog devices are reduced, a radio station circuit is simplified, radio station cost is reduced, and later maintenance of a radio station is facilitated.

Description

Technical Field

[0001] The utility model relates to the technical field of wireless communication, in particular to a 230MHz wireless high-speed digital radio station. Background Art

[0002] High-speed digital radio is mainly used for power load management systems and user power consumption information collection systems in smart grid applications. In the context of the current "power shortage" dilemma, the rational allocation of power demand requires rapid, real-time and effective analysis and processing of power demand. The 230MHz wireless private network communication technology used in the power load management system realizes load control, remote meter reading, anti-theft, line loss analysis, orderly power consumption, demand-side management, etc.

[0003] The main structure of the existing 230Mhz wireless private network radio is a modem plus an FM analog radio. The circuit of this pure analog radio is relatively complex and requires the use of multiple analog components, making the overall cost of the radio relatively high. In addition, the structure of this pure analog radio is relatively old. For example, key components such as modems, phase-locked loops, and intermediate frequency filters are out of production or have a long delivery time. When the key components of the radio are damaged or problems occur in the analog part, it is more troublesome to maintain the equipment and troubleshoot the problem.

[0004] In the process of implementing the utility model, the applicant found that there are at least the following problems in the prior art:

[0005] Existing radios have complex circuits and use a variety of analog devices, which results in high costs and difficulty in maintenance. Utility Model Content

[0006] The purpose of the utility model is to provide a 230MHz wireless high-speed digital radio station to solve the technical problems in the prior art that the circuits of existing radio stations are relatively complex and use a variety of analog devices, resulting in high costs and difficult maintenance. The preferred technical solutions among the many technical solutions provided by the utility model can produce many technical effects as described below.

[0007] In order to achieve the above purpose, the utility model provides the following technical solutions:

[0008] The utility model provides a 230MHz wireless high-speed digital radio, including a 230MHz wireless high-speed digital radio, characterized in that it includes a communication SoC chip, a main control chip MCU, a voice codec chip and a power circuit module, the communication SoC chip and the voice codec chip are both communicatively connected to the main control chip MCU, the power circuit module is connected to the main control chip MCU and the voice codec chip through an external communication interface; the communication SoC chip is communicatively connected to the voice codec chip; the communication SoC chip is used for simulating radio frequency transceiver and digital modulation and demodulation.

[0009] Preferably, the model of the main control chip MCU is STM32G0B1CCU6.

[0010] Preferably, the communication SoC chip includes a RF transceiver, a DSP digital baseband and an analog baseband, the RF transceiver is communicatively connected to the DSP digital baseband and the analog baseband, and the DSP digital baseband is communicatively connected to the analog baseband; the RF transceiver is connected to an RF Ant antenna and an RF power amplifier PA, and the RF transceiver receives and sends analog signals and RF voice signals through the RFAnt antenna.

[0011] Preferably, the analog baseband includes a stereo digital-to-analog converter, an audio amplifier, an audio analog-to-digital converter, an analog-to-digital converter, a phase-locked loop and a USB interface; the analog-to-digital converter is connected to the Aux interface, and the analog baseband is connected to the USB via the USB interface.

[0012] Preferably, the communication SoC chip further includes a power management unit PMU, and the power management unit PMU is communicatively connected to the DSP digital baseband.

[0013] Preferably, the main control chip MCU communicates with the communication SoC chip via SPI, and the main control chip MCU communicates with the voice codec chip via I2C; the voice codec chip is connected to the MCLK pin, WCLK pin, BCLK pin, DIN pin and DOUT pin of the communication SoC chip.

[0014] Preferably, the external communication interface includes a DB9 interface and an RJ45 interface, both of which are communicatively connected to the main control chip MCU, and the main control chip MCU receives the data to be sent through the DB9 interface; the RJ45 interface is connected to the MIC pin of the voice codec chip, and the voice codec chip is connected to the SPK pin of the RJ45 interface.

[0015] Preferably, the DB9 interface is connected to a 5V voltage output port of the power circuit module, and the RJ45 interface is connected to a 12V voltage output port of the power circuit module.

[0016] Preferably, it further includes a radio frequency switch Switch, wherein the radio frequency switch Switch is communicatively connected to the communication SoC chip, and the radio frequency switch Switch is used to switch the communication SoC chip to perform radio frequency transmission or radio frequency reception.

[0017] Preferably, a first signal processing circuit and a second signal processing circuit are arranged side by side between the RF switch Switch and the communication SoC chip, the first signal processing circuit includes a power amplifier module PA and a first surface acoustic wave filter SAW1 connected in series, and the second signal processing circuit includes a second surface acoustic wave filter SAW2, a low noise amplifier LNA and a third surface acoustic wave filter SAW3 connected in series.

[0018] Implementing one of the above technical solutions of the utility model has the following advantages or beneficial effects:

[0019] By integrating RF analog and digital baseband through communication SoC chips, simultaneous transmission of digital signals and voice signals can be achieved, analog devices can be reduced, radio circuits can be simplified, radio costs can be reduced, and later maintenance of the radio can be facilitated. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0021] Figure 1 This is the first circuit diagram of the embodiment of the 230MHz wireless high-speed digital radio station of the utility model;

[0022] Figure 2 This is the second circuit diagram of the 230MHz wireless high-speed digital radio embodiment of the utility model. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical solutions and advantages of the utility model clearer, the various exemplary embodiments to be described below will refer to the corresponding drawings, which constitute a part of the exemplary embodiments, wherein various exemplary embodiments that may be used to implement the utility model are described. Unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementation methods described in the following exemplary embodiments do not represent all implementation methods consistent with the present disclosure. It should be understood that they are only examples of processes, methods, and devices that are consistent with some aspects of the utility model disclosed as detailed in the attached claims, and other embodiments may also be used, or the embodiments listed herein may be modified in structure and function without departing from the scope and essence of the utility model.

[0024] In the description of the present utility model, it should be understood that the terms "center", "longitudinal", "lateral", etc. indicate the orientation or position relationship based on the drawings, which is only for the convenience of describing the utility model and simplifying the description, rather than indicating or implying that the elements referred to must have a specific orientation, be constructed and operated in a specific orientation. The terms "first", "second", etc. are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. The term "multiple" means two or more. The terms "connected" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, an integral connection, a mechanical connection, an electrical connection, a communication connection, a direct connection, an indirect connection through an intermediate medium, and can be the internal connection of two elements or the interaction relationship between two elements. The term "and / or" includes any and all combinations of one or more related listed items. For those of ordinary skill in the art, the specific meanings of the above terms in the present utility model can be understood according to the specific circumstances.

[0025] In order to illustrate the technical solution of the present invention, a specific embodiment is provided below, in which only the parts related to the embodiment of the present invention are shown.

[0026] Embodiment 1:

[0027] like Figure 1As shown, the utility model provides a 230MHz wireless high-speed digital radio, including a 230MHz wireless high-speed digital radio, characterized in that it includes a communication SoC chip, a main control chip MCU, a voice codec chip and a power circuit module, the communication SoC chip and the voice codec chip are both connected to the main control chip MCU in communication, and the power circuit module is connected to the main control chip MCU and the voice codec chip through an external communication interface; the communication SoC chip is connected to the voice codec chip in communication; the communication SoC chip is used for analog RF transceiver and digital modulation and demodulation. Specifically, the power circuit module is used to provide stable power supply to the radio station to ensure the normal operation of the radio station. The communication SoC chip adopts a high-integration solution integrating RF and baseband as a whole, including an analog part and a digital part. The analog part adopts advanced zero intermediate frequency or ultra-low intermediate frequency I / Q technology, and has a built-in wide frequency range power amplifier, a low noise amplifier, a mixer, a fractional frequency phase-locked loop, an analog bandpass filter, AD / DA, etc. The digital part consists of a digital front end, a multi-processor (DSP+CPU) and a general acceleration engine architecture.

[0028] The main control chip MCU receives the digital signal to be sent through the external communication interface, and transmits the received digital signal to be sent to the communication SoC chip. After the communication SoC chip performs coding and modulation and other signal processing, an analog signal is obtained, which is transmitted to the user terminal through the RF Ant antenna on the communication SoC chip (as described below). The voice codec chip collects the MIC signal (voice signal) obtained by the external communication interface, and performs A / D conversion, encoding and decoding and other signal processing on the collected MIC signal, and transmits it to the communication SoC chip. After the communication SoC chip performs analog processing such as modulation and power amplification on the processed MIC signal, a radio frequency voice signal is obtained, which is transmitted to the user terminal through the RF Ant antenna.

[0029] When the RF Ant antenna receives an analog signal, it is amplified and then transmitted to the communication SoC chip. The communication SoC chip modulates the received analog signal into a digital signal and transmits it to the main control chip MCU. The main control chip MCU outputs the digital signal through the external communication interface. When the RF Ant antenna receives an RF voice signal, it is transmitted to the communication SoC chip, filtered and demodulated by the communication SoC chip, and then transmitted to the voice codec chip. After decoding and D / A conversion by the voice codec chip, the language signal is output through the SPK interface.

[0030] The utility model integrates radio frequency analog and digital baseband through the communication SoC chip, realizes the simultaneous transmission of digital signals and voice signals, reduces analog devices, simplifies radio circuits, reduces radio costs, and facilitates the later maintenance of the radio.

[0031] As an optional implementation, the model of the main control chip MCU is STM32G0B1CCU6.

[0032] As an optional implementation, Figure 2 As shown, the communication SoC chip includes an RF transceiver, a DSP digital baseband and an analog baseband. The RF transceiver is connected to the DSP digital baseband and the analog baseband, and the DSP digital baseband is connected to the analog baseband. The RF transceiver is connected to the RF Ant antenna and the RF power amplifier PA. The RF transceiver receives and sends analog signals and RF voice signals through the RF Ant antenna. Specifically, the analog baseband (ANA BaseBand) is used to generate a 624MHz clock for the DSP digital baseband, and can also input audio line in, and exchange data through the USB interface (described below) USB OTG. The RF transceiver (RF transceiver) is used to receive or send analog signals and RF voice signals, and transmit the received analog signals and RF voice signals to the DSP digital baseband (DIGITAL BASEBAND), and modulate and demodulate through the DSP digital baseband. The RF transceiver includes a receiver and a transmitter. The receiver adopts a low intermediate frequency architecture and is composed of a low noise amplifier LNA, an orthogonal mixer mixer, a complex filter and an analog-to-digital converter. After passing through the analog-to-digital converter, the IQ signal enters the DSP digital baseband for relevant processing. The gain of the low noise amplifier LNA, the programmable gain amplifier (PGA) after the orthogonal mixer, and the filter Filter can be configured and adjusted by registers, providing a gain dynamic range of 0 to 86dB to adapt to received signals of different strengths. The filter Filter provides an optional bandwidth of 6.25KHz / 12.5KHz / 25KHz / 200KHz, which can be configured through registers to filter out out-of-band signals.

[0033] The transmitter includes a digital-to-analog converter, a filter, a mixer, a power amplifier driver module PADriver and a RF ramp signal control module ramping-control. The digital-to-analog converter converts the digital IQ signal into an analog signal, the filter filters the analog IQ signal, and then enters the mixer to convert the frequency into a RF signal, and finally the power amplifier driver module PA driver amplifies the signal. The gain of the power amplifier driver module PA driver can be configured by a register, and the output power range is about -30dBm to 0dBm. The RF ramp signal control module ramping-control can avoid the generation of clutter signals when the transmitter is powered on, and the RF ramp signal curve can be configured by a register.

[0034] The DSP digital baseband performs data processing on the digital IQ signal, including filtering, amplification, secondary frequency conversion, DC elimination, detection of received signal strength indication (RSSI), automatic frequency control (AFC), etc.

[0035] The communication SoC chip also includes a frequency synthesizer. The frequency synthesizer circuit generates a radio frequency local oscillator signal, including an oscillator VCO, a fractional-N divider, a frequency detector, a charge pump, and a loop filter. The oscillator VCO and the fractional-N divider are used for the transmission and reception links. The frequency range of the oscillator VCO is 2400MHz to 4400MHz. Through the frequency division ratios of 4, 6, 8, 12, 16, and 24, the frequency covers the entire 100MHz to 1000MHz frequency band.

[0036] As an optional implementation, Figure 2 As shown, the analog baseband includes a stereo digital-to-analog converter, an audio amplifier, an audio analog-to-digital converter, an analog-to-digital converter, a phase-locked loop and a USB interface. The analog-to-digital converter is connected to the Aux interface, and the analog baseband is connected to the USB via the USB interface. Specifically, the stereo digital-to-analog converter (stereo DAC) is used to perform digital-to-analog conversion on the digital signal and / or voice signal to be sent received by the analog baseband, and convert it into an analog signal and a radio frequency voice signal. The audio amplifier (Audio AMPs) is used to amplify the received voice signal and the radio frequency voice signal. The audio analog-to-digital converter (Audio ADC) is used to convert the radio frequency voice signal received by the analog baseband into a voice signal, and the analog-to-digital converter (GPADC) is used to convert the voice signal received by the Aux interface (audio input interface) into a radio frequency voice signal. The analog baseband is connected to the USB via the USB interface, and the radio frequency voice signal and digital signal simulated by the communication SoC chip can be modulated and sent to the user terminal via the USB. The phase-locked loop (PLL) is used to recover the carrier or baseband signal clock to realize signal modulation and demodulation.

[0037] As an optional implementation, Figure 2 As shown, the communication SoC chip also includes a power management unit PMU, and the power management unit PMU is communicatively connected with the DSP digital baseband. Specifically, the power management unit PMU supplies power to the DSP digital baseband.

[0038] As an optional implementation, Figure 1As shown, the main control chip MCU communicates with the communication SoC chip through SPI, and the main control chip MCU communicates with the voice codec chip through I2C. The voice codec chip is connected to the MCLK pin, WCLK pin, BCLK pin, DIN pin, and DOUT pin of the communication SoC chip. Specifically, the main control chip MCU is responsible for controlling the SPI communication with the communication SoC chip, the I2C communication with the voice codec chip, and the communication with the external communication interface. The circuit design and software driver of the main control chip MCU are set according to the circuit of the radio station. The relevant registers of the communication SoC chip can be directly configured to set the bandwidth and obtain the signal strength RSSI. There is no need to drive additional devices, which can reduce costs, make the design simpler, and make maintenance easier.

[0039] As an optional implementation, Figure 1 As shown, the external communication interface includes a DB9 interface and an RJ45 interface. Both the DB9 interface and the RJ45 interface are connected to the main control chip MCU for communication. The main control chip MCU receives the data to be sent through the DB9 interface. The RJ45 interface is connected to the MIC pin of the voice codec chip, and the voice codec chip is connected to the SPK pin of the RJ45 interface. Specifically, after receiving the digital signal to be sent, the DB9 interface transmits it to the main control chip MCU, and the main control chip MCU sends it to the communication SoC chip for encoding and demodulation through SPI communication. After receiving the language signal, the RJ45 interface transmits it to the voice codec chip through the MIC pin, and then transmits it to the communication SoC chip through the voice codec chip. After receiving the RF voice signal modulated by the communication SoC chip, the voice codec chip transmits it to the RJ45 interface through the SPK pin to output the voice signal.

[0040] As an optional implementation, Figure 1 As shown, the DB9 interface is connected to the 5V voltage output port of the power circuit module, and the RJ45 interface is connected to the 12V voltage output port of the power circuit module. Specifically, the power circuit module transmits 5V voltage to the DB9 interface and 12V voltage to the RJ45 interface, so that the power circuit module can supply power to the radio station and ensure the normal operation of the radio station. The power circuit module can supply power according to the power requirements of each component in the radio station. The power circuit module can receive 12V charging voltage from an external power supply.

[0041] As an optional implementation, Figure 1 As shown, the RF switch Switch is also included, and the RF switch Switch is connected to the communication SoC chip for communication, and the RF switch Switch is used to switch the communication SoC chip to perform RF transmission or RF reception. Specifically, by adjusting the RF switch Switch to the off state or the on state, the communication SoC chip is controlled to perform RF transmission or RF reception.

[0042] As an optional implementation, Figure 1 As shown, the RF switch Switch and the communication SoC chip include a first signal processing circuit and a second signal processing circuit arranged side by side, the first signal processing circuit includes a power amplifier module PA and a first surface acoustic wave filter SAW1 connected in series, and the second signal processing circuit includes a second surface acoustic wave filter SAW2, a low noise amplifier LNA and a third surface acoustic wave filter SAW3 connected in series. Specifically, the first end of the power amplifier module PA is connected to the RF switch Switch, the second end of the power amplifier module PA is connected to the first end of the first surface acoustic wave filter SAW1, and the second end of the first surface acoustic wave filter SAW1 is connected to the communication SoC chip. The first end of the second surface acoustic wave filter SAW2 is connected to the RF switch Switch, the second end of the second surface acoustic wave filter SAW2 is connected to the first end of the low noise amplifier LNA, the second end of the low noise amplifier LNA is connected to the first end of the third surface acoustic wave filter SAW3, and the second end of the third surface acoustic wave filter SAW3 is connected to the communication SoC chip. In view of the high-power transmission requirements, a power amplifier module PA is set between the RF switch Switch and the communication SoC chip to amplify the power of the transmitted signal. The surface wave filter SAW is used to filter the signal, remove the noise or interference in the signal, and improve the quality of the signal.

[0043] The embodiment is only a special case and does not indicate that the present invention is implemented in such a way.

[0044] The above description is only the preferred embodiment of the present invention. Those skilled in the art will appreciate that various changes or equivalent substitutions may be made to these features and embodiments without departing from the spirit and scope of the present invention. In addition, under the guidance of the present invention, these features and embodiments may be modified to adapt to specific circumstances and materials without departing from the spirit and scope of the present invention. Therefore, the present invention is not limited to the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application belong to the protection scope of the present invention.

Claims

1. A 230MHz wireless high-speed digital radio, characterized in that: It includes a communication SoC chip, a main control chip MCU, a voice codec chip and a power circuit module. The communication SoC chip and the voice codec chip are both communicatively connected to the main control chip MCU. The power circuit module is connected to the main control chip MCU and the voice codec chip through an external communication interface; the communication SoC chip is communicatively connected to the voice codec chip; the communication SoC chip is used for simulating RF transceiver and digital modulation and demodulation.

2. The 230MHz wireless high-speed digital radio according to claim 1, characterized in that: The model of the main control chip MCU is STM32G0B1CCU6.

3. The 230MHz wireless high-speed digital radio according to claim 1, characterized in that: The communication SoC chip includes a radio frequency transceiver, a DSP digital baseband and an analog baseband. The radio frequency transceiver is communicatively connected to the DSP digital baseband and the analog baseband, and the DSP digital baseband is communicatively connected to the analog baseband. The radio frequency transceiver is connected to an RF Ant antenna and a radio frequency power amplifier PA, and the radio frequency transceiver receives and sends analog signals and radio frequency voice signals through the RF Ant antenna.

4. The 230MHz wireless high-speed digital radio according to claim 3, characterized in that: The analog baseband includes a stereo digital-to-analog converter, an audio amplifier, an audio analog-to-digital converter, an analog-to-digital converter, a phase-locked loop and a USB interface; the analog-to-digital converter is connected to the Aux interface, and the analog baseband is connected to the USB through the USB interface.

5. The 230MHz wireless high-speed digital radio according to claim 3, characterized in that: The communication SoC chip also includes a power management unit PMU, and the power management unit PMU is communicatively connected with the DSP digital baseband.

6. The 230MHz wireless high-speed digital radio according to claim 1, characterized in that: The main control chip MCU performs SPI communication with the communication SoC chip, and the main control chip MCU performs I2C communication with the voice codec chip; the voice codec chip is connected to the MCLK pin, WCLK pin, BCLK pin, DIN pin and DOUT pin of the communication SoC chip.

7. The 230MHz wireless high-speed digital radio according to claim 1, characterized in that: The external communication interface includes a DB9 interface and an RJ45 interface, both of which are connected to the main control chip MCU for communication, and the main control chip MCU receives the data to be sent through the DB9 interface; the RJ45 interface is connected to the MIC pin of the voice codec chip, and the voice codec chip is connected to the SPK pin of the RJ45 interface.

8. The 230MHz wireless high-speed digital radio according to claim 7, characterized in that: The DB9 interface is connected to the 5V voltage output port of the power circuit module, and the RJ45 interface is connected to the 12V voltage output port of the power circuit module.

9. The 230MHz wireless high-speed digital radio according to claim 1, characterized in that: It also includes a radio frequency switch Switch, which is communicatively connected to the communication SoC chip, and is used to switch the communication SoC chip to perform radio frequency transmission or radio frequency reception.

10. The 230MHz wireless high-speed digital radio according to claim 9, characterized in that: The RF switch Switch and the communication SoC chip include a first signal processing circuit and a second signal processing circuit arranged side by side, the first signal processing circuit includes a power amplifier module PA and a first surface acoustic wave filter SAW1 connected in series, and the second signal processing circuit includes a second surface acoustic wave filter SAW2, a low noise amplifier LNA and a third surface acoustic wave filter SAW3 connected in series.

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