After the chip is removed from the package, the grinding surface is evenly removed to see the different layers of the device
By designing a chip grinding device including a slide, a conductive base layer, a pad layer, a fill layer and a grinding gasket, the problem of uneven stress and too small chip when manually grinding the chip is solved, and the observation of uniform layering and different layers of chip grinding is achieved, which improves the success rate and efficiency of the grinding.
Patent Information
- Application Number
- CN202420945383.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-06
- Publication Date
- 2025-04-01
- Estimated Expiration
- 2034-05-06
AI Technical Summary
The uneven stress is applied to the chip when manually grinding the chip, the too small chip is not conducive to manual grinding, and the high requirements for technicians.
A grinding device after chip de-packaging is designed, which includes a slide, a conductive base layer, a padding layer, a fill layer and a grinding gasket. By raising one side of the chip, the observation of uniform delamination of the plane and different layers of the chip during the grinding process is achieved.
This device makes the chip grinding process more uniform, reduces the risk of chip crushing, improves the success rate and efficiency of grinding, reduces the requirements for technicians, and saves costs and labor.
Smart Images
Figure CN222704402U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of household electrical appliances, in particular to a device for grinding a flat surface of a chip evenly to remove different layers after the chip is packaged. Background Art
[0002] The statements in this section merely provide background technical information related to the present application and do not necessarily constitute prior art.
[0003] Chip delamination is a very common analytical technique in chip failure analysis, circuit analysis and material analysis in semiconductor laboratories. The methods commonly used in chip delamination in analytical laboratories can be classified into manual grinding and polishing, chemical method, ion etching method and reactive ion etching method. Compared with manual polishing delamination, the other methods are either instrumental or chemical, or cannot achieve precise control, or can only remove specific materials, and cannot perform uniform delamination on the whole. Therefore, the "backward" method of manual grinding is retained in advanced semiconductor analysis solutions, and manual polishing delamination is more conducive to observation. The complete structure of the chip circuit can be observed while grinding. Therefore, in the development process of integrated circuits, whether it is the most advanced 3nm processor chip that has been mass-produced or the relatively less advanced semiconductor power device process, no matter how advanced the process is, the "backward" manual method used to analyze the chip in the laboratory is often used for grinding and analysis. Because this analysis method is destructive to the chip, it is inevitable that the analysis will fail and the desired effect will not be achieved during the experiment. Therefore, people engaged in semiconductor integrated circuit analysis often need a lot of years of accumulated experience.
[0004] Take CIS chip (image sensor chip) as an example. After the CIS chip (image sensor chip) is depackaged and the chip body is exposed (after wafer cutting), it is often de-layered and ground on a grinder because the sample body is too small (the image sensor chip is usually a square structure less than 5 mm * 5 mm). The image sensor chip itself does not have many layers (usually only three to four metal layers). During the grinding process, due to its small size, it is often impossible to control the force when a single finger presses it, resulting in uneven grinding at different positions of the square chip. Or the chip is too thin and breaks during the pressing process. In the process of failure analysis, sometimes R&D personnel need to analyze and observe layer by layer, and observe every detail of the circuit metal layer clearly before proceeding to the next step of research and development. If the layering of the chip logic partition is to be observed clearly at the same time, repeated grinding is required. In the traditional manual grinding process, if experience is insufficient, it is easy to cause research errors. Uneven grinding or chip breakage leads to grinding failure. After grinding failure (or uneven grinding), it is often necessary to re-grind repeatedly. Because if it is a bare chip, the chip is too small and is a thin slice. In the process of entering the electron microscope, it needs to be repeatedly torn off and glued on the electron microscope carrier (the scanning electron microscope observes the plane carrier and the chip sample with double-sided carbon tape to ensure the conductivity of the sample. In order to ensure good conductivity and no charge accumulation, it needs to be glued very firmly) (electron microscope cannot observe non-conductive materials). Because the chip is firmly glued and the slice is very fragile, there is a risk of breaking if it is repeatedly torn off, and most of the failed sample chips may be a single sample. After failure, it cannot be ground again. Therefore, as a technician in grinding and de-layering, it often has high technical requirements for itself, and it takes a lot of time to perform repeated grinding operations (repeated grinding, electron microscope / microscope observation) to ensure that the chip is de-layered complete and beautiful.
[0005] In view of this, how to innovate and develop a new device for uniformly delaminating the chip grinding surface in view of the uneven force when manually grinding chips, the chips are too small to be manually ground, and the high requirements for technicians, has become the subject to be studied and solved by the present utility model. Utility Model Content
[0006] The utility model aims to provide a device for grinding a flat surface and removing different layers uniformly after the chip is packaged.
[0007] To achieve the above-mentioned purpose, the utility model proposes a device for grinding a flat surface evenly to remove different layers after chip packaging, the device comprises a chip combination body composed of a carrier, a conductive base layer, a cushioning layer, a filling layer, a grinding pad, and a target chip, the conductive base layer is formed by a conductive tape attached to the carrier, a conductive cushioning layer is arranged in the middle of the conductive base layer, one side of the target chip is placed on the conductive base layer, and the other side is placed on the cushioning layer, so that the target chip presents a trend of one end being higher than the other end relative to the conductive base layer, and the gap formed between the cushioning layer, the conductive base layer, and the target chip is filled with the filling layer, and the grinding pad is aligned and fixed on the four corners of the carrier;
[0008] The padding layer and the filling layer in the chip combination are configured to be selectively removed, and then the target chip is directly attached to the conductive base layer to form a second chip combination consisting of a carrier, a conductive base layer, a grinding pad, and a target chip.
[0009] The relevant contents of this utility model are explained as follows:
[0010] 1. In the above technical scheme of the utility model, in view of the situations that the force is uneven when manually grinding the chip, the chip is too small to be conducive to manual grinding, and the requirements for technicians are relatively high, a new chip grinding plane uniform de-layering device is innovatively developed. The device takes into account the situations that the force is uneven when manually grinding the chip, and the target chip is too small to be conducive to manual grinding. One side of the chip is padded up, so that the chip grinding can present the number of layers of the target layer ground at different positions during grinding, so that the morphology of different layers of the target chip can be seen in the subsequent observation process. Observation under a microscope can more intuitively see the thickness of different layers during grinding, and then more accurately calculate the time spent on plane grinding to each layer, so that there is no need to use the same chip for repeated grinding, which greatly shortens the time and solves the problem that there is only one chip and it is impossible to grind too much and want to see it. The problem of failure caused by the structure of the surface layer has an advantage that subsequent grinding can be carried out even on a plane. The utility model has also taken into account the poor conductivity of the chip when it is pasted on the slide and made corresponding treatment. The materials used in the whole process are all consumables used in laboratory experiments. The method of obtaining the required materials is based on the principle of using local materials. There is no need for special customization of samples. Only the slide needs to be cut to different degrees to obtain grinding chip carriers of different sizes. There is no need to remove the chip from the slide when it is observed on the electron microscope later. It can be directly pasted on the carrier of the electron microscope for observation on the machine. Even if it needs to be re-grinded, there will be a slide support that is not easy to break. The risk of chip being too small and too thin being torn off the tape of the electron microscope carrier and caused by human error is avoided, which greatly saves cost and manpower and improves the success rate of chip grinding and delamination failure analysis.
[0011] 2. In the above technical solution, the carrier sheet is a square sheet structure, so as to better stick the conductive tape neatly to form a flat conductive base layer.
[0012] 3. In the above technical solution, the filling layer adopts hot melt adhesive or conductive tape. The use of hot melt adhesive can better fix the target chip in the gap formed between the pad layer, the conductive base layer and the target chip. When the target chip needs to be removed, the hot melt adhesive can be heated, which is very convenient and quick without damaging the target chip.
[0013] 4. In the above technical solution, the slide is a glass slide or a wafer; the grinding pad is a discarded chip or wafer fragment. Glass slides or wafers are common consumables in the laboratory of a wafer factory. The required slides can be obtained by taking local materials without additional purchase or customization. In the laboratory of a wafer factory, because the material and failure analysis of the wafer is required, wafer fragments are sometimes easier to obtain than glass slides.
[0014] 5. In the above technical solution, the conductive tape is one or more of copper tape, silver tape, and carbon tape, so as to solve the problem that the glass slide itself is not conductive while firmly fixing the target chip on the conductive base layer, so that the surface of the target chip has good conductivity, thereby providing conditions for subsequent electron microscope observation.
[0015] 6. In the above technical solution, the carrier has a longitudinal edge and a transverse edge; two conductive tapes with a width less than half the side length of the carrier and a length greater than the side length of the carrier are symmetrically attached to the surface of the carrier along the longitudinal edge, and there is a gap between the two conductive tapes of the first layer; two conductive tapes with a width less than half the side length of the carrier and a length greater than the side length of the carrier are symmetrically attached to the surface of the two conductive tapes of the first layer along the transverse edge, and there is a gap between the two conductive tapes of the second layer; the two conductive tapes of the first layer and the two conductive tapes of the second layer form a flat conductive base layer. With this design, gaps are retained between the two conductive tapes in the longitudinal and transverse directions to prevent uneven height differences after superposition, providing a guarantee for the subsequent target chip grinding. At the same time, the design of the conductive tape with a width less than half the side length of the carrier and a length greater than the side length of the carrier is also to avoid uneven height differences due to superposition when the carrier is fully and firmly attached.
[0016] 7. In the above technical solution, the padding layer is one or more of copper tape, silver tape, and carbon tape, the long side of the padding layer is parallel to one side of the slide, and the width of the padding layer is half the width of the conductive tape. In this way, the target chip can be firmly fixed on the conductive base layer while the surface of the target chip has good conductivity, thereby providing conditions for subsequent electron microscope observation. The design of the padding layer width being half the width of the conductive tape can meet the placement of target chips of most sizes, but the utility model is not limited to this, and can also be adjusted according to the size of the chip.
[0017] 8. In the above technical solution, the cushioning layer is made of the same material as the conductive tape, so as to reduce material preparation and make acquisition and use more convenient.
[0018] 9. In this utility model, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection, a direct connection, or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0019] 10. In the present utility model, the terms "center", "upper", "lower", "bottom", "inside", "outside" and the like indicate orientations or positional relationships based on the orientation or positional assembly relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application; if the manual pressure relief valve is turned upside down or placed horizontally, the corresponding orientation should also be adjusted accordingly.
[0020] 11. In the present invention, the terms "first", "second", etc. are used for descriptive purposes only and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.
[0021] 12. In addition, the term "and / or" in this application means three parallel solutions. Taking "A and / or B" as an example, it includes solution A, solution B, or a solution in which both A and B are satisfied.
[0022] Due to the application of the above scheme, the utility model has the following advantages and effects compared with the prior art:
[0023] The above-mentioned scheme of the utility model is aimed at the situations that the force is uneven when manually grinding the target chip, the target chip is too small to be conducive to manual grinding, and the requirements for technicians are relatively high. A new chip grinding plane uniform de-layering scheme is innovatively developed. The device takes into account the situations that the force is uneven when manually grinding the chip, the target chip is too small to be conducive to manual grinding, and one side of the target chip is raised. During grinding, the target chip can be ground to present the number of layers of the target layer ground at different positions. In this way, the morphology of different layers of the target chip can be seen in the subsequent observation process. Observation under a microscope can more intuitively see the thickness of different layers during grinding, and then more accurately calculate the time spent on plane grinding to each layer, so that there is no need to use the same chip for repeated grinding, which greatly shortens the time and solves the problem that there is only one chip and it is impossible to grind too much and want to see the surface structure. The problem of failure caused by structure is solved, and the advantage is that subsequent grinding can be carried out even on a plane; the utility model takes into account the poor conductivity of the target chip when it is pasted on the slide and makes corresponding treatment. The materials used in the whole process are all consumables used in laboratory experiments. Based on the principle of using local materials, the required device can be obtained, and there is no need to customize the sample. It is only necessary to cut the slide to different degrees to obtain grinding chip carriers of different sizes. There is no need to remove the target chip from the slide when observing on the electron microscope later. It can be directly pasted on the carrier of the electron microscope for observation on the machine. Even if it needs to be re-grinded, it will be supported by the slide and not easy to break. The risk of artificial breakage caused by tearing the target chip off the tape of the electron microscope carrier when it is too small and too thin is avoided, which greatly saves cost and manpower, and improves the success rate and efficiency of the target chip grinding and de-layering failure analysis. BRIEF DESCRIPTION OF THE DRAWINGS
[0024] Figure 1 It is a schematic diagram of an embodiment of the utility model when it is presented as a chip combination;
[0025] Figure 2 It is a schematic diagram of the embodiment of the utility model when it is presented as a second chip combination;
[0026] Figure 3 A schematic diagram of the process of cutting a slide according to an embodiment of the utility model;
[0027] Figure 4 This is a schematic diagram of the process of pasting the first layer of conductive tape according to an embodiment of the utility model;
[0028] Figure 5 A schematic diagram of the process of pasting the second layer of conductive tape and forming a conductive base layer according to an embodiment of the utility model;
[0029] Figure 6This is a schematic diagram of the process of pasting the pad layer and attaching the target chip to the pad layer and the conductive base layer according to the embodiment of the utility model;
[0030] Figure 7 A schematic diagram of fixing a grinding pad to a conductive base layer according to an embodiment of the utility model;
[0031] Figure 8 This is a schematic diagram of the embodiment of the utility model when grinding to the target layer;
[0032] Fig. 9 It is an enlarged schematic diagram of the target layer in the embodiment of the utility model.
[0033] The various parts of the above drawings are shown as follows:
[0034] 1 Target chip
[0035] 10 Target layer
[0036] 11. Protective layer
[0037] 12 Wire Layer
[0038] 13 Oxide layer
[0039] 14 Base
[0040] 2 Slide
[0041] 3 Conductive base
[0042] 31 Conductive tape
[0043] 4. Raise the level
[0044] 5 Filling layer
[0045] 6 Abrasive pads
[0046] 7 Chip combination
[0047] 8. Second chip combination. DETAILED DESCRIPTION
[0048] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.
[0049] The utility model aims to solve the problems of uneven force during the existing manual grinding of chips, chips being too small to be conducive to manual grinding, and relatively high requirements for technicians, so as to provide a device that is simple to operate, has a high success rate and high efficiency, and can grind the surface of the chip evenly to remove different layers after packaging.
[0050] The utility model embodiment provides a device for grinding a chip surface evenly to remove different layers after chip packaging, such as Figure 1 The device shown includes a chip combination 7 composed of a carrier 2, a conductive base layer 3, a padding layer 4, a filling layer 5, a grinding pad 6, and a target chip 1. The carrier 2 is made of a glass slide or a wafer; the grinding pad 6 is made of discarded chips or wafer fragments, the filling layer 5 is made of hot melt adhesive or a conductive tape 31, and the conductive base layer 3 is formed by the conductive tape 31 attached to the carrier 2. A conductive padding layer 4 is arranged in the middle of the conductive base layer 3, one side of the target chip 1 is overlapped on the conductive base layer 3, and the other side is overlapped on the padding layer 4, and the grinding pad 6 is aligned and fixed on the four corners of the carrier 2; the padding layer 4 and the filling layer 5 in the chip combination 7 are configured to be selectively removed, and then the target chip 1 is directly attached to the conductive base layer 3, so as to form a second chip combination 8 composed of the carrier 2, the conductive base layer 3, the grinding pad 6, and the target chip 1. The structure of the second chip combination 8 is shown in FIG. Figure 2 shown.
[0051] Through the implementation of the embodiment of the utility model, taking into account the situation that the force is uneven when manually grinding the chip and the target chip 1 is too small to be conducive to manual grinding, one side of the target chip 1 is padded up, and the target chip 1 can be ground to present different positions when grinding to the target layer 10. In this way, the morphology of different layers of the target chip 1 can be seen in the subsequent observation process. Observation under a microscope can more intuitively see the thickness of different layers during grinding, and thus more accurately calculate the time spent on plane grinding to each layer, so that there is no need to use the same target chip 1 for repeated grinding, which greatly shortens the time and solves the problem that there is only one target chip 1 and it is impossible to grind too much and want to see the surface structure, which leads to failure. This has the advantage that it can be performed even on one plane. Subsequent grinding; the utility model has taken into account the poor conductivity of the target chip 1 when it is pasted on the slide and made corresponding treatment. The materials used in the whole process are all consumables used in laboratory experiments. Based on the principle of using local materials, the required device can be obtained. There is no need for special customization for the sample. It is only necessary to cut the slide 2 to different degrees to obtain grinding chip carriers of different sizes. In the subsequent observation on the electron microscope, there is no need to remove the target chip 1 from the slide 2. It can be directly pasted on the carrier of the electron microscope for observation. Even if it needs to be re-grinded, it will be supported by the slide 2 and not easy to break. The risk of the target chip 1 being too small and thin and being torn off the tape of the electron microscope carrier causing artificial breakage is avoided, which greatly saves cost and manpower, and improves the success rate of the grinding and de-layering failure analysis of the target chip 1.
[0052] In the embodiment of the utility model, the filling layer 5 is made of hot melt adhesive or conductive tape 31. The use of hot melt adhesive can better fix the target chip 1 in the gap formed between the padding layer 4, the conductive base layer 3, and the target chip 1. When the target chip 1 needs to be removed, the hot melt adhesive can be heated, which is very convenient and quick, and will not damage the target chip 1. Further, when the hot melt adhesive is used as the filling layer 5 to fill the gap, the ground chip combination 7 is placed in a gold plating machine for gold plating treatment, so that the target chip 1 has surface conductivity. Such surface treatment, plating a metal layer on the surface increases the conductivity of the surface of the target chip 1 when observed under an electron microscope, and prevents the occurrence of charging effects in the electron microscope from affecting the observation, because a layer of copper tape has been attached to the glass slide in the previous step, and if the sample chip is attached to the surface of the glass slide with carbon tape later, the conductivity of the surface of the target sample is good at this time, and the gold plating step can be omitted in this step.
[0053] In the embodiment of the utility model, during the process of observing the oblique sample grinding layer, the thickness between different layers in the oblique sample grinding layer is recorded, and then after the analysis of the oblique sample grinding layer is completed, the target chip 1 is removed from the chip combination 7, the padding layer 4 and the filling layer 5 are torn off, and the target chip 1 is re-bonded to the middle of the conductive base layer 3 to obtain a new second chip combination 8 composed of the carrier 2, the conductive base layer 3, the grinding pad 6, and the target chip 1, and the second chip combination 8 is partially subjected to plane grinding and de-layering with reference to the oblique sample grinding layer, and the time taken for plane grinding to each layer is calculated, which is used as an accurate calculation of the time taken for the same type of chip to perform plane grinding for different layer thicknesses. Therefore, the desired number of layers can be ground quickly and accurately to avoid waste.
[0054] In the embodiment of the utility model, the slide 2 is a glass slide or a wafer; the grinding pad 6 is a discarded chip or wafer fragment. Glass slides or wafers are common consumables in the laboratory of a wafer factory. The required slide 2 can be obtained by taking local materials without additional purchase or customization. In the laboratory of a wafer factory, because the material and failure analysis of the wafer is required, the fragments of the wafer are sometimes easier to obtain than the glass slide.
[0055] In an embodiment of the utility model, the conductive tape 31 is one or more of copper tape, silver tape, and carbon tape, so as to fix the target chip 1 firmly on the conductive base layer 3 while solving the problem that the glass slide itself is not conductive, so that the surface of the target chip 1 has good conductivity, thereby providing conditions for subsequent electron microscope observation.
[0056] In the embodiment of the utility model, the carrier 2 has a longitudinal side and a transverse side; two conductive tapes 31 with a width less than half the side length of the carrier and a length greater than the side length of the carrier are symmetrically attached to the surface of the carrier along the longitudinal side, and there is a gap between the two conductive tapes 31 of the first layer; two conductive tapes 31 with a width less than half the side length of the carrier and a length greater than the side length of the carrier are symmetrically attached to the surface of the two conductive tapes 31 of the first layer along the transverse side, and there is a gap between the two conductive tapes 31 of the second layer; the two conductive tapes 31 of the first layer and the two conductive tapes 31 of the second layer form a flat conductive base layer 3. With this design, gaps are reserved between the two conductive tapes 31 in the longitudinal and transverse directions to prevent uneven height difference after superposition, which provides a guarantee for the subsequent grinding of the target chip 1. At the same time, the design of the conductive tape 31 with a width less than half the side length of the carrier and a length greater than the side length of the carrier is also to avoid uneven height difference due to superposition when the carrier 2 is fully and firmly attached.
[0057] In an embodiment of the utility model, the padding layer 4 is one or more of copper tape, silver tape, and carbon tape, the long side of the padding layer 4 is parallel to one side of the carrier 2, and the width of the padding layer 4 is half the width of the conductive tape 31. In this way, while the target chip 1 can be firmly fixed on the conductive base layer 3, the surface of the target chip 1 has good conductivity, thereby providing conditions for subsequent electron microscope observation. The design of the width of the padding layer 4 being half the width of the conductive tape 31 can meet the placement of target chips 1 of most sizes, but the utility model is not limited to this, and can also be adjusted according to the size of the chip. Specifically, the padding layer 4 is made of the same material as the conductive tape 31, so as to reduce material preparation and make it more convenient to obtain and use.
[0058] Next, the device of the utility model is specifically described with a detailed embodiment.
[0059] Use hot melt glue to stick the taken out bare chip (target chip 1) to the middle position of the glass slide (glass slide is used because it is a material that is easy to obtain in the laboratory, no customization is required, and the laboratory also has the tools needed to cut the glass slide) (try to align it), stick copper tape on the surface of the glass slide (to increase conductivity and prevent the charging effect caused by insufficient conductivity of the copper tape from affecting the shooting effect), take out the other four chips of the same type or the thickness of the chip slightly higher than the middle chip, slightly higher is defined as greater than 1mm, and stick these four chips as the cushioning layer 4 to the four corners of the glass slide, and then use the same type of chip to raise the target chip 1 at half of the target chip 1 with ordinary copper tape, keep one end at the same height, and place the other end under the chip to be ground, presenting a situation where one end is high and the other end is low, stick the target chip 1 to the glass slide with hot melt glue, and then fill the gap at the bottom of the target chip 1 with hot melt glue to prevent uneven force and breakage in the hollow part during grinding, and then grind. This device borrows the principle of multi-point support. Through the support force of the four corners, the grinding pads 6 and the target chip 1 at the four corners of the slide are at the same height. This can only increase the force area during grinding, so that the chip will not be broken due to different grinding degrees at different positions of the target chip 1 or careless operation during the grinding process due to uniform force, or different positions of the chip surface due to grinding have different heights and cannot be observed uniformly.
[0060] Specific steps:
[0061] 1. De-encapsulate the complete chip (chemical method / laser method) to remove the bare chip (this step is performed by professional de-encapsulation personnel), which is used as the target chip 1.
[0062] 2. Take out a standard-sized slide and cut it into a square. Figure 3 The process of cutting the slide 2 is shown as an illustration, and a 2cm*2cm slide 2 is cut out. If there is not one, the slide is cut into a square as much as possible to facilitate subsequent pasting on the carrier of the machine.
[0063] 3. Use copper tape to cover the glass slide completely. Try to keep a gap between the tapes to prevent uneven height difference after stacking. This step is to solve the problem that the glass slide itself is not conductive. Use copper tape to cover the glass slide completely to increase conductivity. Figure 4 The process of pasting the first layer of conductive tape 31 is shown in FIG. Figure 5 The process of pasting the second layer of conductive tape 31 and forming a conductive base layer 3 is schematically shown, wherein the carrier 2 has a longitudinal edge and a transverse edge; two conductive tapes 31 with a width less than half the side length of the carrier and a length greater than the side length of the carrier are symmetrically attached to the surface of the carrier along the longitudinal edge, with a gap between the two conductive tapes 31 of the first layer; then two conductive tapes 31 with a width less than half the side length of the carrier and a length greater than the side length of the carrier are symmetrically attached to the surface of the two conductive tapes 31 of the first layer along the transverse edge, with a gap between the two conductive tapes 31 of the second layer; in this way, the two conductive tapes 31 of the first layer and the two conductive tapes 31 of the second layer form a flat conductive base layer 3.
[0064] 4. Divide the original copper tape into two (depending on the size of the chip, you can make some changes), and stick the copper tape with only half the width of the original in the middle (such as Figure 6 as shown in the left figure of FIG) as the raising layer 4.
[0065] 5. As Figure 6 As shown in the right figure, the target chip 1 (the chip that has been packaged) is pasted in the middle of the glass slide with hot melt adhesive (using carbon tape instead of hot melt adhesive will have a better effect, because carbon tape is more conductive, which can prevent poor conductivity in the subsequent machine operation), one side is pasted on the position of half of the copper tape (pad layer 4), and the other side is placed underneath with one end higher than the other, and the remaining part of the gap is filled with hot melt adhesive to serve as filling layer 5.
[0066] 6. Such as Figure 7 As shown, a chip or wafer fragment (grinding pad 6) with a thickness slightly higher than the target chip 1 is glued to the four corners of the glass slide with hot melt adhesive, and the four corners are aligned. After the hot melt adhesive is dried and solidified, proceed to the next step.
[0067] 7. Such as Figure 8As shown, the target chip 1 is polished and removed while polishing and removing layers until one corner of the target chip 1 has reached the target layer 10. The target layer 10 is an inclined oblique sample grinding layer formed on the target chip 1. The oblique sample grinding layer has different layers obliquely upward in the thickness of the target chip 1. Then the grinding is finished. Fig. 9 As shown, the target chip 1 has a protection layer 11, a wire layer 12, an oxide layer 13, and a substrate 14 from top to bottom.
[0068] 8. Place the ground target chip 1 into a gold plating machine for gold plating (the surface is treated by plating a metal layer on the surface to increase the conductivity of the chip surface when observed on the machine to prevent the charging effect from affecting the observation under the electron microscope. Because a layer of copper tape has been pasted on the slide in the previous step, and if carbon tape is used to stick the sample chip on the slide surface later, if the surface conductivity of the sample is good, the gold plating step can be omitted in this step).
[0069] 9. Conduct electron microscope observation, photograph the sample failure point or circuit structure to complete the analysis. If the desired surface is not reached, the chip assembly 7 can be taken out of the electron microscope and the grinding steps can be repeated until the analysis is completed.
[0070] Because the inclined sample grinding layer has been obtained, the different layers can be observed intuitively, and the number of layers ground can be more conveniently controlled when choosing to continue grinding:
[0071] 1. Place the chip assembly 7 on the heating plate and heat it until the hot melt adhesive melts again, then remove the chip.
[0072] 2 Tear off half of the copper tape and stick the chip in the middle again (such as Figure 2 (shown)
[0073] 3. Continue grinding the obtained second chip combination 8 with reference to the adjacent part that has been tilted to the bottom, or conduct comparative observation of different layers.
[0074] The above embodiments are only for illustrating the technical concept and features of the utility model, and their purpose is to enable people familiar with the technology to understand the content of the utility model and implement it accordingly, and they cannot be used to limit the protection scope of the utility model. Any equivalent changes or modifications made according to the spirit of the utility model should be included in the protection scope of the utility model.
Claims
1. A device for grinding a chip to evenly remove different layers after chip packaging, characterized in that: The device comprises a chip combination body composed of a carrier, a conductive base layer, a padding layer, a filling layer, a grinding pad, and a target chip, wherein the conductive base layer is formed by a conductive tape attached to the carrier, a conductive padding layer is arranged in the middle of the conductive base layer, one side of the target chip is placed on the conductive base layer, and the other side is placed on the padding layer, so that the target chip is in a state of one end being higher than the other end relative to the conductive base layer, and the gap formed between the padding layer, the conductive base layer, and the target chip is filled with the filling layer, and the grinding pad is aligned and fixed to the four corners of the carrier; The padding layer and the filling layer in the chip combination are configured to be selectively removed, and then the target chip is directly attached to the conductive base layer to form a second chip combination consisting of a carrier, a conductive base layer, a grinding pad, and a target chip.
2. The device for uniformly grinding the surface of a chip after depackaging according to claim 1, characterized in that: The carrier sheet is a square sheet structure.
3. The device for uniformly grinding the surface of a chip after depackaging according to claim 1, characterized in that: The filling layer is made of hot melt adhesive or conductive tape.
4. The device for uniformly grinding the surface of a chip after depackaging according to claim 1, characterized in that: The carrier sheet is a glass slide or a wafer; the grinding pad is a discarded chip or wafer fragment.
5. The device for uniformly grinding the surface of a chip after depackaging according to claim 1, characterized in that: The conductive tape is one or more of copper tape, silver tape and carbon tape.
6. The device for uniformly grinding the surface of a chip after depackaging according to claim 1, characterized in that: The carrier sheet has a longitudinal edge and a transverse edge; two conductive tapes with a width less than half the side length of the carrier and a length greater than the side length of the carrier are symmetrically attached to the surface of the carrier along the center of the longitudinal edge, with a gap between the two conductive tapes of the first layer; then two conductive tapes with a width less than half the side length of the carrier and a length greater than the side length of the carrier are symmetrically attached to the surface of the two conductive tapes of the first layer along the center of the transverse edge, with a gap between the two conductive tapes of the second layer; the two conductive tapes of the first layer and the two conductive tapes of the second layer form a flat conductive base layer.
7. The device for uniformly grinding the surface of a chip after depackaging according to claim 1, characterized in that: The padding layer is one or more of copper tape, silver tape, and carbon tape. The long side of the padding layer is parallel to one side of the carrier film, and the width of the padding layer is half the width of the conductive tape.
8. The device for uniformly grinding the surface of a chip after depackaging according to claim 7, characterized in that: The pad layer is made of the same material as the conductive tape.