A multi-chip retention arrangement structure and LED light bar

Abstract

A multi-chip fixed arrangement structure and an LED light bar, which relate to the field of LED technology. It includes a base and at least one LED chipset arranged on the base, characterized in that the LED chipset includes a plurality of primary chips and a plurality of secondary chips, the plurality of primary chips are arranged at intervals along a first track line, the plurality of secondary chips are arranged at intervals along a second track line, and the interval between a single secondary chip and two primary chips is relative. The adoption of the above technical solution significantly improves the uniformity of light and the heat dissipation efficiency. This optimized arrangement not only makes the lighting effect smoother and has no obvious dark areas, but also greatly improves the working stability of the LED and prolongs its life. In addition, more effective heat dissipation management reduces energy loss, thereby improving energy efficiency and reducing the cost of use.

Description

Technical Field

[0001] The utility model relates to the technical field of LEDs, and in particular to a multi-chip fixing arrangement structure. Background Art

[0002] like Figure 2 As shown in the figure, in the field of LED technology, the existing multi-chip arrangement structure has the problem of being scattered and the chip spacing is too far, resulting in uneven light distribution and low heat dissipation efficiency. This is not conducive to achieving high-quality lighting effects and maintaining the stability and life of LEDs. Therefore, there is an urgent need for an optimized arrangement scheme that aims to achieve the goal of uniform lighting and efficient heat dissipation by accurately calculating the most ideal distance between chips, thereby improving the overall performance and user experience of LED products. Utility Model Content

[0003] The purpose of the utility model is to provide a multi-chip retention arrangement structure in view of the defects and shortcomings of the prior art. To achieve the above purpose, the technical solution adopted by the utility model is:

[0004] A multi-chip retention arrangement structure, comprising a base, and at least one LED chip group arranged on the base, characterized in that the LED chip group comprises a plurality of primary chips and a plurality of secondary chips, the plurality of primary chips are arranged at intervals along a first track line, the plurality of secondary chips are arranged at intervals along a second track line, and a single secondary chip is opposite to the interval between two primary chips;

[0005] The primary chip and the secondary chip are provided with connection ports at both ends, and the connection ports include N-level and P-level. The N-level of the secondary chip is connected to the P-level of the primary chip, and the P-level of the secondary chip is connected to the N-level of another primary chip.

[0006] The secondary chip is connected to the primary chip by using metal wires.

[0007] The angle between the metal wire and the first track line or the second track line is in the range of 0-90°, and the first track line is parallel to the second track line.

[0008] The LED chipset also includes a first chipset, a second chipset and a third chipset.

[0009] The first chipset, the second chipset and the third chipset form two connection structures: a full-parallel structure and an N-parallel multi-string structure.

[0010] The full parallel structure includes a plurality of primary chips and secondary chips, and the primary chips and the secondary chips and the first chipset, the second chipset and the third chipset formed therefrom are connected in parallel with each other.

[0011] The N-parallel multi-string structure is composed of a LED chip group consisting of a primary chip and a secondary chip connected in series and connected in parallel.

[0012] Isolation belts are arranged opposite to each other at two ends of the base, and power ports are arranged on the isolation belts. The intervals between the primary chips at the two ends of the base and the isolation belts are consistent, and the intervals between the secondary chips are equal.

[0013] After adopting the above technical solution, the beneficial effects of the utility model are:

[0014] Significantly improves light uniformity and heat dissipation efficiency. This optimized arrangement not only makes the lighting effect smoother and has no obvious dark areas, but also greatly improves the working stability of the LED and extends its life. In addition, more effective heat dissipation management reduces energy loss, thereby improving energy efficiency and reducing use costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0016] Figure 1 It is a structural schematic diagram of the utility model;

[0017] Figure 2 It is a schematic diagram of the multi-chip retention arrangement structure of the prior art.

[0018] Explanation of the accompanying drawings: 1. Base; 11. LED chipset; 111. First chipset; 112. Second chipset; 113. Third chipset; 12. Primary chip; 121. P-level; 122. N-level; 13. Secondary chip; 14. Isolation zone; 141. Power port; 2. First track line; 3. Second track line. DETAILED DESCRIPTION

[0019] The utility model is further described in detail below in conjunction with the accompanying drawings.

[0020] This specific embodiment is merely an explanation of the present invention and is not a limitation of the present invention. After reading this specification, those skilled in the art may make non-creative modifications to the present embodiment as needed, but such modifications are protected by patent law as long as they are within the scope of the claims of the present invention.

[0021] In order to make the purpose, technical scheme and advantages of the embodiments of the utility model clearer, the technical scheme in the embodiments of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiments of the utility model. Obviously, the described embodiments are part of the embodiments of the utility model, not all of the embodiments. Generally, the components of the embodiments of the utility model described and shown in the drawings here can be arranged and designed in various different configurations.

[0022] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the present invention to be protected, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0023] In the description of the present utility model, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inside", "outside", etc. indicate the orientation or position relationship based on the orientation or position relationship shown in the accompanying drawings, or the orientation or position relationship in which the utility model product is usually placed when in use, which is only for the convenience of describing the utility model and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present utility model. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0024] In addition, the terms "horizontal", "vertical" and the like do not mean that the components are required to be absolutely horizontal or suspended, but can be slightly tilted. For example, "horizontal" only means that its direction is more horizontal than "vertical", and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0025] In the description of the present invention, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "set", "install", "connect", and "connect" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0026] Reference Figure 1 , a multi-chip retention arrangement structure is proposed,

[0027] A multi-chip retention arrangement structure, comprising a base 1, and at least one LED chip group 11 arranged on the base 1, characterized in that the LED chip group 11 comprises a plurality of primary chips 12 and a plurality of secondary chips 13, wherein the plurality of primary chips 12 are arranged at intervals along a first track line 2, and the plurality of secondary chips 13 are arranged at intervals along a second track line 3, and a single secondary chip 13 is opposite to the interval between two primary chips 12;

[0028] Connection ports are provided at both ends of the primary chip 12 and the secondary chip 13, and the connection ports include an N-level 122 and a P-level 121. The N-level 122 of the secondary chip 13 is connected to the P-level 121 of the primary chip 12, and the P-level 121 of the secondary chip 13 is connected to the N-level 122 of another primary chip 12.

[0029] This embodiment includes a plurality of LED chip groups 11, which are arranged on a base 1 and connected in series and parallel by metal wires. Starting from the power input, the current enters through the positive electrode and flows through each primary chip and secondary chip along the series path, and then returns through the negative electrode loop, thus forming a closed circuit.

[0030] The key to optimizing the "a" spacing is to maintain the symmetry between the chips at both ends of the base and the edges of their corresponding brackets. By ensuring the consistency of this spacing (ranging from 5-1500μm), the light output can be balanced along the axis of the entire light bar to prevent the light from deflecting to either end. This precise geometric positioning is conducive to maintaining the consistency of lighting effects under various installation conditions and ensuring the optimization of overall optical performance.

[0031] The "b" spacing refers to the spatial distance between individual chips, and its uniformity (ranging from 5-1000μm) is critical to achieving overall uniformity of light emission and heat dissipation. Equal spacing helps ensure that each LED chip receives the same amount of current and produces stable and consistent brightness. In addition, this also facilitates the uniform distribution of heat across the base, avoiding the occurrence of hot spots and improving the thermal efficiency and life of the entire LED light strip.

[0032] By reducing the spacing of the "c" interval and correspondingly increasing the spacing of the "d" interval, this design strategy expands the distribution range of the chips on the substrate, thereby optimizing the heat dissipation path. A wider distribution of chips means a larger surface area involved in heat exchange, which improves the heat dissipation efficiency, which is crucial for maintaining the LED operating temperature within the optimal range, and can significantly improve the performance stability of the LED light strip and reduce light decay.

[0033] The above technical solution significantly improves the uniformity of light and heat dissipation efficiency. This optimized arrangement not only makes the lighting effect smoother and has no obvious dark areas, but also greatly improves the working stability of LEDs and prolongs their lifespan. In addition, more effective heat dissipation management reduces energy loss, thereby improving energy efficiency and reducing use costs.

[0034] It should also be noted that in addition to the standard straight track line, a variety of track line designs can be used, such as circular, wavy or custom graphics, to suit different lighting needs and design aesthetics. This flexibility allows for more optical and thermal management solutions that can optimize the layout of LED chips for specific applications. For example, circular tracks can be used to create evenly distributed ring lighting, while wavy or curved tracks can provide more interesting visual effects and wider heat distribution. Regardless of the shape of the track line, the key is to ensure that each LED chip can be effectively connected and laid out to achieve optimal performance and optical properties.

[0035] Furthermore, the secondary chip 13 is connected to the primary chip 12 by metal wires.

[0036] The main advantage of using wire to connect the secondary chip and the primary chip is that it provides a stable electrical connection, ensuring that the current flows smoothly through the chip, which not only improves the electrical stability but also optimizes the lighting effect of the LED light strip. The elasticity and conductivity of the wire also facilitate flexible design, so that the distance between the chips in the LED light strip can be adjusted as needed, which is essential for uniform light distribution and effective heat dissipation. In addition, this connection method can enhance the maintainability and reliability of the light strip because it allows the entire light strip to continue to work even if individual LED chips fail.

[0037] As an alternative to wire, conductive adhesives or solder pastes can be used to establish connections between chips. These materials can provide similar electrical performance and heat dissipation characteristics, and may be easier to automate in some applications, speeding up the assembly process. In addition, printed conductive tracks on circuit boards are also a possibility, providing a structural connection method that can further integrate electronic components and simplify assembly.

[0038] Furthermore, the angle between the metal wire and the first track line 2 or the second track line 3 is in the range of 0-90°, and the first track line 2 is parallel to the second track line 3 .

[0039] The advantages of the 0-90° angle range between the metal wire and the track line and the parallel track line layout are that they provide optimized conductive paths and heat dissipation channels. By adjusting the angle of the metal wire, the current distribution and heat dissipation performance can be controlled to adapt to different usage environments and lighting requirements. In addition, the parallel track lines ensure consistent chip spacing, which is conducive to achieving uniform light output and improving the overall lighting effect. This design also helps to simplify the manufacturing process because the regular layout is easy to automate and improve production efficiency.

[0040] As an alternative, LED chips can be connected in a more flexible way, such as using bendable conductive materials or multi-layer printed circuit boards (PCBs) to achieve different shapes of track lines. For example, curved or spiral track lines can provide more diverse optical designs while potentially allowing for better heat dissipation performance. Through these innovative designs, customized solutions can be provided for specific product designs or lighting tasks while maintaining electrical stability and thermal management efficiency.

[0041] Furthermore, the LED chipset 11 also includes a first chipset 111, a second chipset 112 and a third chipset 113. The first chipset 111, the second chipset 112 and the third chipset 113 form two connection structures, namely a full-parallel structure and an N-parallel multi-string structure. The full-parallel structure includes a plurality of primary chips 12 and secondary chips 13. The primary chips 12 and the secondary chips 13 and the first chipset 111, the second chipset 112 and the third chipset 113 formed by the primary chips 12 and the secondary chips 13 are connected in parallel with each other. The N-parallel multi-string structure is a LED chipset 11 consisting of primary chips 12 and secondary chips 13 connected in series and connected in parallel.

[0042] The advantage of the full parallel and N-parallel multi-string connection structure composed of the first, second and third chip groups is that it provides a high degree of redundancy and current distribution flexibility. The full parallel connection ensures that even if one of the chip groups has a problem, the entire LED system can still work normally, thereby improving the reliability of the system. The N-parallel multi-string structure allows the current to be evenly distributed on multiple paths, reducing the current load on a single path, which is conducive to improving the service life of the chip and reducing the failure rate. In addition, this design can locally limit the loss when a part of the chip fails, keeping other parts working, which is very important in providing continuous lighting.

[0043] As an alternative to this structure, a modular design can be considered, in which each LED chipset is designed as a separately replaceable module. In this way, if a module fails, it can be quickly replaced without replacing the entire LED system, greatly simplifying maintenance and upgrades. In addition, using an intelligent drive circuit to dynamically adjust the current of each chipset is also a solution, which can intelligently distribute the current according to the performance and fault conditions of the chip, further improving the overall efficiency and life of the system.

[0044] Furthermore, isolation zones 14 are provided at opposite ends of the base 1 , and power ports 141 are provided on the isolation zones 14 . The primary chips 12 at both ends of the base 1 are spaced in the same distance from the isolation zones 14 , and the secondary chips 13 are spaced at equal distances from each other.

[0045] The design advantage of having isolation strips and power ports at both ends of the base is that it provides clear electrical definition and enhanced safety. The isolation strip acts as a physical and electrical barrier to help prevent short circuits and ensure safe operation of the LED chipset. At the same time, the presence of the power port allows current to flow into the LED chipset, while the ports set on the isolation strip facilitate external connections and maintenance. The consistent spacing between the primary chips and the isolation strip at both ends of the base and the equal spacing between the secondary chips help maintain a neat structure and improve the aesthetics of the product, while also helping to achieve a uniform distribution of light output.

[0046] As an alternative to this design, integrated ports and embedded isolation structures can be used. Such a design can reduce exposed wiring ports, further improving the overall durability and safety of the product. In addition, the use of flexible non-conductive materials as isolation strips can provide more freedom in shape and size in different product designs while maintaining the integrity and functionality of the circuit. This design allows customization and innovation based on application needs without sacrificing performance

[0047] When working, the primary chip and the secondary chip are arranged at intervals along parallel track lines through metal wires, and are connected to each other through P-level and N-level wiring ports to form a series-parallel circuit structure.

[0048] The utility model also provides an LED light bar, comprising the above-mentioned multi-chip retention arrangement structure. Since the LED light bar has the above-mentioned multi-chip retention arrangement structure, it also has the beneficial effects of the multi-chip retention arrangement structure.

[0049] The above is only used to illustrate the technical solution of the utility model rather than to limit it. Other modifications or equivalent substitutions made to the technical solution of the utility model by ordinary technicians in this field should be included in the scope of the claims of the utility model as long as they do not depart from the spirit and scope of the technical solution of the utility model.

Claims

1. A multi-chip retention arrangement structure, comprising a base (1) and at least one LED chip group (11) arranged on the base (1), characterized in that: The LED chip group (11) comprises a plurality of primary chips (12) and a plurality of secondary chips (13), wherein the plurality of primary chips (12) are arranged at intervals along a first track line (2), and the plurality of secondary chips (13) are arranged at intervals along a second track line (3), and a single secondary chip (13) is opposite to the interval between two primary chips (12); The primary chip (12) and the secondary chip (13) are provided with connection ports at both ends, the connection ports comprising an N-level (122) and a P-level (121), the N-level (122) of the secondary chip (13) being connected to the P-level (121) of the primary chip (12), and the P-level (121) of the secondary chip (13) being connected to the N-level (122) of another primary chip (12).

2. A multi-chip retention arrangement structure according to claim 1, characterized in that: The secondary chip (13) and the primary chip (12) are connected by metal wires.

3. The multi-chip retention arrangement structure according to claim 2, characterized in that: The angle between the metal wire and the first track line (2) or the second track line (3) is in the range of 0-90°, and the first track line (2) is parallel to the second track line (3).

4. The multi-chip retention arrangement structure according to claim 1, characterized in that: The LED chip group (11) further comprises a first chip group (111), a second chip group (112) and a third chip group (113).

5. The multi-chip retention arrangement structure according to claim 4, characterized in that: The first chipset (111), the second chipset (112) and the third chipset (113) form two connection structures: a full parallel structure and an N-parallel multi-string structure.

6. The multi-chip retention arrangement structure according to claim 5, characterized in that: The fully parallel structure comprises a plurality of primary chips (12) and secondary chips (13), wherein the primary chips (12) and the secondary chips (13) and the first chipset (111), the second chipset (112), and the third chipset (113) formed by the primary chips (12) and the secondary chips (13) are connected in parallel with each other.

7. The multi-chip retention arrangement structure according to claim 5, characterized in that: The N-parallel multi-string structure is composed of an LED chip group (11) consisting of a primary chip (12) and a secondary chip (13) connected in series, which are connected in parallel.

8. The multi-chip retention arrangement structure according to claim 1, characterized in that: Isolation belts (14) are provided at opposite ends of the base (1), and a power supply port (141) is provided on the isolation belt (14).

9. The multi-chip retaining arrangement structure according to claim 8, characterized in that: The primary chips (12) and the isolation belt (14) located at both ends of the base (1) are spaced at the same distance, and the secondary chips (13) are spaced at equal distances from each other.

10. An LED light strip, characterized in that: It comprises a multi-chip retaining arrangement structure as claimed in any one of claims 1 to 9.

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