Display panel and display device

Abstract

The utility model provides a display panel and a display device. The display panel comprises a substrate, a driving circuit layer, a pixel limiting layer, an isolating layer and a transparent conducting layer which are sequentially stacked. The driving circuit layer is located on one side of the substrate. The driving circuit layer comprises a common voltage signal line. The pixel limiting layer is located on the side, away from the substrate, of the driving circuit layer. The isolation layer is located on the side, away from the substrate, of the pixel defining layer. The isolation layer is provided with isolation layer openings in one-to-one correspondence with the pixel openings of the pixel limiting layer. The transparent conducting layer is located on the side, away from the substrate, of the driving circuit layer. The transparent conductive layer comprises transparent electrodes which are located in the opening of the isolation layer and separated from each other through the isolation layer. The isolation layer includes a first conductive material layer. The transparent electrode is electrically connected with the first conductive material layer, and the first conductive material layer is electrically connected with a common voltage signal line in the driving line layer through a via hole penetrating through the pixel limiting layer. The circuit structure is simplified, and the frame size of the display panel is reduced.

Description

Technical Field

[0001] The utility model relates to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] Organic Light Emitting Diode (OLED) display devices use OLED devices as light-emitting elements to achieve active light-emitting display. Compared with liquid crystal display (LCD) devices, they do not require a backlight module, which can greatly simplify the device structure and reduce the size of the device. They also have the characteristics of low power consumption, high contrast, and fast response speed. They are currently rapidly applied in consumer electronics and other fields.

[0003] Currently, the wiring in the border area of ​​OLED display panels is complex, the wiring design is difficult, and the border size is difficult to further reduce. Utility Model Content

[0004] The utility model provides a display panel and a display device, which are used to reduce the difficulty of display panel frame routing design and reduce the frame size.

[0005] A first aspect of the present invention provides a display panel, comprising:

[0006] substrate;

[0007] The driving circuit layer is located on one side of the substrate; the driving circuit layer includes a common voltage signal line;

[0008] A pixel defining layer, located on a side of the driving circuit layer facing away from the substrate;

[0009] The isolation layer is located on a side of the pixel defining layer away from the substrate, and the isolation layer is provided with isolation layer openings corresponding to the pixel openings of the pixel defining layer one by one;

[0010] A transparent conductive layer is located on the side of the driving circuit layer away from the substrate; the transparent conductive layer includes: transparent electrodes located in the openings of the isolation layer and isolated from each other by the isolation layer;

[0011] The isolation layer includes a first conductive material layer; the transparent electrode is electrically connected to the first conductive material layer, and the first conductive material layer is electrically connected to a common voltage signal line in the driving circuit layer through a via hole penetrating the pixel defining layer.

[0012] In the display panel provided by the utility model, the display panel includes a display area and a non-display area; the pixel opening is located in the display area;

[0013] The driving circuit layer also includes a gate driving circuit; the gate driving circuit is located in the non-display area;

[0014] The common voltage signal line is located on a side of the gate driving circuit close to the display area.

[0015] In the display panel provided by the utility model, the common voltage signal line is located between the gate driving circuit and the pixel opening.

[0016] In the display panel provided by the utility model, the isolation layer is located in the display area.

[0017] In the display panel provided by the utility model, along the direction away from the display area, the ratio of the width of the gate driving circuit to the width of the non-display area ranges from 0.37 to 0.78.

[0018] In the display panel provided by the utility model, the gate driving circuit layer includes a plurality of conductive film layers; the common voltage signal line and at least one of the plurality of conductive film layers are located in the same layer.

[0019] In the display panel provided by the utility model, the display panel further comprises an isolation dam; the isolation dam is located on a side of the gate drive circuit away from the display area;

[0020] The spacing between the orthographic projection of the isolation dam on the substrate and the orthographic projection of the gate driving circuit on the substrate ranges from 250 μm to 350 μm.

[0021] In the display panel provided by the utility model, the orthographic projection of the film layer where the common signal line is located on the substrate is outside the orthographic projection of the area between the gate drive circuit and the isolation dam on the substrate;

[0022] In the region between the gate driving circuit and the isolation dam, the film layer located on the side of the common voltage signal line facing the substrate is in direct contact with the film layer located on the side of the common voltage signal line facing away from the substrate.

[0023] In the display panel provided by the utility model, the display panel further comprises a driving electrode layer; the driving electrode layer is located between the driving circuit layer and the pixel defining layer; the driving electrode layer comprises a driving electrode opposite to the transparent electrode;

[0024] The orthographic projection of the driving electrode on the substrate, and the area between the gate driving circuit and the isolation dam are outside the orthographic projection on the substrate;

[0025] In the area between the gate driving circuit and the isolation dam, the film layer located on the side of the driving electrode layer facing the substrate is in direct contact with the film layer located on the side of the driving electrode layer facing away from the substrate.

[0026] In the display panel provided by the utility model, the common voltage signal line is electrically connected to the isolation layer through a plurality of via holes.

[0027] In the display panel provided by the utility model, the display panel also includes:

[0028] The light-emitting material layer is located on the side of the driving circuit layer away from the substrate; the light-emitting material layer includes a plurality of light-emitting units; the light-emitting units are located in the pixel openings, and the plurality of light-emitting units are separated by the pixel defining layer and the isolation layer;

[0029] The transparent electrode is located on the side of the light-emitting material layer facing away from the substrate; the transparent electrode is a cathode or an anode.

[0030] In the display panel provided by the utility model, the isolation layer includes a support portion and a top portion; the top portion is located on the side of the support portion away from the substrate; the orthographic projection of the support portion on the substrate falls within the orthographic projection of the top portion on the substrate, and the distance between the edge of the orthographic projection of the support portion on the substrate and the edge of the orthographic projection of the top portion on the substrate is greater than 0;

[0031] The transparent electrode contacts the support portion.

[0032] In the display panel provided by the utility model, the isolation layer further comprises an insulating material layer; the insulating material layer is located on the side of the first conductive material layer away from the substrate; and the top comprises the insulating material layer.

[0033] In the display panel provided by the utility model, the isolation layer further includes a second conductive material layer and a third conductive material layer; the second conductive material layer is located on the side of the first conductive material layer away from the insulating material layer; the third conductive material layer is located between the first conductive material layer and the insulating material layer;

[0034] The top portion also includes a third conductive material layer.

[0035] In the display panel provided by the utility model, the display panel also includes:

[0036] A first inorganic encapsulation layer is located on a side of the transparent conductive layer facing away from the substrate; the first inorganic encapsulation layer includes an encapsulation unit; the encapsulation unit is located in an opening of the isolation layer and is separated by the isolation layer;

[0037] A second inorganic encapsulation layer is located on a side of the first inorganic encapsulation layer facing away from the substrate;

[0038] The organic encapsulation layer is located between the first inorganic encapsulation layer and the second inorganic encapsulation layer.

[0039] A second aspect of the present invention provides a display device, comprising any one of the above display panels.

[0040] The beneficial effects of the utility model are as follows:

[0041] The utility model provides a display panel and a display device, wherein the display panel comprises: a substrate, a driving circuit layer, a pixel defining layer, an isolation layer and a transparent conductive layer which are stacked in sequence. The driving circuit layer is located on one side of the substrate. The driving circuit layer comprises a common voltage signal line. The pixel defining layer is located on the side of the driving circuit layer away from the substrate. The isolation layer is located on the side of the pixel defining layer away from the substrate. The isolation layer is provided with an isolation layer opening corresponding to the pixel opening of the pixel defining layer. The transparent conductive layer is located on the side of the driving circuit layer away from the substrate. The transparent conductive layer comprises a transparent electrode located in the isolation layer opening and isolated from each other by the isolation layer. The isolation layer comprises a first conductive material layer. The transparent electrode is electrically connected to the first conductive material layer, and the first conductive material layer is electrically connected to the common voltage signal line in the driving circuit layer through a via hole penetrating the pixel defining layer. The first conductive material layer of the isolation layer is electrically connected to the common voltage signal line through a via hole penetrating the pixel defining layer, and the transparent electrode located in the isolation layer opening is mutually conductive through the first conductive material layer, thereby realizing the electrical connection between the transparent electrode and the common voltage line, which is conducive to simplifying the circuit structure and reducing the frame size of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings required for use in the embodiments of the utility model will be briefly introduced below. Obviously, the drawings introduced below are only some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0043] Figure 1 This is a schematic diagram of a cross-sectional structure of a display panel provided in an embodiment of the utility model;

[0044] Figure 2A is a schematic diagram of a cross-sectional structure of a display panel in the related art;

[0045] Figure 2B It is a schematic diagram of a top view structure of a display panel in the related art;

[0046] Figure 3A One of the schematic diagrams of the manufacturing process of the display panel provided in the embodiment of the utility model;

[0047] Figure 3B One of the schematic diagrams of the manufacturing process of the transparent electrode of the display panel provided by the embodiment of the utility model;

[0048] Figure 4A A second schematic diagram of a manufacturing process of a transparent electrode for a display panel provided by an embodiment of the utility model;

[0049] Figure 4B The third schematic diagram of the manufacturing process of the transparent electrode of the display panel provided by the embodiment of the utility model;

[0050] Figure 5 The second schematic diagram of the cross-sectional structure of the display panel provided by the embodiment of the utility model;

[0051] Fig. 6A A schematic diagram of a top view of a display panel provided in an embodiment of the utility model;

[0052] Figure 6B The third schematic diagram of the cross-sectional structure of the display panel provided by the embodiment of the utility model;

[0053] Figure 7 A fourth schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the utility model;

[0054] Figure 8 This is one of the partially enlarged schematic diagrams of the cross-sectional structure of the display panel provided by the embodiment of the utility model;

[0055] Fig.9A A second partially enlarged schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the utility model;

[0056] Fig. 9B One of the schematic diagrams of the isolation layer manufacturing process provided by the embodiment of the utility model;

[0057] Fig. 10A A third partially enlarged schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the utility model;

[0058] Fig. 10B The second schematic diagram of the isolation layer manufacturing process provided by the embodiment of the utility model;

[0059] Fig.11 A fifth schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the utility model;

[0060] Fig.12 A sixth schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the present utility model;

[0061] Fig.13 A flow chart of a method for manufacturing a display panel provided in an embodiment of the present utility model. DETAILED DESCRIPTION

[0062] In order to make the above-mentioned purposes, features and advantages of the utility model more obvious and easy to understand, the utility model will be further described in conjunction with the drawings and examples below. However, the example embodiments can be implemented in various forms and should not be understood as being limited to the embodiments described herein; on the contrary, these embodiments are provided to make the utility model more comprehensive and complete, and to fully convey the concepts of the example embodiments to those skilled in the art. The same figure marks in the figures represent the same or similar structures, and their repeated descriptions will be omitted. The words expressing position and direction described in the utility model are all explained with the drawings as examples, but changes can be made as needed, and the changes made are all included in the scope of protection of the utility model. The drawings of the utility model are only used to illustrate the relative position relationship and do not represent the true proportion.

[0063] Organic Light Emitting Diode (OLED) display devices use OLED devices as light-emitting elements to achieve active light-emitting display. Compared with liquid crystal display (LCD) devices, they do not require a backlight module, which can greatly simplify the device structure and reduce the size of the device. They also have the characteristics of low power consumption, high contrast, and fast response speed. They are currently rapidly applied in consumer electronics and other fields.

[0064] Currently, the wiring in the border area of ​​OLED display panels is complex, the wiring design is difficult, and the border size is difficult to further reduce.

[0065] In view of this, a first aspect of an embodiment of the present invention provides a display panel for solving the above-mentioned problem.

[0066] Figure 1 This is one of the cross-sectional structural schematic diagrams of the display panel provided in the embodiment of the utility model.

[0067] In the embodiment of the present utility model, Figure 1 The display panel includes: a substrate 100 , a driving circuit layer 200 , a pixel defining layer 300 , an isolation layer 400 and a transparent conductive layer 500 .

[0068] The substrate 100 is located at the bottom of the display panel and is used to carry the film layer (such as the driving circuit layer 200, etc.) located thereon. The shape of the substrate 100 is adapted to the shape of the display panel, and can usually be set to a square, rectangle, etc. When applied to a special-shaped display, the shape of the substrate 100 can also be set to other shapes such as a circle, which is not limited here. The size of the substrate 100 is adapted to the size of the display panel, which is not limited here. In some embodiments, the substrate 100 can be made of flexible materials such as polyimide (PI) to make a flexible display panel. In some embodiments, the substrate 100 can be made of rigid materials such as glass to make a rigid display panel. This is not limited here. In some embodiments, the substrate 100 can be made of transparent materials. For example, in a bottom-emitting OLED display panel, light is emitted from the bottom of the display panel, and the substrate 100 needs to use a good light-transmitting material to improve the light transmittance. In some embodiments, the substrate 100 can also be made of non-transparent materials. For example, in a top-emitting OLED display panel, the substrate 100 uses non-transparent materials to avoid the ambient light incident from the bottom of the display panel affecting the contrast of the display panel. No limitation is made here.

[0069] The driving circuit layer 200 is located on one side of the substrate 100. The driving circuit layer 200 generally includes a plurality of stacked conductive film layers and an insulating layer disposed between two adjacent conductive film layers, and the conductive film layers are used to set signal routing to form a driving circuit, such as a pixel driving circuit located in a display area of ​​a display panel and a gate driving (Gate On Array, GOA) circuit located in a non-display area of ​​the display panel, etc., which are not limited here.

[0070] The pixel defining layer 300 is located on the side of the driving circuit layer 200 away from the substrate 100. The pixel defining layer 300 is provided with a plurality of pixel openings P, which are used to define the position of the sub-pixel unit of the display panel, and one pixel opening P corresponds to one sub-pixel unit. The pixel defining layer 300 can be made of a photosensitive resin material, such as photosensitive polyimide, so as to facilitate the opening of the pixel defining layer 300. No limitation is made here.

[0071] The isolation layer 400 is located on the side of the pixel defining layer 300 facing away from the substrate 100. The isolation layer 400 is provided with isolation layer openings S corresponding to the pixel openings P one by one, and adjacent isolation layer openings S are isolated from each other by the isolation layer 400. Figure 1As shown, the orthographic projection of the pixel opening P1 on the substrate 100 can be set to be within the orthographic projection of the corresponding isolation layer opening S on the substrate 100, that is, the opening size of the isolation layer opening S is larger than the opening size of the pixel opening P, which is beneficial to improve the aperture ratio of the display panel. The isolation layer 400 includes a first conductive material layer 401. The conductive material used in the first conductive material layer 401 has good electrical conductivity. For example, the material of the first conductive material layer 401 can be aluminum, etc., which is not limited here.

[0072] The transparent conductive layer 500 is located on the side of the driving circuit layer 200 facing away from the substrate 100. The transparent conductive layer 500 includes transparent electrodes 501 located in the isolation layer opening S and isolated from each other by the isolation layer 400. Specifically, the transparent conductive layer 500 may include a plurality of transparent electrodes 501, one transparent electrode 501 corresponds to one isolation layer opening S, and the transparent electrode 501 is located in the isolation layer opening S corresponding to it.

[0073] In particular, in the embodiment of the utility model, the transparent electrode 501 is electrically connected to the first conductive material layer 401. For example, the transparent electrode 501 can be in direct contact with the first conductive material layer 401, so that the transparent electrodes 501 located in different isolation layer openings S are mutually conductive through the first conductive material layer 401. The driving circuit layer 200 includes a common voltage signal line 201, and the first conductive material layer 401 is electrically connected to the common voltage signal line 201 through a via hole penetrating the pixel defining layer 300, so that each transparent electrode 501 is electrically connected to the common voltage signal line 201 through the first conductive material layer 401.

[0074] like Figure 1 As shown, in the implementation of the present invention, the display panel further includes a driving electrode layer 600 and a light-emitting material layer 700 .

[0075] The driving electrode layer 600 is located between the driving circuit layer 200 and the pixel defining layer 300. The driving electrode layer 600 includes a plurality of driving electrodes 601. One driving electrode 601 corresponds to one pixel opening P, and the orthographic projection of the pixel opening P on the substrate 100 at least partially overlaps with the orthographic projection of the corresponding driving electrode 601 on the substrate 100. For example, the orthographic projection of the pixel opening P on the substrate 100 may all fall within the orthographic projection of the corresponding driving electrode 601 on the substrate 100, which is not limited here.

[0076] The light-emitting material layer 700 is located on the side of the driving circuit layer 200 away from the substrate 100, and is located between the driving electrode layer 600 and the transparent conductive layer 500. The light-emitting material layer 700 includes a plurality of light-emitting units 701, one light-emitting unit 701 corresponds to one pixel opening P, the light-emitting unit 701 is located in the corresponding pixel opening P, and each light-emitting unit 701 is isolated from each other by the pixel defining layer 300 and the isolation layer 400.

[0077] like Figure 1 As shown, the light-emitting unit 701 is electrically connected to the driving electrode 601 and the transparent electrode 501 respectively located on both sides of the light-emitting unit 701, and one light-emitting unit 701 and the driving electrode 601 and the transparent electrode 501 respectively located on both sides of the light-emitting unit 701 constitute a light-emitting device. In the embodiment of the utility model, the light-emitting device can be an OLED device, the light-emitting unit 701 is an OLED unit, and the driving electrode 601 and the transparent electrode 501 are used to load voltage on both sides of the OLED unit respectively to form a potential difference, thereby forming a current that drives the OLED unit to emit light. In a specific implementation, the OLED unit includes a plurality of light-emitting functional film layers, for example, the OLED unit may include a five-layer structure including a hole injection layer (HIL), a hole transport layer (HTL), a light-emitting layer (EL), an electron transport layer (ETL) and an electron injection layer (EIL), which is not limited here.

[0078] In some embodiments, the driving electrode 601 can be the anode of the OLED device, and the transparent electrode 501 can be the cathode of the OLED device. The driving electrode 601 is used to provide holes, and the transparent electrode 501 is used to provide electrons. The holes provided by the driving electrode 601 are input by the hole input end (such as the hole injection layer) of the OLED unit, and the electrons provided by the transparent electrode 501 are input by the electron input end (such as and electron injection layer) of the OLED unit. The holes and electrons are recombined in the light-emitting layer EL of the OLED unit to radiate light.

[0079] In some embodiments, the driving electrode 601 can be the cathode of the OLED device, and the transparent electrode 501 can be the anode of the OLED device. The driving electrode 601 is used to provide electrons, and the transparent electrode 501 is used to provide holes. The holes provided by the transparent electrode 501 are input into the hole input end (such as the hole injection layer) of the OLED unit, and the electrons provided by the driving electrode 601 are input into the electron input end (such as the electron injection layer) of the OLED unit. The holes and electrons are recombined in the light-emitting layer EL of the OLED unit to radiate light.

[0080] In the embodiment of the present utility model, the OLED device is driven to emit light through the driving electrode 601. Specifically, in the embodiment of the present utility model, the driving electrode 601 and the transparent electrode 501 are both electrically connected to the driving circuit layer 200, and the difference is that the transparent electrode 501 is connected to the common voltage signal line 201 in the driving circuit layer 200, and the driving electrode 601 is connected to the pixel driving circuit (not shown in the figure) in the driving circuit layer 200. For all OLED devices in the display panel, the transparent electrodes 501 of each OLED device are mutually conductive through the first conductive material layer 401, and are electrically connected to the common voltage signal line 201 through the first conductive material layer, so that during the entire display process, the transparent electrode 501 of each OLED device is loaded with a common voltage of substantially the same size and fixed through the common voltage signal line 201. The driving electrode 601 of each OLED device is electrically connected to a pixel driving circuit separately, and each driving electrode 601 can be loaded with a driving voltage separately through the pixel driving circuit connected thereto. During the entire display process, the OLED device whose driving electrode 601 is loaded with the driving voltage emits light, and the OLED device whose driving electrode 601 is not loaded with the driving voltage does not emit light, thereby achieving the goal of driving the OLED device to emit light by driving the driving electrode 601.

[0081] For example, the transparent electrode 501 can be the cathode of the OLED device, the common voltage signal line 201 can be the negative voltage signal line VSS for loading negative voltage, the driving electrode 601 can be the anode of the OLED device, and during the display process, the pixel driving circuit loads a positive voltage on the driving electrode 601 of the OLED device that needs to emit light, driving the OLED device that needs to emit light to emit light. When the transparent electrode 501 is the anode of the OLED device and the driving electrode 601 is the cathode of the OLED device, the common voltage signal line 201 can be the positive voltage signal line VDD. This is not limited here.

[0082] In the display panel provided by the embodiment of the utility model, the first conductive material layer 401 of the isolation layer 400 is electrically connected to the common voltage signal line 201 through a via hole penetrating the pixel defining layer 300, and the transparent electrodes 501 of each OLED device are mutually conductive through the first conductive material layer 401, so that a common voltage can be applied to each OLED device at the same time, which is beneficial to simplifying the circuit structure of the display panel frame area and further realizing the narrowing of the frame.

[0083] Figure 2A is a schematic diagram of a cross-sectional structure of a display panel in the related art; Figure 2B It is a schematic diagram of a top view structure of a display panel in the related art.

[0084] Specifically, the display panel generally includes a display area and a non-display area surrounding the display area. Figure 2A and Figure 2BAs shown, in the related art, the common voltage signal line 201 is located in the non-display area FA and is located on the side of the gate driving circuit 202 away from the display area AA. The orthographic projection of the common voltage signal line 201 on the substrate 100 and the orthographic projection of the isolation layer 400 on the substrate 1 do not overlap with each other, and there is a certain overlapping distance between the transparent electrode of the OLED device and the common voltage signal line 201. For example, in the related art, the transparent conductive layer 500 where the transparent electrode is located is usually manufactured by full-surface evaporation. The transparent electrode located in the opening of the isolation layer is electrically connected to the transparent conductive layer 500 located outside the opening of the isolation layer. The transparent conductive layer 500 located outside the opening of the isolation layer is overlapped on the surface of the overlapping signal line 602 located on the same layer as the driving electrode 601. The overlapping signal line 602 is connected to the common voltage signal line 201 through a via hole penetrating the insulating layer in the signal line layer 200. That is, the transparent electrode of the OLED device and the common voltage signal line 201 need to be connected through multiple overlapping structures such as the transparent conductive layer 500 located outside the opening of the isolation layer and the overlapping signal line 602, which makes the signal line routing in the non-display area of ​​the display panel more complicated, and causes the area used for signal line routing in the non-display area of ​​the display panel to be larger, making it difficult to reduce the widening of the display panel.

[0085] In the embodiment of the present utility model, the transparent electrode of the OLED device is electrically connected to the common voltage signal line through the first conductive material layer in the isolation layer. Figure 2A The related technology shown does not need to set too many overlapping structures, for example, it does not need to set the overlapping signal line 602 and does not need to set the part of the transparent conductive layer 500 located outside the opening of the isolation layer for connecting the overlapping signal line 602, which is conducive to reducing the difficulty of signal line routing design in the non-display area of ​​the display panel and reducing the thickness of the non-display area of ​​the display panel. And because the first conductive material layer is electrically connected to the common voltage signal line through the via hole penetrating the pixel defining layer, the common voltage signal line can be set below the isolation layer, that is, the positive projection of the common voltage signal line on the substrate falls within the positive projection of the isolation layer on the substrate, and the common voltage signal line can use the area occupied by the isolation layer for routing design, so that the common voltage signal line does not need to occupy another routing area alone, which is conducive to reducing the frame size of the display panel.

[0086] Figure 3A One of the schematic diagrams of the manufacturing process of the display panel provided in the embodiment of the utility model; Figure 3B This is one of the schematic diagrams of the manufacturing process of the transparent electrode of the display panel provided in the embodiment of the utility model.

[0087] Specifically, if Figure 3A As shown, when manufacturing a display panel according to an embodiment of the present invention, the following processes are specifically included:

[0088] 1. Provide a front substrate; the front substrate includes a driving circuit layer 200 and a pixel defining layer 300 which are sequentially stacked on a substrate 100; the driving circuit layer 200 includes a common voltage signal line 201; the pixel defining layer 300 is provided with a plurality of pixel openings P; a driving electrode layer 600 is further provided between the pixel defining layer 300 and the driving circuit layer 200, the driving electrode layer 600 includes a plurality of driving electrodes 601 corresponding to the pixel openings P one by one, and the pixel openings P expose at least a portion of the driving electrodes 601;

[0089] 2. An isolation layer 400 is formed on the side of the pixel defining layer 300 facing away from the substrate 100; the isolation layer 400 is provided with an isolation layer opening S corresponding to the pixel opening P one by one; the isolation layer 400 includes a first conductive material layer 401; the first conductive material layer 401 is electrically connected to the common voltage signal line 201 through a via hole penetrating the pixel defining layer 300;

[0090] 3. A transparent conductive layer 500 is formed on the side of the isolation layer 400 facing away from the substrate 100 ; the transparent conductive layer 500 includes transparent electrodes 501 located in the isolation layer opening S and isolated from each other by the isolation layer 400 ; the transparent electrodes 501 are in contact with the first conductive layer.

[0091] In some embodiments, Figure 3B As shown, a transparent conductive layer is formed on the side of the isolation layer facing away from the substrate, including the following processes:

[0092] 1. Forming a transparent conductive material layer on the side of the isolation layer 400 facing away from the substrate 100 by a coating process; the transparent conductive material layer includes a first portion 5011 located within the opening S of the isolation layer and a second portion 5012 located above the surface of the isolation layer 400 facing away from the substrate 100; the first portion 5011 is in contact with the first conductive material layer 401;

[0093] 2. The second portion 5012 is removed by an etching process, and the first portion 5011 is retained. The first portion 5011 is the transparent electrode 501 .

[0094] The display panel provided by the embodiment of the utility model can be manufactured by using AP (Advanced Pattern, referred to as AP) technology. AP technology uses photolithography to manufacture a single OLED unit, which can further improve the position accuracy of the sub-pixel unit and prevent crosstalk between adjacent sub-pixel units compared to the horizontal coating method used in the related art.

[0095] Figure 4A The second schematic diagram of the manufacturing process of the transparent electrode of the display panel provided by the embodiment of the utility model; Figure 4B The third schematic diagram of the manufacturing process of the transparent electrode of the display panel provided by the embodiment of the utility model.

[0096] In the display panel provided by the embodiment of the present invention, the light-emitting material layer 700 includes a plurality of light-emitting units, and the plurality of light-emitting units can be divided into a plurality of types. The same type of light-emitting units are used to emit light of the same color, and different types of light-emitting units emit light of different colors. In AP technology, each type of light-emitting unit is manufactured separately by an etching process, and the same type of light-emitting units are manufactured in the same etching process. The transparent electrode and its corresponding light-emitting unit are etched simultaneously to form an OLED device, and different types of light-emitting units are manufactured in sequence. For example, for any type of light-emitting unit, the following process is included when the AP process is used for manufacturing:

[0097] 1. A light-emitting material layer of a target color is formed on a side of the isolation layer away from the substrate; the light-emitting material layer of the target color includes a portion located within the pixel opening and a portion located on the surface of the isolation layer away from the substrate; wherein the light-emitting material layer of the target color is used to make a light-emitting unit corresponding to the target color, for example, when the light-emitting material layer of the target color is a red light-emitting material layer, it can be used to make a red light-emitting unit, when the light-emitting material layer of the target color is a blue light-emitting material layer, it can be used to make a blue light-emitting unit, and when the light-emitting material layer of the target color is a green light-emitting material layer, it can be used to make a green light-emitting unit, which will not be described in detail here;

[0098] 2. Forming a transparent conductive material layer on the side of the target color light-emitting material layer away from the substrate; the transparent conductive material layer includes a portion located in the opening of the isolation layer and a portion located on the surface of the isolation layer away from the substrate; the transparent conductive material layer is used to make a transparent electrode; in specific implementation, the portion of the transparent conductive layer located in the opening of the isolation layer can be made to contact with the first conductive material layer, thereby achieving electrical connection;

[0099] 3. Forming an encapsulation material layer on the side of the transparent conductive material layer facing away from the substrate; the encapsulation material layer includes a portion located within the opening of the isolation layer and a portion located above the surface of the isolation layer facing away from the substrate; the encapsulation material layer is used to protect the light-emitting unit in subsequent processes and during use;

[0100] 4. Etching the target color light-emitting material layer, transparent conductive material layer and packaging material layer formed in the above steps 1 to 3 by a photolithography process, retaining the target color light-emitting material layer, transparent conductive material layer and packaging material layer located in the target pixel opening and the target isolation layer opening, removing the target color light-emitting material layer, transparent conductive material layer and packaging material layer located in other pixel openings and isolation layer openings, and removing the light-emitting material layer, transparent conductive material layer and packaging material layer located on the surface of the isolation layer away from the substrate; wherein the target isolation layer opening is located directly above the target pixel opening, the target color light-emitting material layer retained in the target pixel opening forms a light-emitting unit of the target color, the transparent conductive material layer retained in the target isolation layer opening forms a transparent electrode, and the packaging material layer retained in the target isolation layer opening forms a packaging unit.

[0101] For example, the plurality of light emitting units in the display panel may include a red light emitting unit, a green light emitting unit and a blue light emitting unit, wherein the red light emitting unit is used to emit red light, the green light emitting unit is used to emit green light, and the blue light emitting unit is used to emit blue light. Figure 4A and Figure 4B As shown, when the AP technology is used, the production of the transparent conductive layer specifically includes the following steps:

[0102] 1. If Figure 4A As shown, a red light-emitting material layer 710 is formed on the side of the isolation layer 400 away from the substrate 100; the red light-emitting material layer 710 includes a portion located within the pixel opening P and a portion located on the surface of the isolation layer 400 away from the substrate 100; in specific implementation, the red light-emitting material layer 710 can be manufactured by a coating method such as vapor deposition and evaporation. When the red light-emitting material layer is manufactured by evaporation, an open mask (Open Mask) can be used for evaporation or no mask can be used for evaporation, which is not limited here;

[0103] 2. A transparent conductive material layer 510 is formed on the side of the red light-emitting material layer 710 facing away from the substrate 100; the transparent conductive material layer 510 includes a portion located within the opening S of the isolation layer and a portion located on the surface of the isolation layer 400 facing away from the substrate 100; wherein the portion of the transparent conductive material layer 510 located within the opening S of the isolation layer is in contact with the first conductive material layer 401; in specific implementation, the transparent conductive material layer 510 can be manufactured by a coating method such as vapor deposition and evaporation. When the evaporation method is used, an open mask can be used for evaporation or no mask can be used for evaporation, which is not limited here;

[0104] 3. An inorganic packaging material layer 8011 is formed on the side of the transparent conductive material layer 510 facing away from the substrate 100; the inorganic packaging material layer 8011 includes a portion located within the opening S of the isolation layer and a portion located above the surface of the isolation layer 400 facing away from the substrate 100; the inorganic packaging material layer 8011 can be made of insulating material, for example, the material of the inorganic packaging material layer 8011 can be silicon oxide (SiO), silicon nitride (SiN) or silicon oxynitride (SiON), etc., which is not limited here;

[0105] 4. If Figure 4B As shown, the red light-emitting material layer 710, the transparent conductive material layer 510 and the inorganic encapsulation material layer 8011 located on the surface of the isolation layer 400 facing away from the substrate 100 are removed by a photolithography process, the red light-emitting material layer 710, the transparent conductive material layer 510 and the inorganic encapsulation material layer 8011 located in the isolation layer opening S and the pixel opening P corresponding to the blue light-emitting unit are removed, and the red light-emitting material layer 710, the transparent conductive material layer 510 and the inorganic encapsulation material layer 8011 located in the isolation layer opening S and the pixel opening P corresponding to the green unit are removed, and the red light-emitting material layer 710, the transparent conductive material layer 510 and the inorganic encapsulation material layer 8011 are retained. 11 is located in the portion of the isolation layer opening S and the pixel opening P corresponding to the red light-emitting unit; wherein the red light-emitting material layer 710 retained in the pixel opening P corresponding to the red light-emitting unit 71 forms the red light-emitting unit 71, the transparent conductive material layer 510 retained in the isolation layer opening S corresponding to the red light-emitting unit 71 forms the transparent electrode 501, and the red light-emitting unit 71 and the driving electrode 601 and the transparent electrode 501 respectively located on both sides thereof constitute a red OLED device; the inorganic encapsulation material layer 8011 retained in the isolation layer opening S corresponding to the red light-emitting unit 71 forms an encapsulation unit 81, which is used to protect the red OLED device in subsequent processes and during use;

[0106] 5. Repeat steps 1 to 4 to sequentially form a blue OLED device and a passivation layer structure 81 in the pixel opening and the isolation layer opening corresponding to the blue light-emitting unit 72, and form a green OLED device and a packaging unit 81 in the pixel opening and the isolation layer opening corresponding to the green light-emitting unit 73; wherein the light-emitting units and transparent electrodes of adjacent OLED devices, and the packaging unit 81 above the OLED device, are separated by the isolation layer 400 and / or the pixel definition layer, and the transparent electrodes of adjacent OLED devices are electrically connected through the first conductive material layer 401; the light-emitting units of each OLED device constitute a light-emitting material layer, the transparent electrodes of each OLED device constitute a transparent conductive layer, and the packaging unit 81 above each OLED device constitutes a first inorganic packaging layer 801.

[0107] The display panel provided by the embodiment of the utility model is manufactured by AP technology. During the manufacturing process, the light-emitting unit of each OLED device is manufactured by photolithography. Compared with the process of using fine metal mask (FMM) to evaporate the light-emitting unit in the related art, the position of the light-emitting unit is more precise, and a larger aperture ratio and pixel density can be achieved. In addition, AP technology etches the connecting part of two adjacent light-emitting units through photolithography, for example, etching the part above the surface of the isolation layer facing away from the substrate, avoiding the problem of crosstalk and other problems caused by the direct connection of two adjacent light-emitting units during the display process. In the solution of FMM evaporation in the related art, such as Figure 2A As shown, the light-emitting material located above the surface of the isolation layer 400 facing away from the substrate 100 is not etched, and adjacent light-emitting units are easily directly connected to cause crosstalk.

[0108] In the above embodiment of the utility model, the method for manufacturing the display panel using AP technology is illustrated by taking the light-emitting material layer of the display panel including light-emitting units of three colors: red, green, and blue. In specific implementation, the light-emitting material layer of the display panel may also include more types of light-emitting units or fewer types of light-emitting units. The above manufacturing process may be referred to in the specific manufacturing process, which will not be described in detail here. In specific manufacturing, the manufacturing order of OLED devices of various colors may not be limited to the manufacturing order in the above embodiment. For example, they may also be manufactured in the order of green OLED devices, blue OLED devices, and red OLED devices, which is not limited here.

[0109] Figure 5 The second schematic diagram of the cross-sectional structure of the display panel provided in the embodiment of the utility model.

[0110] In the embodiment of the present utility model, Figure 5 As shown, the display panel is divided into a display area AA and a non-display area FA, and the non-display area FA is usually arranged around the display area AA. The pixel opening P is located in the display area AA. The driving circuit layer 200 also includes a gate driving circuit 202. The gate driving circuit 202 is arranged in the non-display area FA.

[0111] In some embodiments, Figure 5 As shown, the common voltage signal line 201 is located on the side of the gate driving circuit 202 close to the display area AA. By arranging the common voltage signal line 201 on the side of the gate driving circuit 202 close to the display area AA, it is possible to avoid arranging the isolation layer 400 from above the gate driving circuit 202 to cross the routing area of ​​the gate driving circuit 202 with a wider width, which is conducive to saving space and reducing the frame width.

[0112] In some embodiments, Figure 5As shown, the common voltage signal line 201 is located between the gate driving circuit 202 and the pixel opening P. Specifically, when setting the routing of the common voltage signal line 201, the common voltage signal line 201 can be set at the edge area of ​​the positive projection of the isolation layer 400 and the pixel defining layer 300 on the substrate 100. Since the internal area of ​​the positive projection of the isolation layer 400 and the pixel defining layer 300 on the substrate 100 needs to be provided with an OLED device, and below the OLED device, a pixel driving circuit for driving the OLED device to emit light is also provided in the driving circuit layer 200. Therefore, the common voltage signal line 201 is set at the edge area of ​​the positive projection of the isolation layer 400 and the pixel defining layer 300 on the substrate 100, which can avoid the interference between the common voltage signal line 201 and the routing of the pixel driving circuit, thereby increasing the routing design space of the pixel driving circuit.

[0113] Fig. 6A A schematic diagram of a top view of a display panel provided in an embodiment of the utility model; Figure 6B The third schematic diagram of the cross-sectional structure of the display panel provided in the embodiment of the utility model.

[0114] In some embodiments, Fig. 6A and 6B As shown, the isolation layer 400 is located within the display area AA (the area within the dotted line). Figure 6B As shown, the isolation layer 400 is located within the display area AA, and the width of the edge of the isolation layer 400 extending in the direction close to the non-display area FA (the area within the dotted line) is small, which can reserve more space for setting other structures in the edge area of ​​the display area and the non-display area. In addition, the isolation layer 400 is located within the display area AA, and the part of the common voltage signal line 201 used to connect to the isolation layer 400 is set directly below the isolation layer 400, which can reduce the area of ​​the non-display area FA used to set the routing of the common voltage signal line 201, thereby further reducing the border width. In this embodiment, the display area AA of the display panel can be defined by the setting area of ​​the isolation layer, for example, the setting area of ​​the isolation layer is the display area AA. In specific implementation, the display area AA can also be defined in other ways, which is not limited here.

[0115] like Fig. 6A and 6BAs shown, the isolation layer 400 is arranged in the display area AA, and the common voltage signal line 201 is located on the side of the gate drive circuit 202 close to the display area AA. The width of the non-display area FA of the display panel is greatly reduced compared with the width of the non-display area FA of the display panel in the related art, and the proportion of the gate drive circuit 202 setting area in the non-display area FA is increased. In some embodiments, along the direction away from the display area AA, the ratio of the width W1 of the gate drive circuit 202 to the width of the non-display area FA ranges from 0.37 to 0.78, for example, it can be 0.40, 0.45, 0.50, 0.55, 0.60, 0.65, 0.70, 0.75, etc., which is not limited here. In specific implementation, the width of the gate drive circuit 202 can range from 350μm to 550μm, for example, it can be 400μm; the width of the non-display area FA can range from 700μm to 950μm, for example, it can be 800μm, which is not limited here.

[0116] In some embodiments, Fig. 6A As shown, the common voltage signal line 201 is electrically connected to the isolation layer 400 through a plurality of via holes H penetrating the pixel defining layer. Specifically, the orthographic projection of the common voltage signal line 201 on the substrate 100 and the orthographic projection of the isolation layer 400 on the substrate 100 have a relatively large overlapping area, and by providing a plurality of via holes H penetrating the pixel defining layer in the overlapping area of ​​the common voltage signal line 201 and the isolation layer 400 for electrical connection between the common voltage signal line 201 and the isolation layer 400, it is beneficial to improve the transmission efficiency of the signal.

[0117] Figure 7 The fourth schematic diagram of the cross-sectional structure of the display panel provided in the embodiment of the utility model.

[0118] In some embodiments, Figure 7 As shown, the display panel further includes an isolation dam 310. The isolation dam 310 may be located at the same layer as the planar layer 300, that is, the isolation dam 310 may be manufactured using the same mask process as the planar layer 300. The isolation dam 310 may also include other film layers, which are not limited here. Figure 7 The partial cross-sectional structure of the non-display area FA of the display panel is shown. Figure 7As shown, the isolation dam 310 is located in the non-display area FA and on the side of the gate drive circuit 202 away from the display area AA. Generally, after the OLED light-emitting device is manufactured, the display panel needs to be packaged through a packaging layer. The packaging layer usually adopts a sandwich structure, including a first inorganic packaging 801, an organic packaging layer 802, and a second inorganic packaging layer 803 arranged in a stacked manner. The organic packaging layer 802 is generally manufactured by using organic materials through inkjet printing (Ink Jet Printed, referred to as IJP). The isolation dam 310 is used to block the organic material when manufacturing the organic packaging layer 802, and limit the organic material to the side of the isolation dam 310 facing the display area AA to ensure the packaging effect.

[0119] Compared to Figure 2A In the related art shown, the common voltage signal line is set between the gate drive circuit and the isolation dam. In the embodiment of the utility model, the common voltage signal line is set on the side of the gate drive circuit 202 away from the isolation dam 310, so that the width of the non-display area FA of the display panel can be reduced by reducing the distance between the gate drive circuit 202 and the isolation dam 310, thereby reducing the border width of the display panel. Specifically, in some embodiments, the spacing W3 between the orthographic projection of the isolation dam 310 on the substrate 100 and the orthographic projection of the gate drive circuit 202 on the substrate 100 can be set to a range of 250μm to 350μm, for example, 280μm, 300μm, 320μm, 340μm, etc., which is not limited here. Among them, the distance between the orthographic projection of the isolation dam 310 on the substrate 100 and the orthographic projection of the gate driving circuit 202 on the substrate 100 can specifically be the distance between the side of the orthographic projection of the isolation dam 310 on the substrate 100 close to the gate driving circuit 202 and the side of the orthographic projection of the gate driving circuit 202 on the substrate 100 close to the isolation dam, which is not limited here.

[0120] In some embodiments, Figure 7 As shown, since no common voltage signal line is set between the gate driving circuit 202 and the isolation dam 310, the orthographic projection of the film layer where the common voltage signal line is located on the substrate can be set, and the area between the gate driving circuit 202 and the isolation dam 310 is outside the orthographic projection on the substrate 100.

[0121] In a specific implementation, since a common voltage signal line is not provided between the gate drive circuit 202 and the isolation dam 310, the film layer located on the side of the common voltage signal line facing the substrate in the region between the gate drive circuit 202 and the isolation dam 310 can be in direct contact with the film layer located on the side of the common voltage signal line facing away from the substrate. For example, the common voltage signal line can be provided in the source-drain metal layer, and in the region between the gate drive circuit 202 and the isolation dam 310, the film layer located on the side of the source-drain metal layer facing the substrate is the interlayer insulating layer 204, and the film layer located on the side of the source-drain metal layer facing away from the substrate is the flat layer 90, and the interlayer insulating layer 204 is in direct contact with the flat layer 90. The interlayer insulating layer 204 includes at least one of an interlayer dielectric layer ILD, a gate insulating layer GI, etc., which is not limited here.

[0122] In some embodiments, Figure 7 As shown, compared to Figure 2A The related technology shown in the figure does not require the driving electrode layer to be set Figure 2A The overlapping signal line 602 in the circuit is electrically connected between the common voltage signal line and the transparent electrode, so that the driving electrode layer is not required in the area between the gate driving circuit 202 and the isolation dam 310. Specifically, the positive projection of the driving electrode layer on the substrate can be set, and the area between the gate driving circuit 202 and the isolation dam 310 is outside the positive projection on the substrate 100.

[0123] In a specific implementation, in the area between the gate driving circuit 202 and the isolation dam 310 , the film layer located on the side of the driving electrode layer facing the substrate may directly contact the film layer located on the side of the driving electrode layer facing away from the substrate.

[0124] In some embodiments, Figure 7 As shown, the transparent electrode layer may also be provided with an orthographic projection on the substrate 100, and the region between the gate driving circuit 202 and the isolation dam 310 is outside the orthographic projection on the substrate 100. This is not limited here.

[0125] In some embodiments, Figure 7 As shown, a capping layer 91 and a lithium fluoride layer 92 may be provided between the encapsulation layer and the transparent electrode layer. The capping layer 91 and the lithium fluoride layer 92 may be used to adjust optical parameters and improve light extraction efficiency.

[0126] Figure 8 This is one of the partially enlarged schematic diagrams of the cross-sectional structure of the display panel provided in the embodiment of the utility model.

[0127] In some embodiments, Figure 8As shown, the isolation layer 400 includes a support portion 410 and a top portion 420. The top portion 420 is located on the side of the support portion 410 facing away from the substrate 100. The orthographic projection of the support portion 410 on the substrate 100 falls within the orthographic projection of the top portion 420 on the substrate 100, and the distance between the edge of the orthographic projection of the support portion 410 on the substrate 100 and the edge of the orthographic projection of the top portion 420 on the substrate 100 is greater than 0. In other words, the isolation layer 400 forms an undercut structure or an eaves structure in which the cross-sectional area of ​​the top portion 420 is greater than the cross-sectional area of ​​the support portion 410, for example, the isolation layer 400 forms an inverted trapezoidal structure, a "T"-shaped structure or an "H"-shaped structure. The isolation layer 400 is set to the structure in which the cross-sectional area of ​​the top 420 is larger than the cross-sectional area of ​​the support part 410. When the light-emitting unit 701 and the transparent electrode 501 are manufactured by deposition or evaporation, the light-emitting unit 701 and the transparent electrode 501 can be prevented from climbing along the side wall of the support part 410, thereby facilitating the light-emitting unit 701 and the transparent electrode 501 located in the isolation layer opening from the light-emitting unit 701 and the transparent electrode 501 located in the adjacent isolation layer opening. When the transparent electrode 501 is manufactured by evaporation, the transparent electrode 501 can be evaporated to a position between the top 420 of the isolation layer 400 and the pixel defining layer 300 and blocked by the top 420 by controlling the evaporation angle of the nozzle, thereby directly realizing the contact between the transparent electrode 501 and the support part 410 in the evaporation process. In a specific implementation, the support portion 410 may be disposed on the first conductive material layer 401, that is, the support portion 410 may be formed on the first conductive material layer 401, so that the transparent electrodes 501 located in the openings of different isolation layers are electrically connected through the first conductive material layer 401. When the light emitting unit 701 is manufactured by evaporation, Figure 8 As shown, the evaporation angle of the nozzle can be controlled so that the light-emitting unit 701 does not contact the support portion 410, thereby further avoiding crosstalk between adjacent light-emitting units, which is not limited here.

[0128] Fig.9A A second partially enlarged schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the utility model; Fig. 9B This is one of the schematic diagrams of the isolation layer manufacturing process provided in the embodiment of the utility model.

[0129] In some embodiments, Fig.9AAs shown, the isolation layer 400 also includes an insulating material layer 402. The insulating material layer 402 is located on the side of the first conductive material layer 401 facing away from the substrate 100. The top 420 of the isolation layer 400 includes the insulating layer 402, that is, the top 420 of the isolation layer 400 is at least partially formed by the insulating material layer 402. The insulating material layer 402 can insulate and protect the first conductive material layer 401 in the isolation layer 400. In specific implementation, the first conductive material layer 401 can be etched by a secondary etching process to form a "T"-shaped isolation layer structure. Specifically, as Fig. 9B As shown, the manufacturing of the isolation layer 400 may include the following processes:

[0130] 1. Forming a first conductive material layer 401 and an insulating material layer 402 in sequence on the side of the pixel defining layer 300 facing away from the substrate 100 by a coating process such as vapor deposition;

[0131] 2. Perform a first etching on the isolation layer. The first etching simultaneously etches the first conductive material layer 401 and the insulating material layer 402 to form a first opening S1 exposing the pixel opening P of the pixel defining layer 300. The first etching may be performed in a dry etching manner;

[0132] 3. Perform a second etching on the isolation layer. The second etching selectively etches the first conductive material layer 401, so that the first conductive material layer 401 is retracted a certain distance toward the inside of the insulating layer 402 compared to the edge of the insulating material layer 402, thereby forming a "T"-shaped isolation layer structure. The second etching can be performed in a wet etching manner, using an etching solution that selectively etches the first conductive material layer 401.

[0133] like Fig.9A In the illustrated embodiment, the isolation layer 400 may also be manufactured in other ways, which are not limited here.

[0134] Fig. 10A A third partially enlarged schematic diagram of the cross-sectional structure of a display panel provided in an embodiment of the utility model; Fig. 10B The second schematic diagram of the isolation layer manufacturing process provided in the embodiment of the utility model.

[0135] In some embodiments, the isolation layer further includes a second conductive material layer 403 and a third conductive material layer 404. The second conductive material layer 403 is located on the side of the first conductive material layer 401 away from the insulating material layer 402, and the third conductive material layer 404 is located between the first conductive material layer 401 and the insulating material layer 402. The second conductive material layer 403 and the third conductive material layer 404 form a laminated structure with the first conductive material layer 401, which is used to improve the electrical and mechanical properties of the isolation layer. In specific implementations, the second conductive material layer 403 and the third conductive material layer 404 can be made of materials with lower conductivity and activity than the first conductive material layer 403, so as to protect the first conductive material layer 403. For example, the first conductive material layer 403 can be made of materials such as metal aluminum (Al) with good conductive properties, and the second conductive material layer 403 and the third conductive material layer 404 can be made of inert metals with excellent ductility and low conductivity, such as metal titanium (Ti), etc., which are not limited here.

[0136] In a specific implementation, the top 420 of the isolation layer also includes the third conductive material layer 404. That is, part of the top 420 of the isolation layer is formed by the insulating material layer 402, and part of it is formed by the third conductive material layer 404. In a specific implementation, the first conductive material layer 401 can be etched by a secondary etching process to form an "H" type isolation layer structure. Specifically, Fig. 10B As shown, the manufacturing of the isolation layer 400 may include the following processes:

[0137] 1. Forming a second conductive material layer 403, a first conductive material layer 401, a third conductive material layer 404 and an insulating material layer 402 in sequence on the side of the pixel defining layer 300 facing away from the substrate 100 by a coating process such as vapor deposition;

[0138] 2. Perform a first etching on the isolation layer. The first etching simultaneously etches the second conductive material layer 403, the first conductive material layer 401, the third conductive material layer 404 and the insulating material layer 402 to form a first opening S1 exposing the pixel opening P of the pixel defining layer 300. The first etching can be performed in a dry etching manner;

[0139] 3. Perform a second etching on the isolation layer. The second etching selectively etches the first conductive material layer 401, so that the first conductive material layer 401 is retracted a certain distance toward the inside of the insulating layer 402 compared to the edge of the second conductive material layer 403 and the edge of the third conductive material layer 404, thereby forming an "H"-shaped isolation layer structure. The second etching can be performed in a wet etching manner, using an etching solution that selectively etches the first conductive material layer 401.

[0140] like Fig. 10AIn the illustrated embodiment, the isolation layer 400 may also be manufactured in other ways, which are not limited here.

[0141] Fig.11 The fourth schematic diagram of the cross-sectional structure of the display panel provided in the embodiment of the utility model.

[0142] In some embodiments, Fig.11 As shown, the display panel also includes: a first inorganic encapsulation layer 801, a second inorganic encapsulation layer 803 and an organic encapsulation layer 802. The first inorganic encapsulation layer 801 is located on the side of the transparent conductive layer away from the substrate 100. The first inorganic encapsulation layer 801 includes a plurality of encapsulation units 81, and the encapsulation units 81 are located in the isolation layer opening S and are separated by the isolation layer 400. The second inorganic encapsulation layer 803 is located on the side of the first inorganic encapsulation layer 801 away from the substrate 100. The organic encapsulation layer 802 is located between the first inorganic encapsulation layer 401 and the second inorganic encapsulation layer 803. The first inorganic encapsulation layer 801, the second inorganic encapsulation layer 803 and the organic encapsulation layer 802 can play a role in protecting the display panel. In specific implementation, the first inorganic encapsulation layer 801 can be made of SiON, the organic encapsulation layer 802 can be made of resin, and the second inorganic encapsulation layer 803 can be made of SiN, which is not limited here. The display panel can also include more or fewer encapsulation layer structures, which are not limited here.

[0143] Fig.12 The fifth schematic diagram of the cross-sectional structure of the display panel provided in the embodiment of the utility model.

[0144] In some embodiments, the gate driving circuit includes multiple conductive film layers. The common voltage signal line can be located in the same layer as at least one of the multiple conductive film layers of the gate driving circuit, thereby reducing the number of film layers and reducing the thickness of the display panel. Specifically, Fig.12 As shown, the circuit structure of the gate drive circuit 202 can be arranged in multiple different conductive film layers, and the common voltage signal line is located in the same layer as at least one of the multiple conductive film layers of the gate drive circuit. Specifically, the common voltage signal line is located in the same layer as one or more conductive film layers in the gate drive circuit. For example, the gate drive circuit 202 includes a thin film transistor 22, and the thin film transistor 22 includes a gate, an active layer, a source and a drain located in different film layers. The common voltage signal line 201 can be arranged in the same layer as the source and drain of the thin film transistor. Specifically, the source and the drain can both be arranged in the source-drain metal layer, and the common voltage signal line 201 can also be arranged in the source-drain metal layer. This is not limited here.

[0145] The display panel provided in the embodiment of the utility model may also include other structures necessary to realize specific functions. In specific implementation, it can be set based on the display panel provided in the embodiment of the utility model in combination with the setting method in the related technology, which will not be elaborated here.

[0146] The second aspect of the present invention provides a display device. In the implementation of the present invention, the display device includes a display panel provided by any of the above embodiments. In specific implementation, the display device provided by the embodiment of the present invention has the same or similar technical effects as any of the above embodiments, which will not be described in detail here.

[0147] Fig.13 A flow chart of a method for manufacturing a display panel provided in an embodiment of the present utility model.

[0148] The third aspect of the present invention provides a method for manufacturing a display panel. Fig.13 As shown, the manufacturing method of the display panel provided by the embodiment of the utility model comprises the following steps:

[0149] S121: providing a front substrate; the front substrate comprises a driving circuit layer and a pixel defining layer stacked in sequence on a substrate; the driving circuit layer comprises a first power common voltage signal line; and the pixel defining layer is provided with a plurality of pixel openings;

[0150] S122: forming an isolation layer on a side of the pixel defining layer away from the substrate; the isolation layer is provided with isolation layer openings corresponding to the pixel openings one by one; the isolation layer comprises a first conductive material layer; the first conductive material layer is electrically connected to a first power common voltage signal line through a via hole penetrating the pixel defining layer;

[0151] S123: forming a transparent conductive layer on a side of the isolation layer facing away from the substrate; the transparent conductive layer includes transparent electrodes located in openings of the isolation layer and isolated from each other by the isolation layer; and the transparent electrodes are in contact with the first conductive material layer.

[0152] In the manufacturing method of the display panel provided by the embodiment of the utility model, the first conductive material layer of the isolation layer is electrically connected to the common voltage signal line through the via hole penetrating the pixel defining layer, and the transparent electrodes located in the opening of the isolation layer are mutually conductive through the first conductive material layer, thereby realizing the electrical connection between the transparent electrode and the common voltage line, which is beneficial to simplifying the circuit structure and reducing the frame size of the display panel.

[0153] In some embodiments, a transparent conductive layer is formed on a side of the isolation layer facing away from the substrate, specifically comprising:

[0154] A transparent conductive material layer is formed on the side of the isolation layer facing away from the substrate by a coating process; the transparent conductive material layer comprises a first portion located within the opening of the isolation layer and a second portion located above the surface of the isolation layer facing away from the substrate; the first portion is in contact with the first conductive material layer;

[0155] The second portion is removed by an etching process, and the first portion is retained, and the first portion forms a transparent electrode.

[0156] In some embodiments, the display panel can be manufactured using AP technology. Specifically, the display panel includes multiple types of light-emitting units. A transparent conductive layer is manufactured on the side of the isolation layer away from the substrate, specifically including:

[0157] For each type of light-emitting unit, the light-emitting unit and a transparent electrode located on a side of the light-emitting unit facing away from the substrate are manufactured together by a photolithography process.

[0158] For each type of light-emitting unit, the light-emitting unit and a transparent electrode located on a side of the light-emitting unit away from the substrate are manufactured together by a photolithography process, specifically including:

[0159] forming a light-emitting material layer of a target color on a side of the isolation layer facing away from the substrate;

[0160] forming a transparent conductive material layer on a side of the light-emitting material layer of the target color facing away from the substrate;

[0161] forming an encapsulation material layer on a side of the transparent conductive material layer facing away from the substrate;

[0162] The light-emitting material layer, transparent conductive material layer and packaging material layer of the target color are etched by a photolithography process, and the light-emitting material layer, transparent conductive material layer and packaging material layer of the target color located within the target pixel opening and the target isolation layer opening are retained, and the light-emitting material layer, transparent conductive material layer and packaging material layer of the target color located within other pixel openings and isolation layer openings are removed, and the light-emitting material layer, transparent conductive material layer and packaging material layer located on the surface of the isolation layer facing away from the substrate are removed.

[0163] The structure of the display panel provided by the embodiment of the present invention has been described in detail in the embodiment of the display panel structure described above. When it is implemented specifically, the method for manufacturing the display panel provided by the embodiment of the present invention can refer to the relevant description of the display panel structure in the above content, and will not be repeated here.

[0164] Although the preferred embodiments of the present invention have been described, those skilled in the art may make other changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications falling within the scope of the present invention.

[0165] Obviously, those skilled in the art can make various changes and modifications to the present invention without departing from the spirit and scope of the present invention. Thus, if these modifications and variations of the present invention fall within the scope of the claims of the present invention and their equivalents, the present invention is also intended to include these modifications and variations.

Claims

1. A display panel, wherein: include: substrate; A driving circuit layer, located on one side of the substrate; the driving circuit layer includes a common voltage signal line; A pixel defining layer, located on a side of the driving circuit layer away from the substrate; An isolation layer, located on a side of the pixel defining layer away from the substrate, the isolation layer being provided with isolation layer openings corresponding to the pixel openings of the pixel defining layer in a one-to-one manner; A transparent conductive layer is located on a side of the driving circuit layer away from the substrate; the transparent conductive layer comprises: transparent electrodes located in the openings of the isolation layer and isolated from each other by the isolation layer; The isolation layer includes a first conductive material layer; the transparent electrode is electrically connected to the first conductive material layer, and the first conductive material layer is electrically connected to a common voltage signal line in the driving circuit layer through a via hole penetrating the pixel defining layer.

2. The display panel according to claim 1, wherein: The display panel includes a display area and a non-display area; the pixel opening is located in the display area; The driving circuit layer further includes a gate driving circuit; the gate driving circuit is located in the non-display area; The common voltage signal line is located at a side of the gate driving circuit close to the display area.

3. The display panel according to claim 2, wherein: The common voltage signal line is located between the gate driving circuit and the pixel opening.

4. The display panel according to claim 2, wherein: The isolation layer is located in the display area.

5. The display panel according to claim 4, wherein: Along a direction away from the display area, a ratio of a width of the gate driving circuit to a width of the non-display area ranges from 0.37 to 0.

78.

6. The display panel according to claim 2, wherein: The gate driving circuit layer includes a plurality of conductive film layers; the common voltage signal line and at least one of the plurality of conductive film layers are located in the same layer.

7. The display panel according to claim 2, wherein: The display panel further comprises an isolation dam; the isolation dam is located on a side of the gate driving circuit away from the display area; The distance between the orthographic projection of the isolation dam on the substrate and the orthographic projection of the gate driving circuit on the substrate is in the range of 250 μm to 350 μm.

8. The display panel according to claim 7, wherein: The orthographic projection of the film layer where the common signal line is located on the substrate is outside the orthographic projection of the region between the gate driving circuit and the isolation dam on the substrate; In a region between the gate driving circuit and the isolation dam, the film layer located on a side of the common voltage signal line facing the substrate is in direct contact with the film layer located on a side of the common voltage signal line facing away from the substrate.

9. The display panel according to claim 7, wherein: The display panel further comprises a driving electrode layer; the driving electrode layer is located between the driving circuit layer and the pixel defining layer; the driving electrode layer comprises a driving electrode opposite to the transparent electrode; The orthographic projection of the driving electrode on the substrate, and the area between the gate driving circuit and the isolation dam are outside the orthographic projection of the substrate; In a region between the gate driving circuit and the isolation dam, the film layer located on a side of the driving electrode layer facing the substrate is in direct contact with the film layer located on a side of the driving electrode layer facing away from the substrate.

10. The display panel according to claim 1, wherein: The common voltage signal line is electrically connected to the isolation layer through a plurality of the via holes.

11. The display panel according to any one of claims 1 to 10, wherein: The display panel further includes: a light-emitting material layer, located on a side of the driving circuit layer away from the substrate; the light-emitting material layer comprises a plurality of light-emitting units; the light-emitting units are located in the pixel openings, and the plurality of light-emitting units are separated by the pixel defining layer and the isolation layer; The transparent electrode is located on a side of the light-emitting material layer away from the substrate; the transparent electrode is a cathode or an anode.

12. The display panel according to any one of claims 1 to 10, wherein: The isolation layer comprises a support portion and a top portion; the top portion is located on a side of the support portion away from the substrate; the orthographic projection of the support portion on the substrate falls within the orthographic projection of the top portion on the substrate, and the distance between the edge of the orthographic projection of the support portion on the substrate and the edge of the orthographic projection of the top portion on the substrate is greater than 0; The transparent electrode contacts the support portion.

13. The display panel according to claim 12, wherein: The isolation layer further includes an insulating material layer; the insulating material layer is located on a side of the first conductive material layer facing away from the substrate; and the top portion includes the insulating material layer.

14. The display panel according to claim 13, wherein: The isolation layer further comprises a second conductive material layer and a third conductive material layer; the second conductive material layer is located on a side of the first conductive material layer away from the insulating material layer; the third conductive material layer is located between the first conductive material layer and the insulating material layer; The top portion also includes the third conductive material layer.

15. The display panel according to any one of claims 1 to 10, wherein: The display panel further includes: A first inorganic encapsulation layer is located on a side of the transparent conductive layer away from the substrate; the first inorganic encapsulation layer comprises an encapsulation unit; the encapsulation unit is located in the opening of the isolation layer and is separated by the isolation layer; a second inorganic encapsulation layer, located on a side of the first inorganic encapsulation layer away from the substrate; The organic encapsulation layer is located between the first inorganic encapsulation layer and the second inorganic encapsulation layer.

16. A display device, wherein: It comprises the display panel as claimed in any one of claims 1 to 15.

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