Signal source, quantum measurement and control system and quantum computer

Abstract

The utility model relates to the technical field of quantum measurement and control, in particular to a signal source, a quantum measurement and control system and a quantum computer.The signal source comprises a phase-locked loop and a power adjusting circuit which are electrically connected, and the phase-locked loop is used for outputting a first control signal with the frequency corresponding to the working frequency of quantum bits; the power adjusting circuit is used for amplifying the power of the first control signal; the power regulation circuit comprises a first filter, a first-stage amplifier, a first numerical control attenuator, a second numerical control attenuator, a voltage-controlled attenuator, a final-stage amplifier and a second filter which are sequentially connected in series, and the first filter is used for filtering a received first control signal; the second filter is used for outputting a first control signal after power amplification, the power of the first control signal provided by the signal source can be larger than 20dBm, the power can be finely adjusted, and the attenuation amount of the power provided by the numerical control attenuator can be larger than 50dB, that is, the power large dynamic small stepping of the first control signal is realized. And the requirements of a quantum measurement and control system are met.

Description

Technical Field

[0001] The present application relates to the field of quantum measurement and control technology, and specifically to a signal source, a quantum measurement and control system, and a quantum computer. Background Art

[0002] In the quantum measurement and control system, the quantum chip is particularly sensitive to the power of the signal source when reading the signal. The quantum measurement and control system sometimes requires the signal source to provide an output power greater than 20dBm, the power step can be fine-tuned (the power step is less than 0.1dB), and the power attenuation provided by the digitally controlled attenuator is greater than 50dB. However, the output power of general commercial signal sources is less than 20dBm, and it cannot simultaneously meet the functions of output power greater than 20dBm and power fine-tuning, resulting in the inability to achieve large dynamic small steps of power and the inability to meet the needs of the quantum measurement and control system. Utility Model Content

[0003] The present application provides a signal source, a quantum measurement and control system and a quantum computer, which are used to solve the problem that the signal source provided in the prior art cannot meet the requirements of the quantum measurement and control system.

[0004] The embodiment of this specification provides a signal source, including:

[0005] An electrically connected phase-locked loop and a power adjustment circuit, the phase-locked loop being used to output a first control signal having a frequency corresponding to an operating frequency of the quantum bit, and the power adjustment circuit being used to amplify the power of the first control signal;

[0006] The power adjustment circuit includes a first filter, a first-stage amplifier, a first digitally controlled attenuator, a second digitally controlled attenuator, a voltage-controlled attenuator, a final-stage amplifier, and a second filter connected in series in sequence. The first filter is used to filter the received first control signal, and the second filter is used to output the first control signal after power amplification.

[0007] Optionally, the power adjustment circuit also includes an FPGA (Field-Programmable Gate Array), and the FPGA is used to provide a second control signal to the phase-locked loop, the first digitally controlled attenuator, and the second digitally controlled attenuator.

[0008] Optionally, the power adjustment circuit further includes a digital-to-analog converter, and the FPGA controls the digital-to-analog converter to output a control voltage to the voltage-controlled attenuator, and the voltage-controlled attenuator generates different power attenuation amounts based on different received control voltages.

[0009] Optionally, the first digitally controlled attenuator and the second digitally controlled attenuator are digitally controlled attenuators having at least 6 attenuation control bits and a minimum attenuation step of 0.5 dB.

[0010] Optionally, the digital-to-analog converter provides a voltage with millivolt accuracy.

[0011] Optionally, the power adjustment circuit also includes a third filter and a second-stage amplifier, and the first filter, the first-stage amplifier, the third filter, the second-stage amplifier, the first digitally controlled attenuator, the second digitally controlled attenuator, the voltage-controlled attenuator, the final-stage amplifier, and the second filter are connected in series in sequence.

[0012] Optionally, the first filter and the third filter are high-pass filters, and the second filter is a low-pass filter.

[0013] Optionally, a detector is further included, and the detector is used to detect the power of the first control signal after filtering by the second filter.

[0014] A quantum measurement and control system comprises the signal source, wherein the signal source is used to provide a power-amplified first control signal to the quantum measurement and control system.

[0015] A quantum computer comprises the quantum measurement and control system and a quantum chip, wherein the quantum chip performs a quantum computing task according to a first control signal after power amplification.

[0016] Its beneficial effects are: the present application provides a signal source, including an electrically connected phase-locked loop and a power adjustment circuit, the phase-locked loop is used to output a first control signal with a frequency corresponding to the operating frequency of the quantum bit, and the power adjustment circuit is used to amplify the power of the first control signal; the power adjustment circuit is connected in series with a first filter, a first-stage amplifier, a first digitally controlled attenuator, a second digitally controlled attenuator, a voltage-controlled attenuator, a final amplifier, and a second filter, the first filter is used to filter the received first control signal, and the second filter is used to output the first control signal after power amplification. Through the above-mentioned method, the power of the first control signal provided by the signal source can be greater than 20dBm, the power can be fine-tuned, and the power attenuation provided by the digitally controlled attenuator can be greater than 50dB, that is, the power of the first control signal is large and dynamic with small steps, meeting the needs of the quantum measurement and control system. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0018] Figure 1A schematic diagram of the structure of a signal source provided in an embodiment of this specification;

[0019] Figure 2 A schematic diagram of the structure of another signal source provided in an embodiment of this specification. DETAILED DESCRIPTION

[0020] The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and should not be construed as limiting the present application.

[0021] It should be noted that the relative arrangement of components and steps, the numerical expressions and numerical values ​​set forth in these embodiments do not limit the scope of the present application unless specifically stated otherwise.

[0022] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way intended to limit the present application, its application, or uses.

[0023] Technologies, methods, and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, the technologies, methods, and equipment should be considered as part of the specification.

[0024] In all examples shown and discussed herein, any specific values ​​should be interpreted as merely exemplary and not limiting. Therefore, other examples of the exemplary embodiments may have different values.

[0025] It should be noted that like reference numerals and letters refer to similar items in the following figures, and therefore, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0026] Reference Figure 1 A schematic diagram of a signal source structure provided in an embodiment of this specification includes:

[0027] A phase-locked loop 1 and a power adjustment circuit 2 are electrically connected, wherein the phase-locked loop 1 is used to output a first control signal with a frequency corresponding to the operating frequency of the quantum bit, and the power adjustment circuit 2 is used to amplify the power of the first control signal; the power adjustment circuit 2 includes a first filter 20, a first-stage amplifier 21, a first digitally controlled attenuator 22, a second digitally controlled attenuator 23, a voltage-controlled attenuator 24, a final-stage amplifier 25, and a second filter 26 connected in series in sequence, wherein the first filter 20 is used to filter the received first control signal, and the second filter 26 is used to output the first control signal after power amplification.

[0028] Optionally, the power adjustment circuit 2 further includes a Field-Programmable Gate Array (FPGA), and the FPGA is used to provide a second control signal to the phase-locked loop 1 , the first digitally controlled attenuator 22 , and the second digitally controlled attenuator 23 .

[0029] In an optional embodiment, the FPGA sends a second control signal to control the phase-locked loop 1 to output a first control signal whose frequency corresponds to the operating frequency of the quantum bit. The first filter 20 then filters the first control signal and the first-stage amplifier 21 amplifies the power of the filtered first control signal. The first control signal after the first-stage power amplification is input to the first digitally controlled attenuator 22 and output through the second digitally controlled attenuator 23. The FPGA sends a second control signal to control the first digitally controlled attenuator 22 and the second digitally controlled attenuator 23 to attenuate the power after the first-stage amplification. After that, the voltage-controlled attenuator 24 generates different attenuation amounts based on the different received control voltages to perform power step fine-tuning on the attenuated power. Finally, the final-stage amplifier 25 amplifies the fine-tuned power for a second time so that the power of the second-amplified first control signal can meet the requirements of the quantum measurement and control system after filtering by the second filter. It should be noted that the effect achieved by the second control signal sent by the FPGA to the phase-locked loop 1 is different from the effect achieved by the second control signal sent by the FPGA to the first digitally controlled attenuator 22 and the second digitally controlled attenuator 23, that is, the second control signal includes two sub-control signals, one word control signal controls the phase-locked loop 1 to output a first control signal corresponding to the operating frequency of the quantum bit, and the other sub-control signal controls the first digitally controlled attenuator 22 and the second digitally controlled attenuator 23 to attenuate the power after the first stage amplification. In this embodiment, the first-stage amplifier 21 operates in the saturation region, and the final-stage amplifier 25 operates in the linear region.

[0030] Since the first digitally controlled attenuator 22 and the second digitally controlled attenuator 23 are digitally controlled attenuators with attenuation control bits of at least 6 bits and a minimum attenuation step of 0.5 dB, the first digitally controlled attenuator 22 and the second digitally controlled attenuator 23 can respectively achieve a power attenuation of up to 31.5 dB, that is, the first digitally controlled attenuator 22 and the second digitally controlled attenuator connected in series can provide a power attenuation of up to 63 dB, which satisfies the requirement that the power attenuation provided by the digitally controlled attenuator in the quantum measurement and control system can be greater than 50 dB; at the same time, the voltage-controlled attenuator 24 generates different attenuations based on the different received control voltages, and the received control voltage can be a voltage with millivolt accuracy, therefore, the voltage-controlled attenuator 24 can achieve fine adjustment of power step less than 0.1dB. In actual use, the voltage-controlled attenuator 24 is mainly used to achieve fine adjustment of power step of 0-0.5dB, making up for the vacancy that the digital controlled attenuator cannot achieve power step adjustment below 0.5dB; the first digital controlled attenuator 22, the second digital controlled attenuator 23, the voltage-controlled attenuator 24, and the final amplifier 25 are connected in series in sequence, combined with the final amplifier 25 using an amplifier with a P1dB of 30dBm, and the final amplifier 25 needs to work in the linear region, so that the power of the first control signal changes linearly when amplified by the final amplifier 25, and finally achieves the effect that the output power can be greater than 20dBm.

[0031] In an optional embodiment, the two digitally controlled attenuators can provide an attenuation greater than 60dB, which far exceeds the requirement of attenuation > 50dB. The remaining attenuation margin can be used for in-band fluctuation calibration of the power carried by the first control signal when the frequency is between 12-16GHz. For example, the output power of the first control signal is 25dBm when the frequency is 12GHz, and the output power of the first control signal is 23dBm when the frequency is 16GHz. When the digitally controlled attenuator is controlled by FPGA, the power attenuation of the digitally controlled attenuator when the frequency is 12GHz is 2dB more than the power attenuation of the digitally controlled attenuator when the frequency is 16GHz. Ultimately, the output power can be 23dBm at both 12GHz and 16GHz.

[0032] Optionally, the power adjustment circuit 2 further includes a digital-to-analog converter 27, and the FPGA controls the digital-to-analog converter 27 to output a control voltage to the voltage-controlled attenuator 24, and the voltage-controlled attenuator 24 generates different power attenuation amounts based on different received control voltages.

[0033] In an optional embodiment, the FPGA controls the digital-to-analog converter 27 to output different voltages to the voltage-controlled attenuator 24, and the voltage-controlled attenuator 24 exhibits corresponding power attenuation based on different voltage values. It should be noted that the voltage-controlled attenuator 24 must be an analog device, that is, the attenuation of the voltage-controlled attenuator 24 can be continuously changed by adjusting the voltage, and the attenuation accuracy of the entire channel is determined by the resolution of the digital-to-analog converter 27. Therefore, in order to achieve fine-tuning of power with a step of less than 0.1 dB, the digital-to-analog converter 27 selects at least a 9-bit digital-to-analog converter to provide a voltage with millivolt accuracy. The model of the digital-to-analog converter 27 used in this embodiment is AD5530.

[0034] In an optional embodiment, since the operating frequency of the quantum bit is 12-16 GHz, the frequency of the first control signal output by the phase-locked loop 1 should be maintained at 12-16 GHz to ensure the normal operation of the quantum bit.

[0035] like Figure 2 As shown, in this embodiment, a third filter 28 and a second-stage amplifier 29 are added to the power adjustment circuit 2, and the first filter 20, the first-stage amplifier 21, the third filter 28, the second-stage amplifier 29, the first digitally controlled attenuator 22, the second digitally controlled attenuator 23, the voltage-controlled attenuator 24, the final amplifier 25, and the second filter 26 are connected in series in sequence, and the FPGA sends a second control signal to control the phase-locked loop 1 to output a first control signal whose frequency corresponds to the operating frequency of the quantum bit, and then the first filter 20 performs signal filtering on the first control signal, and the first-stage amplifier 21 performs a first-stage amplification processing on the power of the filtered first control signal, and the third filter 28 performs a second signal filtering on the first control signal after the power is amplified, and the second-stage amplifier 29 performs a second signal filtering on the first control signal after the secondary signal filtering. The power of the control signal is subjected to secondary amplification, and the first control signal after the secondary amplification is input into the first digitally controlled attenuator 22 and output through the second digitally controlled attenuator 23. The FPGA sends a second control signal to control the first digitally controlled attenuator 22 and the second digitally controlled attenuator 23 to attenuate the power after the primary amplification. After that, the voltage-controlled attenuator 24 generates different attenuation amounts based on the different received control voltages to perform power step fine-tuning on the attenuated power. Finally, the final amplifier 25 is used to amplify the fine-tuned power three times, so that the power of the three-times amplified first control signal can meet the requirements of the quantum measurement and control system after filtering by the second filter 36. In this embodiment, the first amplifier 21 and the final amplifier 25 operate in the linear region, and the second amplifier 29 operates in the saturation region.

[0036] Since the first digitally controlled attenuator 22 and the second digitally controlled attenuator 23 are digitally controlled attenuators with attenuation control bits of at least 6 bits and a minimum attenuation step of 0.5 dB, the first digitally controlled attenuator 22 and the second digitally controlled attenuator 23 can respectively achieve a power attenuation of up to 31.5 dB, that is, the first digitally controlled attenuator 22 and the second digitally controlled attenuator 23 connected in series can provide a power attenuation of up to 63 dB, which satisfies the requirement that the power attenuation provided by the digitally controlled attenuator in the quantum measurement and control system can be greater than 50 dB; at the same time, the voltage-controlled attenuator 24 generates different attenuations based on the different received control voltages, and the received control voltage can be a voltage with millivolt accuracy, therefore, the voltage-controlled attenuator The device 24 can achieve fine adjustment of power step less than 0.1dB. In actual use, the voltage-controlled attenuator 24 is mainly used to achieve fine adjustment of power step of 0-0.5dB, making up for the vacancy that the digitally controlled attenuator cannot achieve power step adjustment below 0.5dB; the first digitally controlled attenuator 22, the second digitally controlled attenuator 23, the voltage-controlled attenuator 24, and the final amplifier 25 are connected in series in sequence, combined with the amplifier with a P1dB of 30dBm selected for the final amplifier 25, and the final amplifier 25 needs to work in the linear region, so that the power of the first control signal changes linearly when amplified by the final amplifier 25, and finally achieves the effect that the output power can be greater than 20dBm.

[0037] Optionally, the first filter 20 and the third filter 28 are high-pass filters, and the second filter 36 is a low-pass filter.

[0038] In an optional embodiment, two high-pass filters and one low-pass filter constitute a bandpass filter, and the bandpass filter is used to achieve the effect of out-of-band spurious suppression to meet the spurious output requirements of the quantum measurement and control system.

[0039] In an optional embodiment, the signal source also includes a detector 3, and the detector 3 is used to detect the power of the first control signal after filtering 26 by the second filter. When the detection result of the detector 3 is at a high level, the power adjustment circuit 2 is in a normal state. When the detection result of the detector 3 is at a low level, the power adjustment circuit 2 is in an error state, and the power adjustment circuit 2 needs to be checked to eliminate erroneous components.

[0040] In an optional embodiment, a plurality of amplifiers and filters connected in sequence may be connected in series at the front end of the first filter 20 according to actual needs, which is not limited here.

[0041] The signal source of the present application can achieve the effect that the power of the output first control signal can be greater than 20dBm, the power can be fine-tuned with a step of less than 0.1dB, and the power attenuation provided by the digitally controlled attenuator can be greater than 50dB, that is, the power of the first control signal can be large and dynamic with small steps, meeting the needs of the quantum measurement and control system.

[0042] A quantum measurement and control system comprises the signal source, wherein the signal source is used to provide a power-amplified first control signal to the quantum measurement and control system.

[0043] A quantum computer comprises the quantum measurement and control system and a quantum chip, wherein the quantum chip performs a quantum computing task according to a first control signal after power amplification.

[0044] It should be understood that the specific examples in this specification are only intended to help those skilled in the art to better understand the implementation methods of this specification, rather than to limit the scope of this application.

[0045] It can be understood that in the various implementations of this specification, the size of the serial number of each process does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the implementation methods of this specification.

[0046] It can be understood that the various embodiments described in this specification can be implemented individually or in combination, and the embodiments of this specification are not limited to this.

[0047] Unless otherwise specified, all technical and scientific terms used in the embodiments of this specification have the same meaning as those generally understood by those skilled in the art of the technical field of this specification. The terms used in this specification are only for the purpose of describing specific embodiments and are not intended to limit the scope of this specification. The term "and / or" used in this specification includes any and all combinations of one or more related listed items. The singular forms of "a", "above", and "the" used in the embodiments of this specification and the appended claims are also intended to include plural forms, unless the context clearly indicates other meanings.

[0048] In the several embodiments provided in this specification, it should be understood that the disclosed device can be implemented in other ways. For example, the device implementation described above is only schematic. For example, the division of the device or module is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or modules, which can be electrical, mechanical or other forms.

[0049] The modules described as separate components may or may not be physically separated, and the components shown as modules may or may not be physical modules, that is, they may be located in one place or distributed on multiple network modules. Some or all of the modules may be selected according to actual needs to achieve the purpose of this implementation scheme.

[0050] In addition, each functional module in each embodiment of the present specification may be integrated into one device, or each module may exist physically separately, or two or more modules may be integrated into one device.

[0051] The above is only a specific implementation of this specification, but the protection scope of this application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in this specification, which should be included in the protection scope of this specification. Therefore, the protection scope of this application should be based on the protection scope of the claims.

Claims

1. A signal source, characterized in that: include: An electrically connected phase-locked loop and a power adjustment circuit, the phase-locked loop being used to output a first control signal having a frequency corresponding to an operating frequency of the quantum bit, and the power adjustment circuit being used to amplify the power of the first control signal; The power adjustment circuit includes a first filter, a first-stage amplifier, a first digitally controlled attenuator, a second digitally controlled attenuator, a voltage-controlled attenuator, a final-stage amplifier, and a second filter connected in series in sequence. The first filter is used to filter the received first control signal, and the second filter is used to output the first control signal after power amplification.

2. A signal source as claimed in claim 1, characterized in that: The power adjustment circuit further includes an FPGA, and the FPGA is used to provide a second control signal to the phase-locked loop, the first digitally controlled attenuator, and the second digitally controlled attenuator.

3. A signal source as claimed in claim 2, characterized in that: The power adjustment circuit also includes a digital-to-analog converter. The FPGA controls the digital-to-analog converter to output a control voltage to the voltage-controlled attenuator. The voltage-controlled attenuator generates different power attenuation amounts based on different received control voltages.

4. A signal source as claimed in claim 1, characterized in that: The first digitally controlled attenuator and the second digitally controlled attenuator are digitally controlled attenuators with attenuation control bits of at least 6 bits and a minimum attenuation step of 0.5 dB.

5. A signal source as claimed in claim 3, characterized in that: The digital-to-analog converter provides voltage with millivolt accuracy.

6. A signal source as claimed in claim 1, characterized in that: The power adjustment circuit also includes a third filter and a second-stage amplifier. The first filter, the first-stage amplifier, the third filter, the second-stage amplifier, the first digitally controlled attenuator, the second digitally controlled attenuator, the voltage-controlled attenuator, the final-stage amplifier, and the second filter are connected in series in sequence.

7. A signal source as claimed in claim 1, characterized in that: The first filter and the third filter are high-pass filters, and the second filter is a low-pass filter.

8. A signal source as claimed in claim 1, characterized in that: It also includes a detector, which is used to detect the power of the first control signal filtered by the second filter.

9. A quantum measurement and control system, characterized in that: Comprising the signal source according to any one of claims 1 to 8, the signal source is used to provide a power-amplified first control signal to the quantum measurement and control system.

10. A quantum computer, characterized in that: It includes the quantum measurement and control system and quantum chip as described in claim 9, and the quantum chip performs quantum computing tasks according to the first control signal after power amplification.

Images