Anti-interference radio frequency device

Abstract

The utility model discloses an anti-interference radio frequency device, and relates to the technical field of radio frequency devices. Comprising an antenna array, an anti-interference processing unit connected with the antenna array through a down-conversion channel and a straight-through channel, an up-conversion channel connected with the anti-interference processing unit, and a clock unit respectively connected with the down-conversion channel, the anti-interference processing unit and the up-conversion channel. Two radio frequency chips are connected between the down-conversion channel and the anti-interference processing unit and between the straight-through channel and the anti-interference processing unit. According to the anti-interference radio frequency device, the two radio frequency chips with four independent down-conversion receiving channels are adopted, an original frequency synthesizer unit is omitted, and the reliability of the device is improved; four channels are supported to receive radio frequency signals of the same frequency point at the same time, an anti-interference array receiver is formed, clock signals generated by a radio frequency chip can be multiplexed, under the same size, the size is reduced, the power consumption is reduced, the anti-interference performance is remarkably improved, the use requirement of product development is met, and good market popularization prospects are achieved.

Description

Technical Field

[0001] The utility model relates to the technical field of radio frequency devices, and in particular to an anti-interference radio frequency device. Background Art

[0002] In a strong electromagnetic interference environment, the RF device products that identify useful satellite navigation signals, process them and send them to the baseband for resolution have the problem of being large in size. Moreover, with the development of technology and the improvement of anti-interference requirements, simply adding anti-interference circuits will increase the size of the product, thus failing to meet the usage requirements.

[0003] Therefore, it is necessary to provide an anti-interference radio frequency device to address the above-mentioned deficiencies in the prior art. Utility Model Content

[0004] The main purpose of the utility model is to provide an anti-interference radio frequency device, which can effectively solve the problems in the background technology.

[0005] To achieve the above-mentioned purpose, the technical solution adopted by the utility model is: an anti-interference radio frequency device, including an antenna array, an anti-interference processing unit connected to the antenna array through a down-conversion channel and a direct channel, an up-conversion channel connected to the anti-interference processing unit, and a clock unit connected to the down-conversion channel, the anti-interference processing unit and the up-conversion channel respectively, two radio frequency chips are connected between the down-conversion channel and the direct channel and the anti-interference processing unit, the antenna array includes seven B3 antenna elements, the down-conversion channel includes six B3 anti-interference down-conversion channels, Each B3 anti-interference down-conversion channel includes a limiter, a filter and a B3 low-noise amplifier connected in sequence, and the through-channel includes a B3 anti-interference through-channel, and the B3 anti-interference through-channel includes a limiter, a filter, a B3 low-noise amplifier and a switch connected in sequence, wherein the B3 low-noise amplifiers of three B3 anti-interference down-conversion channels are connected to one RF chip, and the B3 low-noise amplifiers of the other three B3 anti-interference down-conversion channels are connected to another RF chip, and the switch of the B3 anti-interference through-channel is connected to the RF chip.

[0006] Further preferably, the radio frequency chip includes four independent down-conversion receiving channels, and each down-conversion receiving channel includes a TCA, a mixer, a TIA and an open-drain output OBUF connected in sequence.

[0007] Preferably, the up-conversion channel includes a B3 up-conversion channel, and the B3 up-conversion channel includes a switch, an up-conversion unit and a combining output unit connected in sequence.

[0008] Preferably, the clock unit comprises a frequency source, and the frequency source is respectively connected to the two radio frequency chips, the anti-interference processing unit, and the up-conversion unit in the up-conversion channel.

[0009] Preferably, the anti-interference processing unit is respectively connected to the two RF chips, the switch in the through channel and the switch in the up-conversion channel.

[0010] Compared with the prior art, the utility model has the following beneficial effects:

[0011] The utility model adopts two RF chips with four independent down-conversion receiving channels, eliminating the original frequency synthesis unit and improving the reliability of the device; it supports four channels to simultaneously receive RF signals of the same frequency to form an anti-interference array receiver, and can reuse the clock signal generated by the RF chip. Under the same size, it reduces the volume and power consumption, significantly improves the anti-interference performance, meets the use requirements of product development, and has good market promotion prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 This is a schematic diagram of the structure of the anti-interference radio frequency device of the utility model;

[0013] Figure 2 This is a block diagram of the radio frequency chip system of the utility model;

[0014] Figure 3 This is a circuit diagram of a down-conversion receiving channel of the utility model;

[0015] Figure 4 This is the radio frequency input port matching circuit diagram of the utility model;

[0016] Figure 5 This is the intermediate frequency output port matching circuit diagram of the utility model. DETAILED DESCRIPTION

[0017] The present invention is further described below in conjunction with the accompanying drawings and embodiments, but is not intended to limit the present invention. Any technical solution based on the transformation or inference of the present invention falls within the protection scope of the present invention.

[0018] like Figure 1 , 2As shown, an embodiment of the utility model provides an anti-interference radio frequency device, including an antenna array, an anti-interference processing unit connected to the antenna array through a down-conversion channel and a direct channel, an up-conversion channel connected to the anti-interference processing unit, and a clock unit connected to the down-conversion channel, the anti-interference processing unit and the up-conversion channel respectively, two radio frequency chips are connected between the down-conversion channel and the direct channel and the anti-interference processing unit, the antenna array includes seven B3 antenna arrays, the down-conversion channel includes six B3 anti-interference down-conversion channels, wherein each B3 anti-interference down-conversion channel includes a limiter, a filter and a B3 low-noise amplifier connected in sequence, and the direct channel The pass channel includes a B3 anti-interference pass-through channel, which includes a limiter, a filter, a B3 low-noise amplifier and a switch connected in sequence, wherein the B3 low-noise amplifiers of three B3 anti-interference down-conversion channels are connected to one RF chip, and the B3 low-noise amplifiers of the other three B3 anti-interference down-conversion channels are connected to another RF chip, the switch of the B3 anti-interference pass-through channel is connected to the RF chip, the master RF chip provides itself with a local oscillator signal, and also provides a local oscillator signal to the slave RF chip, the slave RF chip turns off the local oscillator output signal, realizes multi-chip cascade anti-interference, significantly improves the anti-interference performance, and reduces power consumption.

[0019] In an optional embodiment of the present invention, the radio frequency chip includes four independent down-conversion receiving channels, such as Figure 3 As shown, each down-conversion receiving channel includes a TCA, a mixer, a TIA and an open-drain output OBUF connected in sequence.

[0020] The TCA of the RF front end can reduce the noise coefficient of the chip's down-conversion receiving channel, ensuring that the noise coefficient of the down-conversion link is no higher than 8.5dB at a typical gain (15dB); the mixer adopts a current-type passive mixer structure, which has the characteristics of wide passband, high linearity and low noise, ensuring excellent large dynamic range performance when receiving strong interference signals; TIA provides a 30dB gain adjustment range, with a step of 0.5dB adjustment, which is convenient for gain setting requirements in different applications; the end uses an open-drain OBUF to easily achieve high linearity performance under large bandwidth; and the OIP3 is no less than 35dBm. The entire down-conversion receiving channel circuit adopts a differential input and output design, which effectively improves the channel's ability to suppress common-mode spurious signals, reduces possible crosstalk and spurious signals between channels, and improves isolation between channels.

[0021] The RF chip of the utility model integrates four independent down-conversion receiving channels, and also integrates low-noise amplifiers, down-conversion mixers, programmable amplifiers, low phase noise fractional frequency synthesizers, sampling clock circuits, phase shifters, power management, temperature detection and other circuits; it can have built-in local oscillators and external local oscillators, and more than two chips can share the local oscillator for expansion, so as to realize the reception of more than 4 channels of same-frequency signals.

[0022] In addition, more functions can be implemented by adding programs to the RF chip to achieve a better indicator.

[0023] Furthermore, in order to make the link have a lower noise figure and higher gain, the RF input port adopts differential input, which is implemented through a balun of the corresponding frequency, such as Figure 4 The figure shows the RF input matching circuit when the RF chip is working; the matching output is used to achieve the best linear performance and impedance matching, and the output mode of the intermediate frequency output port is also differential output, such as Figure 5 Shown is the matching circuit of the intermediate frequency output port in operation.

[0024] In an optional embodiment of the utility model, the up-conversion channel is used to realize the up-conversion of one BDS B3 intermediate frequency signal into a BDS B3 frequency satellite signal and output it. The up-conversion channel includes one B3 up-conversion channel. The B3 up-conversion channel includes a switch, an up-conversion unit and a combining output unit connected in sequence.

[0025] In an optional embodiment of the present invention, the clock unit includes a frequency source, and the frequency source is respectively connected to the two radio frequency chips, the anti-interference processing unit, and the up-conversion unit in the up-conversion channel.

[0026] In an optional embodiment of the utility model, the anti-interference processing unit is respectively connected to the two RF chips, the switch in the through channel and the switch in the up-conversion channel; the anti-interference processing unit controls the switches respectively by outputting high and low level control signals to realize that when the RF component loses normal power supply, the switch connects the through channel, thereby having the function of using the output port to feed power to realize the operation of the through channel.

[0027] The above shows and describes the basic principle and main features of the utility model and the advantages of the utility model. Those skilled in the art should understand that the utility model is not limited by the above embodiments. The above embodiments and the description are only for explaining the principle of the utility model. Without departing from the spirit and scope of the utility model, the utility model may have various changes and improvements, which fall within the scope of the utility model to be protected. The scope of protection of the utility model is defined by the attached claims and their equivalents.

Claims

1. An anti-interference radio frequency device, comprising an antenna array, an anti-interference processing unit connected to the antenna array through a down-conversion channel and a through-channel, an up-conversion channel connected to the anti-interference processing unit, and a clock unit connected to the down-conversion channel, the anti-interference processing unit and the up-conversion channel, respectively, characterized in that: Two RF chips are connected between the down-conversion channel and the through-channel and the anti-interference processing unit, the antenna array includes seven B3 antenna arrays, the down-conversion channel includes six B3 anti-interference down-conversion channels, wherein each B3 anti-interference down-conversion channel includes a limiter, a filter and a B3 low-noise amplifier connected in sequence, the through-channel includes one B3 anti-interference through-channel, the B3 anti-interference through-channel includes a limiter, a filter, a B3 low-noise amplifier and a switch connected in sequence, wherein the B3 low-noise amplifiers of three B3 anti-interference down-conversion channels are connected to one RF chip, the B3 low-noise amplifiers of the other three B3 anti-interference down-conversion channels are connected to another RF chip, and the switch of the B3 anti-interference through-channel is connected to the RF chip.

2. The anti-interference radio frequency device according to claim 1, characterized in that: The radio frequency chip comprises four independent down-conversion receiving channels, and each down-conversion receiving channel comprises a TCA, a mixer, a TIA and an open-drain output OBUF which are connected in sequence.

3. The anti-interference radio frequency device according to claim 2, characterized in that: The up-conversion channel includes a B3 up-conversion channel, and the B3 up-conversion channel includes a switch, an up-conversion unit and a combining output unit connected in sequence.

4. The anti-interference radio frequency device according to claim 2, characterized in that: The clock unit comprises a frequency source, and the frequency source is respectively connected to two radio frequency chips, an anti-interference processing unit, and an up-conversion unit in an up-conversion channel.

5. The anti-interference radio frequency device according to claim 2, characterized in that: The anti-interference processing unit is respectively connected to the two radio frequency chips, the switch in the through channel and the switch in the up-conversion channel.

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