Quantum chip packaging structure and quantum computer

By designing a detachable connection between the placement table and the substrate in the quantum chip packaging structure, the problem of low disassembly and assembly efficiency in the prior art is solved, and efficient disassembly and assembly is achieved and the risk of damage is reduced.

CN222852601UActive Publication Date: 2025-05-09ORIGIN QUANTUM COMPUTING TECH (HEFEI) CO LTD
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Patent Information

Application Number
CN202421504496.1
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-06-27
Publication Date
2025-05-09
Estimated Expiration
2034-06-27

AI Technical Summary

Technical Problem

In the prior art, the disassembly and assembly efficiency of quantum chips is low and is easily damaged during the disassembly and assembly process.

Method used

A quantum chip packaging structure is designed, in which the detachable connection between the placing table and the substrate is realized through the detachable connection between the placing table and the substrate, simplifying the disassembly and assembly process.

Benefits of technology

It improves the disassembly and assembly efficiency of quantum chips, reduces the risk of damage to quantum chips, and does not need to disassemble and assemble the entire packaging structure.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a quantum chip packaging structure and a quantum computer, and belongs to the technical field of quantum computers. The quantum chip packaging structure comprises a placing table which is provided with a first surface and a second surface which are opposite to each other, and a quantum chip is fixed on the first surface; the substrate is used for bearing the placement table, the substrate faces the second surface, the placement table is detachably connected with the substrate, and the quantum chip is indirectly and detachably connected with the substrate through the placement table. In the quantum chip packaging structure, the quantum chip is detachably connected with the substrate through the placement table, so that the disassembly and assembly of the quantum chip are changed from the separation of the chip and the structural members into the separation of the two structural members, and the detachable connection between the two structural members can effectively improve the efficiency of the disassembly and assembly of the quantum chip; and the risk of damage to the quantum chip in the disassembly and assembly process is also reduced.
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Description

Technical Field

[0001] The utility model relates to the technical field of quantum computers, in particular to a quantum chip packaging structure and a quantum computer. Background Art

[0002] The packaging of quantum chips is one of the important links in quantum computers. Quantum chips need to be packaged in a closed cavity structure. The cavity structure is designed with an external interface for connecting the quantum chip and external measurement and control equipment.

[0003] In the prior art, the quantum chip is fixedly placed on a base plate, and then a circuit board is connected to the quantum chip to form a package. However, when the quantum chip is disassembled or replaced, the quantum chip needs to be separated from the base plate, which results in low disassembly efficiency.

[0004] Therefore, how to efficiently disassemble and assemble quantum chips in packaging structures is an urgent problem to be solved. Utility Model Content

[0005] The purpose of the utility model is to provide a quantum chip packaging structure and a quantum computer to solve the deficiencies in the prior art, and it is convenient to efficiently disassemble and assemble the quantum chip in the packaging structure.

[0006] The solution of this application example is implemented through the following contents.

[0007] In a first aspect, an example of the present application proposes a quantum chip packaging structure, comprising:

[0008] A placement table having a first surface and a second surface opposite to each other, wherein the quantum chip is fixed on the first surface;

[0009] A substrate is used to carry the placement table, the substrate faces the second surface, the placement table is detachably connected to the substrate, and the quantum chip is indirectly detachably connected to the substrate via the placement table.

[0010] According to some examples of the present application, the substrate is provided with a first through hole, and the placement table is provided with a second through hole;

[0011] The packaging structure further includes:

[0012] A fixing member passes through the first through hole and the second through hole in sequence, and is used to achieve a detachable connection between the placement platform and the substrate.

[0013] According to some examples of the present application, the substrate is provided with a first through hole;

[0014] The packaging structure further includes:

[0015] An adhesive layer is formed on the second surface and the first through hole, and is used to achieve a detachable connection between the placement platform and the substrate.

[0016] According to some examples of the present application, the placement platform has a first groove disposed on the first surface, and along a direction perpendicular to the first surface, a depth of the first groove is less than a thickness of the placement platform.

[0017] According to some examples of the present application, the packaging structure further includes:

[0018] a first column, wherein the first column is located on the first surface;

[0019] The quantum chip has a third through hole which is opposite to the first column and has the same cross-sectional size as the first column. The quantum chip passes through the first column via the third through hole and is fixed to the placement platform.

[0020] According to some examples of the present application, the first pillar is bonded to a ground plane on the quantum chip.

[0021] According to some examples of the present application, the packaging structure further includes:

[0022] The cover plate has a second column corresponding to the first column in position and having the same cross-sectional size as the first column; the first column and the second column are connected via a spring pin.

[0023] According to some examples of the present application, the packaging structure further includes:

[0024] A circuit board and a carrier board arranged from top to bottom in a direction perpendicular to the first surface;

[0025] The circuit board and the carrier board both have through holes for exposing the quantum chip;

[0026] The carrying plate is sleeved on the side wall of the placing table and is arranged in contact with the substrate. Along a direction perpendicular to the first surface, a difference between a thickness of the placing table and a thickness of the carrying plate meets a preset threshold condition.

[0027] According to some examples of the present application, the circuit board includes a tunnel type circuit board and a solid board type circuit board.

[0028] In a second aspect, an example of the present application proposes a quantum computer, comprising the above-mentioned quantum chip packaging structure.

[0029] In the quantum chip packaging structure of the aforementioned example of the present application, the placement table for placing the quantum chip is detachably connected to the substrate, so that the quantum chip can be detachably connected to the substrate through the placement table. In this way, the disassembly and assembly of the quantum chip is changed from separating the chip and the structural part to separating the two structural parts. The detachable connection between the two structural parts can effectively improve the efficiency of disassembly and assembly of the quantum chip, and also reduce the risk of damage to the quantum chip during the disassembly and assembly process. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] For a clearer explanation, the following briefly introduces the drawings required for the description.

[0031] Figure 1 A top view of a quantum chip packaging structure in an example of the present application;

[0032] Figure 2 This is an exploded diagram of a quantum chip packaging structure in an example of this application;

[0033] Figure 3 A top view of a substrate in a quantum chip packaging structure in an example of the present application;

[0034] Figure 4 A top view of a placement platform in a quantum chip packaging structure in an example of the present application;

[0035] Figure 5 A side view of a placement platform in a quantum chip packaging structure in an example of the present application;

[0036] Figure 6 This is a top view of a quantum chip in a quantum chip packaging structure in an example of the present application. DETAILED DESCRIPTION

[0037] In order to enable those skilled in the art to better understand the technical solutions in the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of this application. The embodiments described below with reference to the drawings are exemplary and are only used to explain the present application, and cannot be interpreted as limitations on the present application.

[0038] In the description of the present invention, it should be understood that the terms "center", "up", "down", "left", "right", etc. indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as a limitation on the present invention.

[0039] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present utility model, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0040] The packaging of quantum chips is one of the important links in quantum computers. Quantum chips need to be packaged in a closed cavity structure. The cavity structure is designed with an external interface for connecting the quantum chip and external measurement and control equipment. In the prior art, the quantum chip is fixed on the bottom plate, and then the circuit board is fixedly connected to the quantum chip to form a packaging structure. Therefore, when the quantum chip is disassembled or replaced, the quantum chip needs to be peeled off the substrate. Such a disassembly process is inefficient and faces the risk of damaging the quantum chip.

[0041] Based on this, Figure 1-Figure 2 As shown, an embodiment of the present invention provides a quantum chip packaging structure, which is illustrated by way of example. The packaging structure includes:

[0042] A placement table 100 has a first surface and a second surface opposite to each other, and a quantum chip 200 is fixed on the first surface;

[0043] The substrate 300 is used to carry the placement platform 100 . The substrate 300 faces the second surface. The placement platform 100 and the substrate 300 are detachably connected. The quantum chip 200 is indirectly detachably connected through the placement platform 100 and the substrate 300 .

[0044] Among them, the quantum chip 200 is fixed to the placement table 100, and in the whole process of disassembling and assembling the quantum chip 200, the quantum chip 200 and the placement table 100 are as a whole. The present application does not limit the specific way in which the placement table 100 and the substrate 300 can be detachably connected. In addition, the PCB circuit board 500 connected to the quantum chip 200 by bonding wires is fixedly connected to the substrate 300. Therefore, when the quantum chip 200 is disassembled from the above-mentioned quantum chip packaging structure, only the placement table 100 and the substrate 300 are disassembled, and there is no need to disassemble other packaging connection structures.

[0045] The above-mentioned quantum chip packaging structure has a placement table 100 on which the quantum chip 200 is fixed, which is detachably connected to the substrate 300. Therefore, during the process of replacing the quantum chip 200, the two structural parts are actually connected, and there is no need to disassemble the entire packaging structure, thereby improving the efficiency of disassembling and assembling the quantum chip 200. In the process of replacing the quantum chip 200 of the present application, the quantum chip 200 is not directly peeled off, but the placement table 100 on which the quantum chip 200 is placed is disassembled, which can effectively reduce the risk of damage to the quantum chip 200.

[0046] like Figure 3 As shown, in one embodiment of the present application, the substrate 300 is provided with a first through hole 310, and the placement platform 100 is provided with a second through hole;

[0047] The quantum chip packaging structure also includes:

[0048] The fixing member passes through the first through hole 310 and the second through hole in sequence, and is used to achieve a detachable connection between the placement table 100 and the substrate 300 .

[0049] Among them, the first through hole 310 passes through the substrate 300, and the second through hole does not pass through the placement table 100. The through hole can be a threaded hole, and the fixing member can be a screw or a bolt. It should be noted that the present application does not limit the specific types of the fixing member and the first and second through holes, and they can be selected according to actual needs.

[0050] Specifically, the detachable connection between the substrate 300 and the placement platform 100 can be achieved by the fixing member passing through the first through hole 310 and the second through hole in sequence. When the quantum chip 200 is replaced, the fixing member needs to be removed from the second through hole, and then the placement platform 100 with the quantum chip 200 fixed thereon is separated from the substrate 300; the new placement platform 100 with the target quantum chip 200 fixed thereon is replaced, and then the substrate 300 and the new placement platform 100 are connected by the fixing member passing through the second through hole of the new placement platform 100.

[0051] In one embodiment of the present application, the substrate 300 is provided with a first through hole 310;

[0052] The quantum chip packaging structure also includes:

[0053] The adhesive layer is formed on the second surface and the first through hole 310 , and is used to achieve a detachable connection between the placement table 100 and the substrate 300 .

[0054] Specifically, the material of the adhesive layer may include conductive silver paste. The substrate 300 has a first through hole 310 penetrating the substrate 300, and the material of the adhesive layer may be injected into the second surface of the placement platform 100 through the first through hole 310. When the quantum chip 200 is replaced, a solvent that can dissolve the adhesive layer material is injected through the first through hole 310 to dissolve the adhesive layer to achieve separation of the placement platform 100 and the substrate 300.

[0055] like Figure 4 As shown, in one embodiment of the present application, the placement platform 100 has a first groove 110 disposed on the first surface, and along a direction perpendicular to the first surface, the depth of the first groove 110 is less than the thickness of the placement platform 100 .

[0056] In the direction perpendicular to the first surface, the position corresponding to the projection of the first groove 110 does not coincide with the position of the first through hole 310. The size of the first groove 110 is smaller than the size of the placement table 100, and the size of the placement table 100 is consistent with the size of the quantum chip 200.

[0057] Specifically, the quantum chip packaging structure includes side walls and a top cover 410. The top cover 410, the substrate 300, and the side walls surrounding the substrate 300 together constitute a packaging box for packaging the quantum chip 200. When the placement table 100 is provided with the first groove 110, the effective dielectric constant in the packaging box can be effectively reduced, thereby achieving the purpose of increasing the minimum resonant frequency of the packaging box.

[0058] like Figure 5-Figure 6 As shown, in one embodiment of the present application, the quantum chip packaging structure further includes:

[0059] A first column 120, the first column 120 is located on the first surface;

[0060] The quantum chip 200 has a third through hole 210 which is opposite to the first column 120 and has the same cross-sectional size as the first column 120 . The quantum chip 200 passes through the first column 120 through the third through hole 210 and is fixed to the placement platform 100 .

[0061] The height of the first column 120 is higher than the thickness of the quantum chip 200. There are multiple first columns 120 and they are symmetrically distributed. In the direction perpendicular to the first surface, the position corresponding to the projection of the first column 120 does not overlap with the position of the first through hole 310.

[0062] Specifically, the quantum chip 200 is fixed on the placement table 100 through the first column 120, and the first surface of the placement table 100 is provided with a curing glue, which is convenient for fixing the quantum chip 200. Due to the provision of the first column 120, the quantum chip 200 can be stably fixed on the placement table 100 during the process of disassembling and assembling the quantum chip 200, thereby reducing the risk of the quantum chip 200 moving.

[0063] In one embodiment of the present application, the first pillar 120 is bonded to a ground plane on the quantum chip 200 .

[0064] Specifically, the first column 120 can be bonded to the ground plane of the quantum chip 200 through a bonding wire. The first column 120 is connected to the ground metal plane of the quantum chip 200, which can reduce the dielectric constant of the medium in the package box where the quantum chip 200 is located and increase the minimum resonant frequency of the package box.

[0065] like Figure 2 As shown, in one embodiment of the present application, the quantum chip packaging structure further includes:

[0066] The cover plate 400 has a second column corresponding to the first column 120 and having the same cross-sectional size; the first column 120 and the second column are connected via a spring pin.

[0067] Among them, the cover plate 400 can also include a top cover 410 and an observation cover 420; the observation cover 420 includes an observation window that can expose the quantum chip 200, which is used to observe the connection status of the quantum chip 200 inside the packaging box, and the observation cover 420 also has a second column that corresponds to the position of the first column 120 and has the same cross-sectional size; the first column 120 and the second column are electrically connected, and the connection method can include connection through a spring pin.

[0068] In one embodiment of the present application, the quantum chip packaging structure further includes:

[0069] A circuit board 500 and a carrier board 600 arranged from top to bottom in a direction perpendicular to the first surface;

[0070] The circuit board 500 and the carrier board 600 both have through holes for exposing the quantum chip 200;

[0071] The carrier plate 600 is sleeved on the side wall of the placement table 100 and is arranged in contact with the substrate 300. Along the direction perpendicular to the first surface, the difference between the thickness of the placement table 100 and the thickness of the carrier plate 600 meets a preset threshold condition.

[0072] Specifically, the observation cover 420 and the circuit board 500 also include an interlayer cover plate 700 , which also has a through hole exposing the quantum chip 200 , and is used to protect the circuit board 500 and reduce the risk of the circuit board 500 being squeezed and damaged by the observation cover 420 .

[0073] Specifically, the thickness of the placement table 100 is less than the thickness of the carrying plate 600 , and the thickness difference between the thickness of the carrying plate 600 and the thickness of the placement table 100 meets a preset threshold condition, which can be set according to actual needs.

[0074] In one embodiment of the present application, the circuit board 500 includes a tunnel-type circuit board 500 and a whole substrate 300-type circuit board 500 .

[0075] Specifically, the quantum chip packaging structure may include a circuit board 500, a carrier plate 600 and a substrate 300 fixedly connected from top to bottom in a direction perpendicular to the first surface, and the placement platform 100 fixed with the quantum chip 200 and the substrate 300 are detachably connected. Based on this, the quantum chip packaging structure provided by the present application is suitable for testing different circuit boards 500 using the same quantum chip 200: when the type of the circuit board 500 included in the first quantum chip packaging structure is different from the type of the circuit board 500 included in the second quantum chip packaging structure, after the test of the PCB circuit board 500 in the first quantum chip packaging structure using the quantum chip 200 is completed, the placement platform 100 fixed with the quantum chip 200 can be taken out of the first quantum chip packaging structure, and the substrate 300 connected to the second quantum chip packaging structure is placed, and the PCB circuit board 500 in the second quantum chip packaging structure is tested. In summary, the quantum chip 200 is indirectly and detachably connected to the substrate 300 through the placement table 100, which effectively improves the efficiency of disassembly and assembly, and reduces the risk of damage to the quantum chip 200. In addition, the quantum chip 200 can be disassembled and assembled inside the structure of the quantum chip 200 without disassembling the entire packaging structure, which also reduces the risk of damage to other packaging structures except the quantum chip 200 and the placement table 100 during the disassembly and assembly process.

[0076] Based on the same application concept, the embodiment of the present application also proposes a quantum computer, including the above-mentioned quantum chip packaging structure. Therefore, it has the same beneficial effects as the above-mentioned quantum chip packaging structure, which will not be repeated here.

[0077] In the description of this specification, the description with reference to the terms "some embodiments" or "examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the utility model. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments in a suitable manner. In addition, those skilled in the art can combine and combine different embodiments or examples described in this specification.

[0078] The above are only preferred embodiments of the present invention and do not limit the present invention in any way. Any technician in the relevant technical field, without departing from the scope of the technical solution of the present invention, may make any equivalent replacement or modification to the technical solution and technical content disclosed in the present invention, which shall be deemed as the content of the technical solution of the present invention and still fall within the protection scope of the present invention.

Claims

1. A quantum chip packaging structure, characterized in that: include: A placement table having a first surface and a second surface opposite to each other, wherein the quantum chip is fixed on the first surface; A substrate is used to carry the placement table, the substrate faces the second surface, the placement table is detachably connected to the substrate, and the quantum chip is indirectly detachably connected to the substrate via the placement table.

2. The quantum chip packaging structure according to claim 1, characterized in that: The substrate is provided with a first through hole, and the placement platform is provided with a second through hole; The packaging structure further includes: A fixing member passes through the first through hole and the second through hole in sequence, and is used to achieve a detachable connection between the placement platform and the substrate.

3. The quantum chip packaging structure according to claim 1, characterized in that: The substrate is provided with a first through hole; The packaging structure further includes: An adhesive layer is formed on the second surface and the first through hole, and is used to achieve a detachable connection between the placement platform and the substrate.

4. The quantum chip packaging structure according to claim 1, characterized in that: The placement platform has a first groove arranged on the first surface, and along a direction perpendicular to the first surface, a depth of the first groove is less than a thickness of the placement platform.

5. The quantum chip packaging structure according to claim 1, characterized in that: The packaging structure further includes: a first column, wherein the first column is located on the first surface; The quantum chip has a third through hole which is opposite to the first column and has the same cross-sectional size as the first column. The quantum chip passes through the first column via the third through hole and is fixed to the placement platform.

6. The quantum chip packaging structure according to claim 5, characterized in that: The first column is bonded to a ground plane on the quantum chip.

7. The quantum chip packaging structure according to claim 5, characterized in that: The packaging structure further includes: The cover plate has a second column corresponding to the first column in position and having the same cross-sectional size as the first column; the first column and the second column are connected via a spring pin.

8. The quantum chip packaging structure according to claim 1, characterized in that: The packaging structure further includes: A circuit board and a carrier board arranged from top to bottom in a direction perpendicular to the first surface; The circuit board and the carrier board both have through holes for exposing the quantum chip; The carrying plate is sleeved on the side wall of the placing table and is arranged in contact with the substrate. Along a direction perpendicular to the first surface, a difference between a thickness of the placing table and a thickness of the carrying plate meets a preset threshold condition.

9. The quantum chip packaging structure according to claim 8, characterized in that: The circuit boards include tunnel-type circuit boards and solid-plate-type circuit boards.

10. A quantum computer, characterized in that: Comprising a quantum chip packaging structure as described in any one of claims 1 to 9.