Low-cost brake recovery circuit of high-power generator for fitness equipment

Abstract

The utility model relates to the technical field of brake recovery, in particular to a low-cost brake recovery circuit of a high-power generator for fitness equipment, which is characterized in that a resistance adjusting parallel circuit is electrically connected with other circuits and comprises a linear resistance adjusting circuit and a plurality of switch resistance adjusting circuits; each switch resistance trimming circuit is connected with a linear resistance trimming circuit in parallel, the switch resistance trimming circuits are also connected in parallel, the switch resistance trimming circuits are electrically connected with a second current sampling circuit, and the linear resistance trimming circuit is electrically connected with a first current sampling circuit. Compared with the prior art, the low-cost brake recovery circuit has the advantages that linear current regulation is realized by selecting MOS (metal oxide semiconductor) tubes with high power, and three MOS tubes with low power are responsible for switching on and switching off, so that the mode of combining three switches and one linearity greatly saves investment cost on the premise of the same power compared with the mode of combining four linearity.

Description

Technical Field

[0001] The utility model relates to the technical field of brake recovery, in particular to a low-cost brake recovery circuit of a high-power generator for fitness equipment. Background Art

[0002] There is a type of fitness equipment on the market that uses a high-power generator of more than several hundred watts to provide resistance for users. At the same time, it can also output excess electrical energy for external power supply, such as charging mobile phones.

[0003] Some circuits for adjusting resistance use switching power supplies to adjust resistance, but this circuit has large interference. Some use multiple MOS tubes to simulate resistance, but this circuit has high requirements for MOS tubes and the corresponding circuit is also more complicated. At the same time, the greater the power, the more MOS tubes are needed, resulting in higher costs. Utility Model Content

[0004] The purpose of the utility model is to provide a low-cost braking recovery circuit for a high-power generator used in fitness equipment to solve the problems raised in the above-mentioned background technology.

[0005] The technical solution of the utility model is: a low-cost braking recovery circuit of a high-power generator for fitness equipment, including a resistance adjustment parallel circuit, the resistance adjustment parallel circuit is electrically connected to a control circuit, the resistance adjustment parallel circuit includes a linear resistance adjustment circuit and a plurality of switch resistance adjustment circuits, each of the switch resistance adjustment circuits is connected in parallel with the linear resistance adjustment circuit, and each of the switch resistance adjustment circuits is also connected in parallel with each other, and at the same time, the plurality of switch resistance adjustment circuits are electrically connected to a second current sampling circuit, and the linear resistance adjustment circuit is electrically connected to a first current sampling circuit;

[0006] Furthermore, the control circuit includes but is not limited to a rectifier circuit, a speed measuring circuit, a power supply circuit and a current sampling and amplifying circuit;

[0007] Furthermore, the rectifier circuit includes a terminal CN1, a U port of the terminal CN1 is electrically connected to the anode of the diode D3 and the cathode of the diode D4, a V port of the terminal CN1 is electrically connected to the anode of the diode D5 and the cathode of the diode D6, a W port of the terminal CN1 is electrically connected to the anode of the diode D10 and the cathode of the diode D11, the cathode of the diode D3, the cathode of the diode D5 and the cathode of the diode D10 are electrically connected, and capacitors C1 and C2 are electrically connected, and the anode of the diode D4, the anode of the diode D6 and the anode of the diode D11 are electrically connected, and resistor R9 is electrically connected, and the resistor R9 is electrically connected to the capacitor C1 and the capacitor C2, and the capacitor C1, the capacitor C2 and the resistor R9 are all grounded.

[0008] Furthermore, the speed measurement circuit includes an operational amplifier A4, port 1 of the operational amplifier A4 is electrically connected to resistor R7 and the resistance adjustment parallel circuit, port 2 of the operational amplifier A4 is electrically connected to the anode of diode D1, the cathode of diode D2, capacitor C5, resistor R3 and resistor R4, the cathode of diode D1 is electrically connected to port 8 of the operational amplifier A4, and the diode D2, capacitor C5 and resistor R4 are connected in parallel with each other, port 3 of the operational amplifier A4 is electrically connected to resistor R24 ​​and resistor R30, and port 4 of the operational amplifier A4, diode D2, capacitor C5, resistor R4 and resistor R30 are all grounded.

[0009] Furthermore, the linear resistance adjustment circuit includes an operational amplifier A1, port 1 of the operational amplifier A1 is electrically connected to a resistor R21 and a resistor R23, the resistor R21 is electrically connected to a capacitor C3 and a gate of a MOS tube Q3, the drain of the MOS tube Q3 is electrically connected to a port 2 of a power resistor U2, the drain of the MOS tube Q3 is electrically connected to a resistor R18, the resistor R23 is electrically connected to a port 2 of the operational amplifier A1 and a resistor R24, the port 3 of the operational amplifier A1 is electrically connected to a resistor R12, a resistor R32 and a capacitor C23, the resistor R24 ​​is electrically connected to a resistor R18, the resistor R32 is electrically connected to a PWM port of a single-chip computer, and the resistor R12, the resistor R18, the capacitor C3, the capacitor C23 and the port 4 of the operational amplifier A1 are all grounded, and the MOS tube Q3 is electrically connected to a first current sampling circuit.

[0010] Furthermore, the first current sampling circuit includes an operational amplifier A2, port 1 of the operational amplifier A2 is electrically connected to resistor R37 and resistor R40, the resistor R40 is electrically connected to capacitor C15, the resistor R37 is electrically connected to port 2 of the operational amplifier A2 and resistor R36, port 3 of the operational amplifier A2 is electrically connected to resistor R38 and resistor R39, the resistor R36 and resistor R39 are both electrically connected to resistor R18, and port 4 of the operational amplifier A2, capacitor C15 and resistor R38 are all grounded.

[0011] Furthermore, the switch resistance regulating circuit includes a MOS transistor Q1, a MOS transistor Q2 and a MOS transistor Q4, and the MOS transistor Q1, the MOS transistor Q2 and the MOS transistor Q4 are connected in parallel with each other, and the MOS transistor Q1, the MOS transistor Q2 and the MOS transistor Q4 are respectively electrically connected to the power resistor in the linear resistance regulating circuit.

[0012] Furthermore, the gate of the MOS tube Q1 is electrically connected to the resistor R10, the resistor R29 and the collector of the transistor U10, the resistor R29 is electrically connected to the source of the MOS tube Q1, the emitter of the transistor U10 and the second current sampling circuit, the base of the transistor U10 is electrically connected to the resistor R1, the resistor R1 is electrically connected to the power resistor in the linear resistance adjustment circuit, and the drain of the MOS tube Q1 is electrically connected to the 2-port of the power resistor U12.

[0013] Furthermore, the second current sampling circuit includes an operational amplifier A3, the 7-port of the operational amplifier A3 is electrically connected to a resistor R41 and a resistor R44, the resistor R41 is electrically connected to a capacitor C24, the resistor R44 is electrically connected to a resistor R45 and a 6-port of the operational amplifier A3, the 5-port of the operational amplifier A3 is electrically connected to a resistor R42, a resistor R43 and a capacitor C25, the capacitor C25 is electrically connected to a resistor R45, the resistor R42 is electrically connected to a resistor R28 and a switch resistance adjustment circuit, and the capacitor C24, the resistor R28 and the resistor R43 are all grounded.

[0014] The utility model provides a low-cost braking recovery circuit of a high-power generator for fitness equipment through improvement. Compared with the prior art, it has the following improvements and advantages:

[0015] The low-cost braking recovery circuit of the utility model realizes linear current regulation by selecting high-power MOS tubes. Three low-power MOS tubes are responsible for opening and closing. Thus, the combination of three switches and one linear circuit greatly saves investment costs compared to the combination of four linear circuits under the premise of the same power. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The utility model is further explained below in conjunction with the accompanying drawings and embodiments:

[0017] Figure 1 This is the circuit schematic diagram of the low-cost braking recovery circuit of the utility model;

[0018] Figure 2 It is a circuit diagram of the rectifier circuit of the utility model;

[0019] Figure 3 It is a circuit diagram of the utility model linear resistance regulating circuit;

[0020] Figure 4 It is a circuit diagram of the first current sampling circuit of the utility model;

[0021] Figure 5 It is a circuit diagram of the switch resistance regulating circuit of the utility model;

[0022] Figure 6 It is a circuit diagram of the second current sampling circuit of the utility model;

[0023] Figure 7 It is a circuit diagram of the speed measuring circuit of the utility model. DETAILED DESCRIPTION

[0024] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0025] It should be noted that, in the description of the present invention, the terms "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside" and "outside" etc. indicating directions or positional relationships are based on the directions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description. They do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore cannot be understood as a limitation on the present invention.

[0026] refer to Figure 1-Figure 7 This embodiment provides a low-cost braking recovery circuit for a high-power generator for fitness equipment, and the low-cost braking recovery circuit includes a resistance adjustment parallel circuit and a control circuit. The resistance adjustment parallel circuit is electrically connected to the control circuit, and the resistance adjustment parallel circuit includes a linear resistance adjustment circuit and a plurality of switch resistance adjustment circuits, each switch resistance adjustment circuit is connected in parallel with the linear resistance adjustment circuit, and each switch resistance adjustment circuit is also connected in parallel with each other, and the plurality of switch resistance adjustment circuits are electrically connected to the second current sampling circuit, and the linear resistance adjustment circuit is electrically connected to the first current sampling circuit. It is worth noting that the control circuit in this embodiment includes but is not limited to a rectifier circuit, a speed measuring motor, a power supply circuit, and a current sampling amplifier circuit. Specifically, the low-cost braking recovery circuit of this embodiment can charge a mobile phone through an external power supply circuit.

[0027] In this embodiment, the electricity generated by the generator passes through the rectifier circuit, enters the input port, and is adjusted by the resistance adjustment parallel circuit. The main body of the resistance adjustment circuit is MOS1, MOS2, MOS3 and MOS4, and the MOS1 tube needs to be a high-power MOS tube, and needs to be coordinated by the single-chip microcomputer and the circuit to achieve linear current regulation. The remaining three MOS2, MOS3 and MOS4 tubes can only be turned on and off, and cannot linearly adjust the current. Since the cost of the linear resistance adjustment circuit is high and the cost of the switch resistance adjustment circuit is low, this embodiment adopts a combination of 3 switches and 1 linear. Compared with the combination of 4 linear circuits, under the premise of the same power, the investment cost is greatly saved, that is, the established function is achieved at the lowest cost.

[0028] In the present embodiment, the rectifier circuit includes a terminal CN1, a U port of the terminal CN1 is electrically connected to the anode of the diode D3 and the cathode of the diode D4, a V port of the terminal CN1 is electrically connected to the anode of the diode D5 and the cathode of the diode D6, a W port of the terminal CN1 is electrically connected to the anode of the diode D10 and the cathode of the diode D11, the cathode of the diode D3, the cathode of the diode D5 and the cathode of the diode D10 are electrically connected, and are electrically connected to capacitors C1 and C2, while the anode of the diode D4, the anode of the diode D6 and the anode of the diode D11 are electrically connected, and are electrically connected to resistors R9, while resistors R9 are electrically connected to capacitors C1 and C2, and capacitors C1, C2 and resistors R9 are all grounded. It is worth noting that the rectifier bridge in the rectifier circuit of the present embodiment can also be implemented by a MOS or IGBT three-phase full bridge, which is not unique.

[0029] Specifically, the terminal CN1 is electrically connected to the three wires of the motor. It is worth noting that the motor in this embodiment generally adopts a three-phase brushless motor or a brushed DC motor. Among them, the three-phase brushless motor needs to be equipped with a rectifier circuit. The brushed DC motor is internally provided with a carbon brush rectifier, so there is no need to be equipped with a rectifier circuit.

[0030] In the present embodiment, the speed measuring circuit includes an amplifier A4, a port 1 of the amplifier A4 is electrically connected to a resistor R7 and a resistance adjustment parallel circuit, a port 2 of the amplifier A4 is electrically connected to an anode of a diode D1, a cathode of a diode D2, a capacitor C5, a resistor R3 and a resistor R4, a cathode of a diode D1 is electrically connected to a port 8 of the amplifier A4, a diode D2, a capacitor C5 and a resistor R4 are connected in parallel, a port 3 of the amplifier A4 is electrically connected to a resistor R24 ​​and a resistor R30, and a port 4 of the amplifier A4, a diode D2, a capacitor C5, a resistor R4 and a resistor R30 are all grounded. Specifically, the input terminal W is any one of the three wires of the motor, and the output terminal RPM is a square wave signal. Wherein the in- waveform is a half-sine wave, and in+ provides a reference voltage. Since the power generation voltage may be high, a diode D1 is added, and when the voltage is too high, the voltage will be absorbed by 3.3V.

[0031] In this embodiment, the linear resistance adjustment circuit includes an operational amplifier A1, a port 1 of the operational amplifier A1 is electrically connected to a resistor R21 and a resistor R23, the resistor R21 is electrically connected to a capacitor C3 and a gate of a MOS tube Q3, a drain of the MOS tube Q3 is electrically connected to a port 2 of a power resistor U2, a drain of the MOS tube Q3 is electrically connected to a resistor R18, a resistor R23 is electrically connected to a port 2 of the operational amplifier A1 and a resistor R24, a port 3 of the operational amplifier A1 is electrically connected to a resistor R12, a resistor R32 and a capacitor C23, a resistor R24 ​​is electrically connected to a resistor R18, a resistor R32 is electrically connected to a PWM port of a single-chip computer, and at the same time, the resistor R12, the resistor R18, the capacitor C3, the capacitor C23 and a port 4 of the operational amplifier A1 are all grounded, and the MOS tube Q3 is electrically connected to a first current sampling circuit. Furthermore, the linear resistance adjustment circuit samples the comparison amplifier circuit, and the input PWM_1 is filtered by RC low-pass to realize DAC conversion, and is given to the in+ of the op amp A1 for setting the current, and the in- of the op amp is used for current feedback. When the actual current is lower than the current setting value, the output voltage of the op amp A1 increases, the VGS of the MOS tube Q3 increases, and then the current of the MOS tube Q3 increases. When the actual current is greater than the current setting value, the output voltage of the op amp A1 decreases, the VGS of the MOS tube Q3 decreases, and then the current of MOS1 decreases. In other words, when the in+ and in- of the op amp A1 are the same, the adjustment is completed and the current tends to a stable value.

[0032] In this embodiment, the first current sampling circuit includes an operational amplifier A2, port 1 of the operational amplifier A2 is electrically connected to resistor R37 and resistor R40, resistor R40 is electrically connected to capacitor C15, resistor R37 is electrically connected to port 2 of the operational amplifier A2 and resistor R36, port 3 of the operational amplifier A2 is electrically connected to resistor R38 and resistor R39, resistor R36 and resistor R39 are both electrically connected to resistor R18, and port 4 of the operational amplifier A2, capacitor C15 and resistor R38 are all grounded.

[0033] In this embodiment, the switch resistance adjustment circuit includes MOS tube Q1, MOS tube Q2 and MOS tube Q4, and the MOS tube Q1, MOS tube Q2 and MOS tube Q4 are connected in parallel with each other, and the MOS tube Q1, MOS tube Q2 and MOS tube Q4 are respectively electrically connected to the power resistor in the linear resistance adjustment circuit. Specifically, the gate of the MOS tube Q1 is electrically connected to the resistor R10, the resistor R29 and the collector of the triode U10, the resistor R29 is electrically connected to the source of the MOS tube Q1, the emitter of the triode U10 and the second current sampling circuit, the base of the triode U10 is electrically connected to the resistor R1, the resistor R1 is electrically connected to the rectifier circuit and the speed measurement circuit, and the drain of the MOS tube Q1 is electrically connected to the 2-port of the power resistor U12. It is worth noting that the triode U10 can also be replaced by a MOS tube, which can achieve the same functional effect.

[0034] The gate of the MOS tube Q2 is electrically connected to the resistor R19, the resistor R6 and the collector of the transistor U14, the resistor R6 is electrically connected to the source of the MOS tube Q2, the emitter of the transistor U14 and the second current sampling circuit, the base of the transistor U14 is electrically connected to the resistor R22, the resistor R22 is electrically connected to the rectification circuit and the speed measurement circuit, and the drain of the MOS tube Q2 is electrically connected to the 2nd port of the power resistor U8.

[0035] The gate of the MOS tube Q4 is electrically connected to the resistor R11, the resistor R5 and the collector of the transistor U11, the resistor R5 is electrically connected to the source of the MOS tube Q4, the emitter of the transistor U11 and the second current sampling circuit, the base of the transistor U11 is electrically connected to the resistor R13, the resistor R13 is electrically connected to the rectification circuit and the speed measurement circuit, and the drain of the MOS tube Q4 is electrically connected to the 2nd port of the power resistor U7.

[0036] In this embodiment, the second current sampling circuit includes an operational amplifier A3, wherein the 7-port of the operational amplifier A3 is electrically connected to a resistor R41 and a resistor R44, the resistor R41 is electrically connected to a capacitor C24, the resistor R44 is electrically connected to a resistor R45 and a 6-port of the operational amplifier A3, the 5-port of the operational amplifier A3 is electrically connected to a resistor R42, a resistor R43 and a capacitor C25, the capacitor C25 is electrically connected to a resistor R45, the resistor R42 is electrically connected to a resistor R28 and a switch resistance adjustment circuit, and the capacitor C24, the resistor R28 and the resistor R43 are all grounded.

[0037] Specifically, when IO_2 is at a high level, the transistor U14 is turned on, the G terminal of the MOS tube Q2 is pulled low, and the MOS tube Q2 is turned off. When IO_2 is at a low level, the MOS tube Q2 is closed. Similarly, the principles of the MOS tube Q1 and the MOS tube Q4 are the same as the principle of the MOS tube Q2, and will not be repeated in this embodiment.

[0038] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A low-cost braking recovery circuit for a high-power generator for fitness equipment, comprising a resistance adjustment parallel circuit, the resistance adjustment parallel circuit being electrically connected to a control circuit, characterized in that: The resistance adjustment parallel circuit includes a linear resistance adjustment circuit and a plurality of switch resistance adjustment circuits, each of the switch resistance adjustment circuits is connected in parallel with the linear resistance adjustment circuit, and each of the switch resistance adjustment circuits is also connected in parallel with each other, and the plurality of switch resistance adjustment circuits are electrically connected to the second current sampling circuit, and the linear resistance adjustment circuit is electrically connected to the first current sampling circuit; The control circuit includes but is not limited to a rectifier circuit, a speed measuring circuit, a power supply circuit and a current sampling and amplifying circuit; The rectifier circuit includes a terminal CN1, a U port of the terminal CN1 is electrically connected to the anode of the diode D3 and the cathode of the diode D4, a V port of the terminal CN1 is electrically connected to the anode of the diode D5 and the cathode of the diode D6, a W port of the terminal CN1 is electrically connected to the anode of the diode D10 and the cathode of the diode D11, the cathode of the diode D3, the cathode of the diode D5 and the cathode of the diode D10 are electrically connected, and capacitors C1 and C2 are electrically connected, and the anode of the diode D4, the anode of the diode D6 and the anode of the diode D11 are electrically connected, and resistor R9 is electrically connected, and the resistor R9 is electrically connected to the capacitor C1 and the capacitor C2, and the capacitor C1, the capacitor C2 and the resistor R9 are all grounded.

2. A low-cost braking recovery circuit for a high-power generator for fitness equipment according to claim 1, characterized in that: The speed measurement circuit includes an operational amplifier A4, wherein port 1 of the operational amplifier A4 is electrically connected to a resistor R7 and a resistance adjustment parallel circuit, port 2 of the operational amplifier A4 is electrically connected to an anode of a diode D1, a cathode of a diode D2, a capacitor C5, a resistor R3 and a resistor R4, the cathode of the diode D1 is electrically connected to port 8 of the operational amplifier A4, and the diode D2, the capacitor C5 and the resistor R4 are connected in parallel with each other, port 3 of the operational amplifier A4 is electrically connected to a resistor R24 ​​and a resistor R30, and port 4 of the operational amplifier A4, the diode D2, the capacitor C5, the resistor R4 and the resistor R30 are all grounded.

3. The low-cost braking recovery circuit of a high-power generator for fitness equipment according to claim 1, characterized in that: The linear resistance adjustment circuit includes an operational amplifier A1, wherein port 1 of the operational amplifier A1 is electrically connected to a resistor R21 and a resistor R23, the resistor R21 is electrically connected to a capacitor C3 and a gate of a MOS tube Q3, the drain of the MOS tube Q3 is electrically connected to port 2 of a power resistor U2, the drain of the MOS tube Q3 is electrically connected to a resistor R18, the resistor R23 is electrically connected to port 2 of the operational amplifier A1 and a resistor R24, the port 3 of the operational amplifier A1 is electrically connected to a resistor R12, a resistor R32 and a capacitor C23, the resistor R24 ​​is electrically connected to a resistor R18, the resistor R32 is electrically connected to a PWM port of a single-chip computer, and the resistor R12, the resistor R18, the capacitor C3, the capacitor C23 and port 4 of the operational amplifier A1 are all grounded, and the MOS tube Q3 is electrically connected to a first current sampling circuit.

4. A low-cost braking recovery circuit for a high-power generator for fitness equipment according to claim 1 or 3, characterized in that: The first current sampling circuit includes an operational amplifier A2, port 1 of the operational amplifier A2 is electrically connected to resistor R37 and resistor R40, the resistor R40 is electrically connected to capacitor C15, the resistor R37 is electrically connected to port 2 of the operational amplifier A2 and resistor R36, port 3 of the operational amplifier A2 is electrically connected to resistor R38 and resistor R39, the resistor R36 and resistor R39 are both electrically connected to resistor R18, and port 4 of the operational amplifier A2, capacitor C15 and resistor R38 are all grounded.

5. The low-cost braking recovery circuit of a high-power generator for fitness equipment according to claim 1, characterized in that: The switch resistance regulating circuit includes a MOS transistor Q1, a MOS transistor Q2 and a MOS transistor Q4, which are connected in parallel with each other, and are electrically connected to power resistors in the linear resistance regulating circuit respectively.

6. A low-cost braking recovery circuit for a high-power generator for fitness equipment according to claim 5, characterized in that: The gate of the MOS tube Q1 is electrically connected to the resistor R10, the resistor R29 and the collector of the transistor U10, the resistor R29 is electrically connected to the source of the MOS tube Q1, the emitter of the transistor U10 and the second current sampling circuit, the base of the transistor U10 is electrically connected to the resistor R1, the resistor R1 is electrically connected to the power resistor in the linear resistance adjustment circuit, and the drain of the MOS tube Q1 is electrically connected to the 2-port of the power resistor U12.

7. A low-cost braking recovery circuit for a high-power generator for fitness equipment according to claim 1 or 6, characterized in that: The second current sampling circuit includes an operational amplifier A3, wherein the 7-port of the operational amplifier A3 is electrically connected to a resistor R41 and a resistor R44, the resistor R41 is electrically connected to a capacitor C24, the resistor R44 is electrically connected to a resistor R45 and a 6-port of the operational amplifier A3, the 5-port of the operational amplifier A3 is electrically connected to a resistor R42, a resistor R43 and a capacitor C25, the capacitor C25 is electrically connected to a resistor R45, the resistor R42 is electrically connected to a resistor R28 and a switch resistance adjustment circuit, and the capacitor C24, the resistor R28 and the resistor R43 are all grounded.

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