Ultrasonic voice signal denoising circuit

Abstract

The utility model provides an ultrasonic voice signal denoising circuit, and relates to the technical field of signal processing, and the circuit comprises a signal collector, a buffer amplifier circuit, a three-stage amplification circuit, and a band-pass filter circuit. The signal collector is electrically connected with the buffer amplifier circuit, the buffer amplifier circuit is electrically connected with the three-stage amplification circuit, and the three-stage amplification circuit is electrically connected with the band-pass filter circuit; the signal collector is used for receiving an ultrasonic signal and a voice signal; the buffer amplifier circuit is used for separating the signal collector from the three-stage amplification circuit; the three-stage amplification circuit is used for amplifying the input ultrasonic signal; the band-pass filter circuit is used for filtering an input ultrasonic signal; the ultrasonic signal denoising circuit has the advantages of being simple in circuit structure, low in cost and the like.

Description

Technical Field

[0001] The present application relates to the technical field of signal processing, and in particular to an ultrasonic speech signal denoising circuit. Background Art

[0002] The continuous development of signal processing technology enables people to more accurately analyze and control the signals obtained by various sensors. When faced with signals of different frequencies, the filtering effect of existing signal denoising circuits is poor. For example, the existing voice signal denoising circuit has built-in amplification, noise reduction, echo processing and other circuits. Since only a simple RLC frequency selection network is used, the noise removal will not be clean, especially in public and other places with complex and uncertain noise. It will lead to the inability to restore the human voice, and the host processor will not be able to accurately identify and correct the training. In the existing ultrasonic signal denoising circuit, due to the obvious difference in acoustic impedance between the ultrasonic probe and the air and the material being measured, the signal will be severely lost during the gas-solid interface coupling process, resulting in the actual signal reaching the receiving end being significantly lower than the traditional water-coupled signal.

[0003] In addition, electromagnetic noise in the air and noise in the receiving circuit will cause the received signal to be weak and the signal-to-noise ratio to be low. The received signal is only a few hundred microvolts and is accompanied by considerable noise, which has a great impact on the accuracy and reliability of the detection results.

[0004] Therefore, it is particularly necessary to invent a denoising circuit that takes into account both ultrasonic signals and voice signals. Utility Model Content

[0005] The purpose of the present application is to provide an ultrasonic speech signal denoising circuit in order to solve the problem that conventional signal denoising circuits cannot adapt to signals of different frequencies.

[0006] The above-mentioned purpose of the present application is achieved through the following technical solutions:

[0007] The circuit comprises: a signal collector, a buffer amplifier circuit, a three-stage amplifier circuit, and a bandpass filter circuit;

[0008] The signal collector is electrically connected to a buffer amplifier circuit, the buffer amplifier circuit is electrically connected to a three-stage amplifier circuit, and the three-stage amplifier circuit is electrically connected to a bandpass filter circuit;

[0009] The signal collector includes an ultrasonic probe and a voice audio device;

[0010] The signal collector is used to receive ultrasonic signals and voice signals;

[0011] The buffer amplifier circuit is used to separate the signal collector from the three-stage amplifier circuit;

[0012] The three-stage amplifier circuit is used to amplify the input ultrasonic signal;

[0013] The band-pass filter circuit is used to filter the input ultrasonic signal.

[0014] Optionally, the ultrasonic probe is a P4-2 type probe; the model of the voice audio is FA-9205.

[0015] Optionally, the buffer amplifier circuit includes: a buffer amplifier, a first resistor R1, a second resistor R2, and a third resistor R3;

[0016] One end of the first resistor R1 is connected to the pin 3 of the buffer amplifier, and the other end is connected to the signal collector;

[0017] One end of the second resistor R2 is connected to the pin 2 of the buffer amplifier, and the other end is connected to the pin 6 of the buffer amplifier;

[0018] One end of the third resistor R3 is connected to the pin 6 of the buffer amplifier, and the other end is connected to the three-stage amplifier circuit;

[0019] The buffer amplifier uses an OPA192 chip.

[0020] Optionally, the three-stage amplifier circuit includes: a primary amplifier circuit, a secondary amplifier circuit, and a third-stage amplifier circuit;

[0021] The primary amplifier circuit is connected to the secondary amplifier circuit, and the secondary amplifier circuit is connected to the third-stage amplifier circuit;

[0022] The primary amplifier circuit is used to amplify the input ultrasonic signal;

[0023] The secondary amplifier circuit is used to prevent output distortion of the input voltage of the previous stage;

[0024] The third-stage amplifier circuit is used to adjust the gain of the three-stage amplifier circuit.

[0025] Optionally, the primary amplifier circuit includes: a resistor R G , a fourth resistor R4, and an AD8428 chip;

[0026] One end of the resistor R G is connected to the pin 2 of the AD8428 chip, and the other end is connected to the pin 3 of the AD8428 chip;

[0027] One end of the fourth resistor R4 is connected to the pin 7 of the AD8428 chip, and the other end is connected to the secondary amplifier circuit.

[0028] Optionally, the secondary amplification circuit includes: a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an OPA1611 chip, and a seventh capacitor C7;

[0029] One end of the seventh capacitor C7 is connected to the primary amplification circuit, and the other end is connected to one end of the fifth resistor R5;

[0030] The other end of the fifth resistor R5 is connected to pin 2 of the OPA1611 chip;

[0031] One end of the sixth resistor R6 is connected to pin 3 of the OPA1611 chip, and the other end is grounded;

[0032] One end of the seventh resistor R7 is connected to pin 2 of the OPA1611 chip, and the other end is connected to pin 6 of the OPA1611 chip.

[0033] Optionally, the third-stage amplification circuit includes: an eighth resistor R8, a sliding rheostat R9, a fourteenth resistor R14, a tenth capacitor C10, and an OPA1622 chip;

[0034] One end of the tenth capacitor C10 is connected to the secondary amplification circuit, and the other end is connected to one end of the fourteenth resistor R14;

[0035] The other end of the fourteenth resistor R14 is connected to pin 2 of the OPA1622 chip;

[0036] One end of the sliding rheostat R9 is connected to pin 2 of the OPA1622 chip, and the other end is connected to pin 6 of the OPA1622 chip;

[0037] The other end of the eighth resistor R8 is connected to pin 3 of the OPA1622 chip, and the other end is grounded.

[0038] Optionally, the band-pass filter circuit includes: a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, an OPA4171 chip, a thirteenth capacitor C13, and a fourteenth capacitor C14;

[0039] One end of the tenth resistor R10 is connected to the three-stage amplification circuit, and the other end is connected to one end of the eleventh resistor R11, one end of the thirteenth capacitor C13, and one end of the fourteenth capacitor C14;

[0040] The other end of the eleventh resistor R11 is grounded;

[0041] The other end of the thirteenth capacitor C13 is connected to pin 2 of the OPA4171 chip;

[0042] The other end of the fourteenth capacitor C14 is connected to pin 6 of the OPA4171 chip;

[0043] One end of the twelfth resistor R12 is connected to pin 2 of the OPA4171 chip, and the other end is connected to pin 6 of the OPA4171 chip;

[0044] One end of the thirteenth resistor R13 is connected to pin 3 of the OPA4171 chip, and the other end is grounded.

[0045] The beneficial effects brought by the technical solution provided by this application are:

[0046] By designing a buffer amplifier circuit, a three-stage amplifier circuit, and a band-pass filter circuit, effective denoising of ultrasonic signals is achieved, and it has the advantages of simple circuit structure and low cost. Description of the Drawings

[0047] The following will further illustrate this application in conjunction with the drawings. In the drawings:

[0048] Figure 1 is the structural block diagram of the ultrasonic voice signal denoising circuit in the embodiment of this application;

[0049] Figure 2 is the circuit diagram of the buffer amplifier of the ultrasonic voice signal denoising circuit in the embodiment of this application;

[0050] Figure 3 is the primary amplifier circuit diagram of the ultrasonic voice signal denoising circuit in the embodiment of this application;

[0051] Figure 4 is the secondary amplifier circuit diagram of the ultrasonic voice signal denoising circuit in the embodiment of this application;

[0052] Figure 5 is the third-stage amplifier circuit diagram of the ultrasonic voice signal denoising circuit in the embodiment of this application;

[0053] Figure 6 is the band-pass filter circuit diagram of the ultrasonic voice signal denoising circuit in the embodiment of this application. Detailed Embodiments

[0054] For a clearer understanding of the technical features, purposes, and effects of this application, the specific embodiments of this application will now be described in detail with reference to the drawings.

[0055] The embodiment of this application provides an ultrasonic voice signal denoising circuit.

[0056] Please refer to Figure 1 , Figure 1It is a structural block diagram of an ultrasonic voice signal denoising circuit in an embodiment of the present application, specifically including: a signal collector, a buffer amplifier circuit, a three-stage amplifier circuit, and a band-pass filter circuit;

[0057] The signal collector is electrically connected to the buffer amplifier circuit, the buffer amplifier circuit is electrically connected to the three-stage amplifier circuit, and the three-stage amplifier circuit is electrically connected to the band-pass filter circuit;

[0058] The signal collector includes an ultrasonic probe and a voice audio device;

[0059] The signal collector is used to receive ultrasonic signals and voice signals;

[0060] The buffer amplifier circuit is used to separate the signal collector from the three-stage amplifier circuit;

[0061] Specifically, the buffer amplifier circuit has the characteristics of high input impedance and low output impedance, and is used to separate the signal collector from the three-stage amplifier circuit.

[0062] The three-stage amplifier circuit is used to amplify the input ultrasonic signal;

[0063] The band-pass filter circuit is used to filter the input ultrasonic signal.

[0064] Specifically, the model of the ultrasonic probe in the signal collector is P4-2. The P4-2 ultrasonic probe adopts advanced phased array technology and has high-resolution imaging ability. This probe has a wide frequency range of 1.70 - 3.70 MHz and, combined with various advanced imaging modes, such as controllable color Doppler and spatial compound imaging, can provide clear and accurate images to help doctors make accurate diagnoses. In addition, the P4-2 probe has strong compatibility and can be integrated with signal systems such as M5, M7, and TE7, making it a multi-purpose and efficient signal collector.

[0065] Specifically, the model of the voice audio device in the signal collector is FA-9205, and the frequency range for collecting voice signals is 300 Hz to 3.4 kHz. The voice audio device is provided with a local Mic input with a typical amplitude of 50 mVpp and a signal-to-noise ratio of up to 68 dB, ensuring the clarity of the audio signal. The typical amplitude of the line input is 1500 mVpp, the internal resistance is 10 KΩ, while the line output also maintains a typical amplitude of 1500 mVpp, the total harmonic distortion (THD) is less than 0.3%, the internal resistance is 500 Ω, and it has a high signal-to-noise ratio of 83 dB, ensuring the high quality of the audio output.

[0066] The buffer amplifier circuit includes: a buffer amplifier, a first resistor R1, a second resistor R2, and a third resistor R3;

[0067] One end of the first resistor R1 is connected to the pin 3 of the buffer amplifier, and the other end is connected to the signal collector;

[0068] One end of the second resistor R2 is connected to the pin 2 of the buffer amplifier, and the other end is connected to the pin 6 of the buffer amplifier;

[0069] One end of the third resistor R3 is connected to the pin 6 of the buffer amplifier, and the other end is connected to the three-stage amplifier circuit;

[0070] The buffer amplifier uses the OPA192 chip.

[0071] The three-stage amplifier circuit includes: a primary amplifier circuit, a secondary amplifier circuit, and a third-stage amplifier circuit;

[0072] The primary amplifier circuit is connected to the secondary amplifier circuit, and the secondary amplifier circuit is connected to the third-stage amplifier circuit;

[0073] The primary amplifier circuit is used to amplify the input ultrasonic signal;

[0074] The secondary amplifier circuit is used to prevent output distortion of the input voltage of the previous stage;

[0075] The third-stage amplifier circuit is used to adjust the gain of the three-stage amplifier circuit.

[0076] The primary amplifier circuit includes: a resistor R G , a fourth resistor R4, and an AD8428 chip;

[0077] One end of the resistor R G is connected to the pin 2 of the AD8428 chip, and the other end is connected to the pin 3 of the AD8428 chip;

[0078] One end of the fourth resistor R4 is connected to the pin 7 of the AD8428 chip, and the other end is connected to the secondary amplifier circuit.

[0079] The secondary amplifier circuit includes: a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an OPA1611 chip, and a seventh capacitor C7;

[0080] One end of the seventh capacitor C7 is connected to the primary amplifier circuit, and the other end is connected to one end of the fifth resistor R5;

[0081] The other end of the fifth resistor R5 is connected to the pin 2 of the OPA1611 chip;

[0082] One end of the sixth resistor R6 is connected to the pin 3 of the OPA1611 chip, and the other end is grounded;

[0083] One end of the seventh resistor R7 is connected to pin 2 of the OPA1611 chip, and the other end is connected to pin 6 of the OPA1611 chip.

[0084] The third-stage amplifier circuit includes: an eighth resistor R8, a potentiometer R9, a fourteenth resistor R14, a tenth capacitor C10, and an OPA1622 chip;

[0085] One end of the tenth capacitor C10 is connected to the secondary amplifier circuit, and the other end is connected to one end of the fourteenth resistor R14;

[0086] The other end of the fourteenth resistor R14 is connected to pin 2 of the OPA1622 chip;

[0087] One end of the potentiometer R9 is connected to pin 2 of the OPA1622 chip, and the other end is connected to pin 6 of the OPA1622 chip;

[0088] The other end of the eighth resistor R8 is connected to pin 3 of the OPA1622 chip and the other end is grounded.

[0089] The band-pass filter circuit includes: a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, an OPA4171 chip, a thirteenth capacitor C13, and a fourteenth capacitor C14;

[0090] One end of the tenth resistor R10 is connected to the three-stage amplifier circuit, and the other end is connected to one end of the eleventh resistor R11, one end of the thirteenth capacitor C13, and one end of the fourteenth capacitor C14;

[0091] The other end of the eleventh resistor R11 is grounded;

[0092] The other end of the thirteenth capacitor C13 is connected to pin 2 of the OPA4171 chip;

[0093] The other end of the fourteenth capacitor C14 is connected to pin 6 of the OPA4171 chip;

[0094] One end of the twelfth resistor R12 is connected to pin 2 of the OPA4171 chip, and the other end is connected to pin 6 of the OPA4171 chip;

[0095] One end of the thirteenth resistor R13 is connected to pin 3 of the OPA4171 chip, and the other end is grounded.

[0096] The utility model also is provided with a buffer amplifier circuit 2. The buffer amplifier circuit uses an OPA192 chip, which has the advantages of high common-mode input impedance, extremely low zero drift and noise. In addition, it can separate the subsequent-stage circuit from the sensor to prevent the signal collector from being damaged due to signal reflection. The buffer amplifier circuit is as shown in Figure 2 shown.

[0097] The utility model also is provided with a primary amplifier circuit 3. The buffer amplifier has no gain, and the signal is superimposed with the inherent noise of the operational amplifier and the thermal noise of the resistor after passing through this stage of the circuit. Therefore, in order to prevent the useful signal from being submerged by noise, a low-noise, low-drift and high-stability operational amplifier needs to be selected for the primary operational amplifier. The primary amplifier circuit uses an AD8428 chip, which is an ultra-low-noise, low-gain-drift instrumentation amplifier with a fixed gain of 2000, and has leading industry performance in terms of gain accuracy, noise and bandwidth. The gain-setting resistors inside the chip are precisely matched to ensure low gain drift and fast and stable gain establishment. The AD8428 has a high common-mode rejection ratio (CMRR), with a minimum value of 130 dB, which can effectively prevent interference signals from damaging data acquisition. Its bandwidth is 3.5 MHz, the slew rate is 40 V / μs, the supported power supply voltage range is from ±4V to ±18V, it is packaged in an 8-pin SOIC, and has ESD protection exceeding 5000V (HBM). The operating temperature range of the AD8428 is from -40°C to +85°C, and the maximum operating temperature can reach 125°C. The primary amplifier circuit is as shown in Figure 3 shown.

[0098] The utility model also is provided with a secondary amplifier circuit 4. For a high-gain amplifier circuit for weak signals, the influence of the DC offset voltage of the operational amplifier cannot be ignored. Since the offset voltage is similar to the amplitude of the useful signal, at the front stage of the circuit, the offset voltage is superimposed on the useful signal and amplified together, causing the useful signal to be elevated and exceeding the voltage input range of the next-stage amplifier circuit, resulting in output voltage distortion. Therefore, attention needs to be paid to preventing output distortion of the front-stage input voltage. The secondary amplifier circuit uses an OPA1611 chip, which has the characteristics of low noise, low drift and high precision. The chip has a rail-to-rail output, enabling it to provide the maximum output swing between the positive and negative power supply rails. Its gain-bandwidth product is as high as 3 MHz, the input bias current is low, and it has the characteristic of low input voltage noise. The secondary amplifier circuit is as shown in Figure 4 shown.

[0099] The present utility model further provides a third-stage amplification circuit 5. To ensure that the signals amplified in the primary stage are transmitted to the next stage without loss, it is necessary to adjust the gain of the circuit to meet the amplification of input signals with different amplitudes. The third-stage amplification circuit uses the OPA1622 chip, which is a high-performance audio-specific operational amplifier with extremely low noise and high output driving ability. It has low input voltage noise, a high gain-bandwidth product reaching 3.5 MHz, and excellent dynamic performance. Its fixed gain is 2000, providing high-precision DC performance, with a gain drift as low as 5 ppm / °C, an offset drift of 0.3 μV / °C, a gain accuracy of 0.05%, and a common-mode rejection ratio as high as 140 dB. The OPA1622 supports a wide range of supply voltages from ±4V to ±18V, and provides an 8-pin SOIC package option, with an ESD protection level higher than 5000V, and an operating temperature range of -40°C to +85°C. The third-stage amplification circuit is as shown in Figure 5 shown.

[0100] The present utility model further provides a band-pass filter circuit 6. In the existing filter circuit structure, the infinite-gain multiple-feedback band-pass filter has a steep transition band and good selectivity, and is suitable for retaining an ultrasonic signal with a certain fixed frequency and filtering out other noise frequencies. The band-pass filter circuit uses the OPA4171 chip, which is a four-channel, precision, low-power operational amplifier that can operate with a single supply voltage as low as 2.5V, and has low input bias current and low noise characteristics, making it very suitable for sensor signal conditioning and precision ADC driving. Each of its channels provides high DC accuracy and low drift, and the specific parameters include low input bias current, low input voltage noise, and high gain-bandwidth product. In addition, this chip also has low-power consumption characteristics, with a typical quiescent current of only 2.2 mA per amplifier (when powered by ±5V), and provides small 14-pin TSSOP and 14-pin DIP package options, suitable for battery-powered and portable devices, with an operating temperature range of -40°C to +125°C. The band-pass filter circuit is as shown in Figure 6 shown.

[0101] In the above embodiments, the descriptions of each embodiment have their own focuses. For parts not detailed in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0102] The above are only exemplary embodiments of the present disclosure, and the scope of the present disclosure cannot be limited thereby. That is, any equivalent changes and modifications made in accordance with the teachings of the present disclosure still fall within the scope covered by the present disclosure. Those skilled in the art will easily think of other implementation schemes of the present disclosure after considering the specification and the disclosure of the practical truth.

[0103] This application is intended to cover any variations, uses, or adaptations of the present disclosure that follow the general principles of the present disclosure and include well-known knowledge or conventional technical means in the technical field not recorded in the present disclosure. The description and examples are only regarded as exemplary, and the scope and spirit of the present disclosure are defined by the claims.

Claims

1. An ultrasonic speech signal denoising circuit, characterized in that: The circuit comprises: a signal collector, a buffer amplifier circuit, a three-stage amplifier circuit, and a bandpass filter circuit; The signal collector is electrically connected to a buffer amplifier circuit, the buffer amplifier circuit is electrically connected to a three-stage amplifier circuit, and the three-stage amplifier circuit is electrically connected to a bandpass filter circuit; The signal collector includes an ultrasonic probe and a voice audio device; The signal collector is used to receive ultrasonic signals and voice signals; The buffer amplifier circuit is used to separate the signal collector from the three-stage amplifier circuit; The three-stage amplifier circuit is used to amplify the input ultrasonic signal; The bandpass filter circuit is used to perform filtering processing on the input ultrasonic signal.

2. The ultrasonic speech signal denoising circuit according to claim 1, characterized in that: The ultrasonic probe is a P4-2 probe; the model of the voice audio device is FA-9205.

3. The ultrasonic speech signal denoising circuit according to claim 1, characterized in that: The buffer amplifier circuit comprises: a buffer amplifier, a first resistor R1, a second resistor R2, and a third resistor R3; One end of the first resistor R1 is connected to pin 3 of the buffer amplifier, and the other end is connected to the signal collector; One end of the second resistor R2 is connected to pin 2 of the buffer amplifier, and the other end is connected to pin 6 of the buffer amplifier; One end of the third resistor R3 is connected to pin 6 of the buffer amplifier, and the other end is connected to the three-stage amplification circuit; The buffer amplifier uses the OPA192 chip.

4. The ultrasonic speech signal denoising circuit according to claim 1, characterized in that: The three-stage amplifier circuit comprises: a primary amplifier circuit, a secondary amplifier circuit and a tertiary amplifier circuit; The primary amplifier circuit is connected to the secondary amplifier circuit, and the secondary amplifier circuit is connected to the third amplifier circuit; The primary amplifier circuit is used to amplify the input ultrasonic signal; The secondary amplifier circuit is used to prevent the output distortion of the previous input voltage; The third-stage amplifier circuit is used to adjust the gain of the three-stage amplifier circuit.

5. The ultrasonic speech signal denoising circuit according to claim 4, characterized in that: The primary amplifier circuit includes: a resistor R G , a fourth resistor R4 and an AD8428 chip; The resistor R G One end is connected to pin 2 of AD8428 chip, and the other end is connected to pin 3 of AD8428 chip; One end of the fourth resistor R4 is connected to pin 7 of the AD8428 chip, and the other end is connected to the secondary amplifier circuit.

6. The ultrasonic speech signal denoising circuit according to claim 4, characterized in that: The secondary amplifier circuit includes: a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an OPA1611 chip and a seventh capacitor C7; One end of the seventh capacitor C7 is connected to the primary amplifier circuit, and the other end is connected to one end of the fifth resistor R5; The other end of the fifth resistor R5 is connected to pin 2 of the OPA1611 chip; One end of the sixth resistor R6 is connected to pin 3 of the OPA1611 chip, and the other end is grounded; One end of the seventh resistor R7 is connected to pin 2 of the OPA1611 chip, and the other end is connected to pin 6 of the OPA1611 chip.

7. The ultrasonic speech signal denoising circuit according to claim 4, characterized in that: The third-stage amplifier circuit includes: an eighth resistor R8, a sliding variable resistor R9, a fourteenth resistor R14, a tenth capacitor C10 and an OPA1622 chip; One end of the tenth capacitor C10 is connected to the secondary amplifier circuit, and the other end is connected to one end of the fourteenth resistor R14; The other end of the fourteenth resistor R14 is connected to pin 2 of the OPA1622 chip; One end of the sliding resistor R9 is connected to pin 2 of the OPA1622 chip, and the other end is connected to pin 6 of the OPA1622 chip; The other end of the eighth resistor R8 is connected to pin 3 of the OPA1622 chip, and the other end is grounded.

8. The ultrasonic speech signal denoising circuit according to claim 1, characterized in that: The bandpass filter circuit includes: a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, an OPA4171 chip, a thirteenth capacitor C13 and a fourteenth capacitor C14; One end of the tenth resistor R10 is connected to the three-stage amplifying circuit, and the other end is connected to one end of the eleventh resistor R11, one end of the thirteenth capacitor C13 and one end of the fourteenth capacitor C14; The other end of the eleventh resistor R11 is grounded; The other end of the thirteenth capacitor C13 is connected to pin 2 of the OPA4171 chip; The other end of the fourteenth capacitor C14 is connected to pin 6 of the OPA4171 chip; One end of the twelfth resistor R12 is connected to pin 2 of the OPA4171 chip, and the other end is connected to pin 6 of the OPA4171 chip; One end of the thirteenth resistor R13 is connected to pin 3 of the OPA4171 chip, and the other end is grounded.

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