Pixel driving circuit based on TFT layout

Abstract

The utility model discloses a pixel driving circuit based on TFT layout. The pixel driving circuit comprises a first U-shaped TFT and an output module. The first U-shaped TFT is electrically connected with the output module; the first U-shaped TFT comprises a Gate end, a U end and an I end; the U end is the drain electrode of the first U-shaped TFT; the I end is the source electrode of the first U-shaped TFT; and the U end of the first U-shaped TFT is electrically connected with the Gate end. The U end and the I end of the U-shaped TFT are arranged, so that the current difference of the U-shaped TFT in the positive direction and the negative direction is reduced, and the problem of via hole failure between GIP lines caused by unreasonable arrangement of the U-shaped TFT is solved.

Description

Technical Field

[0001] The utility model relates to the technical field of display panels, and particularly relates to a pixel driving circuit based on TFT layout. Background Art

[0002] With the development of panel technology, narrow-bezel display panels with a higher screen-to-body ratio are gradually becoming mainstream and are evolving towards borderless displays. Currently, the so-called borderless display panels on the market all have a narrow black outer border, and display driving circuits such as GIP (Gate Driver In Panel) are distributed below it.

[0003] The GIP technology moves the shift register of the gate circuit in the integrated circuit to the display panel side. The advantage of this is that it can save the scanning chip, reduce the material cost, reduce the process steps and shorten the process time, thereby reducing the panel cost and enabling a narrower border design.

[0004] Although display devices using GIP technology have won the favor of consumers, GIP technology may reduce the reliability of products. For example, in high and low temperature operation experiments, due to the unreasonable layout of U-shaped TFTs, there is a large difference in forward and reverse current in the U-shaped TFT layout, resulting in the failure of vias between GIP lines and thus reducing the display quality. Summary of the Utility Model

[0005] In the existing display panel, due to the unreasonable layout of U-shaped TFTs, the vias between GIP lines fail.

[0006] To address the above problems, a driving circuit based on TFT layout is proposed. By arranging the U end and I end of the U-shaped TFT transistor, the difference in forward and reverse current of the U-shaped TFT transistor is reduced, and the problem of via failure between GIP lines caused by the unreasonable layout of U-shaped TFTs is solved.

[0007] In a first aspect, a pixel driving circuit based on TFT layout includes:

[0008] A first U-shaped TFT transistor;

[0009] An output module;

[0010] The first U-shaped TFT transistor is electrically connected to the output module;

[0011] The first U-shaped TFT transistor includes:

[0012] A Gate terminal, a U terminal, and an I terminal;

[0013] The U terminal is the drain of the first U-shaped TFT transistor;

[0014] The I terminal is the source electrode of the first U-shaped TFT transistor;

[0015] The U terminal of the first U-shaped TFT transistor is electrically connected to the Gate terminal.

[0016] Combined with the pixel driving circuit based on the TFT layout described in the first aspect of the present invention, in the first possible implementation manner, the output module includes:

[0017] A pull-down unit;

[0018] An output unit;

[0019] The pull-down unit is electrically connected to the I terminal of the first U-shaped TFT transistor and the output unit respectively.

[0020] Combined with the first possible implementation manner of the first aspect of the present invention, in the second possible implementation manner, the output unit includes:

[0021] A first capacitor, a first TFT transistor and an output terminal;

[0022] The first end of the first capacitor is electrically connected to the I terminal of the first U-shaped TFT transistor, the first end of the pull-down unit, and the gate of the first TFT transistor;

[0023] The second end of the first capacitor is electrically connected to the second end of the pull-down unit, the source of the first TFT transistor, and the output terminal;

[0024] The drain of the first TFT transistor is connected to the clock signal.

[0025] In a second aspect, a pixel driving circuit based on a TFT layout includes:

[0026] A second U-shaped TFT transistor;

[0027] An output module;

[0028] The second U-shaped TFT transistor is electrically connected to the output module;

[0029] The second U-shaped TFT transistor includes:

[0030] A Gate terminal, a U terminal and an I terminal;

[0031] The U terminal is the source electrode of the second U-shaped TFT transistor;

[0032] The I terminal is the drain of the second U-shaped TFT transistor;

[0033] The U terminal of the second U-shaped TFT transistor is electrically connected to the Gate terminal.

[0034] Combined with the pixel driving circuit based on the TFT layout described in the second aspect of the present utility model, in the first possible implementation manner, the output module includes:

[0035] A pull-down unit;

[0036] An output unit;

[0037] The pull-down unit is electrically connected to the I end of the second U-shaped TFT transistor and the output unit respectively.

[0038] Combined with the first possible implementation manner of the second aspect of the present utility model, in the second possible implementation manner, the output unit includes:

[0039] A first capacitor, a first TFT transistor and an output terminal;

[0040] The first end of the first capacitor is electrically connected to the I end of the second U-shaped TFT transistor, the first end of the pull-down unit and the gate of the first TFT transistor;

[0041] The second end of the first capacitor is electrically connected to the second end of the pull-down unit, the source of the first TFT transistor and the output terminal;

[0042] The drain of the first TFT transistor is connected to a clock signal.

[0043] In a third aspect, a pixel driving circuit based on the TFT layout includes:

[0044] A third U-shaped TFT transistor;

[0045] A fourth U-shaped TFT transistor;

[0046] An output module;

[0047] The third U-shaped TFT transistor and the fourth U-shaped TFT transistor are electrically connected to the output module;

[0048] The Gate terminal, U terminal and I terminal of the third U-shaped TFT transistor are the gate, drain and source of the third U-shaped TFT transistor respectively;

[0049] The Gate terminal, U terminal and I terminal of the fourth U-shaped TFT transistor are the gate, drain and source of the fourth U-shaped TFT transistor respectively;

[0050] The U terminal of the third U-shaped TFT transistor is connected to a high level;

[0051] The I terminal of the third U-shaped TFT transistor is electrically connected to the U terminal of the fourth U-shaped TFT transistor;

[0052] The I terminal of the fourth U-shaped TFT transistor is connected to a low level.

[0053] Combined with the pixel driving circuit based on the TFT layout described in the third aspect of the present invention, in the first possible implementation manner, the output module includes:

[0054] A pull-down unit;

[0055] An output unit;

[0056] The pull-down unit is electrically connected to the I terminal of the third U-shaped TFT transistor, the U terminal of the fourth U-shaped TFT transistor, and the output unit respectively.

[0057] Combined with the first possible implementation manner of the second aspect of the present invention, in the second possible implementation manner, the output unit includes:

[0058] A first capacitor, a first TFT transistor, and an output terminal;

[0059] The first terminal of the first capacitor is electrically connected to the I terminal of the third U-shaped TFT transistor, the U terminal of the fourth U-shaped TFT transistor, the first terminal of the pull-down unit, and the gate of the first TFT transistor;

[0060] The second terminal of the first capacitor is electrically connected to the second terminal of the pull-down unit, the source of the first TFT transistor, and the output terminal;

[0061] The drain of the first TFT transistor is connected to a clock signal.

[0062] Implementing the pixel driving circuit based on the TFT layout of the present invention, by arranging the U terminal and the I terminal of the U-shaped TFT transistor, the current difference in the forward and reverse directions of the U-shaped TFT transistor is reduced, and the problem of via failure between GIP lines caused by unreasonable U-shaped TFT layout is solved. BRIEF DESCRIPTION OF THE DRAWINGS

[0063] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0064] Figure 1 It is a schematic diagram of the U-shaped TFT transistor structure in the prior art;

[0065] Figure 2 It is a schematic diagram of the current of the U-shaped TFT transistor tested in different directions in the prior art;

[0066] Figure 3 Schematic diagram of a pixel driving circuit based on TFT layout for Embodiment 1 in the present utility model;

[0067] Figure 4 Schematic diagram of a pixel driving circuit based on TFT layout for Embodiment 2 in the present utility model;

[0068] Figure 5 Schematic diagram of a pixel driving circuit based on TFT layout for Embodiment 3 in the present utility model. Detailed implementation manners

[0069] Next, the technical solutions in the present utility model will be clearly and completely described in conjunction with the accompanying drawings in the utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all of the embodiments. Based on the embodiments in the present utility model, other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the scope of protection of the present utility model.

[0070] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which the present utility model belongs. The terms used in the specification of the present utility model herein are only for the purpose of describing specific embodiments, and are not intended to limit the present utility model. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.

[0071] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it can be directly on the other element or indirectly on the other element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or indirectly connected to the other element.

[0072] It should be understood that the orientation or positional relationship indicated by the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation to the present application.

[0073] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of this application, "a plurality" means two or more unless otherwise specifically defined.

[0074] In the existing display panel, due to the unreasonable layout of the U-shaped TFT, the vias between the GIP lines fail.

[0075] Reference Figure 1 , Figure 1 is a schematic diagram of the U-shaped TFT transistor structure in the prior art; since the Cgs of the U-shaped TFT is small and it occupies a relatively small space in some cases, it is often used in the circuit of the display panel GIP. However, there is a large difference in the forward and reverse direction currents in the layout of the U-shaped TFT.

[0076] Reference Figure 2 , Figure 2 is a schematic diagram of the currents of the U-shaped TFT transistor tested in different directions in the prior art; the upper part of the curve corresponds to the current when flowing from the I terminal 120 to the U terminal 110, and the lower part corresponds to the current when flowing from the U terminal 110 to the I terminal 120. Obviously, when other conditions remain unchanged, the current corresponding to flowing from the I terminal 120 to the U terminal 110 is greater than the current corresponding to flowing from the U terminal 110 to the I terminal 120.

[0077] To solve the above problems, a driving circuit based on the TFT layout is proposed. By arranging the U terminal and the I terminal of the U-shaped TFT transistor, the difference in forward and reverse direction currents of the U-shaped TFT transistor is reduced, and the problem of via failure between the GIP lines caused by the unreasonable layout of the U-shaped TFT is solved.

[0078] Embodiment 1

[0079] In a first aspect, as Figure 3 , Figure 3 is a schematic diagram of the pixel driving circuit based on the TFT layout of Embodiment 1 in the present utility model; a pixel driving circuit based on the TFT layout includes a first U-shaped TFT transistor T1 and an output module; the first U-shaped TFT transistor T1 is electrically connected to the output module; the first U-shaped TFT transistor T1 includes a Gate terminal, a U terminal and an I terminal; the U terminal is the drain of the first U-shaped TFT transistor T1; the I terminal is the source of the first U-shaped TFT transistor T1; the U terminal of the first U-shaped TFT transistor T1 is electrically connected to the Gate terminal.

[0080] Further, the output module includes a pull-down unit and an output unit; the pull-down unit is electrically connected to the I terminal of the first U-shaped TFT transistor T1 and the output unit respectively.

[0081] Further, the output unit includes a first capacitor C1, a first TFT transistor T5, and an output terminal (Gout); a first terminal of the first capacitor C1 is electrically connected to the I terminal of the first U-shaped TFT transistor T1, a first terminal of the pull-down unit, and the gate of the first TFT transistor T5; a second terminal of the first capacitor C1 is electrically connected to a second terminal of the pull-down unit, the source of the first TFT transistor T5, and the output terminal (Gout); the drain of the first TFT transistor T5 is connected to a clock signal (CK).

[0082] In this embodiment, the U terminal of the first U-shaped TFT transistor T1 is its drain, and the I terminal is its source, which is applicable to a display device that only supports forward scanning.

[0083] Embodiment 2

[0084] In a second aspect, as Figure 4 , Figure 4 is a schematic diagram of a pixel driving circuit based on TFT layout according to Embodiment 2 of the present utility model; a pixel driving circuit based on TFT layout includes a second U-shaped TFT transistor T2 and an output module; the second U-shaped TFT transistor T2 is electrically connected to the output module; the second U-shaped TFT transistor T2 includes a Gate terminal, a U terminal, and an I terminal; the U terminal is the source of the second U-shaped TFT transistor T2; the I terminal is the drain of the second U-shaped TFT transistor T2; the U terminal of the second U-shaped TFT transistor T2 is electrically connected to the Gate terminal.

[0085] Further, the output module includes a pull-down unit and an output unit; the pull-down unit is electrically connected to the I terminal of the second U-shaped TFT transistor T2 and the output unit respectively.

[0086] Further, the output unit includes a first capacitor C1, a first TFT transistor T5, and an output terminal (Gout); a first terminal of the first capacitor C1 is electrically connected to the I terminal of the second U-shaped TFT transistor T2, a first terminal of the pull-down unit, and the gate of the first TFT transistor T5; a second terminal of the first capacitor C1 is electrically connected to a second terminal of the pull-down unit, the source of the first TFT transistor T5, and the output terminal (Gout); the drain of the first TFT transistor T5 is connected to a clock signal (CK).

[0087] In this embodiment, the U terminal of the first U-shaped TFT transistor T1 is its source, and the I terminal is its drain, which is applicable to a display device that only supports reverse scanning.

[0088] The circuit structures of the output modules in Embodiment 2 and Embodiment 1 are the same.

[0089] Embodiment 3

[0090] In a third aspect, as Figure 5 , Figure 5 is a schematic diagram of a pixel driving circuit based on a TFT layout for Embodiment 3 in the present utility model. A pixel driving circuit based on a TFT layout includes a third U-shaped TFT transistor T3, a fourth U-shaped TFT transistor T4, and an output module; the third U-shaped TFT transistor T3 and the fourth U-shaped TFT transistor T4 are electrically connected to the output module; the Gate terminal, U terminal, and I terminal of the third U-shaped TFT transistor T3 are the gate, drain, and source of the third U-shaped TFT transistor T3 respectively; the Gate terminal, U terminal, and I terminal of the fourth U-shaped TFT transistor T4 are the gate, drain, and source of the fourth U-shaped TFT transistor T4 respectively; the U terminal of the third U-shaped TFT transistor T3 is connected to a high level (U2D); the I terminal of the third U-shaped TFT transistor T3 is electrically connected to the U terminal of the fourth U-shaped TFT transistor T4; the I terminal of the fourth U-shaped TFT transistor T4 is connected to a low level (D2U).

[0091] Further, the output module includes a pull-down unit and an output unit; the pull-down unit is electrically connected to the I terminal of the third U-shaped TFT transistor T3, the U terminal of the fourth U-shaped TFT transistor T4, and the output unit respectively.

[0092] Further, the output unit includes a first capacitor C1, a first TFT transistor T5, and an output terminal (Gout); the first terminal of the first capacitor C1 is electrically connected to the I terminal of the third U-shaped TFT transistor, the U terminal of the fourth U-shaped TFT transistor, the first terminal of the pull-down unit, and the gate of the first TFT transistor T5; the second terminal of the first capacitor C1 is electrically connected to the second terminal of the pull-down unit, the source of the first TFT transistor T5, and the output terminal (Gout); the drain of the first TFT transistor T5 is connected to a clock signal (CK).

[0093] In this embodiment, the Gate terminal, U terminal, and I terminal of the third U-shaped TFT transistor T3 are its gate, drain, and source respectively, and the Gate terminal, U terminal, and I terminal of the fourth U-shaped TFT transistor T4 are its gate, drain, and source respectively, which is applicable to a display device supporting forward and reverse scans.

[0094] The circuit structures of the output modules in Embodiment 3, Embodiment 2, and Embodiment 1 are the same.

[0095] Implementing the pixel driving circuit based on a TFT layout of the present utility model, by arranging the U terminal and I terminal of the U-shaped TFT transistor, the difference in forward and reverse current of the U-shaped TFT transistor is reduced, and the problem of via failure between GIP lines caused by unreasonable U-shaped TFT layout is solved.

[0096] The above are only the preferred embodiments of the present utility model, and are not intended to limit the present utility model. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present utility model shall be included within the protection scope of the present utility model.

Claims

1. A pixel driving circuit based on TFT layout, characterized in that: include: a first U-type TFT transistor; Output module; The first U-shaped TFT transistor is electrically connected to the output module; The first U-type TFT transistor comprises: Gate end, U end and I end; The U terminal is the drain of the first U-type TFT transistor; The I end is the source of the first U-type TFT transistor; The U terminal of the first U-type TFT transistor is electrically connected to the Gate terminal.

2. The pixel driving circuit based on TFT layout according to claim 1, characterized in that: The output module comprises: Pull-down unit; Output unit; The pull-down unit is electrically connected to the I terminal of the first U-type TFT transistor and the output unit respectively.

3. The pixel driving circuit based on TFT layout according to claim 2, characterized in that: The output unit comprises: A first capacitor, a first TFT transistor and an output terminal; The first end of the first capacitor is electrically connected to the first end of the first U-type TFT transistor, the first end of the pull-down unit, and the gate of the first TFT transistor; The second end of the first capacitor is electrically connected to the second end of the pull-down unit, the source electrode and the output end of the first TFT transistor; A drain of the first TFT transistor is connected to a clock signal.

4. A pixel driving circuit based on TFT layout, characterized in that: include: a second U-type TFT transistor; Output module; The second U-shaped TFT transistor is electrically connected to the output module; The second U-type TFT transistor comprises: Gate end, U end and I end; The U terminal is the source of the second U-type TFT transistor; The I end is the drain of the second U-type TFT transistor; The U terminal of the second U-type TFT transistor is electrically connected to the Gate terminal.

5. The pixel driving circuit based on TFT layout according to claim 4, characterized in that: The output module comprises: Pull-down unit; Output unit; The pull-down unit is electrically connected to the I terminal of the second U-type TFT transistor and the output unit respectively.

6. The pixel driving circuit based on TFT layout according to claim 5, characterized in that: The output unit comprises: A first capacitor, a first TFT transistor and an output terminal; The first end of the first capacitor is electrically connected to the I end of the second U-shaped TFT transistor, the first end of the pull-down unit, and the gate of the first TFT transistor; The second end of the first capacitor is electrically connected to the second end of the pull-down unit, the source electrode and the output end of the first TFT transistor; A drain of the first TFT transistor is connected to a clock signal.

7. A pixel driving circuit based on TFT layout, characterized in that: include: A third U-type TFT transistor; a fourth U-type TFT transistor; Output module; The third U-type TFT transistor and the fourth U-type TFT transistor are electrically connected to the output module; The Gate terminal, the U terminal and the I terminal of the third U-type TFT transistor are respectively the gate, the drain and the source of the third U-type TFT transistor; The Gate terminal, the U terminal and the I terminal of the fourth U-type TFT transistor are respectively the gate, the drain and the source of the fourth U-type TFT transistor; The U terminal of the third U-type TFT transistor is connected to a high level; The I terminal of the third U-type TFT transistor is electrically connected to the U terminal of the fourth U-type TFT transistor; The I terminal of the fourth U-type TFT transistor is connected to a low level.

8. The pixel driving circuit based on TFT layout according to claim 7, characterized in that: The output module comprises: Pull-down unit; Output unit; The pull-down unit is electrically connected to the I terminal of the third U-type TFT transistor, the U terminal of the fourth U-type TFT transistor and the output unit respectively.

9. The pixel driving circuit based on TFT layout according to claim 8, characterized in that: The output unit comprises: A first capacitor, a first TFT transistor and an output terminal; The first end of the first capacitor is electrically connected to the I end of the third U-type TFT transistor, the U end of the fourth U-type TFT transistor, the first end of the pull-down unit, and the gate of the first TFT transistor; The second end of the first capacitor is electrically connected to the second end of the pull-down unit, the source electrode and the output end of the first TFT transistor; A drain of the first TFT transistor is connected to a clock signal.

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