Startup and shutdown circuit

Abstract

The utility model discloses a startup and shutdown circuit, which comprises a trigger unit, a first control unit, a switch unit and a second control unit, the trigger unit generates a trigger signal for starting up or shutdown, the first control unit is connected with the trigger unit and generates a control voltage based on the trigger signal, the second end of the switch unit is connected with a first voltage, and the first end of the switch unit is connected with the first control unit to receive the control voltage; the switch unit generates an output voltage at the third end of the switch unit based on the control of the control voltage, the second control unit is connected with the control end of the switch unit, and the second control unit locks the voltage at the first end of the switch unit or releases the first end of the switch unit based on the control signal. The on-off circuit provided by the utility model is stable and reliable, can realize the on-off of the split type balance, is beneficial to reducing the power consumption of the balance, is short in shutdown response time, and is friendly to users.

Description

Technical Field

[0001] The utility model belongs to the technical field of electronic circuits, and particularly relates to a power-on and power-off circuit. Background Art

[0002] Precision balances belong to the category of precision instruments and are precision, stable and reliable weighing instruments, mainly composed of precise electromagnetic weighing sensors, weighing platforms and user interaction devices. Precision balances can be used in laboratory and various production environment applications, including sample preparation, quality control statistics and counting.

[0003] At present, the vast majority of laboratory split-type precision balance terminals on the market do not have a power-on and power-off function. After the Base end (control end) of the balance is powered on, the terminal directly powers on and displays. If you need to power off, you must cut off the power. This design causes the user to continue to consume electrical energy when the balance is in a long-term idle state after the power is turned on, and cannot be completely powered off. The lack of a power-off function results in a low user experience, or a long power-off response time, causing the user to still consume electrical energy when the balance is idle. The long-term idle power-on of the precision balance will also cause a small increase in the temperature inside the weighing housing of the balance, affecting the measurement accuracy.

[0004] Therefore, in view of the above technical problems, it is necessary to provide a power-on and power-off circuit.

[0005] The information disclosed in this background art section is only intended to enhance the overall understanding of the utility model and should not be regarded as an admission or any form of suggestion that this information constitutes prior art already known to those of ordinary skill in the art. Summary of the Utility Model

[0006] The purpose of the utility model is to provide a power-on and power-off circuit, which can power off the balance when it is not in use.

[0007] To achieve the above purpose, the technical solution provided by a specific embodiment of the utility model is as follows: A power-on and power-off circuit, comprising: a trigger unit, a first control unit, a switch unit and a second control unit;

[0008] The trigger unit generates a trigger signal for power-on or power-off. The first control unit is connected to the trigger unit. The first control unit generates a control voltage based on the trigger signal. The second end of the switch unit is connected to a first voltage. The third end of the switch unit is the output end of the power-on and power-off circuit. The first end of the switch unit is connected to the first control unit to receive the control voltage. The switch unit generates an output voltage at the third end of the switch unit based on the control of the control voltage. The second control unit is connected to the first end of the switch unit. The second control unit locks or releases the voltage at the first end of the switch unit based on a control signal.

[0009] In one or more embodiments of the present utility model, the first control unit includes: a voltage generation unit, the voltage generation unit includes a voltage division module, and the voltage division module is connected to a first voltage to divide the first voltage to generate a control voltage.

[0010] In one or more embodiments of the present utility model, the voltage generation unit further includes: a control module, and the control module is connected to the voltage division module and a reference voltage to control the on / off between the voltage division module and the reference voltage.

[0011] In one or more embodiments of the present utility model, the first control unit further includes: a control chip, and the control chip is connected to the voltage generation unit to control the turn-on and turn-off of the voltage generation unit.

[0012] In one or more embodiments of the present utility model, the first control unit further includes: a feedback input module, the feedback input module is connected to the control chip, the feedback input module generates a drive signal based on an indication signal, and the control chip controls the turn-off of the voltage generation unit based on the drive signal.

[0013] In one or more embodiments of the present utility model, the control module includes: a first transistor, a first resistor, and a second resistor; a first end of the first resistor and a first end of a third resistor are connected to a first voltage, a second end of the first resistor is connected to a first end of the second resistor to receive a signal, a second end of the second resistor is connected to a first end of the first transistor, a second end of the first transistor is connected to a reference voltage, and a third end of the first transistor is connected to the voltage division module.

[0014] In one or more embodiments of the present utility model, the feedback input module includes: a second transistor and a fifth resistor, a first end of the second transistor is used to receive an indication signal, a second end of the second transistor is connected to a reference voltage, a third end of the second transistor is connected to a first end of the fifth resistor and the control chip to generate a drive signal, and a second end of the fifth resistor is connected to a second voltage.

[0015] In one or more embodiments of the present utility model, the second control unit includes: a third transistor and a sixth resistor, a first end and a second end of the third transistor are used to receive a control signal, a third end of the third transistor is connected to a first end of the sixth resistor, a second end of the sixth resistor is connected to a first end of the switch unit, and the third transistor locks or releases the voltage at the first end of the switch unit based on its own turn-on and turn-off.

[0016] In one or more embodiments of the present utility model, the second control unit further includes: a bias unit, a first end of the bias unit is connected to a third end of the switch unit, a second end of the bias unit is connected to a first end of a third transistor, and a second end of the third transistor is connected to a reference voltage.

[0017] In one or more embodiments of the present utility model, the second control unit further includes: an unlocking unit, the unlocking unit is connected to a second end of the bias unit and a first end of the third transistor, and the unlocking unit controls the turning on and off of the third transistor based on its own turning on and off.

[0018] In one or more embodiments of the present utility model, the unlocking unit includes a fifth transistor, a first end of the fifth transistor is used to receive a first control signal, a control end of the fifth transistor is used to receive a second control signal, a second end of the fifth transistor is connected to a second end of the bias unit and a first end of the third transistor, and the fifth transistor controls its own turning on and off based on the first control signal and the second control signal to turn on and off the third transistor.

[0019] In one or more embodiments of the present utility model, the power-on and power-off circuit further includes a first MCU chip, and / or a voltage circuit and a second MCU chip, the first MCU chip is connected to the trigger unit, the first MCU chip generates a control signal based on a trigger signal, the second MCU chip is connected to the trigger unit, the voltage circuit is used to generate a first voltage, and the second MCU chip generates a turn-off signal for turning off the voltage circuit based on the trigger signal.

[0020] Compared with the prior art, the power-on and power-off circuit of the present utility model is stable and reliable, can realize the power-on and power-off of the split balance, thereby helping to reduce the power consumption of the balance, has a short power-off response time, and is user-friendly. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments recorded in the present utility model. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0022] Figure 1 It is a system block diagram of the power-on and power-off circuit in Embodiment 1 and Embodiment 2 of the present utility model;

[0023] Figure 2 It is a circuit schematic diagram of the power-on and power-off circuit in Embodiment 1 of the present utility model;

[0024] Figure 3 This is the circuit schematic diagram of the power-on and power-off circuit in the second embodiment of the present utility model.

[0025] Reference numerals

[0026] 10 - Trigger unit; 20 - First control unit; 21 - Voltage generation unit; 22 - Feedback input module; 30 - Switch unit; 40 - Second control unit; 41 - Self-locking unit; 411 - Bias unit; 42 - Unlock unit. Detailed implementation manners

[0027] In order to enable those skilled in the art to better understand the technical solutions in the present utility model, the technical solutions in the embodiments of the present utility model will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all of the embodiments. Based on the embodiments in the present utility model, all other embodiments obtained by those of ordinary skill in the art without making creative efforts shall fall within the protection scope of the present utility model.

[0028] "Coupled", "connected", or "linked" in the specification includes both direct connection and indirect connection. Indirect connection is a connection through an intermediate medium, such as a connection through an electrical conduction medium, which may have parasitic inductance or parasitic capacitance; indirect connection may also include a connection through other active devices or passive devices on the basis of achieving the same or similar functional purposes, such as a connection through a circuit or component such as a switch, a follower circuit, etc. Additionally, in the invention, words such as "first", "second", etc. are mainly used to distinguish one technical feature from another technical feature, and do not necessarily require or imply that there is a certain actual relationship, quantity, or order between these technical features.

[0029] In the detailed description of the specification, reference is made to the accompanying drawings that form a part thereof, in which the same reference numerals always represent the same components, and which are shown by way of exemplary embodiments that can be implemented. It should be understood that other embodiments can be utilized without departing from the scope of the present disclosure, and structural or logical changes can be made. Therefore, the following detailed description should not be regarded as limiting.

[0030] The various operations in the specification can be described as a plurality of discrete actions or operations in the order that is most helpful for understanding the claimed subject matter. However, the described order should not be construed as implying that these operations must be order-related. Specifically, these operations may not be executed in the order presented. The described operations can be executed in an order different from that of the described embodiments. Various additional operations can be performed in additional embodiments and / or the described operations can be omitted.

[0031] For the purposes of the present disclosure, the phrase "A and / or B" means (A), (B), or (A and B). For the purposes of the present disclosure, the phrase "A, B, and / or C" means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B, and C).

[0032] Various components and devices may be referred to or shown herein in the singular (e.g., "MOS transistor", "transistor", "switch", etc.), but this is merely for the convenience of discussion, and any element referred to in the singular may include multiple such elements in accordance with the teachings herein.

[0033] The specification describes the use of the phrases "in one embodiment" or "in other embodiments" or "in some embodiments", which may each refer to one or more of the same or different embodiments. In addition, the terms "comprising", "including", "having", etc. used with respect to the embodiments of the present disclosure are synonymous.

[0034] Embodiment 1

[0035] As Figure 1 shown, a power-on / off circuit in one embodiment of the present utility model includes: a trigger unit 10, a first control unit 20, a switch unit 30, and a second control unit 40.

[0036] The trigger unit 10 generates a trigger signal for power-on or power-off. The first control unit 20 is connected to the trigger unit 10, and the first control unit 20 generates a control voltage V1 based on the trigger signal. The second terminal of the switch unit 30 is connected to a first voltage VDD1 for power supply. The first terminal of the switch unit 30 is connected to the first control unit 20 to receive the control voltage V1. The switch unit 30 generates an output voltage Vout at the third terminal of the switch unit 30 based on the control of the control voltage V1. The second control unit 40 is connected to the first terminal of the switch unit 30, and the second control unit 40 locks or releases the voltage at the first terminal of the switch unit 30 based on a control signal to adjust whether the switch unit 30 operates. Wherein, the control signal includes a first control signal Power_off and / or a second control signal Power_on.

[0037] As Figure 2 shown, the trigger unit 10 includes a key S1. The first terminal of the key S1 is connected to a reference voltage, and the second terminal of the key S1 is connected to the first control unit 20. The key S1 is used to control the on / off between the first control unit 20 and the reference voltage, and generates a trigger signal when the key S1 is closed, that is, the trigger signal is the reference voltage. In one embodiment, the reference voltage is the ground voltage GND (low-level signal).

[0038] As Figure 2As shown, the switch unit 30 includes a switching transistor Q6. The second end of the switching transistor Q6 is connected to the first voltage VDD1. The third end of the switching transistor Q6 is the output end of the power-on / off circuit. The first end of the switching transistor Q6 is connected to the first control unit 20 to receive the control voltage V1.

[0039] As Figure 2 shown, the first control unit 20 includes: a control chip U1, a voltage generation unit 21, and a feedback input module 22. The feedback input module 22 generates a drive signal based on the indication signal Power_DIS. The control chip U1 is connected to the trigger unit 10, the voltage generation unit 21, and the feedback input module 22. The control chip U1 can control the turn-on and turn-off of the voltage generation unit 21. The control chip U1 generates a first signal P1 based on the trigger signal, and the control chip U1 generates a second signal P2 based on the drive signal. The voltage generation unit 21 is connected to the control chip U1. The voltage generation unit 21 generates the control voltage V1 based on the first signal P1, and the voltage generation unit 21 shuts itself off based on the control of the second signal P2.

[0040] Among them, the voltage generation unit 21 includes: a voltage division module and a control module. The voltage division module is connected to the first voltage VDD1 to divide the first voltage VDD1 to generate the control voltage V1. The control module is connected to the voltage division module, the control chip U1, and the reference voltage. The control module controls the on / off between the voltage division module and the reference voltage based on the first signal P1 and the second signal P2.

[0041] The voltage division module can be composed of several resistors connected in series. In one embodiment, the voltage division module is composed of two resistors connected in series. The voltage division module includes a third resistor R3 and a fourth resistor R4.

[0042] In one embodiment, the control module includes a first transistor Q1, a first resistor R1, and a second resistor R2.

[0043] Specifically, the first end of the first resistor R1 and the first end of the third resistor R3 are connected to the first end of the switch unit 30. The second end of the first resistor R1 is connected to the first end of the second resistor R2 and the control chip U1 to receive the first signal P1 or the second signal P2. The second end of the second resistor R2 is connected to the first end of the first transistor Q1. The second end of the first transistor Q1 is connected to the reference voltage. The third end of the first transistor Q1 is connected to the first end of the fourth resistor R4. The second end of the fourth resistor R4 is connected to the second end of the third resistor R3 to output the control voltage V1.

[0044] As Figure 2As shown, the feedback input module 22 includes: a second transistor Q2, a fifth resistor R5, and a first current-limiting resistor Rp1. The first end of the second transistor Q2 is connected to the first end of the first current-limiting resistor Rp1, and the second end of the first current-limiting resistor Rp1 is used to receive the indication signal Power_DIS. The second end of the second transistor Q2 is connected to the reference voltage, and the third end of the second transistor Q2 is connected to the first end of the fifth resistor R5 and the control chip U1 to generate a drive signal. The second end of the fifth resistor R5 is connected to the second voltage VDD2. In other embodiments, the first current-limiting resistor Rp1 may not be provided.

[0045] In one embodiment, both the first voltage VDD1 and the second voltage VDD2 are power supply voltages, and the same or different voltage values can be set according to needs. For example, the second voltage VDD2 is 3.3V, and the first voltage VDD1 is 12 - 24V.

[0046] Such as Figure 2 As shown, the second control unit 40 includes: a third transistor Q3, a sixth resistor R6, a second current-limiting resistor Rp2, and a third current-limiting resistor Rp3. The second end of the third transistor Q3 is connected to the first end of the third current-limiting resistor Rp3, and the second end of the third current-limiting resistor Rp3 is used to receive the first control signal Power_off. The first end of the third transistor Q3 is connected to the first end of the second current-limiting resistor Rp2, and the second end of the second current-limiting resistor Rp2 is used to receive the second control signal Power_on. The third end of the third transistor Q3 is connected to the first end of the sixth resistor R6, and the second end of the sixth resistor R6 is connected to the first end of the switching transistor Q6 of the switching unit 30. The third transistor Q3 locks or releases the voltage at the first end of the switching unit 30 based on its own on and off states. In other embodiments, the second current-limiting resistor Rp2 and the third current-limiting resistor Rp3 may not be provided.

[0047] Such as Figure 1 And 2 As shown, the power-on / off circuit further includes a first MCU chip, a second MCU chip, a voltage circuit 50, an eleventh resistor R11, a first diode D1, a second diode D2, and a third diode D3. In one embodiment, the first MCU chip is a terminal MCU chip, and the second MCU chip is a base MCU chip.

[0048] The first end of the eleventh resistor R11 is connected to the second voltage VDD2. The second end of the eleventh resistor R11 is connected to the anode of the first diode D1, the cathode of the second diode D2, and the cathode of the third diode D3. The cathode of the first diode D1 is connected to the second end of the key S1 of the trigger unit 10 to receive a trigger signal. The anode of the second diode D2 is connected to the IO port Key_to_base of the second MCU chip. The anode of the third diode D3 is connected to the IO port Key_state of the first MCU chip. The second MCU chip is simultaneously connected to the voltage circuit 50, and the voltage circuit 50 is used to generate the first voltage VDD1. The first MCU chip generates a first control signal Power_off, a second control signal Power_on, and an indication signal Power_DIS respectively based on the trigger signal generated by the trigger unit 10. The second MCU chip generates a turn-off signal based on the trigger signal generated by the trigger unit 10 to turn off the voltage circuit 50. In other embodiments, the second diode D2 and the third diode D3 may not be provided, the first MCU chip may not be provided, or the voltage circuit and the second MCU chip may not be provided.

[0049] In one embodiment, the switching transistor Q6 is a P-channel MOS transistor, and the second transistor Q2 is an N-channel MOS transistor. The second ends of the switching transistor Q6 and the second transistor Q2 are source electrodes. The third ends of the switching transistor Q6 and the second transistor Q2 are drain electrodes. The first ends of the switching transistor Q6 and the second transistor Q2 are gate electrodes. The first transistor Q1 and the third transistor Q3 are NPN bipolar transistors. The second ends of the first transistor Q1 and the third transistor Q3 are emitter electrodes. The third ends of the first transistor Q1 and the third transistor Q3 are collector electrodes. The first ends of the first transistor Q1 and the third transistor Q3 are base electrodes. In other embodiments, the switching transistor Q6 is an N-channel MOS transistor, and the second transistor Q2 is a P-channel MOS transistor. The first transistor Q1 and the third transistor Q3 may be PNP bipolar transistors. At this time, the high and low levels of the corresponding control signals of each transistor need to be adaptively changed. Of course, the switching transistor Q6 and the second transistor Q2 may also be NPN or PNP bipolar transistors, and the first transistor Q1 and the third transistor Q3 may also be P-channel or N-channel MOS transistors.

[0050] Such as Figure 2As shown, when the user needs to power on, press the button S1, the trigger unit 10 generates a trigger signal, and the chip U1 immediately responds. The pin of the chip U1 connected to the second end of the second resistor R2 outputs a high-level first signal P1, the first transistor Q1 conducts, the first voltage VDD1 is connected to the reference voltage through the third resistor R3, the fourth resistor R4 and the first transistor Q1, and a control voltage V1 is generated by the voltage division of the third resistor R3 and the fourth resistor R4. The switching transistor Q6 receives the control voltage V1 and conducts, thereby generating an output voltage Vout at the third end of the switching transistor Q6, and after different-level conversions by the main control board (not shown in the figure), voltages such as 3.3V and 5V are obtained for use by the entire power-on and -off circuit and the external circuit.

[0051] At the same time, the low-level first control signal Power_off and the high-level second control signal power_on cause the third transistor Q3 to conduct, so that the switching transistor Q6 continuously conducts and is clamped and self-locked. Preferably, the first control signal Power_off and the second control signal power_on are respectively output by the MCU chip.

[0052] Furthermore, the first control unit 20 further includes a capacitor C. The first end of the capacitor C is connected to the control chip U1, and the second end of the capacitor C is connected to the reference voltage. When the button S1 is pressed, the control chip U1 charges the capacitor C. By detecting the voltage on the capacitor C, the control chip U1 can sense whether the button S1 is pressed. If the value of the capacitor C is too large, the button S1 needs to be pressed for a longer time for the control chip U1 to sense that the button S1 is pressed. That is, the control chip U1 senses whether the trigger unit 10 generates a trigger signal based on the voltage on the capacitor C.

[0053] When the user needs to power off, press and hold the button S1 for 2 seconds or more, that is, the trigger unit 10 keeps generating a low-level trigger signal for 2 seconds or more. After the first MCU chip detects through the IO port key_state that the low-level signal lasts for more than 2 seconds, after saving the user data, it controls the first control signal power_off to flip from low level to high level, and controls the second control signal power_on to flip from high level to low level, and outputs a high-level indication signal power_DIS. It can be seen that the first control signal power_off, the second control signal power_on and the indication signal power_DIS can be controlled by the duration of the trigger signal generated. At this time, the third transistor Q3 turns off and unlocks, the second transistor Q2 conducts, and at this time, the pin of the control chip U1 connected to the second end of the second resistor R2 outputs a low-level second signal P2, the first transistor Q1 turns off, the switching transistor Q6 turns off, and the output voltage Vout is cut off, with a short power-off time and reduced user waiting time.

[0054] In its embodiments, when shutting down, the first control signal Power_off and the second control signal power_on can also be set to low level or high level to turn off the third transistor Q3.

[0055] In addition, the holding time of pressing the button S1 can be changed as needed. When the user needs to shut down, the button S1 can also be pressed and held for more than 3 seconds, that is, the trigger unit 10 is triggered to continuously generate a low-level trigger signal for 3 seconds or more. After the second MCU chip detects that the low-level signal duration exceeds 3 seconds through the IO port key_to_base, the second MCU chip sends data to the first MCU chip to save the user data, and then the second MCU chip generates a shutdown signal to directly turn off the voltage circuit 50 to block the generation of the first voltage VDD1.

[0056] By setting that only when the holding time of pressing the button S1 reaches a certain value during shutdown, the shutdown operation is performed, which is different from the short press of the button S1 during startup. And setting the holding time of pressing the button S1 to exceed 2 seconds or 3 seconds or more can prevent accidental triggering by personnel. In places where the button S1 is easily touched frequently, the holding time of pressing the button S1 can be set longer, and in places where the button S1 is not easily touched, the holding time of pressing the button S1 can be set shorter.

[0057] In addition, by setting the first MCU chip and the second MCU chip, two shutdown methods are realized, which are distinguished by different holding times of pressing the button S1. When the holding time of pressing the button S1 is long enough, dual shutdown can be achieved to ensure complete shutdown.

[0058] In other embodiments, the shutdown operation can be triggered by simply pressing the button S1 without restricting the holding time.

[0059] The power-on and -off circuit of this solution is stable and reliable, can be applied to a split-type balance, realizes the power-on and -off of the split-type balance, and has multiple shutdown method selections, which can reduce the circuit design and function costs, thereby helping to reduce the power consumption of the balance. The shutdown response time is short, which is user-friendly.

[0060] Embodiment 2

[0061] As Figure 1 shown, a power-on and -off circuit in an embodiment of the present utility model includes: a trigger unit 10, a first control unit 20, a switch unit 30, and a second control unit 40.

[0062] The trigger unit 10 generates a trigger signal for power-on or power-off. The first control unit 20 is connected to the trigger unit 10, and the first control unit 20 generates a control voltage V1 based on the trigger signal. The first end of the switch unit 30 is connected to the first voltage VDD1, the control end of the switch unit 30 is connected to the first control unit 20 to receive the control voltage V1, and the switch unit 30 generates an output voltage Vout at the second end of the switch unit 30 based on the control of the control voltage V1. The second control unit 40 is connected to the control end of the switch unit 30, and the second control unit 40 locks or releases the voltage at the control end of the switch unit 30 based on the first control signal Power_off and the second control signal Power_on to adjust whether the switch unit 30 operates.

[0063] As Figure 3 shown, the trigger unit 10 includes a key S1. The first end of the key S1 is connected to the reference voltage, the second end of the key S1 is connected to the first control unit 20, and the key S1 is used to control the on-off between the first control unit 20 and the reference voltage, generating a trigger signal when the key S1 is closed, that is, the trigger signal is the reference voltage. In one embodiment, the reference voltage is the ground voltage GND (low-level signal).

[0064] The first control unit 20 includes: a voltage generation unit. The voltage generation unit includes a voltage division module and a fourth diode D4. The voltage division module is connected to the first voltage VDD1 to divide the first voltage VDD1 to generate a control voltage. In other embodiments, the fourth diode D4 may not be provided.

[0065] The voltage division module may be composed of several resistors connected in series. In one embodiment, the voltage division module is composed of two resistors connected in series, and the voltage division module includes a ninth resistor R9 and a tenth resistor R10.

[0066] Specifically, the first end of the ninth resistor R9 is connected to the first voltage VDD1, the second end of the ninth resistor R9 is connected to the first end of the tenth resistor R10 to generate the control voltage V1, and the second end of the tenth resistor R10 is connected to the second end of the key S1 of the trigger unit 10 to receive the trigger signal.

[0067] The switch unit 30 includes a switching transistor Q6. The second end of the switching transistor Q6 forms the second end of the switch unit 30 and is connected to the first voltage VDD1. The third end of the switching transistor Q6 forms the third end of the switch unit 30 and is the output end of the power-on / off circuit. The first end of the switching transistor Q6 forms the first end of the switch unit 30 and is connected to the first end of the tenth resistor R10 of the first control unit 20 to receive the control voltage V1.

[0068] As Figure 3As shown, the second control unit 40 includes: a third transistor Q3, a sixth resistor R6, a bias unit 411, and an unlocking unit 42. Among them, the third transistor Q3, the sixth resistor R6, and the bias unit 411 form a self-locking unit 41. The self-locking unit 41 is connected to the second end of the switch unit 30 and the control end of the switch unit 30. The self-locking unit 41 clamps and self-locks the voltage at the control end of the switch unit 30 based on the control of the output voltage Vout.

[0069] Specifically, the second end of the third transistor Q3 is connected to the reference voltage, the third end of the third transistor Q3 is connected to the first end of the sixth resistor R6, the second end of the sixth resistor R6 is connected to the first end of the switching transistor Q6 of the switch unit 30, the first end of the bias unit 411 is connected to the third end of the switching transistor Q6 of the switch unit 30, and the second end of the bias unit 411 is connected to the first end of the third transistor Q3.

[0070] The unlocking unit 42 is connected to the second end of the bias unit 411 and the first end of the third transistor Q3 of the self-locking unit 41. The unlocking unit 42 controls the opening and closing of the self-locking unit 41 based on its own opening and closing.

[0071] In one embodiment, the bias unit 411 includes a twelfth resistor R12 and an eighth resistor R8. Specifically, the first end of the eighth resistor R8 is connected to the first end of the third transistor Q3, the second end of the eighth resistor R8 is connected to the first end of the twelfth resistor R12, and the second end of the twelfth resistor R12 is connected to the second end of the switch unit 30. In other embodiments, the twelfth resistor R12 may not be provided.

[0072] The unlocking unit 42 includes a fifth transistor Q5, a fourth current-limiting resistor Rp4, and a fifth current-limiting resistor Rp5. The first end of the fifth transistor Q5 is connected to the first end of the fifth current-limiting resistor Rp5. The second end of the fifth current-limiting resistor Rp5 is used to receive the first control signal Power_off. The control end of the fifth transistor Q5 is connected to the first end of the fourth current-limiting resistor Rp4. The second end of the fourth current-limiting resistor Rp4 is used to receive the second control signal Power_on. The second end of the fifth transistor Q5 is connected to the control end of the fourth transistor Q4 of the self-locking unit 41. The fifth transistor Q5 controls its own opening and closing based on the first control signal Power_on and the second control signal Power_off to open and close the self-locking unit 41.

[0073] In one embodiment, the power-on and off circuit further includes a first MCU chip, a second MCU chip, a voltage circuit 50, an eleventh resistor R11, a first diode D1, a second diode D2, and a third diode D3. In one embodiment, the first MCU chip is a terminal MCU chip, and the second MCU chip is a base MCU chip.

[0074] The first end of the eleventh resistor R11 is connected to the second voltage VDD2. The second end of the eleventh resistor R11 is connected to the anode of the first diode D1, the cathode of the second diode D2, and the cathode of the third diode D3. The cathode of the first diode D1 is connected to the second end of the key S1 of the trigger unit 10 to receive a trigger signal. The anode of the second diode D2 is connected to the IO port Key_to_base of the MCU chip. The anode of the third diode D3 is connected to the IO port Key_state of the first MCU chip. The second MCU chip is simultaneously connected to the voltage circuit 50, and the voltage circuit 50 is used to generate the first voltage VDD1. The first MCU chip generates a first control signal Power_off and a second control signal Power_on respectively based on the trigger signal generated by the trigger unit 10. The second MCU chip generates a turn-off signal based on the trigger signal generated by the trigger unit 10 to turn off the voltage circuit 50. In other embodiments, the second diode D2 and the third diode D3 may not be provided, the first MCU chip may not be provided, or the voltage circuit and the second MCU chip may not be provided.

[0075] In one embodiment, the switching transistor Q6 is a P-channel MOS transistor. The second end of the switching transistor Q6 is the source electrode, the third end of the switching transistor Q6 is the drain electrode, and the first end of the switching transistor Q6 is the gate electrode. The fourth transistor Q4 and the fifth transistor Q5 are NPN-type triodes. The first ends of the fourth transistor Q4 and the fifth transistor Q5 are the emitter electrodes. The second ends of the fourth transistor Q4 and the fifth transistor Q5 are the collector electrodes. The control ends of the fourth transistor Q4 and the fifth transistor Q5 are the base electrodes. In other embodiments, the switching transistor Q6 may be an N-channel MOS transistor, and the fourth transistor Q4 and the fifth transistor Q5 may be PNP-type triodes. At this time, the high and low levels of the corresponding control signals of each transistor need to be adaptively changed. Of course, the switching transistor Q6 may also be an NPN-type or PNP-type triode, and the fourth transistor Q4 and the fifth transistor Q5 may be P-channel or N-channel MOS transistors.

[0076] As Figure 3 shown, when the user needs to power on, press the key S1, the trigger unit 10 generates a trigger signal. The first voltage VDD1 is connected to the reference voltage through the ninth resistor R9 and the tenth resistor R10. The control voltage V1 is generated by dividing the first voltage VDD1 through the ninth resistor R9 and the tenth resistor R10. The switching transistor Q6 receives the control voltage V1 and conducts, thereby generating an output voltage Vout at the third end of the switching transistor Q6, and after different-level conversions by the main control board (not shown in the figure), voltages such as 3.3V and 5V are obtained for use by the entire power-on and -off circuit and external circuits.

[0077] Meanwhile, the high-level first control signal Power_off and the low-level second control signal power_on turn off the fifth transistor Q5. The output voltage Vout generated at the third terminal of the switching transistor Q6 generates a turn-on voltage at the control terminal of the fourth transistor Q4 via the twelfth resistor R12 and the eighth resistor R8, turning on the fourth transistor Q4. As a result, the first terminal of the switching transistor Q6 is pulled down to continuously conduct and latch. Preferably, the first control signal Power_off and the second control signal power_on are respectively output by the MCU chip.

[0078] In other embodiments, the first control signal Power_off and the second control signal power_on can also be set to low level or high level to turn off the fifth transistor Q5.

[0079] When the user needs to power off, press and hold the button S1 for 2 seconds or more, which triggers the unit 10 to continuously generate a low-level trigger signal for 2 seconds or more. After the first MCU chip detects through the IO port key_state that the low-level signal lasts for more than 2 seconds, it saves the user data and then controls the first control signal power_off to flip from high level to low level, and controls the second control signal power_on to flip from low level to high level. It can be seen that the first control signal power_off and the second control signal power_on can be controlled by the duration of the trigger signal. At this time, the fifth transistor Q5 conducts, the control terminal of the fourth transistor Q4 is pulled down to turn off and unlock, the switching transistor Q6 turns off, and the output voltage Vout is cut off, resulting in a short power-off time and reducing the user's waiting time.

[0080] In addition, the holding time of pressing the button S1 can be changed as needed. When the user needs to power off, the button S1 can also be pressed and held for more than 3 seconds, which triggers the unit 10 to continuously generate a low-level trigger signal for 3 seconds or more. After the second MCU chip detects through the IO port key_to_base that the low-level signal lasts for more than 3 seconds, the second MCU chip sends data to the first MCU chip to save the user data, and then the second MCU chip generates a turn-off signal to directly turn off the voltage circuit 50 to block the generation of the first voltage VDD1.

[0081] By setting that only when the holding time of pressing the button S1 reaches a certain value during power-off, the power-off operation is executed, which is different from the short press of the button S1 during power-on. Moreover, setting the holding time of pressing the button S1 to more than 2 seconds or 3 seconds or more can prevent accidental triggering by personnel. In occasions where the button S1 is easily touched frequently, the holding time of pressing the button S1 can be set longer; in occasions where the button S1 is not easily touched, the holding time of pressing the button S1 can be set shorter.

[0082] In addition, by setting the first MCU chip and the second MCU chip, two shutdown methods can be realized, which are distinguished by different holding times when pressing the button S1. When the holding time of pressing the button S1 is long enough, dual shutdown can be achieved to ensure complete shutdown.

[0083] The power-on and -off circuit of this solution is stable and reliable, and can be applied to split-type balances to realize the power-on and -off of split-type balances. The selection of multiple shutdown methods can reduce the circuit design and function costs, thereby helping to reduce the power consumption of the balance. The shutdown response time is short, which is user-friendly.

[0084] For those skilled in the art, it is obvious that the present invention is not limited to the details of the above exemplary embodiments, and the present invention can be implemented in other specific forms without departing from the spirit or basic characteristics of the present invention. Therefore, from any point of view, the embodiments should be regarded as exemplary and non-limiting. The scope of the present invention is defined by the appended claims rather than the above description. Therefore, all changes falling within the meaning and scope of the equivalent elements of the claims are intended to be embraced by the present invention. Any reference signs in the claims should not be regarded as limiting the claims involved.

[0085] In addition, it should be understood that although this specification is described according to embodiments, not every embodiment only contains an independent technical solution. This narrative way of the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A power on / off circuit, characterized in that: include: A trigger unit, a first control unit, a switch unit, and a second control unit; The trigger unit generates a trigger signal for turning on or off the power, the first control unit is connected to the trigger unit, the first control unit generates a control voltage based on the trigger signal, the second end of the switch unit is connected to the first voltage, the first end of the switch unit is connected to the first control unit to receive the control voltage, the switch unit generates an output voltage at the third end of the switch unit based on the control of the control voltage, the second control unit is connected to the first end of the switch unit, and the second control unit locks the voltage of the first end of the switch unit or releases the first end of the switch unit based on the control signal.

2. The switch circuit according to claim 1, characterized in that: The first control unit includes: a voltage generating unit, the voltage generating unit includes a voltage dividing module, and the voltage dividing module is connected to the first voltage to divide the first voltage to generate a control voltage.

3. The switch circuit according to claim 2, characterized in that: The voltage generating unit further includes: a control module, which is connected to the voltage dividing module and the reference voltage to control the connection between the voltage dividing module and the reference voltage.

4. The switch circuit according to claim 2 or 3, characterized in that: The first control unit further includes: a control chip, wherein the control chip is connected to the voltage generating unit to control the on and off of the voltage generating unit.

5. The switch circuit according to claim 4, characterized in that: The first control unit further includes: a feedback input module, the feedback input module is connected to the control chip, the feedback input module generates a driving signal based on the indication signal, and the control chip controls the shutdown of the voltage generating unit based on the driving signal.

6. The switch circuit according to claim 3, characterized in that: The control module includes: a first transistor, a first resistor and a second resistor; the first end of the first resistor and the first end of the third resistor are connected to a first voltage, the second end of the first resistor is connected to the first end of the second resistor to receive a signal, the second end of the second resistor is connected to the first end of the first transistor, the second end of the first transistor is connected to a reference voltage, and the third end of the first transistor is connected to a voltage divider module.

7. The switch circuit according to claim 5, characterized in that: The feedback input module includes: a second transistor and a fifth resistor, the first end of the second transistor is used to receive an indication signal, the second end of the second transistor is connected to a reference voltage, the third end of the second transistor is connected to the first end of the fifth resistor and a control chip to generate a drive signal, and the second end of the fifth resistor is connected to a second voltage.

8. The switch circuit according to claim 1, characterized in that: The second control unit includes: a third transistor and a sixth resistor, the first end of the third transistor and the second end of the third transistor are used to receive a control signal, the third end of the third transistor is connected to the first end of the sixth resistor, the second end of the sixth resistor is connected to the first end of the switch unit, and the third transistor locks the voltage of the first end of the switch unit or releases the first end of the switch unit based on its own opening and closing.

9. The switch circuit according to claim 8, characterized in that: The second control unit further includes: a bias unit, a first end of the bias unit is connected to the third end of the switch unit, a second end of the bias unit is connected to the first end of the third transistor, and a second end of the third transistor is connected to a reference voltage.

10. The switch circuit according to claim 9, characterized in that: The second control unit further includes: an unlocking unit connected to the second end of the bias unit and the first end of the third transistor, and the unlocking unit controls the turning on and off of the third transistor based on the turning on and off of the unlocking unit itself.

11. The switch circuit according to claim 10, characterized in that: The unlocking unit includes a fifth transistor, a first end of the fifth transistor is used to receive a first control signal, a control end of the fifth transistor is used to receive a second control signal, a second end of the fifth transistor is connected to the second end of the bias unit and the first end of the third transistor, and the fifth transistor controls its own turning on and off based on the first control signal and the second control signal to turn on and off the third transistor.

12. The switch circuit according to claim 1, characterized in that: The switch circuit also includes a first MCU chip, and / or a voltage circuit and a second MCU chip. The first MCU chip is connected to a trigger unit, and the first MCU chip generates a control signal based on a trigger signal. The second MCU chip is connected to the trigger unit. The voltage circuit is used to generate a first voltage, and the second MCU chip generates a shutdown signal for shutting down the voltage circuit based on the trigger signal.

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