Protection system, driving system and vehicle

Abstract

The utility model discloses a protection system, a driving system and a vehicle, and relates to the technical field of vehicles. The protection system comprises a fault detection circuit, the input end of the fault detection circuit is suitable for being connected with the first output end of a signal generation circuit, and the fault detection circuit is used for detecting whether a detection signal output by the signal generation circuit is normal or not; the first input end of the fault feedback circuit is connected with the output end of the fault detection circuit, the first output end of the fault feedback circuit is connected with the control end of the signal generation circuit, and the fault feedback circuit is used for controlling the signal generation circuit to stop outputting the to-be-detected signal under the condition that the to-be-detected signal is abnormal. The protection system can prevent the power unit in the OBC driving system from receiving a wrong driving signal to cause damage to the power circuit.

Description

Technical Field

[0001] The present application relates to the technical field of vehicles, and more specifically, to a protection circuit, a drive system, and a vehicle. Background Art

[0002] With the increasing requirements for vehicle intelligence and carbon peak, the development of electric vehicles is getting faster and faster, and the market penetration rate is getting higher and higher.

[0003] For an on-board charger OBC, which is a core component of an electric vehicle, when the power unit in the OBC receives an incorrect drive signal, there is a risk of damage to the power unit. Therefore, how to avoid the problem of damage to the power unit caused by the power unit in the OBC receiving an incorrect drive signal has become a technical problem to be solved urgently. Summary of the Utility Model

[0004] An object of the present application is to provide a new technical solution for a protection system.

[0005] According to a first aspect of the present application, there is provided a protection system, including:

[0006] A fault detection circuit, an input end of the fault detection circuit is adapted to be connected to a first output end of a signal generation circuit, and the fault detection circuit is configured to detect whether a signal to be detected output by the signal generation circuit is normal;

[0007] A fault feedback circuit, a first input end of the fault feedback circuit is connected to an output end of the fault detection circuit, a first output end of the fault feedback circuit is connected to a control end of the signal generation circuit, and the fault feedback circuit is configured to control the signal generation circuit to stop outputting the signal to be detected when the signal to be detected is abnormal.

[0008] Optionally, a second output end of the fault feedback circuit is connected to an input end of the signal generation circuit, and the fault feedback circuit is further configured to feedback to the signal generation circuit that the signal to be detected is abnormal when the signal to be detected is abnormal.

[0009] Optionally, a second input end of the fault feedback circuit is connected to a second output end of the signal generation circuit, and the fault feedback circuit is further configured to restore the to-be-triggered state when the signal generation circuit indicates a restart.

[0010] Optionally, the signal generation circuit includes a set of bridge arms, and the fault detection circuit includes:

[0011] An AND logic circuit, the input terminals of the AND logic circuit are respectively connected to the upper bridge arm control terminal and the lower bridge arm control terminal of the set of bridge arms to input the upper drive signal of the upper bridge arm and the lower drive signal of the lower bridge arm;

[0012] The output terminal of the AND logic circuit is connected to the first input terminal of the fault feedback circuit.

[0013] Optionally, the signal generation circuit includes at least 2 sets of bridge arms, and the fault detection circuit includes:

[0014] An OR logic circuit; and

[0015] AND logic circuits corresponding to the bridge arms one by one, where:

[0016] For any one of the OR logic circuits, the input terminals of the AND logic circuit are respectively connected to the upper bridge arm control terminal and the lower bridge arm control terminal of the corresponding bridge arm to input the upper drive signal of the upper bridge arm and the lower drive signal of the lower bridge arm;

[0017] The input terminals of the OR logic circuit are respectively connected to the output terminal of the OR logic circuit, and the output terminal of the OR logic circuit is connected to the input terminal of the fault feedback circuit.

[0018] Optionally, the fault feedback circuit includes:

[0019] A first resistor, a first capacitor, a first switch, a second resistor, a second capacitor, a second switch, where:

[0020] The first end of the first resistor is used as the first input terminal of the fault feedback circuit and is connected to the output terminal of the fault detection circuit, and the second end of the first resistor is connected to the first end of the first capacitor;

[0021] The second end of the first capacitor is grounded;

[0022] The first end of the second resistor is connected to the power supply access terminal, and the second end of the second resistor is connected to the first end of the second capacitor;

[0023] The second end of the second capacitor is connected to the power supply access terminal;

[0024] The control terminal of the first switch is connected to the second end of the first resistor, the first end of the first switch is connected to the second end of the second resistor, and the second end of the first switch is grounded;

[0025] The control terminal of the second switch is connected to the second terminal of the second resistor. The first terminal of the second switch serves as the first output terminal of the fault feedback circuit. The first terminal of the second switch is connected to the control terminal of the signal generation circuit, and the second terminal of the second switch is connected to the power supply access terminal.

[0026] Optionally, the fault feedback circuit further includes:

[0027] A third resistor, a third capacitor, a third switch, and a diode, where:

[0028] The third resistor is connected between the power supply access terminal and the first terminal of the third switch;

[0029] The control terminal of the third switch is connected to the second terminal of the second resistor. The second terminal of the third switch is grounded, and the first terminal of the third switch serves as the second output terminal of the fault feedback circuit. The first terminal of the second switch is connected to the input terminal of the signal generation circuit;

[0030] The anode of the diode is connected to the second terminal of the second resistor, and the cathode of the diode is connected to the first terminal of the first switch.

[0031] Optionally, the second input terminal of the fault feedback circuit is connected to the first output terminal of the control circuit of the signal generation circuit. The fault feedback circuit further includes:

[0032] A fourth resistor, a fourth capacitor, and a fourth switch, where:

[0033] The first terminal of the fourth resistor serves as the second input terminal of the fault feedback circuit. The first terminal of the fourth resistor is connected to the second output terminal of the signal generation circuit, and the second terminal of the fourth resistor is connected to the first terminal of the fourth capacitor;

[0034] The second terminal of the fourth capacitor is grounded;

[0035] The control terminal of the fourth switch is connected to the second terminal of the fourth resistor;

[0036] The first terminal of the fourth switch is connected to the second terminal of the first resistor, and the second terminal of the fourth switch is grounded.

[0037] According to the second aspect of the present application, a drive system is provided. The drive system includes the protection system according to any one of the first aspects. The drive system further includes:

[0038] A signal generation circuit, where the control terminal of the signal generation circuit is connected to the first output terminal of the fault feedback circuit in the protection system.

[0039] Optionally, the signal generation circuit includes:

[0040] A control circuit, the first input terminal of the control circuit is connected to the second output terminal of the fault feedback circuit as the first input terminal of the signal generation circuit, and the control circuit is used to receive the feedback from the fault feedback circuit on whether the signal to be detected is normal;

[0041] And / or, the first output terminal of the control circuit is connected to the second input terminal of the fault feedback circuit, and is used to instruct the fault feedback circuit to restart when the signal to be detected returns from abnormal to normal.

[0042] Optionally, the signal generation circuit further includes:

[0043] A level conversion circuit, the input terminal of the level conversion circuit is connected to the second output terminal of the control circuit, and the enable terminal of the level conversion circuit is connected to the third output terminal of the control circuit. The level conversion circuit is used to perform level conversion on the first level signal output by the control circuit to obtain a second level signal.

[0044] Optionally, the signal generation circuit further includes:

[0045] A driving circuit, the driving circuit is connected to the output terminal of the level conversion circuit, and the driving circuit is used to convert the second level signal into a driving signal.

[0046] Optionally, the control terminal of the level conversion circuit is connected to the first output terminal of the fault feedback circuit, and the signal to be detected is the second level signal;

[0047] Or, the control terminal of the driving circuit is connected to the first output terminal of the fault feedback circuit, and the signal to be detected is the driving signal.

[0048] According to the third aspect of the present application, a vehicle is provided, and the vehicle includes the drive system as described in any one of the second aspects.

[0049] The present application provides a protection system, including: a fault detection circuit, the input terminal of the fault detection circuit is adapted to be connected to the first output terminal of the signal generation circuit, and the fault detection circuit is used to detect whether the detection signal output by the signal generation circuit is normal; a fault feedback circuit, the first input terminal of the fault feedback circuit is connected to the output terminal of the fault detection circuit, and the first output terminal of the fault feedback circuit is connected to the control terminal of the signal generation circuit. The fault feedback circuit is used to control the signal generation circuit to stop outputting the signal to be detected when the signal to be detected is abnormal. This protection system can avoid the problem that the power unit in the OBC drive system receives an incorrect drive signal and causes damage to the power circuit.

[0050] Other features and advantages of the present application will become clear from the following detailed description of the exemplary embodiments of the present application with reference to the accompanying drawings. Description of the Drawings

[0051] The drawings incorporated in and forming a part of this specification illustrate embodiments of the present application and, together with the description, are used to explain the principles of the present application.

[0052] Figure 1 is a schematic structural diagram of a protection system provided by the present application;

[0053] Figure 2 is a schematic structural diagram of a fault detection circuit provided by the present application;

[0054] Figure 3 is a schematic structural diagram of a fault feedback circuit provided by the present application Figure 1 ;

[0055] Figure 4 is a schematic structural diagram of a fault feedback circuit provided by the present application Figure 2 ;

[0056] Figure 5 is a schematic structural diagram of a fault feedback circuit provided by the present application Figure 3 ;

[0057] Figure 6 is a schematic structural diagram of a fault feedback circuit provided by the present application Figure 4 ;

[0058] Figure 7 is a schematic structural diagram of a drive system provided by the present application. Detailed Embodiments

[0059] Now, various exemplary embodiments of the present application will be described in detail with reference to the accompanying drawings. It should be noted that: unless otherwise specifically stated, the relative arrangements of components and steps, numerical expressions, and numerical values set forth in these embodiments do not limit the scope of the present application.

[0060] The following description of at least one exemplary embodiment is merely illustrative in nature and is in no way a limitation on the present application or its application or use.

[0061] Technologies, methods, and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, such technologies, methods, and devices should be regarded as part of the specification.

[0062] In all examples shown and discussed herein, any specific values should be construed as merely exemplary and not as a limitation. Thus, other examples of exemplary embodiments may have different values.

[0063] It should be noted that like reference numerals and letters refer to like items in the following figures, and thus, once an item is defined in one figure, further discussion thereof is not required in subsequent figures.

[0064] The present application provides a protection system 10, as Figure 1 shown, the protection system 10 includes:

[0065] A fault detection circuit 102, the input end of the fault detection circuit 102 is adapted to be connected to the first output end of the signal generation circuit 20, and the fault detection circuit 102 is used to detect whether the detection signal output by the signal generation circuit 20 is normal;

[0066] A fault feedback circuit 101, the first input end of the fault feedback circuit 101 is connected to the output end of the fault detection circuit 102, the first output end of the fault feedback circuit 101 is connected to the control end of the signal generation circuit 20, and the fault feedback circuit 101 is used to control the signal generation circuit 20 to stop outputting the signal to be detected when the signal to be detected is abnormal.

[0067] In the present application, the signal generation circuit 20 outputs a signal to be detected. The signal to be detected may be a normal signal to be detected or an abnormal signal to be detected caused by external interference. And, the signal to be detected may specifically be at least one path of signal.

[0068] In one example, the signal generation circuit 20 generates an upper drive signal for controlling the upper bridge arm and a lower drive signal for controlling the lower bridge arm in a group of bridge arms. Under normal circumstances, the upper drive signal and the lower drive signal are PWM signals with opposite levels at the same moment. Conversely, under abnormal circumstances, the upper drive signal and the lower drive signal are PWM signals with high levels at the same moment.

[0069] The fault detection circuit 102 detects whether the signal to be detected is normal and obtains a detection result signal indicating whether the signal to be detected is normal. The fault detection circuit 102 is further used to send the detection result signal to the fault feedback circuit 101. It should be noted that the fault detection circuit 102 can obtain the signal to be detected at any position of the transmission line for transmitting the signal to be detected. In one embodiment, it is obtained from the most end position of the transmission of the signal to be detected. In this way, it can be avoided that when the signal to be detected is abnormal due to interference after the acquisition position of the signal to be detected, the fault detection circuit 102 fails to detect the abnormality of the signal to be detected.

[0070] The fault feedback circuit 101 receives the detection result signal input by the fault detection circuit 102. When the fault feedback circuit 101 determines that the signal to be detected is abnormal according to the detection result signal, it controls the signal generation circuit to stop outputting the signal to be detected. For example, when the fault feedback circuit 101 determines that the signal to be detected is abnormal according to the detection result signal, it sends a stop signal to the signal generation circuit 20. After receiving the stop signal, the signal generation circuit 20 stops outputting the signal to be detected. In this way, when the signal generation circuit 20 generates the upper drive signal for controlling the upper bridge arm and the lower drive signal for controlling the lower bridge arm in a set of bridge arms, and the signal generation circuit 20 includes a drive circuit or a level conversion circuit that outputs the bridge arm control signal in the OBC drive system, the protection system provided by this application can prevent the drive circuit or the level conversion circuit from outputting the upper drive signal for driving the upper bridge arm and the lower drive signal for driving the lower bridge arm in any bridge arm of the power circuit. At this time, the power circuit in the OBC drive system will be protected. Therefore, based on the protection system provided by this application, the problem that the power circuit in the OBC drive system is damaged due to receiving an incorrect drive signal can be avoided.

[0071] Furthermore, when the fault feedback circuit 101 determines that the signal to be detected is normal according to the detection result signal, it controls the signal generation circuit 20 to continue outputting the signal to be detected.

[0072] This application provides a protection system, including: a fault detection circuit, the input end of the fault detection circuit is adapted to be connected to the first output end of the signal generation circuit, and the fault detection circuit is used to detect whether the detection signal output by the signal generation circuit is normal; a fault feedback circuit, the first input end of the fault feedback circuit is connected to the output end of the fault detection circuit, and the first output end of the fault feedback circuit is connected to the control end of the signal generation circuit. The fault feedback circuit is used to control the signal generation circuit to stop outputting the signal to be detected when the signal to be detected is abnormal. This protection system can avoid the problem that the power unit in the OBC drive system is damaged due to receiving an incorrect drive signal.

[0073] In addition, in the protection system provided by this application, only the signal to be detected needs to be detected, and no other signals need to be introduced. This makes the signals input to the fault detection circuit 102 few, facilitating the rapid detection of the fault detection circuit 102. Before the signal to be detected controls the device (such as the power unit in the OBC drive system), it can be detected whether the signal to be detected is normal. And in the case of abnormality, the protection system provided by this application controls the signal generation circuit to stop outputting the signal to be detected, so that the protection of the device controlled by the signal to be detected can be realized as soon as possible.

[0074] In an embodiment of this application, such as Figure 1As shown, the second output terminal of the fault feedback circuit 101 is connected to the input terminal of the signal generation circuit 20. The fault feedback circuit 101 is further configured to feedback that the signal to be detected is abnormal to the signal generation circuit 20 when the signal to be detected is abnormal.

[0075] In this embodiment, when the signal to be detected is abnormal, the fault feedback circuit 101 can generate a feedback signal indicating that the signal to be detected is abnormal, and further send the feedback signal to the signal generation circuit to feedback that the signal to be detected is abnormal. Based on this, it can be known that in this embodiment, the fault feedback circuit 101 can also feedback to the signal generation circuit 20 that the signal to be detected is abnormal.

[0076] In an embodiment of the present application, the second input terminal of the fault feedback circuit 101 is connected to the second output terminal of the signal generation circuit 20. The fault feedback circuit 101 is further configured to restore the waiting-to-be-triggered state when the signal generation circuit 20 indicates a restart.

[0077] In this embodiment, when the signal to be detected by the fault feedback circuit 101 is abnormal, the signal generation circuit 20 is controlled to stop outputting the signal to be detected. In this case, after the fault troubleshooting is completed, the signal generation circuit can instruct the fault feedback circuit 101 to restart, for example, by sending a reset signal. When the fault feedback circuit restarts, the fault feedback circuit 101 restores the waiting-to-be-triggered state. It should be noted that when the fault feedback circuit 101 is in the waiting-to-be-triggered state, the signal generation circuit 20 can continue to output the signal to be detected.

[0078] In an embodiment of the present application, the signal generation circuit 20 includes a set of bridge arms, and the fault detection circuit 102 includes:

[0079] An AND logic circuit, the input terminals of the AND logic circuit are respectively connected to the upper bridge arm control terminal and the lower bridge arm control terminal of a set of bridge arms to input the upper drive signal of the upper bridge arm and the lower drive signal of the lower bridge arm;

[0080] The output terminal of the AND logic circuit is connected to the first input terminal of the fault feedback circuit.

[0081] In this embodiment, the signal to be detected is the upper drive signal of the upper bridge arm and the lower drive signal of the lower bridge arm in a set of bridge arms included in the signal generation circuit 20. Further, based on the connection between the input end of the AND logic circuit and the first output end of the signal generation circuit 20, the aforementioned upper drive signal and lower drive signal are respectively input to one input end of the AND logic circuit. On this basis, if the signal to be detected, that is, the upper drive signal and the lower drive signal, is abnormal, that is, when the upper drive signal and the lower drive signal are both high-level at the same time, the AND logic circuit outputs a high level, otherwise it outputs a low level. In this embodiment, when the AND logic circuit outputs a high level, it is determined that the signal to be detected is abnormal; when the AND logic circuit outputs a low level, it is determined that the signal to be detected is normal.

[0082] The fault detection circuit 102 provided by this embodiment can detect whether the drive signal of a bridge arm is abnormal. That is, this embodiment provides a specific structure of the fault detection circuit 102 when the signal generation circuit 20 includes a set of bridge arms.

[0083] Corresponding to the above embodiment, the signal generation circuit 20 includes at least two sets of bridge arms, as Figure 2 shown, the fault detection circuit 102 includes:

[0084] an OR logic circuit 1022; and

[0085] AND logic circuits 1021 corresponding to the bridge arms one by one, where:

[0086] For any OR logic circuit 1022, the input ends of the AND logic circuits 1021 are respectively connected to the upper bridge arm control end and the lower bridge arm control end of the corresponding bridge arm to input the upper drive signal of the upper bridge arm and the lower drive signal of the lower bridge arm;

[0087] The input ends of the OR logic circuit 1022 are respectively connected to the output end of the OR logic circuit 1022, and the output end of the OR logic circuit 1022 is connected to the input end of the fault feedback circuit 101.

[0088] In this embodiment, the AND logic circuit 1021 is the same as the AND logic circuit described in the embodiment where the signal generation circuit 20 includes a set of bridge arms above. Details are not described here again.

[0089] When the signal generation circuit 20 includes at least two sets of bridge arms, when the signal to be detected corresponding to any bridge arm is abnormal, the AND logic circuit 1021 accessing the signal to be detected outputs a high level to the OR logic circuit 1022, and at this time the OR logic circuit 1022 outputs a high level indicating that the signal to be detected is abnormal.

[0090] Correspondingly, when the signals to be detected corresponding to each bridge arm are all normal, the AND logic circuit 1021 outputs a low level to the OR logic circuit 1022. At this time, the OR logic circuit 1022 outputs a low level indicating that the signals to be detected are normal.

[0091] Through the fault detection circuit provided in this embodiment, when the signal generation circuit 20 includes at least two groups of bridge arms, it can detect whether the signals to be detected are abnormal. That is, this embodiment provides a specific structure of the fault detection circuit 102 when the signal generation circuit 20 includes at least two groups of bridge arms. And the fault detection circuit 102 is implemented only by using the AND logic circuit 1021 and the OR logic circuit 1022, which makes the structure of the fault detection circuit 102 simple.

[0092] It should be noted that Figure 2 the OR logic circuit is implemented in the form of a diode.

[0093] In an embodiment of the present application, as Figure 3 shown, the fault feedback circuit 101 includes: The fault feedback circuit 101 includes:

[0094] A first resistor R605, a first capacitor C603, a first switch Q602, a second resistor R608, a second capacitor C604, and a second switch Q603, where:

[0095] The first end of the first resistor R605 serves as the first input end of the fault feedback circuit 101 and is connected to the output end of the fault detection circuit. The second end of the first resistor R605 is connected to the first end of the first capacitor C603;

[0096] The second end of the first capacitor C603 is grounded;

[0097] The first end of the second resistor R608 is connected to the power supply access end. The second end of the second resistor R608 is connected to the first end of the second capacitor C604;

[0098] The second end of the second capacitor C604 is connected to the power supply access end;

[0099] The control end of the first switch Q602 is connected to the second end of the first resistor R605. The first end of the first switch Q602 is connected to the second end of the second resistor R608. The second end of the first switch Q602 is grounded;

[0100] The control end of the second switch Q603 is connected to the second end of the second resistor R608. The first end of the second switch Q603 serves as the first output end of the fault feedback circuit 101. The first end of the second switch Q603 is connected to the control end of the signal generation circuit. The second end of the second switch Q603 is connected to the power supply access end.

[0101] In this embodiment, when the fault detection circuit 102 detects an abnormality in the signal to be detected, it inputs a high level to the first end of the first resistor R605. The first switch Q602 and the second switch Q603 are turned on, and the first end of the second switch Q603 outputs a high level to the control end of the signal generation circuit 20. At this time, the signal generation circuit 20 stops outputting the signal to be detected.

[0102] Correspondingly, when the fault detection circuit 102 detects that the signal to be detected is normal, it inputs a low level to the first end of the first resistor R605, and both the first switch Q602 and the second switch Q603 are turned off. At this time, the first end of the second switch Q603 outputs a low level to the control end of the signal generation circuit 20, and at this time, the signal generation circuit 20 continuously outputs the signal to be detected.

[0103] In this embodiment, there is provided a schematic structural diagram of a fault feedback circuit 101. The fault feedback circuit 101 can control the signal generation circuit 20 to stop outputting the signal to be detected when the signal to be detected is abnormal, and control the signal generation circuit 20 to continuously output the signal to be detected when the signal to be detected is normal.

[0104] In an embodiment of the present application, based on the above Figure 3 shown fault feedback circuit 101, as Figure 4 shown, in the protection system 10 provided by the present application, the fault feedback circuit 101 further includes:

[0105] A third resistor R610, a third capacitor C605, a third switch Q604, and a diode D1, where:

[0106] The third resistor R610 is connected between the power supply access terminal and the first end of the third switch Q604;

[0107] The control end of the third switch Q604 is connected to the second end of the second resistor R608. The second end of the third switch Q604 is grounded, and the first end of the third switch Q604 serves as the second output end of the fault feedback circuit 101. The first end of the second switch Q603 is connected to the input end of the signal generation circuit 20;

[0108] The anode of the diode D1 is connected to the second end of the second resistor R608, and the cathode of the diode D1 is connected to the first end of the first switch Q602.

[0109] In this embodiment, when the fault detection circuit 102 inputs a high level to the first end of the first resistor R605, the third switch Q604 is turned off, and the second end of the third switch Q604 outputs a high-level feedback signal to the signal generation circuit. The high-level feedback signal is used to indicate that the signal to be detected is abnormal.

[0110] Correspondingly, when the fault detection circuit 102 inputs a low level to the first end of the first resistor R605, the third switch Q604 is turned off, and a feedback signal of low level is output from the second end of the third switch Q604 to the signal generation circuit. This low-level feedback signal is used to indicate that the signal to be detected is normal.

[0111] In this embodiment, a schematic structural diagram of another fault feedback circuit 101 is provided. The fault feedback circuit 101 can feed back that the signal to be detected is abnormal to the signal generation circuit 20 when the detection result signal is abnormal.

[0112] In one embodiment of the present application, based on the Figure 4 fault feedback circuit 101 shown above, as Figure 5 shown, the second input terminal of the fault feedback circuit 101 is connected to the first output terminal of the control circuit of the signal generation circuit 20. The fault feedback circuit 101 further includes:

[0113] A fourth resistor R603, a fourth capacitor C602, and a fourth switch Q601, where:

[0114] The first end of the fourth resistor R603 serves as the second input terminal of the fault feedback circuit 101. The first end of the fourth resistor R603 is connected to the second output terminal of the signal generation circuit 20, and the second end of the fourth resistor R603 is connected to the first end of the fourth capacitor C602;

[0115] The second end of the fourth capacitor C602 is grounded;

[0116] The control terminal of the fourth switch Q601 is connected to the second end of the fourth resistor R603;

[0117] The first end of the fourth switch Q601 is connected to the second end of the first resistor R605, and the second end of the fourth switch Q601 is grounded.

[0118] In this embodiment, when the signal generation circuit 20 inputs a high-level restart signal to the first end of the fourth resistor R603, the fourth switch Q601 is turned on, the first switch Q602 is turned off, the second switch Q603 is turned off, and a low level is output from the first end of the second switch Q603 to the signal generation circuit 20, and the signal generation circuit 20 outputs a signal to be detected. And the signal generation circuit 20 inputs a low-level reset signal to the first end of the fourth resistor R603, the third switch Q604 is turned on, and a low-level feedback signal is output from the first end of the third switch Q604.

[0119] In this embodiment, a schematic structural diagram of another fault feedback circuit 101 is provided. The fault feedback circuit 101 can restore the to-be-triggered state when the signal generation circuit 20 indicates a restart.

[0120] It can be understood that in order to improve the working stability of the fault feedback circuit 101, a fifth resistor R601, a sixth resistor R602, a fifth capacitor C601, a seventh resistor R604, an eighth resistor R606, a ninth resistor R607, a tenth resistor R609, an eleventh resistor R611 and a sixth capacitor C606 can also be added on the basis of the above, as specifically shown in Figure 5 the following. Figure 6 Shown as follows.

[0121] The present application also provides a drive system, as shown in Figure 1 or Figure 7 shown below. The drive system includes a protection system 10 as in any one of the above protection system embodiments. The drive system further includes:

[0122] A signal generation circuit 20, wherein the control end of the signal generation circuit 20 is connected to the first output end of the fault feedback circuit 101 in the protection system 10.

[0123] In an embodiment of the present application, as shown in Figure 7 the following, the signal generation circuit 20 includes:

[0124] A control circuit 201, the first input end of the control circuit 201 is used as the first input end of the signal generation circuit 20 and is connected to the second output end of the fault feedback circuit 101. The control circuit 201 is used to receive the feedback from the fault feedback circuit 101 on whether the signal to be detected is normal;

[0125] And / or, the first output end of the control circuit 201 is connected to the second input end of the fault feedback circuit 101, and is used to indicate the fault feedback circuit 101 to restart when the signal to be detected is restored from abnormal to normal.

[0126] In an embodiment of the present application, as shown in Figure 7 the following, the signal generation circuit 20 further includes:

[0127] A level conversion circuit 202, the input end of the level conversion circuit 202 is connected to the second output end of the control circuit 201, and the enable end of the level conversion circuit 202 is connected to the third output end of the control circuit 201. The level conversion circuit 202 is used to perform level conversion on the first level signal output by the control circuit 201 to obtain a second level signal.

[0128] In this embodiment, the level conversion circuit 202 is used to receive an enable signal and a first level signal that are low level sent by the control circuit 201. And when the level conversion circuit 202 is enabled, it converts the first level signal, such as 3.3V, into a second level signal of 5V.

[0129] In an embodiment of the present application, as shown inFigure 7 As shown, the signal generation circuit 20 further includes:

[0130] A driving circuit 203, which is connected to the output end of the level conversion circuit 202, and is used to convert the second-level signal into a driving signal.

[0131] In this embodiment, the driving circuit 203 is used to convert the second-level signal into a driving signal.

[0132] In an embodiment of the present application, as Figure 7 shown, the control end of the level conversion circuit 202 is connected to the first output end of the fault feedback circuit 101, and the signal to be detected is a second-level signal;

[0133] Alternatively, the control end of the driving circuit 201 is connected to the first output end of the fault feedback circuit 101, and the signal to be detected is a driving signal.

[0134] It should be noted that Figure 7 the case where the signal to be detected is a second-level signal is taken as an example for illustration.

[0135] In an embodiment of the present application, as Figure 7 shown, the drive system further includes: an FPC power circuit 204, a CLLC power circuit 205, and a DC power circuit 206, which are respectively connected to the driving circuit.

[0136] In this embodiment, after being driven by the driving signal, the FPC power circuit 204 converts the alternating current of 220VAC or 380VAC output by the 220VAC / 380VAC power supply 30 into direct current to improve the power factor. After being driven by the driving signal, the CLLC power circuit 205 adjusts the voltage of the direct current converted by the FPC power circuit 204 and provides the adjusted direct current to the power battery 40 to charge the power battery 40. The DC power circuit 206 converts the direct current output by the CLLC power circuit 205 into low-voltage direct current and provides it to the storage battery 50 to charge the storage battery 50. Among them, the CLLC power circuit 205 and the PFC power circuit 204 can also work in reverse.

[0137] In an embodiment of the present application, the drive system may specifically be an OBC drive system.

[0138] The present application also provides a vehicle, which includes any one of the drive systems provided in the above drive system embodiments.

[0139] The embodiments of the present application have been described above. The above description is exemplary and not exhaustive, and is also not limited to the disclosed embodiments. Many modifications and variations are obvious to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The choice of terms used herein is intended to best explain the principles of the embodiments, the practical application, or the technical improvements to the technology in the market, or to enable other ordinary skilled persons in the art to understand the embodiments disclosed herein. The scope of the present application is defined by the appended claims.

Claims

1. A protection system (10), characterized in that: include: A fault detection circuit (102), wherein an input end of the fault detection circuit (102) is suitable for being connected to a first output end of a signal generation circuit (20), and the fault detection circuit (102) is used to detect whether a signal to be detected output by the signal generation circuit (20) is normal; A fault feedback circuit (101), wherein a first input end of the fault feedback circuit (101) is connected to an output end of the fault detection circuit (102), and a first output end of the fault feedback circuit (101) is connected to a control end of the signal generation circuit (20), and the fault feedback circuit (101) is used to control the signal generation circuit (20) to stop outputting the signal to be detected when the signal to be detected is abnormal.

2. The protection system according to claim 1, characterized in that: The second output end of the fault feedback circuit (101) is connected to the input end of the signal generating circuit (20), and the fault feedback circuit (101) is further used to feedback the abnormality of the signal to be detected to the signal generating circuit (20) when the signal to be detected is abnormal.

3. The protection system according to claim 2, characterized in that: The second input end of the fault feedback circuit (101) is connected to the second output end of the signal generating circuit (20), and the fault feedback circuit (101) is also used to restore the waiting-to-trigger state when the signal generating circuit (20) indicates restarting.

4. The protection system according to claim 1, characterized in that: The signal generating circuit (20) comprises a group of bridge arms, and the fault detecting circuit (102) comprises: An AND gate logic circuit, wherein the input end of the AND gate logic circuit is respectively connected to the upper bridge arm control end and the lower bridge arm control end of the group of bridge arms to input an upper driving signal of the upper bridge arm and a lower driving signal of the lower bridge arm; The output end of the AND gate logic circuit is connected to the first input end of the fault feedback circuit.

5. The protection system according to claim 1, characterized in that: The signal generating circuit (20) comprises at least two groups of bridge arms, and the fault detection circuit (102) comprises: OR gate logic circuit (1022); and An AND gate logic circuit (1021) corresponding one-to-one to the bridge arms, wherein: For any of the OR gate logic circuits (1022), the input end of the AND gate logic circuit (1021) is respectively connected to the upper bridge arm control end and the lower bridge arm control end of the corresponding bridge arm, so as to input the upper driving signal of the upper bridge arm and the lower driving signal of the lower bridge arm; The input end of the OR gate logic circuit (1022) is respectively connected to the output end of the OR gate logic circuit (1022), and the output end of the OR gate logic circuit (1022) is connected to the input end of the fault feedback circuit (101).

6. The protection system according to claim 4 or 5, characterized in that: The fault feedback circuit (101) comprises: A first resistor (R605), a first capacitor (C603), a first switch (Q602), a second resistor (R608), a second capacitor (C604), and a second switch (Q603), wherein: The first end of the first resistor (R605) serves as the first input end of the fault feedback circuit (101) and is connected to the output end of the fault detection circuit, and the second end of the first resistor (R605) is connected to the first end of the first capacitor (C603); The second end of the first capacitor (C603) is grounded; A first end of the second resistor (R608) is connected to a power supply access terminal, and a second end of the second resistor (R608) is connected to a first end of the second capacitor (C604); The second end of the second capacitor (C604) is connected to the power supply access end; The control end of the first switch (Q602) is connected to the second end of the first resistor (R605), the first end of the first switch (Q602) is connected to the second end of the second resistor (R608), and the second end of the first switch (Q602) is grounded; The control end of the second switch (Q603) is connected to the second end of the second resistor (R608), the first end of the second switch (Q603) serves as the first output end of the fault feedback circuit (101), the first end of the second switch (Q603) is connected to the control end of the signal generating circuit, and the second end of the second switch (Q603) is connected to the power supply access end.

7. The protection system according to claim 6, characterized in that: The fault feedback circuit (101) further comprises: A third resistor (R610), a third capacitor (C605), a third switch (Q604) and a diode, wherein: The third resistor (R610) is connected between the power supply input terminal and the first terminal of the third switch (Q604); The control end of the third switch (Q604) is connected to the second end of the second resistor (R608), the second end of the third switch (Q604) is grounded, and the first end of the third switch (Q604) serves as the second output end of the fault feedback circuit (101), and the first end of the second switch (Q603) is connected to the input end of the signal generating circuit (20); The anode of the diode is connected to the second end of the second resistor (R608), and the cathode of the diode is connected to the first end of the first switch (Q602).

8. The protection system according to claim 7, characterized in that: The second input end of the fault feedback circuit (101) is connected to the first output end of the control circuit of the signal generating circuit (20), and the fault feedback circuit (101) further comprises: a fourth resistor (R603), a fourth capacitor (C602) and a fourth switch (Q601), wherein: The first end of the fourth resistor (R603) serves as the second input end of the fault feedback circuit (101), the first end of the fourth resistor (R603) is connected to the second output end of the signal generating circuit (20), and the second end of the fourth resistor (R603) is connected to the first end of the fourth capacitor (C602); A second end of the fourth capacitor (C602) is grounded; The control end of the fourth switch (Q601) is connected to the second end of the fourth resistor (R603); A first end of the fourth switch (Q601) is connected to a second end of the first resistor (R605), and a second end of the fourth switch (Q601) is grounded.

9. A drive system, characterized in that: The drive system comprises the protection system (10) according to any one of claims 1 to 8, and the drive system further comprises: A signal generating circuit (20), wherein a control end of the signal generating circuit (20) is connected to a first output end of a fault feedback circuit (101) in the protection system (10).

10. The drive system according to claim 9, characterized in that: The signal generating circuit (20) comprises: A control circuit (201), wherein a first input end of the control circuit (201) is connected to a second output end of the fault feedback circuit as a first input end of the signal generating circuit (20), and the control circuit (201) is used to receive feedback from the fault feedback circuit (101) regarding whether the signal to be detected is normal; And / or, the first output end of the control circuit (201) is connected to the second input end of the fault feedback circuit (101), and is used to instruct the fault feedback circuit (101) to restart when the signal to be detected recovers from abnormality to normal.

11. The drive system according to claim 10, characterized in that: The signal generating circuit (20) further comprises: A level conversion circuit (202), wherein an input end of the level conversion circuit (202) is connected to a second output end of the control circuit (201), an enable end of the level conversion circuit (202) is connected to a third output end of the control circuit (201), and the level conversion circuit (202) is used to perform level conversion on a first level signal output by the control circuit (201) to obtain a second level signal.

12. The drive system according to claim 11, characterized in that: The signal generating circuit (20) further comprises: A driving circuit (203), the driving circuit (203) being connected to the output end of the level conversion circuit (202), and the driving circuit (203) being used for converting the second level signal into a driving signal.

13. The drive system according to claim 12, characterized in that: The control end of the level conversion circuit (202) is connected to the first output end of the fault feedback circuit (101), and the signal to be detected is the second level signal; Alternatively, the control end of the drive circuit (203) is connected to the first output end of the fault feedback circuit (101), and the signal to be detected is the drive signal.

14. A vehicle, characterized in that: The vehicle comprises a drive system as claimed in any one of claims 9 to 13.

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