Intelligent lock with external power supply and automatic charging and discharging battery

By designing external power supply and automatic charging and discharging battery functions in smart locks, the problem of existing smart locks requiring frequent battery replacement is solved, flexible power switching and battery management is achieved, and convenience of use and battery life is improved.

CN222996267UActive Publication Date: 2025-06-17北京鸿点科技有限公司
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202422115315.2
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-08-29
Publication Date
2025-06-17
Estimated Expiration
2034-08-29

AI Technical Summary

Technical Problem

Existing smart locks require frequent battery replacement, which is inconvenient to use and cannot meet the needs of external direct power supply.

Method used

A smart lock with external power supply and automatic charging and discharging batteries was designed, using DCDC step-down circuit, LDO step-down circuit, battery charging circuit, power switching circuit, microcontroller and comparator to realize external power supply and automatic battery charging switching.

Benefits of technology

It realizes that the smart lock automatically switches the 7.4V battery power when the external power supply is disconnected or the power supply is insufficient, which improves the flexibility of use and automatically charges when the battery voltage is too low, prevents overcharging and extends battery life.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN222996267U_ABST
    Figure CN222996267U_ABST
Patent Text Reader

Abstract

The utility model discloses an intelligent lock with external power supply and automatic charging and discharging battery, which comprises an intelligent lock body, the intelligent lock body comprises a bottom shell and an upper cover installed on the bottom shell, a circuit board and a 7.4 V battery are fixedly installed on the inner wall of the bottom of the bottom shell, the circuit board is electrically connected with the 7.4 V battery, and the upper cover is electrically connected with the circuit board. The circuit board is provided with a DCDC step-down circuit, an LDO step-down circuit, a battery charging circuit, a power switching circuit, a single-chip microcomputer and a comparator. According to the intelligent lock body, an external power source can be used for directly supplying power, when the external power source is disconnected or power supply is insufficient, the 7.4 V battery is automatically switched to supplement and supply power, the switchable mode is achieved, the use flexibility is improved, when the voltage of the 7.4 V battery is too low, automatic charging can be conducted, automatic power off is conducted after charging is completed, and the intelligent lock is safe and reliable. The function of overcharge protection of the 7.4 V battery is achieved, the battery does not need to be frequently replaced by personnel, and the personnel can use the battery conveniently.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The utility model relates to the technical field of intelligent locks, in particular to an intelligent lock with external power supply and automatic charge and discharge of batteries. Background Technique

[0002] With the development of technology and the popularization of the Internet of Things, intelligent locks have been widely used, and the functions of intelligent locks are also becoming more and more, such as: face recognition, cat's eye function, monitoring, large screen display, etc. With the increase of functions, the power consumption is also increasing. The existing intelligent locks usually install batteries for power supply and do not have the function of external direct power supply. The method of installing batteries for power supply requires frequent battery replacement, which brings inconvenience to use and cannot meet the use requirements. Therefore, we propose an intelligent lock with external power supply and automatic charge and discharge of batteries. Content of the Utility Model

[0003] The purpose of the utility model is to solve the shortcomings existing in the prior art, and to propose an intelligent lock with external power supply and automatic charge and discharge of batteries.

[0004] In order to achieve the above purpose, the utility model adopts the following technical scheme:

[0005] An intelligent lock with external power supply and automatic charge and discharge of batteries, including an intelligent lock body, the intelligent lock body includes a bottom case and an upper cover installed on the bottom case, a circuit board and a 7.4V battery are fixedly installed on the inner wall of the bottom of the bottom case, the circuit board is electrically connected to the 7.4V battery, and a DCDC buck circuit, an LDO buck circuit, a battery charging circuit, a power supply switching circuit, a single-chip microcomputer and a comparator are installed on the circuit board;

[0006] The DCDC buck circuit is electrically connected to the LDO buck circuit, the battery charging circuit and the power supply switching circuit, the 7.4V battery is electrically connected to the battery charging circuit and the power supply switching circuit, the single-chip microcomputer is electrically connected to the 7.4V battery and the battery charging circuit, the single-chip microcomputer is electrically connected to the comparator, and the comparator is electrically connected to the power supply switching circuit.

[0007] Preferably, the DCDC buck circuit includes a chip U1. One end of a capacitor C1 is electrically connected to pin 1 of the chip U1, and the other end of the capacitor C1 is electrically connected to pin 3 of the chip U1. One end of an inductor L1 is also electrically connected to pin 3 of the chip U1. The other end of the inductor L1 is electrically connected to one end of a capacitor C5, one end of a capacitor C4, and one end of a resistor R24. The other end of the resistor R24 is electrically connected to one end of an external power supply indicator LED1. The other end of the external power supply indicator LED1, the other end of the capacitor C4, the other end of the capacitor C5, pin 4 of the chip U1, and pin 9 of the chip U1 are all grounded. One end of a resistor R1 and one end of a resistor R2 are electrically connected to pin 5 of the chip U1. The other end of the resistor R1 is electrically connected to the other end of the inductor L1. The other end of the resistor R2 is grounded. One end of a resistor R3 and one end of a resistor R4 are electrically connected to pin 7 of the chip U1. The other end of the resistor R4 is grounded. The other end of the resistor R3 is electrically connected to one end of a capacitor C2, one end of a capacitor C3, and the negative electrode of a diode D1. The other end of the capacitor C2 and the other end of the capacitor C3 are both grounded. The positive electrode of the diode D1 is electrically connected to an external power supply voltage, and the power supply voltage is 9 - 36V.

[0008] Preferably, the LDO buck circuit includes a chip U4. One end of a capacitor C17 is electrically connected to pin 2 of the chip U4, and the other end of the capacitor C17 is grounded. Pin 2 of the chip U4 is also electrically connected to the other end of the inductor L1. One end of a capacitor C18 is electrically connected to pin 3 of the chip U4, and the other end of the capacitor C18 and pin 1 of the chip U4 are both grounded.

[0009] Preferably, the power supply switching circuit includes a PMOS transistor Q1. One end of a voltage VDD and the negative electrode of a diode D3 are electrically connected to pin 2 of the PMOS transistor Q1. One end of a resistor R6 is electrically connected to pin 1 of the PMOS transistor Q1. Pin 3 of the PMOS transistor Q1 is electrically connected to pin 2 of the chip U4 and the other end of the inductor L1.

[0010] Preferably, the battery charging circuit includes a chip U3. Pin 1, pin 4, pin 5, and pin 16 of the chip U3 are all electrically connected to pin 3 of a PMOS transistor Q1. One end of a capacitor C11 and one end of a capacitor C10 are also electrically connected to pin 1, pin 4, pin 5, and pin 16 of the chip U3. The other end of the capacitor C11 and the other end of the capacitor C10 are both grounded. One end of a resistor R15 is electrically connected to pin 13 of the chip U3. The other end of the resistor R15 is electrically connected to pin 10 of the chip U3. One end of a capacitor C16 is electrically connected to pin 10 of the chip U3. One end of the capacitor C16 is also electrically connected to the other end of the resistor R15. The other end of the capacitor C16 and pin 12 of the chip U3 are both grounded. The other end of the capacitor C16 is also electrically connected to pin 12 of the chip U3. Pin 11, pin 7, and pin 17 of the chip U3 are all grounded. One end of a capacitor C15 and one end of a capacitor C14 are electrically connected to pin 9 of the chip U3. The other end of the capacitor C15 and the other end of the capacitor C14 are both grounded. One end of a capacitor C13, one end of a capacitor C12, and one end of a resistor R14 are electrically connected to pin 8 of the chip U3. The other end of the resistor R14 is electrically connected to pin 9 of the chip U3, one end of the capacitor C15, and one end of the capacitor C14. The other end of the capacitor C13 is electrically connected to the other end of the capacitor C12. The other end of the capacitor C12 and the other end of the capacitor C13 are both grounded. Pin 2 and pin 3 of the chip U3 are both electrically connected to one end of an inductor L2 and the negative electrode of a diode D2. The other end of the inductor L2 is electrically connected to pin 8 of the chip U3. The positive electrode of the diode D2 is grounded. The other end of the resistor R14 is electrically connected to the positive electrode of a diode D3.

[0011] Preferably, the single-chip microcomputer includes a chip U2. One end of a capacitor C6 and one end of a capacitor C7 are electrically connected to pin 1 of the chip U2. The other end of the capacitor C6 and the other end of the capacitor C7 are both grounded. One end of a resistor R9 is electrically connected to pin 3 of the chip U2. The other end of the resistor R9 is electrically connected to one end of a capacitor C9, one end of a resistor R10, and one end of a resistor R8. The other end of the capacitor C9 and the other end of the resistor R10 are both grounded. The other end of the resistor R8 is electrically connected to the other end of the resistor R14. Pin 8 of the chip U2 is grounded. One end of a resistor R7 and one end of a capacitor C8 are electrically connected to pin 6 of the chip U2. The other end of the capacitor C8 is grounded.

[0012] Preferably, the single-chip microcomputer is used to sample the voltage and current of a 7.4V battery, and the sampled voltage and current are transmitted to a comparator for comparison;

[0013] During sampling, a current sampling circuit is required. The current sampling circuit includes operational amplifier chips U5A and U5B. Pin 1 of operational amplifier chip U5A is electrically connected to pin 6 of operational amplifier chip U5B. Pin 7 of operational amplifier chip U5B is electrically connected to the negative electrode of diode D4. The positive electrode of diode D4 is electrically connected to pin 1 of output interface J14. Pin 2 of output interface J14 is grounded. Pin 5 of operational amplifier chip U5B is electrically connected to the sliding end of potentiometer R22. The grounded end of potentiometer R22 is grounded. Pin 4 of operational amplifier chip U5A is grounded. Pin 2 of operational amplifier chip U5A is electrically connected to one end of resistor R21 and one end of resistor R18. The other end of resistor R21 is electrically connected to pin 1 of operational amplifier chip U5A and pin 6 of operational amplifier chip U5B. The other end of resistor R18 is electrically connected to one end of resistor R17. The other end of resistor R17 is electrically connected to pin 2 of NMOS transistor Q3. Pin 1 of NMOS transistor Q3 is electrically connected to pin 3 of digital transistor N1 and one end of resistor R23. Pin 2 of digital transistor N1 is grounded. The other end of resistor R23 is electrically connected to pin 3 of NMOS transistor Q3. Pin 3 of NMOS transistor Q3 and the other end of resistor R23 are electrically connected to one end of resistor R19. The other end of resistor R19 is electrically connected to one end of resistor R20. One end of resistor R20 is electrically connected to pin 3 of operational amplifier chip U5A. The other end of resistor R20 is grounded. Pin 3 of operational amplifier chip U5A is electrically connected to the other end of resistor R19.

[0014] Compared with the existing technology, the beneficial effects of the present utility model are as follows:

[0015] The intelligent lock body disclosed by the present utility model can be directly powered by an external power supply. When the external power supply is disconnected or the power supply is insufficient, it automatically switches to a 7.4V battery for supplementary power supply. The switchable method improves the flexibility of use. Moreover, when the voltage of the 7.4V battery is too low, it can automatically charge and automatically cut off the power after the charging is completed, achieving the function of overcharge protection for the 7.4V battery, eliminating the need for personnel to frequently replace the battery and facilitating personnel to use. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 is a circuit connection block diagram of an intelligent lock with external power supply and automatic charge and discharge of the battery proposed by the present utility model;

[0017] Figure 2 is a structural schematic diagram of an intelligent lock with external power supply and automatic charge and discharge of the battery proposed by the present utility model;

[0018] Figure 3 is a circuit diagram of the DCDC buck circuit of an intelligent lock with external power supply and automatic charge and discharge of the battery proposed by the present utility model;

[0019] Figure 4 The circuit diagram of the LDO buck circuit of an intelligent lock with external power supply and automatic battery charging and discharging proposed by the present utility model;

[0020] Figure 5 The circuit diagram of the power supply switching circuit of an intelligent lock with external power supply and automatic battery charging and discharging proposed by the present utility model;

[0021] Figure 6 The circuit diagram of the battery charging circuit of an intelligent lock with external power supply and automatic battery charging and discharging proposed by the present utility model;

[0022] Figure 7 The circuit diagram of the single-chip microcomputer of an intelligent lock with external power supply and automatic battery charging and discharging proposed by the present utility model;

[0023] Figure 8 The circuit diagram of the current sampling circuit of an intelligent lock with external power supply and automatic battery charging and discharging proposed by the present utility model.

[0024] In the figure: 101, circuit board; 102, 7.4V battery; 103, bottom case; 104, upper cover. Specific embodiments

[0025] Next, the technical solutions in the embodiments of the present utility model will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all of the embodiments.

[0026] Refer to Figure 1-8 , an intelligent lock with external power supply and automatic battery charging and discharging, including an intelligent lock body. The intelligent lock body includes a bottom case 103 and an upper cover 104 installed on the bottom case 103. A circuit board 101 and a 7.4V battery 102 are fixedly installed on the inner wall of the bottom of the bottom case 103. The circuit board 101 is electrically connected to the 7.4V battery 102. A DCDC buck circuit, an LDO buck circuit, a battery charging circuit, a power supply switching circuit, a single-chip microcomputer and a comparator are installed on the circuit board 101;

[0027] The DCDC buck circuit is electrically connected to the LDO buck circuit, the battery charging circuit and the power supply switching circuit. The 7.4V battery 102 is electrically connected to the battery charging circuit and the power supply switching circuit. The single-chip microcomputer is electrically connected to the 7.4V battery 102 and the battery charging circuit. The single-chip microcomputer is electrically connected to the comparator. The comparator is electrically connected to the power supply switching circuit. Among them, the single-chip microcomputer is used to sample the voltage and current of the 7.4V battery 102, and the sampled voltage and current are transmitted to the comparator for comparison;

[0028] In addition, during sampling, a current sampling circuit is required. The current sampling circuit includes operational amplifier chips U5A and U5B. Pin 1 of operational amplifier chip U5A is electrically connected to pin 6 of operational amplifier chip U5B. Pin 7 of operational amplifier chip U5B is electrically connected to the negative electrode of diode D4. The positive electrode of diode D4 is electrically connected to pin 1 of output interface J14. Pin 2 of output interface J14 is grounded. Pin 5 of operational amplifier chip U5B is electrically connected to the sliding end of potentiometer R22. The grounded end of potentiometer R22 is grounded. Pin 4 of operational amplifier chip U5A is grounded. Pin 2 of operational amplifier chip U5A is electrically connected to one end of resistor R21 and one end of resistor R18. The other end of resistor R21 is electrically connected to pin 1 of operational amplifier chip U5A and pin 6 of operational amplifier chip U5B. The other end of resistor R18 is electrically connected to one end of resistor R17. The other end of resistor R17 is electrically connected to pin 2 of NMOS transistor Q3. Pin 1 of NMOS transistor Q3 is electrically connected to pin 3 of digital transistor N1 and one end of resistor R23. Pin 2 of digital transistor N1 is grounded. The other end of resistor R23 is electrically connected to pin 3 of NMOS transistor Q3. Pin 3 of NMOS transistor Q3 and the other end of resistor R23 are electrically connected to one end of resistor R19. The other end of resistor R19 is electrically connected to one end of resistor R20. One end of resistor R20 is electrically connected to pin 3 of operational amplifier chip U5A. The other end of resistor R20 is grounded. Pin 3 of operational amplifier chip U5A is electrically connected to the other end of resistor R19. The on-resistance of NMOS transistor Q3 is approximately 0.03R at 7.4V - 8.6V, resistor R17 = 0.02R, R18 = R19 = 1KR, R20 = R21 = 10,

[0029] I = VGauge * R18 / (R21 * (R17 + RQ3)) = VGauge * 1000 / (10000 * (0.02 + 0.03)) = VGauge * 2, VGauge = I / 2;

[0030] Among them, the DCDC buck circuit includes chip U1. One end of capacitor C1 is electrically connected to pin 1 of chip U1, and the other end of capacitor C1 is electrically connected to pin 3 of chip U1. One end of inductor L1 is also electrically connected to pin 3 of chip U1. The other end of inductor L1 is electrically connected to one end of capacitor C5, one end of capacitor C4, and one end of resistor R24. The other end of resistor R24 is electrically connected to one end of the external power supply indicator LED1. The other end of the external power supply indicator LED1, the other end of capacitor C4, the other end of capacitor C5, pin 4 of chip U1, and pin 9 of chip U1 are all grounded. Pin 5 of chip U1 is electrically connected to one end of resistor R1 and one end of resistor R2. The other end of resistor R1 is electrically connected to the other end of inductor L1. The other end of resistor R2 is grounded. Pin 7 of chip U1 is electrically connected to one end of resistor R3 and one end of resistor R4. The other end of resistor R4 is grounded. The other end of resistor R3 is electrically connected to one end of capacitor C2, one end of capacitor C3, and the cathode of diode D1. The other end of capacitor C2 and the other end of capacitor C3 are both grounded. The anode of diode D1 is electrically connected to an external power supply voltage, and its power supply voltage is 9 - 36V;

[0031] The LDO buck circuit includes chip U4. One end of capacitor C17 is electrically connected to pin 2 of chip U4, and the other end of capacitor C17 is grounded. Pin 2 of chip U4 is also electrically connected to the other end of inductor L1. One end of capacitor C18 is electrically connected to pin 3 of chip U4, and the other end of capacitor C18 and pin 1 of chip U4 are both grounded;

[0032] The power supply switching circuit includes PMOS transistor Q1. Pin 2 of PMOS transistor Q1 is electrically connected to voltage VDD and the cathode of diode D3. Pin 1 of PMOS transistor Q1 is electrically connected to one end of resistor R6. Pin 3 of PMOS transistor Q1 is electrically connected to pin 2 of chip U4 and the other end of inductor L1;

[0033] The battery charging circuit includes chip U3. Pin 1, pin 4, pin 5, and pin 16 of chip U3 are all electrically connected to pin 3 of PMOS transistor Q1. One end of capacitor C11 and one end of capacitor C10 are also electrically connected to pin 1, pin 4, pin 5, and pin 16 of chip U3. The other end of capacitor C11 and the other end of capacitor C10 are both grounded. One end of resistor R15 is electrically connected to pin 13 of chip U3. The other end of resistor R15 is electrically connected to pin 10 of chip U3. One end of capacitor C16 is electrically connected to pin 10 of chip U3. One end of capacitor C16 is also electrically connected to the other end of resistor R15. The other end of capacitor C16 and pin 12 of chip U3 are both grounded. The other end of capacitor C16 is also electrically connected to pin 12 of chip U3. Pin 11, pin 7, and pin 17 of chip U3 are all grounded. One end of capacitor C15 and one end of capacitor C14 are electrically connected to pin 9 of chip U3. The other end of capacitor C15 and the other end of capacitor C14 are both grounded. One end of capacitor C13, one end of capacitor C12, and one end of resistor R14 are electrically connected to pin 8 of chip U3. The other end of resistor R14 is electrically connected to pin 9 of chip U3, one end of capacitor C15, and one end of capacitor C14. The other end of capacitor C13 is electrically connected to the other end of capacitor C12. The other end of capacitor C12 and the other end of capacitor C13 are both grounded. One end of inductor L2 and the negative electrode of diode D2 are electrically connected to pin 2 and pin 3 of chip U3. The other end of inductor L2 is electrically connected to pin 8 of chip U3. The positive electrode of diode D2 is grounded. The other end of resistor R14 is electrically connected to the positive electrode of diode D3;

[0034] The single-chip microcomputer includes chip U2. One end of capacitor C6 and one end of capacitor C7 are electrically connected to pin 1 of chip U2. The other end of capacitor C6 and the other end of capacitor C7 are both grounded. One end of resistor R9 is electrically connected to pin 3 of chip U2. The other end of resistor R9 is electrically connected to one end of capacitor C9, one end of resistor R10, and one end of resistor R8. The other end of capacitor C9 and the other end of resistor R10 are both grounded. The other end of resistor R8 is electrically connected to the other end of resistor R14. Pin 8 of chip U2 is grounded. One end of resistor R7 and one end of capacitor C8 are electrically connected to pin 6 of chip U2. The other end of capacitor C8 is grounded;

[0035] In addition, the battery voltage output pin can be freely set through a shorting cap, and the custom voltage output pin can be adapted to most smart locks on the market currently;

[0036] The intelligent lock body disclosed by the utility model can be directly powered by an external power supply. When the external power supply is disconnected or the power supply is insufficient, it automatically switches to the 7.4V battery 102 for supplementary power supply. The switchable method improves the flexibility of use, and can automatically charge when the voltage of the 7.4V battery 102 is too low, and automatically cut off the power after the charging is completed, achieving the function of overcharge protection for the 7.4V battery 102, without the need for personnel to frequently replace the battery, which is convenient for personnel to use.

[0037] Working principle: During use, the 7.4V battery 102 supplies power to the circuits on the circuit board 101. When the voltage of the external 9 - 36V power supply is connected, the single-chip microcomputer starts to work. The pin 7 of the chip U2 of the single-chip microcomputer outputs a high level, and the pin 13 of the chip U3 of the battery charging circuit is pulled low. At this time, the chip U3 turns off the battery charging. The voltage BAT+ of the 7.4V battery 102 is rectified by voltage division through the resistor R8, resistor R10, and capacitor C9 and then connected to the pin 3 of the chip U2 through the resistor R9 to sample the ADC value of the voltage of the 7.4V battery 102. When the ADC value is calculated to obtain that the voltage of the 7.4V battery 102 is lower than 7.8V through calculation, the pin 7 of the chip U2 outputs a low level, and the chip U3 of the battery charging circuit starts to charge the 7.4V battery 102. When the ADC value is calculated to obtain that the voltage of the 7.4V battery 102 is higher than 8.36V or the charging exceeds 3 hours, the pin 7 of the chip U2 outputs a high level, and the chip U3 turns off the charging of the 7.4V battery 102. By controlling the charging of the 7.4V battery 102 through the single-chip microcomputer, it is possible to prevent the situation that the 7.4V battery 102 is always in the charging state or the battery life is shortened due to overcharging, improve the charging stability, and at the same time, the single-chip microcomputer also samples the current of the 7.4V battery 102;

[0038] When performing current sampling, the specific principle is as follows: The current I passes through the NMOS transistor Q3 and the resistor R17 to obtain a sampling voltage, which is connected to the pin 2 of the operational amplifier chip U5A through the resistor R18. At the same time, the voltage VDD is divided by the resistors R19 and R20 and connected to the pin 3 of the operational amplifier chip U5A. The pin 1 of the operational amplifier chip U5A is feedback-connected to the pin 2 of the operational amplifier chip U5A through the resistor R21, and the 1-pin VGauge of the operational amplifier chip U5A is connected to the pin 2 of the single-chip microcomputer chip U2 for ADC sampling. When the current I exceeds the preset value of 5.5A, VGauge = I / 2 = 2.75V. When the ADC sampling value of the pin 2 of the single-chip microcomputer chip U2 > 2.75V, the pin 5 of the single-chip microcomputer chip U2 outputs a high level, the digital transistor N1 conducts, the pin 1 of the NMOS transistor Q3 is pulled low through the digital transistor N1, and the NMOS transistor Q3 is cut off, and the battery is powered off, thus achieving overcurrent power-off protection. The single-chip microcomputer disconnects the voltage output of the battery charging circuit, thereby further protecting the 7.4V battery 102;

[0039] Meanwhile, the voltage obtained by current sampling passes through a comparator. The specific principle is as follows:

[0040] Pin 1 of the operational amplifier chip U5A is connected to pin 6 of the operational amplifier chip U5B. The voltage VDD passes through the potentiometer R22 to pin 5 of the operational amplifier chip U5B. Adjusting the potentiometer R22 can set the VREF voltage. Pin 7 of the operational amplifier chip U5B is connected to the output interface J14 through the diode D4. When VGauge < VREF, the voltage at pin 7 of the operational amplifier chip U5B is approximately equal to VDD. At this time, the diode D4 is cut off and the voltage of VDD will not be connected to pin 1 of the output interface J14. When VGauge > VREF, pin 7 of the operational amplifier chip U5B outputs a low level, and pin 1 of the output interface J14 is pulled low through the diode D4 to output a low-level signal. When the voltage obtained by current sampling is higher than the reference voltage of the comparator, a low-level signal is output to remind the personnel that there is a fault in the intelligent lock body and maintenance is required.

[0041] When an external voltage is connected, the voltage passes through the DCDC buck circuit. The DCDC buck circuit reduces the voltage to 8.6V. When the 8.6V voltage passes through the LD0 buck circuit, the voltage can be reduced to 3.3V to supply power to the single-chip microcomputer. At the same time, the 8.6V voltage is output through the power supply switching circuit. At the same time, the 8.6V voltage passes through the battery charging circuit. Pin 6 of the chip U3 in the battery charging circuit outputs a low level. At this time, the PMOS transistor Q1 is turned on and VDD = 8.6V voltage. Since the highest voltage of the 7.4V battery 102 is BAT+ = 8.4V, at this time VDD > BAT+, so the diode D3 is not turned on. At this time, the intelligent lock body is powered by an external power supply. However, since the external power supply used to power on the intelligent lock body is mostly within the specification of 2A, but the current of the motor start and stall in the intelligent lock body mostly exceeds 2A. When the external power supply current is insufficient, the VDD voltage will be pulled down. When VDD + 0.1V < BAT+, the diode D3 is turned on. At this time, the 7.4V battery 102 plays a role in continuous current stabilization. When the external power supply is disconnected, pin 6 of the chip U3 in the battery charging circuit outputs a high level D8V6 = 0V. At this time, the PMOS transistor Q1 is cut off. At this time, the intelligent lock body is powered by the 7.4V battery 102, so as to achieve the purpose of supplementary power supply through the 7.4V battery 102 when the external power supply voltage is disconnected or the external power supply is insufficient. The switching method between external power supply and 7.4V battery power supply improves the use flexibility and does not require personnel to often replace the battery, which is convenient for personnel to use.

[0042] The above is only a preferred specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any person skilled in the art within the technical scope disclosed by the present invention, according to the technical solution of the present invention and its inventive concept, makes equivalent substitutions or changes, and all should be covered within the protection scope of the present invention.

Claims

1. A smart lock with external power supply and automatic charging and discharging battery, including a smart lock body, characterized in that: The intelligent lock body comprises a bottom shell (103) and an upper cover (104) mounted on the bottom shell (103); a circuit board (101) and a 7.4V battery (102) are fixedly mounted on the bottom inner wall of the bottom shell (103); the circuit board (101) is electrically connected to the 7.4V battery (102); a DCDC buck circuit, an LDO buck circuit, a battery charging circuit, a power switching circuit, a single-chip microcomputer and a comparator are mounted on the circuit board (101); The DCDC step-down circuit is electrically connected to the LDO step-down circuit, the battery charging circuit and the power switching circuit; the 7.4V battery (102) is electrically connected to the battery charging circuit and the power switching circuit; the single-chip computer is electrically connected to the 7.4V battery (102) and the battery charging circuit; the single-chip computer is electrically connected to the comparator; and the comparator is electrically connected to the power switching circuit.

2. According to claim 1, a smart lock with external power supply and automatic battery charging and discharging, characterized in that: The DCDC step-down circuit includes a chip U1, wherein a pin 1 of the chip U1 is electrically connected to one end of a capacitor C1, and the other end of the capacitor C1 is electrically connected to a pin 3 of the chip U1, and the pin 3 of the chip U1 is also electrically connected to one end of an inductor L1, and the other end of the inductor L1 is electrically connected to one end of a capacitor C5, one end of a capacitor C4 and one end of a resistor R24, and the other end of the resistor R24 ​​is electrically connected to one end of an external power supply indicator LED1, and the other end of the external power supply indicator LED1, the other end of the capacitor C4, the other end of the capacitor C5, the pin 4 of the chip U1 and the pin 5 of the chip U1 are electrically connected to each other. 9 are all grounded, pin 5 of chip U1 is electrically connected to one end of resistor R1 and one end of resistor R2, the other end of resistor R1 is electrically connected to the other end of inductor L1, the other end of resistor R2 is grounded, pin 7 of chip U1 is electrically connected to one end of resistor R3 and one end of resistor R4, the other end of resistor R4 is grounded, the other end of resistor R3 is electrically connected to one end of capacitor C2, one end of capacitor C3 and the cathode of diode D1, the other end of capacitor C2 and the other end of capacitor C3 are both grounded, the anode of diode D1 is electrically connected to an external power supply voltage, and the power supply voltage is 9-36V.

3. According to claim 2, a smart lock with external power supply and automatic battery charging and discharging, characterized in that: The LDO step-down circuit includes a chip U4, wherein pin 2 of the chip U4 is electrically connected to one end of a capacitor C17, and the other end of the capacitor C17 is grounded. Pin 2 of the chip U4 is also electrically connected to the other end of the inductor L1, and pin 3 of the chip U4 is electrically connected to one end of a capacitor C18, and the other end of the capacitor C18 and pin 1 of the chip U4 are both grounded.

4. The smart lock with external power supply and automatic battery charging and discharging according to claim 3, characterized in that: The power switching circuit includes a PMOS tube Q1, a pin 2 of the PMOS tube Q1 is electrically connected to a voltage VDD and a cathode of a diode D3, a pin 1 of the PMOS tube Q1 is electrically connected to one end of a resistor R6, and a pin 3 of the PMOS tube Q1 is electrically connected to a pin 2 of a chip U4 and the other end of an inductor L1.

5. The smart lock with external power supply and automatic battery charging and discharging according to claim 4, characterized in that: The battery charging circuit includes a chip U3, wherein pin 1, pin 4, pin 5 and pin 16 of the chip U3 are all electrically connected to pin 3 of the PMOS tube Q1, pin 1, pin 4, pin 5 and pin 16 of the chip U3 are also electrically connected to one end of a capacitor C11 and one end of a capacitor C10, the other end of the capacitor C11 and the other end of the capacitor C10 are both grounded, pin 13 of the chip U3 is electrically connected to one end of a resistor R15, the other end of the resistor R15 is electrically connected to pin 10 of the chip U3, pin 10 of the chip U3 is electrically connected to one end of a capacitor C16, one end of the capacitor C16 is also electrically connected to the other end of the resistor R15, the other end of the capacitor C16 and pin 12 of the chip U3 are both grounded, the other end of the capacitor C16 is also electrically connected to pin 12 of the chip U3, pin 11, pin 7 and Pin 17 is grounded, pin 9 of chip U3 is electrically connected to one end of capacitor C15 and one end of capacitor C14, and the other end of capacitor C15 and the other end of capacitor C14 are both grounded, pin 8 of chip U3 is electrically connected to one end of capacitor C13, one end of capacitor C12 and one end of resistor R14, the other end of resistor R14 is electrically connected to pin 9 of chip U3, one end of capacitor C15 and one end of capacitor C14, the other end of capacitor C13 is electrically connected to the other end of capacitor C12, and the other end of capacitor C12 and the other end of capacitor C13 are both grounded, pin 2 and pin 3 of chip U3 are electrically connected to one end of inductor L2 and the negative electrode of diode D2, the other end of inductor L2 is electrically connected to pin 8 of chip U3, the positive electrode of diode D2 is grounded, and the other end of resistor R14 is electrically connected to the positive electrode of diode D3.

6. The smart lock with external power supply and automatic battery charging and discharging according to claim 3, characterized in that: The single chip computer includes a chip U2, wherein pin 1 of the chip U2 is electrically connected to one end of a capacitor C6 and one end of a capacitor C7, and the other end of the capacitor C6 and the other end of the capacitor C7 are both grounded, pin 3 of the chip U2 is electrically connected to one end of a resistor R9, and the other end of the resistor R9 is electrically connected to one end of a capacitor C9, one end of a resistor R10 and one end of a resistor R8, and the other end of the capacitor C9 and the other end of the resistor R10 are both grounded, and the other end of the resistor R8 is electrically connected to the other end of a resistor R14, pin 8 of the chip U2 is grounded, pin 6 of the chip U2 is electrically connected to one end of a resistor R7 and one end of a capacitor C8, and the other end of the capacitor C8 is grounded.

7. The smart lock with external power supply and automatic battery charging and discharging according to claim 1, characterized in that: The single chip microcomputer is used to sample the voltage and current of the 7.4V battery (102), and the collected voltage and current are transmitted to the comparator for comparison; During sampling, a current sampling circuit is required, wherein the current sampling circuit includes an op amp chip U5A and an op amp chip U5B, wherein pin 1 of the op amp chip U5A is electrically connected to pin 6 of the op amp chip U5B, pin 7 of the op amp chip U5B is electrically connected to the cathode of the diode D4, the anode of the diode D4 is electrically connected to pin 1 of the output interface J14, pin 2 of the output interface J14 is grounded, pin 5 of the op amp chip U5B is electrically connected to the sliding end of the potentiometer R22, the ground end of the potentiometer R22 is grounded, pin 4 of the op amp chip U5A is grounded, pin 2 of the op amp chip U5A is electrically connected to one end of the resistor R21 and one end of the resistor R18, the other end of the resistor R21 is electrically connected to pin 1 of the op amp chip U5A and pin 2 of the op amp chip U5B Pin 6 is electrically connected, the other end of the resistor R18 is electrically connected to one end of the resistor R17, the other end of the resistor R17 is electrically connected to pin 2 of the NMOS tube Q3, pin 1 of the NMOS tube Q3 is electrically connected to pin 3 of the digital transistor N1 and one end of the resistor R23, pin 2 of the digital transistor N1 is grounded, the other end of the resistor R23 is electrically connected to pin 3 of the NMOS tube Q3, pin 3 of the NMOS tube Q3 and the other end of the resistor R23 are electrically connected to one end of the resistor R19, the other end of the resistor R19 is electrically connected to one end of the resistor R20, one end of the resistor R20 is electrically connected to pin 3 of the operational amplifier chip U5A, the other end of the resistor R20 is grounded, and pin 3 of the operational amplifier chip U5A is electrically connected to the other end of the resistor R19.