Anti-backflow low-power-consumption charge and discharge control circuit

Abstract

The utility model discloses an anti-backflow low-power-consumption charging and discharging control circuit, which comprises a power supply input interface connected with an external power supply, a battery charging circuit connected with the power supply input interface, and a battery unit connected with the battery charging circuit, the battery boosting circuit is connected with the battery unit and is used for boosting the output voltage of the battery; the path switching management circuit is respectively connected with the power supply input interface and the battery boosting circuit and is used for switching control of power supply of an external power supply and power supply of the battery and anti-backflow protection of a battery end; the path switching control and anti-backflow circuit is respectively connected with the power supply input interface and the battery unit, and the path switching management circuit is provided with a first PMOS (P-channel Metal Oxide Semiconductor) tube. According to the utility model, the service life of a low-power-consumption battery product can be prolonged, and voltage is prevented from flowing backward to the battery booster circuit.

Description

Technical Field

[0001] The utility model belongs to the field of battery charging and discharging, and particularly relates to an anti-backflow and low-power consumption charging and discharging control circuit. Background Art

[0002] Currently, for battery charging and discharging circuits, the common components include a power input circuit, a battery charging circuit, a boost circuit, and a path switching management circuit. For example, in a power supply circuit and control device of a controller disclosed in the existing patent CN217010423U announced on July 19, 2022, it includes a supercapacitor bank composed of multiple series-connected supercapacitors, a main power supply circuit, a power-off detection circuit, a charging and discharging control circuit, and a voltage equalization circuit. The main power supply circuit adjusts the output voltage of the external power supply to supply power to the controller as needed; if the power-off detection circuit detects that the output voltage is less than the voltage threshold, it generates an interrupt signal to the controller to trigger the controller to enter the data storage mode; when the external power supply is normally powered, the charging and discharging control circuit uses part of the electrical energy of the external power supply to charge the supercapacitor bank; when the external power supply is powered off, the electrical energy stored in the supercapacitor bank is supplied to the main power supply circuit; the voltage equalization circuit equalizes the voltages of multiple supercapacitors. It can be seen that this application uses supercapacitors as backup power supplies, which have high safety, large capacity, and equalize the voltages of multiple supercapacitors, thereby improving the power supply reliability. For existing patents of this kind, the circuit for path switching is composed of Schottky diodes, and the Schottky diodes are used to prevent current backflow and power supply path switching. There is a certain voltage drop in the diode characteristics, resulting in a loss of P = V * I when the battery energy passes through here. For example, if the battery boost output is 5V and the diode voltage drop is 0.7V, the energy lost here is 0.7 / 5 = 14%. The greater the current, the greater the voltage difference and the more power is wasted. In low-power products, this design will cause a significant reduction in the working duration of the product. Summary of the Utility Model

[0003] The purpose of the utility model is to provide an anti-backflow and low-power consumption charging and discharging control circuit, which can improve the service life of low-power battery products and prevent voltage backflow to the battery boost circuit.

[0004] To achieve this purpose, the present utility model provides an anti-backflow low-power charge and discharge control circuit, which includes a power input interface for connecting to an external power supply, a battery charging circuit connected to the power input interface, and a battery unit connected to the battery charging circuit. It further includes a battery boost circuit connected to the battery unit for boosting the output voltage of the battery, a path switching management circuit respectively connected to the power input interface and the battery boost circuit for path switching management, and a path switching control and anti-backflow circuit for external power supply and battery supply switching control and battery terminal anti-backflow protection. The path switching control and anti-backflow circuit is respectively connected to the power input interface and the battery unit. The path switching management circuit is provided with a first PMOS transistor, the gate terminal of the first PMOS transistor is connected to the output terminal of the path switching control and anti-backflow circuit, the source terminal of the first PMOS transistor is respectively connected to the power input interface and the power supply output terminal, the drain terminal of the first PMOS transistor is connected to the output terminal of the battery boost circuit, and a first diode is provided between the source terminal of the first PMOS transistor and the power input interface.

[0005] Preferably, the path switching control and anti-backflow circuit is provided with a voltage comparator, a fourth MOS transistor, and a fifth MOS transistor. The downward threshold input terminal of the voltage comparator is connected to the power supply output terminal through an eighteenth resistor and is also connected to the ground wire through a twenty-first resistor. The upward threshold input terminal of the voltage comparator is sequentially connected to the power supply output terminal through a twentieth resistor and a seventeenth resistor and is also connected to the ground wire through a twenty-third resistor. The power supply terminal of the voltage comparator is sequentially connected to the power input interface through a sixteenth resistor, a fourth diode, and a fourteenth resistor. The connection terminal between the sixteenth resistor and the fourth diode is also connected to the positive terminal of the battery unit through a fifth diode. The low-effective voltage detection output terminal of the voltage comparator is connected to the gate terminal of the fifth MOS transistor through a twenty-second resistor. The drain terminal of the fifth MOS transistor is connected to the ground wire. The source terminal of the fifth MOS transistor is connected to the power supply output terminal through a nineteenth resistor and the source terminal of the fifth MOS transistor is also connected to the gate terminal of the fourth MOS transistor. The drain terminal of the fourth MOS transistor is connected to the ground wire through a twenty-fourth resistor and is also connected to the source terminal of the fourth MOS transistor through a thirty-eighth capacitor. The source terminal of the fourth MOS transistor is connected to the power supply output terminal.

[0006] Preferably, the connection terminal between the sixteenth resistor and the fourth diode is also connected to a third power supply terminal through a sixth diode. The connection terminal between the fourth diode and the fourteenth resistor is also respectively connected to the ground wire through a fifteenth resistor and a third zener diode.

[0007] Preferably, the battery charging circuit is provided with a battery charger chip, an overcharge protection chip for battery process protection, a first connector for connecting to the battery unit, and a second connector for connecting to a battery temperature detection sensor for detecting the temperature of the battery unit.

[0008] Preferably, a boost chip is provided in the battery boost circuit.

[0009] Preferably, the source terminals of the first PMOS transistor are connected to the ground wire through the fourteenth capacitor, the fifteenth capacitor, the sixteenth capacitor, the seventeenth capacitor, the eighteenth capacitor, and the nineteenth capacitor respectively.

[0010] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0011] In the present invention, by setting up path switching control and anti-backflow circuit to control the switching operation of the path switching management circuit, the switching between external power supply and battery power supply can be carried out quickly, which can greatly increase the usage duration of low-power battery products and prevent voltage from flowing back into the battery boost circuit. In the present invention, the path switching management circuit is provided with a first PMOS transistor, and the internal resistance of the first PMOS transistor is several milliohms, so that the loss caused by the path switching management circuit can be basically ignored. In the present invention, the path switching control and anti-backflow circuit is provided with a voltage comparator to detect the real-time change of the voltage at the power supply output terminal to determine whether to turn on the first PMOS transistor, which can avoid the external power supply voltage from flowing back into the battery boost circuit. In the present invention, the battery boost circuit can boost the output voltage of the battery unit and output it stably, improving the power supply stability. By the present invention, while realizing low power consumption, fast path switching control and anti-backflow function, the battery energy conversion efficiency is improved, and the energy loss during battery power supply is reduced, so that the standby duration of low-power products can be increased. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 is the circuit structure block diagram of the present invention;

[0013] Figure 2 is the circuit structure schematic diagram of the power input interface in the present invention;

[0014] Figure 3 is the circuit structure schematic diagram of the battery charging circuit in the present invention;

[0015] Figure 4 is the circuit structure schematic diagram of the battery boost circuit in the present invention;

[0016] Figure 5 is the circuit structure schematic diagram of the path switching management circuit in the present invention;

[0017] Figure 6 is the circuit structure schematic diagram of the path switching control and anti-backflow circuit in the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0018] The technical solution of the present utility model will be further described in detail below in conjunction with the accompanying drawings, but the protection scope of the present utility model is not limited to the following description.

[0019] As Figure 1-6 shown, the present utility model provides an anti-backflow low-power charge and discharge control circuit, which includes a power input interface 1 for connecting to an external power supply, a battery charging circuit 2 connected to the power input interface 1, and a battery unit 3 connected to the battery charging circuit 2. It also includes a battery boost circuit 4 connected to the battery unit 3 for boosting the output voltage of the battery, a path switching management circuit 5 respectively connected to the power input interface 1 and the battery boost circuit 4, and a path switching control and anti-backflow circuit 6 for external power supply and battery supply switching control and battery terminal anti-backflow protection. The path switching control and anti-backflow circuit 6 is respectively connected to the power input interface 1 and the battery unit 3. The path switching management circuit 5 is provided with a first PMOS transistor Q1. The gate terminal of the first PMOS transistor Q1 is connected to the output terminal of the path switching control and anti-backflow circuit 6. The source terminal of the first PMOS transistor Q1 is respectively connected to the power input interface 1 and the power supply output terminal VDD_SYS. The drain terminal of the first PMOS transistor Q1 is connected to the output terminal of the battery boost circuit 4. A first diode D1 is provided between the source terminal of the first PMOS transistor Q1 and the power input interface 1. The positive terminal of the first diode D1 is connected to the power input interface 1. The battery boost circuit 4 is provided with a boost chip U1.

[0020] In this embodiment, the power input interface 1 is connected to an external DC 12V power supply. The battery unit 3 is a 3.0 - 4.2V rechargeable lithium electrolytic battery, and the battery boost circuit 4 outputs a DC 5V voltage.

[0021] The path switching control and anti-backflow circuit 6 is provided with a voltage comparator U4, a fourth MOS transistor Q4, and a fifth MOS transistor Q5. The downward threshold input terminal of the voltage comparator U4 is connected to the power supply output terminal VDD_SYS through an eighteenth resistor R18 and is also connected to the ground wire through a twenty-first resistor R21. The upward threshold input terminal of the voltage comparator U4 is sequentially connected to the power supply output terminal VDD_SYS through a twentieth resistor R20 and a seventeenth resistor R17 and is also connected to the ground wire through a twenty-third resistor R23. The power supply terminal of the voltage comparator U4 is sequentially connected to the power input interface 1 through a sixteenth resistor R16, a fourth diode D4, and a fourteenth resistor R14. The connection terminal of the sixteenth resistor R16 and the fourth diode D4 is also connected to the positive terminal of the battery unit 3 through a fifth diode D5. The low-effective voltage detection output terminal of the voltage comparator U4 is connected to the gate terminal of the fifth MOS transistor Q5 through a twenty-second resistor R22. The drain terminal of the fifth MOS transistor Q5 is connected to the ground wire. The source terminal of the fifth MOS transistor Q5 is connected to the power supply output terminal VDD_SYS through a nineteenth resistor R19 and the source terminal of the fifth MOS transistor Q5 is also connected to the gate terminal of the fourth MOS transistor Q4. The drain terminal of the fourth MOS transistor Q4 is connected to the ground wire through a twenty-fourth resistor R24 and is also connected to the source terminal of the fourth MOS transistor Q4 through a thirty-eighth capacitor C38. The source terminal of the fourth MOS transistor Q4 is connected to the power supply output terminal VDD_SYS.

[0022] The connection terminal of the sixteenth resistor R16 and the fourth diode D4 is also connected to the third power supply terminal VDD_3V7 through a sixth diode D6. The connection terminals of the fourth diode D4 and the fourteenth resistor R14 are respectively connected to the ground wire through a fifteenth resistor R15 and a third zener diode D3. In this embodiment, the positive terminal of the fourth diode D4 is connected to the fourteenth resistor R14, the positive terminal of the fifth diode D5 is connected to the positive terminal of the battery unit 3, and the positive terminal of the sixth diode D6 is connected to the third power supply terminal VDD_3V7. The third power supply terminal VDD_3V7 can be an external 3.7V DC power supply. The power supply terminal of the voltage comparator U4 is also connected to the ground wire through a thirty-fifth capacitor (C35). The fourth MOS transistor Q4 and the fifth MOS transistor Q5 can both be PMOS transistors.

[0023] The battery charging circuit 2 is provided with a battery charger chip U2, an overcharge protection chip U3 for battery process protection, a first connector J1 for connecting to the battery unit 3, and a second connector J2 for connecting to a battery temperature detection sensor for detecting the temperature of the battery unit 3. The battery temperature detection sensor can be a thermistor sensor.

[0024] The source terminal of the first PMOS transistor Q1 is connected to the ground wire through the fourteenth capacitor C14, the fifteenth capacitor C15, the sixteenth capacitor C16, the seventeenth capacitor C17, the eighteenth capacitor C18, and the nineteenth capacitor C19 respectively.

[0025] In this embodiment, during operation, when the power input interface 1 is connected to an external power supply, the external power supply supplies power to the circuits such as the MCU at the back end through the path switching management circuit 5 and the power supply output terminal VDD_SYS. At the same time, the path switching control and anti-backflow circuit 6 detects the voltage change of the power supply output terminal VDD_SYS in real time. When the external power supply is powered off, if the path switching control and anti-backflow circuit 6 detects in real time that the voltage of the power supply output terminal VDD_SYS is lower than 4.78V, the low-effective voltage detection output terminal of the voltage comparator U4 outputs a low level, causing the fifth MOS transistor Q5 to conduct and the fourth MOS transistor Q4 to cut off, thereby outputting a low level to the first PMOS transistor Q1, causing the first PMOS transistor Q1 to conduct, and the battery unit 3 supplies power through the battery boost circuit 4 and the path switching management circuit 5. When the external power supply is powered on again, if the path switching control and anti-backflow circuit 6 detects in real time that the voltage of the power supply output terminal VDD_SYS is higher than 5.39V, the low-effective voltage detection output terminal of the voltage comparator U4 outputs a high level, causing the fifth MOS transistor Q5 to cut off and the fourth MOS transistor Q4 to conduct, thereby outputting a high level to the first PMOS transistor Q1, causing the first PMOS transistor Q1 to cut off, disconnecting the power supply of the battery unit 3, and the external power supply supplies power again. The entire switching process is at the nanosecond level, realizing low power consumption, fast path switching control, and anti-backflow function, thereby being able to greatly increase the usage duration of low-power battery products and prevent voltage backflow to the battery boost circuit.

[0026] The above is only the preferred embodiment of the present invention. It should be understood that the present invention is not limited to the form disclosed herein, should not be regarded as excluding other embodiments, but can be used in various other combinations, modifications, and environments, and can be changed within the scope conceived herein through the above teachings or the technology or knowledge in related fields. And the changes and modifications made by those skilled in the art without departing from the spirit and scope of the present invention should all be within the protection scope of the appended claims of the present invention.

Claims

1. A low-power charge and discharge control circuit for preventing backflow, comprising a power input interface (1) for connecting to an external power source, a battery charging circuit (2) connected to the power input interface (1), and a battery unit (3) connected to the battery charging circuit (2), characterized in that: The invention also comprises a battery boost circuit (4) connected to the battery unit (3) for boosting the battery output voltage, a path switching management circuit (5) connected to the power input interface (1) and the battery boost circuit (4) respectively, and a path switching control and backflow prevention circuit (6) for controlling the switching between external power supply and battery power supply and protecting the battery end from backflow. The path switching control and backflow prevention circuit (6) is connected to the power input interface (1) and the battery unit (3) respectively. The path switching management circuit (5) is provided with a first PMOS tube (Q1). The gate terminal of the first PMOS tube (Q1) is connected to the output terminal of the path switching control and backflow prevention circuit (6). The source terminal of the first PMOS tube (Q1) is connected to the power input interface (1) and the power supply output terminal (VDD_SYS) respectively. The drain terminal of the first PMOS tube (Q1) is connected to the output terminal of the battery boost circuit (4). A first diode (D1) is provided between the source terminal of the first PMOS tube (Q1) and the power input interface (1).

2. The anti-backflow low-power charge and discharge control circuit according to claim 1, characterized in that: The path switching control and backflow prevention circuit (6) is provided with a voltage comparator (U4), a fourth MOS transistor (Q4) and a fifth MOS transistor (Q5); the down-threshold input end of the voltage comparator (U4) is connected to the power supply output end (VDD_SYS) through an eighteenth resistor (R18) and is also connected to the ground line through a twenty-first resistor (R21); the up-threshold input end of the voltage comparator (U4) is connected to the power supply output end (VDD_SYS) through a twentieth resistor (R20) and a seventeenth resistor (R17) in sequence and is also connected to the ground line through a twenty-third resistor (R23); the power supply end of the voltage comparator (U4) is connected to the power supply input interface (1) through a sixteenth resistor (R16), a fourth diode (D4) and a fourteenth resistor (R14) in sequence; the sixteenth resistor (R16) and the fourth diode (D4) are connected to the power supply input interface (1) in sequence; The connection end of the fifth MOS tube (Q4) is also connected to the positive end of the battery unit (3) through a fifth diode (D5), the low effective voltage detection output end of the voltage comparator (U4) is connected to the gate end of the fifth MOS tube (Q5) through a twenty-second resistor (R22), the drain end of the fifth MOS tube (Q5) is connected to the ground line, the source end of the fifth MOS tube (Q5) is connected to the power supply output end (VDD_SYS) through a nineteenth resistor (R19), and the source end of the fifth MOS tube (Q5) is also connected to the gate end of the fourth MOS tube (Q4), the drain end of the fourth MOS tube (Q4) is connected to the ground line through a twenty-fourth resistor (R24) and is also connected to the source end of the fourth MOS tube (Q4) through a thirty-eighth capacitor (C38), and the source end of the fourth MOS tube (Q4) is connected to the power supply output end (VDD_SYS).

3. The anti-backflow low-power charge and discharge control circuit according to claim 2, characterized in that: The connection end between the sixteenth resistor (R16) and the fourth diode (D4) is also connected to the third power supply end (VDD_3V7) through the sixth diode (D6), and the connection end between the fourth diode (D4) and the fourteenth resistor (R14) is also connected to the ground line through the fifteenth resistor (R15) and the third voltage-stabilizing diode (D3), respectively.

4. The anti-backflow low-power charge and discharge control circuit according to claim 1, characterized in that: The battery charging circuit (2) is provided with a battery charger chip (U2), an overcharge protection chip (U3) for battery process protection, a first connector (J1) for connecting to a battery unit (3), and a second connector (J2) for connecting to a battery temperature detection sensor for detecting the temperature of the battery unit (3).

5. The anti-backflow low-power charge and discharge control circuit according to claim 1, characterized in that: The battery boost circuit (4) is provided with a boost chip (U1).

6. A low-power charge and discharge control circuit for preventing backflow according to claim 1 or 2, characterized in that: The source terminals of the first PMOS tube (Q1) are connected to the ground wire through the fourteenth capacitor (C14), the fifteenth capacitor (C15), the sixteenth capacitor (C16), the seventeenth capacitor (C17), the eighteenth capacitor (C18) and the nineteenth capacitor (C19).

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