Serial port receiving circuit

Abstract

The utility model discloses a serial port receiving circuit, which comprises a main control circuit I, a main control circuit II, a USB (Universal Serial Bus) to serial port circuit, an NMOS (N-channel Metal Oxide Semiconductor) tube Q1, an NMOS tube Q2, a pull-down resistor R2, a pull-down resistor R3 and an upper computer, the main control circuit I and the main control circuit II communicate with each other; the corresponding end of the USB to serial port circuit I is electrically connected with the corresponding end of the main control circuit I and the corresponding end of the main control circuit II through the NMOS tube Q1 and the NMOS tube Q2 respectively, and the other corresponding end of the USB to serial port circuit is also electrically connected with the PC end; wherein the USB to serial port circuit is used for converting serial port communication data of the first main control circuit and the second main control circuit into USB signals and then sending the USB signals to an upper computer. According to the utility model, a single USB to serial port chip and a receiving pin are allowed to be used for simultaneously monitoring serial port communication data between two MCUs, so that the data monitoring process is greatly simplified, and the efficiency of data association and analysis is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of serial communication, and particularly relates to a serial port receiving circuit. Background Art

[0002] In the fields of electronic hardware testing and data communication, serial communication is a fundamental and widely used technology. Serial communication allows devices to exchange data through a simple interface, which is particularly important in embedded systems, industrial control, and computer peripherals. Traditional serial communication methods, such as RS-232, TTL, etc., usually require each communication device to have independent transmit (TX) and receive (RX) pins.

[0003] Description of the prior art:

[0004] Serial communication configuration: In a traditional serial communication system, each device requires at least a pair of TX and RX pins to achieve two-way communication. This means that if we want to monitor the communication between two microcontrollers (MCUs), usually two independent receive pins are needed, with each pin connected to the TX pin of one MCU.

[0005] Monitoring method: In practical applications, such as during debugging or data recording, multiple serial-to-USB adapters are usually required, with each adapter connected to one MCU. In this way, through a host computer (such as a PC), the data sent by each MCU can be monitored separately.

[0006] Software tools: To view and analyze data, each serial port usually requires a separate software tool or application program. These tools can receive data from a specific serial port and display it to the user.

[0007] Problems existing in the prior art:

[0008] Hardware complexity: Communication between multiple MCUs requires multiple sets of TX and RX pins, which increases the hardware complexity and cost.

[0009] Inconvenient software management: Usually when using the computer monitoring software of the host computer, a software needs to be opened for each serial port. This not only occupies a large amount of screen space but also increases the difficulty for users to switch between multiple windows and analyze data.

[0010] Difficulty in data correlation: In scenarios where it is necessary to analyze the data interaction between the two communication parties, users often need to manually correlate data from different serial ports, which is not only inefficient but also error-prone.

[0011] Real-time issue: In high-speed or real-time communication systems, monitoring multiple serial ports may cause delays, affecting the real-time performance and accuracy of data. Content of the Utility Model

[0012] In view of the problems existing in the prior art, the present utility model provides a serial port receiving circuit.

[0013] In order to achieve the above object, the technical solution of the present utility model is as follows:

[0014] The present utility model provides a serial port receiving circuit, including:

[0015] A main control circuit one, a main control circuit two, a USB to serial port circuit, an NMOS transistor Q1, an NMOS transistor Q2, a pull-down resistor R2, a pull-down resistor R3, and a host computer;

[0016] The main control circuit one communicates with the main control circuit two;

[0017] One corresponding end of the USB to serial port circuit is electrically connected to the corresponding ends of the main control circuit one and the main control circuit two through the NMOS transistor Q1 and the NMOS transistor Q2 respectively, and the other corresponding end of the USB to serial port circuit is also electrically connected to the PC end; wherein the USB to serial port circuit is used to convert the serial port communication data of the main control circuit one and the main control circuit two into a USB signal and then send it to the host computer; the NMOS transistor Q1 and the NMOS transistor Q2 are used to control the connection state between the main control circuit one and the main control circuit two and the USB to serial port chip;

[0018] The first end of the pull-down resistor R2 is correspondingly electrically connected to the gate of the NMOS transistor Q1, and is used to set the gate voltage of the NMOS transistor Q1, so as to control the switching state of the NMOS transistor Q1;

[0019] The first end of the pull-down resistor R3 is correspondingly electrically connected to the gate of the NMOS transistor Q2, and is used to set the gate voltage of the NMOS transistor Q2, so as to control the switching state of the NMOS transistor Q2.

[0020] Preferably, the main control circuit one includes an MCU one, and the model of the MCU one is STM32F103.

[0021] Preferably, the main control circuit two includes an MCU two, and the model of the MCU two is STM32F103.

[0022] Preferably, the transmission pin TX of the MCU one is respectively electrically connected to the gate of the NMOS transistor Q1, the first end of the pull-down resistor R2, the source of the NMOS transistor Q2, and the receiving pin RX of the MCU two; the second end of the pull-down resistor R2 is grounded;

[0023] The receiving pin RX of the MCU one is respectively electrically connected to the source of the NMOS transistor Q1, the first end of the pull-down resistor R3, the gate of the NMOS transistor Q2, and the transmission pin TX of the MCU two; the second end of the pull-down resistor R3 is grounded.

[0024] Preferably, the USB-to-serial circuit includes a USB-to-serial chip and a resistor R1; the receiving pin RX of the USB-to-serial chip is electrically connected to the first end of the resistor R1, the drain of the NMOS transistor Q1, and the drain of the NMOS transistor Q2 respectively; the second end of the resistor R1 is connected to the VCC power input terminal.

[0025] Preferably, the model of the USB-to-serial chip is CH341.

[0026] Preferably, the USB end of the USB-to-serial chip is electrically connected to the corresponding end of the host computer through a USB cable.

[0027] Preferably, the host computer includes a PC terminal.

[0028] Adopting the technical solution of the present invention has the following beneficial effects:

[0029] The present invention allows the use of a single USB-to-serial chip and a receiving pin to simultaneously monitor the serial communication data between two MCUs, greatly simplifying the data monitoring process and improving the efficiency of data correlation and analysis. By displaying the data of both communication parties in pairs on the same interface, the present invention not only improves the convenience of data monitoring, but also makes problem analysis and debugging more intuitive and efficient. The present invention realizes the simultaneous monitoring of the communication data of two MCUs by using a single USB-to-serial chip and a receiving pin, greatly reducing the required hardware resources and improving the efficiency of data correlation and analysis; reducing the number of required hardware adapters and connecting wires, effectively reducing the material cost and production cost, and making the entire system more economical and efficient.

[0030] The present invention allows the data of both communication parties to be displayed in pairs on the same interface of the host computer, which not only improves the convenience of data monitoring, but also makes problem analysis and debugging more intuitive and efficient; users do not need to open multiple serial port software to monitor the data of each MCU separately, but only need to view and analyze the communication data of two MCUs through the host computer interface, simplifying the operation process and improving the work efficiency.

[0031] The present invention is applicable to scenarios that require simultaneous monitoring of multiple communication links, such as multi-MCU systems and complex industrial control networks. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 It is a schematic circuit diagram of the present invention. DETAILED DESCRIPTION OF THE INVENTION

[0033] Embodiments of the present utility model will be described in detail below. Examples of the embodiments are shown in the accompanying drawings, where the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to explain the present utility model, and should not be construed as limiting the present utility model.

[0034] In the description of the present utility model, it should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. They are only for the convenience of describing the present utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as limiting the present utility model.

[0035] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the present utility model, "a plurality" means two or more, unless otherwise specifically defined.

[0036] In the present utility model, unless otherwise clearly specified and limited, the terms "mounted", "connected", "coupled", "fixed", etc. should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be directly connected or indirectly connected through an intermediate medium, and it may be the internal communication of two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0037] In the present utility model, unless otherwise clearly specified and limited, the first feature being "above" or "below" the second feature may include the first and second features being in direct contact, or may include the first and second features not being in direct contact but in contact through additional features therebetween. Moreover, the first feature being "above", "over", and "on top of" the second feature includes the first feature being directly above and obliquely above the second feature, or merely indicating that the first feature has a higher horizontal height than the second feature. The first feature being "below", "beneath", and "underneath" the second feature includes the first feature being directly below and obliquely below the second feature, or merely indicating that the first feature has a lower horizontal height than the second feature.

[0038] Refer to Figure 1, the present utility model provides a serial port receiving circuit, including: a main control circuit one, a main control circuit two, a USB to serial port circuit, an NMOS transistor Q1, an NMOS transistor Q2, a pull-down resistor R2, a pull-down resistor R3, and a host computer;

[0039] The main control circuit one communicates with the main control circuit two;

[0040] One corresponding end of the USB to serial port circuit is electrically connected to the corresponding ends of the corresponding main control circuit one and main control circuit two through the NMOS transistor Q1 and the NMOS transistor Q2 respectively, and the other corresponding end of the USB to serial port circuit is also electrically connected to the PC end; wherein the USB to serial port circuit is used to convert the serial port communication data of the main control circuit one and the main control circuit two into a USB signal and then send it to the host computer; the NMOS transistor Q1 and the NMOS transistor Q2 are used to control the connection state between the main control circuit one, the main control circuit two and the USB to serial port chip;

[0041] The first end of the pull-down resistor R2 is electrically connected to the gate of the NMOS transistor Q1 correspondingly, and is used to set the gate voltage of the NMOS transistor Q1, so as to control the switching state of the NMOS transistor Q1;

[0042] The first end of the pull-down resistor R3 is electrically connected to the gate of the NMOS transistor Q2 correspondingly, and is used to set the gate voltage of the NMOS transistor Q2, so as to control the switching state of the NMOS transistor Q2.

[0043] Further, the main control circuit one includes an MCU one, and the model of the MCU one is STM32F103; the main control circuit two includes an MCU two, and the model of the MCU two is STM32F103; using the STM32F103 MCU can accelerate the data processing and transmission speed, thereby improving the communication efficiency between the main control circuit one and the main control circuit two; the high performance and versatility of the STM32F103 MCU reduce the need for additional hardware, which helps to reduce the manufacturing and maintenance costs of the entire serial port receiving circuit system; the high reliability and stability of the STM32F103 MCU ensure that the main control circuit one and the main control circuit two can operate stably under various working conditions, reducing the risk of system failures.

[0044] Further, the transmission pin TX of the MCU one is electrically connected to the gate of the NMOS transistor Q1, the first end of the pull-down resistor R2, the source of the NMOS transistor Q2, and the receiving pin RX of the MCU two respectively; the second end of the pull-down resistor R2 is grounded;

[0045] Further, the receiving pin RX of MCU 1 is electrically connected to the source electrode of NMOS transistor Q1, the first end of pull-down resistor R3, the gate electrode of NMOS transistor Q2, and the transmitting pin TX of MCU 2 respectively; the second end of the pull-down resistor R3 is grounded. By precisely controlling the sending and receiving of data between MCU 1 and MCU 2, the reliability of communication between the two MCUs is improved; by using NMOS transistors for signal control, the noise and interference on the signal line are reduced, and the signal integrity is enhanced. This circuit design allows bidirectional communication between the two MCUs, increasing the flexibility and application scope of the system. The combination of using NMOS transistors and pull-down resistors simplifies the circuit design, reduces the number of external components required, and lowers the system cost; the use of the pull-down resistor ensures the stability of the circuit when there is no data transmission and reduces the possibility of misoperation.

[0046] Further, the USB-to-serial circuit includes a USB-to-serial chip and resistor R1; the receiving pin RX of the USB-to-serial chip is electrically connected to the first end of resistor R1, the drain electrode of NMOS transistor Q1, and the drain electrode of NMOS transistor Q2 respectively; the second end of resistor R1 is connected to the VCC power input terminal; the model of the USB-to-serial chip is CH341. The main function of the USB-to-serial chip (such as CH341) is to convert the data of the USB interface into serial data, which allows USB devices to communicate with traditional devices using serial communication; resistor R1 acts as a pull-up resistor in the circuit, connecting to the drain electrodes of NMOS transistors Q1 and Q2, providing a stable level for the signal, and ensuring the integrity of the data signal during the conversion process; the CH341 chip usually has a level conversion function, which can convert the logic level of USB into the logic level used by the MCU or other devices, ensuring compatibility between different devices. The combined use of the pull-up resistor R1 and the CH341 chip provides a stable power supply and signal path, enhancing the stability of the entire system.

[0047] Further, the USB end of the USB-to-serial chip is electrically connected to the corresponding end of the host computer through a USB cable; the host computer includes a PC end; through the connection of the USB cable, the USB-to-serial chip can communicate with the PC end for data transmission and reception; using a standard USB cable simplifies the connection method between the circuit and the host computer, making the device easy to install and use, and taking advantage of the USB interface commonly available on the PC end without the need for additional hardware adapters or interface cards.

[0048] The working principle of the present utility model is as follows:

[0049] When MCU 1 (U1) sends data to MCU 2 (U2): The TX pin of U2 is at a high level, and the RX of U1 is used as an input and follows the level of the TX pin of U2, which is also at a high level.

[0050] When U1's TX transmits data 1, the voltage VGS across the G and S terminals of Q2 is 0, and the voltage VGS across the G and S terminals of Q1 is 0. Therefore, Q1 and Q2 will turn off, and thus the RX pin of U3 is at a high level.

[0051] When U1's TX pin transmits data 0, the voltage VGS across the G and S terminals of Q2 is VCC, and the voltage VGS across the G and S terminals of Q1 is -VCC. Therefore, Q2 conducts and Q1 turns off, and the RX pin of U3 becomes a low level of 0.

[0052] The situation where U2 sends data to U1: The TX pin of U1 is at a high level. The RX of U2 is used as an input and follows the level of U1's TX pin, which is also at a high level.

[0053] When U2's TX transmits data 1, the voltage VGS across the G and S terminals of Q1 is 0, and the voltage VGS across the G and S terminals of Q2 is 0. Therefore, Q1 and Q2 will turn off, and thus the RX pin of U3 is at a high level.

[0054] When U2's TX pin transmits data 0, the voltage VGS across the G and S terminals of Q1 is VCC, and the voltage VGS across the G and S terminals of Q2 is -VCC. Therefore, Q1 conducts and Q2 turns off, and the RX pin of U3 becomes a low level of 0.

[0055] The above are only the preferred embodiments of the present invention, and do not limit the patent scope of the present invention accordingly. All equivalent structural transformations made under the inventive concept of the present invention by using the content of the specification and drawings of the present invention, or directly / indirectly applied in other related technical fields are included in the patent protection scope of the present invention.

Claims

1. A serial port receiving circuit, characterized in that: include: Main control circuit 1, main control circuit 2, USB to serial port circuit, NMOS tube Q1, NMOS tube Q2, pull-down resistor R2, pull-down resistor R3, host computer; The main control circuit 1 and the main control circuit 2 communicate with each other; The corresponding end of the USB to serial port circuit 1 is electrically connected to the corresponding end of the main control circuit 1 and the main control circuit 2 through the NMOS tube Q1 and the NMOS tube Q2, and the other corresponding end of the USB to serial port circuit is also electrically connected to the PC end; wherein the USB to serial port circuit is used to convert the serial port communication data of the main control circuit 1 and the main control circuit 2 into a USB signal and then send it to the host computer; the NMOS tube Q1 and the NMOS tube Q2 are used to control the connection state between the main control circuit 1, the main control circuit 2 and the USB to serial port chip; The first end of the pull-down resistor R2 is electrically connected to the gate of the NMOS transistor Q1 and is used to set the gate voltage of the NMOS transistor Q1, thereby controlling the switching state of the NMOS transistor Q1; The first end of the pull-down resistor R3 is electrically connected to the gate of the NMOS transistor Q2 and is used to set the gate voltage of the NMOS transistor Q2, thereby controlling the switching state of the NMOS transistor Q2.

2. The serial port receiving circuit according to claim 1, characterized in that: The main control circuit 1 includes MCU 1, and the model of MCU 1 is STM32F103.

3. The serial port receiving circuit according to claim 2, characterized in that: The main control circuit 2 includes MCU 2, and the model of MCU 2 is STM32F103.

4. The serial port receiving circuit according to claim 3, characterized in that: The transmitting pin TX of the MCU 1 is electrically connected to the gate of the NMOS tube Q1, the first end of the pull-down resistor R2, the source of the NMOS tube Q2, and the receiving pin RX of the MCU 2 respectively; the second end of the pull-down resistor R2 is grounded; The receiving pin RX of the MCU 1 is electrically connected to the source of the NMOS tube Q1, the first end of the pull-down resistor R3, the gate of the NMOS tube Q2, and the sending pin TX of the MCU 2 respectively; the second end of the pull-down resistor R3 is grounded.

5. The serial port receiving circuit according to claim 4, characterized in that: The USB to serial port circuit includes a USB to serial port chip and a resistor R1; a receiving pin RX of the USB to serial port chip is electrically connected to a first end of the resistor R1, a drain of an NMOS tube Q1, and a drain of an NMOS tube Q2 respectively; and a second end of the resistor R1 is connected to a VCC power supply input terminal.

6. The serial port receiving circuit according to claim 5, characterized in that: The model of the USB to serial port chip is CH341.

7. The serial port receiving circuit according to claim 6, characterized in that: The USB end of the USB-to-serial port chip is electrically connected to the corresponding end of the host computer through a USB line.

8. The serial port receiving circuit according to claim 7, characterized in that: The host computer includes a PC.

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