High-speed hard disk transmission device supporting SATA and NVME protocols

Abstract

The utility model discloses a high-speed transmission hard disk device supporting SATA (Serial Advanced Technology Attachment) and NVME (Non-Volatile Memory) protocols, which comprises a box body, and an SATA-NVME protocol circuit, a POWER circuit, an SFF-8639 interface circuit, an EPPROM (Ethernet Programmable Read Only Memory) circuit and a BACKUP circuit are arranged in the box body; the SATA-NVME protocol circuit comprises two 91302-32-067 RDM modules, a plurality of protection conductors are connected to pins of the 91302-32-067 RDM modules, the pins of the 91302-32-067 RDM modules are connected in parallel and grounded, a first resistor protection circuit is connected to the pin on the left side of the 91302-32-067 RDM modules, FR107 diodes are connected to the pins of the two 91302-32-067 RDM modules, and a second resistor protection circuit is connected to the pin on the right side of the 91302-32-067 RDM modules. And the two FR107 diodes are electrically connected with each other. Compared with an existing device only supporting a single protocol, the device provided by the utility model is more universal, so that the cost of the device can be reduced, and the test efficiency can be improved.

Description

Technical Field

[0001] The utility model relates to the technical field of hard disk enclosures, and specifically to a device for high-speed transmission hard disks that supports SATA and NVME protocols. Background Technique

[0002] A hard disk is a commonly used data storage device, which is a non-volatile memory based on a hard rotating disk platter and is the main storage device of a computer. With the development of technology, servers need to externally connect more and more SSDs, whether it is SATA SSD or NVME SSD. Therefore, when manufacturing servers, more hard disk enclosures are required for testing. The existing hard disk enclosures for externally connected SSD functions to assist in testing servers only support the SATA protocol or the NVME protocol singly, and cannot support both the SATA and NVME protocols simultaneously, resulting in reduced testing convenience and increased testing costs. Content of the Utility Model

[0003] The purpose of the utility model is to provide a device for high-speed transmission hard disks that supports SATA and NVME protocols, so as to solve the problems raised in the above background technique.

[0004] To achieve the above purpose, the utility model provides the following technical solutions:

[0005] The utility model provides a device for high-speed transmission hard disks that supports SATA and NVME protocols, including a box body, and a SATA-NVME protocol circuit, a POWER circuit, an SFF-8639 interface circuit, an EPPROM circuit, and a BACKUP circuit are arranged inside the box body;

[0006] The SATA-NVME protocol circuit includes two 91302-32-067RDM modules. A plurality of protective conductors are connected to the pins of the 91302-32-067RDM module. A plurality of pins of the 91302-32-067RDM module are connected in parallel to each other and grounded. A first resistor protection circuit is connected to the pins on the left side of the 91302-32-067RDM module. FR107 diodes are connected to the pins of both 91302-32-067RDM modules. The two FR107 diodes are electrically connected. The pins on the left side of both 91302-32-067RDM modules are connected to the 3V3 power supply terminal, and the 3V3 power supply terminal on the 91302-32-067RDM module located on the right side is grounded.

[0007] Preferably, the BACKUP circuit includes an NC circuit and an LED indication circuit. The NC circuit includes resistor R11 and resistor R31. Resistor R11 and resistor R31 are connected in parallel and grounded. A switch SW1 is connected between resistor R11 and resistor R31. The LED indication circuit includes LED1 indicator. One pin of LED1 indicator is connected to resistor R27. The other pin of resistor R27 is connected to a 3V power supply. The other pin of LED1 indicator is grounded.

[0008] Preferably, the POWER circuit includes a voltage regulator chip MP2482DN-LF-P. Multiple voltage regulators grounded are connected to the pins of the voltage regulator chip.

[0009] Preferably, the SFF-8639 interface circuit includes a SATA-68P module. Multiple PERs and PETs are connected to the pins of the SATA-68P module. Multiple PERs and PETs are all grounded. P13, P14, and P15 pins of the SATA-68P module are connected to the same 12V port.

[0010] Preferably, the EPPROM circuit includes a timer circuit and four NC circuits. The timer circuit includes timer chip U2. The 1st, 2nd, and 3rd pins of timer chip U2 are all connected to the anode. The 4th pin of timer chip U2 is grounded. The 5th and 6th pins of timer chip U2 are respectively connected to resistor R28 and R29. C13 is connected to the 8th pin of timer chip U2.

[0011] Compared with the prior art, the beneficial effects of the present utility model are:

[0012] By providing the SATA-NVME protocol circuit, POWER circuit, SFF-8639 interface circuit, EPPROM circuit, and BACKUP circuit, the device for high-speed transmission hard disks can be compatible with SATA and NVME protocols, so as to be able to test SSDs with SATA protocol and SSDs with NVME protocol. It is more general than the existing devices that only support a single protocol, thus being able to reduce the cost of the device and improve the test efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is the overall structural schematic diagram of the present utility model;

[0014] Figure 2 is the circuit diagram of the SATA-NVME protocol circuit in the present utility model;

[0015] Figure 3 is the circuit diagram of the SFF-8639 interface circuit in the present utility model;

[0016] Figure 4 This is the circuit diagram of the EPPROM circuit in the present utility model;

[0017] Figure 5 This is the circuit diagram of the POWER circuit in the present utility model;

[0018] Figure 6 This is the circuit diagram of the BACKUP circuit in the present utility model. Specific embodiments

[0019] Next, the technical solutions in the embodiments of the present utility model will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all of the embodiments. Based on the embodiments in the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present utility model.

[0020] Please refer to Figure 1-6 , the present utility model provides a device for a high-speed transmission hard disk supporting SATA and NVME protocols, including a box body, wherein a SATA-NVME protocol circuit, a POWER circuit, an SFF-8639 interface circuit, an EPPROM circuit and a BACKUP circuit are arranged in the box body;

[0021] The SATA-NVME protocol circuit includes two 91302-32-067RDM modules. A plurality of protection conductors are connected to the pins of the 91302-32-067RDM module. A plurality of pins of the 91302-32-067RDM module are connected in parallel and grounded. A first resistor protection circuit is connected to the pins on the left side of the 91302-32-067RDM module. FR107 diodes are connected to the pins of both 91302-32-067RDM modules. The two FR107 diodes are electrically connected. The pins on the left side of both 91302-32-067RDM modules are connected to the 3V3 power supply terminal. The 3V3 power supply terminal on the 91302-32-067RDM module located on the right side is grounded.

[0022] The BACKUP circuit includes an NC circuit and an LED indication circuit. The NC circuit includes a resistor R11 and a resistor R31. The resistor R11 and the resistor R31 are connected in parallel and grounded. A switch SW1 is connected between the resistor R11 and the resistor R31. The LED indication circuit includes an LED1 indicator light. One pin of the LED1 indicator light is connected to a resistor R27. The other pin of the resistor R27 is connected to a 3V power supply. The other pin of the LED1 indicator light is grounded.

[0023] The POWER circuit includes a voltage regulator chip MP2482DN-LF-P, and a plurality of grounded voltage regulators are connected to the pins of the voltage regulator chip.

[0024] The SFF-8639 interface circuit includes a SATA-68P module. A plurality of PERs and PETs are connected to the pins of the SATA-68P module, and a plurality of the PERs and PETs are all grounded. The P13, P14, and P15 pins of the SATA-68P module are connected to the same 12V port.

[0025] The EPPROM circuit includes a timer circuit and four NC circuits. The timer circuit includes a timer chip U2. The 1st, 2nd, and 3rd pins of the timer chip U2 are all connected to the anode. The 4th pin of the timer chip U2 is grounded. A resistor R28 and a resistor R29 are respectively connected to the 5th and 6th pins of the timer chip U2, and a C13 is connected to the 8th pin of the timer chip U2.

[0026] Working principle: The device for high-speed transmission hard disks can be compatible with the SATA and NVME protocols, so as to be able to test SSDs with the SATA protocol and SSDs with the NVME protocol. It is more general than the existing devices that only support a single protocol, thus being able to reduce the cost of the device and improve the test efficiency.

[0027] It should be noted that in this article, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device.

[0028] Although the embodiments of the present invention have been shown and described, for those of ordinary skill in the art, it can be understood that various changes, modifications, substitutions and variations can be made to these embodiments without departing from the principle and spirit of the present invention. The scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. A device for high-speed transmission of hard disks supporting SATA and NVME protocols, comprising a box body, characterized in that: The box body is provided with a SATA-NVME protocol circuit, a POWER circuit, an SFF-8639 interface circuit, an EPPROM circuit and a BACKUP circuit; The SATA-NVME protocol circuit includes two 91302-32-067RDM modules, and multiple protection conductors are connected to the pins of the 91302-32-067RDM modules. The multiple pins of the 91302-32-067RDM modules are connected in parallel and grounded. The pins on the left side of the 91302-32-067RDM module are connected to a first resistance protection circuit. The pins of the two 91302-32-067RDM modules are both connected to FR107 diodes, and the two FR107 diodes are electrically connected. The pins on the left side of the two 91302-32-067RDM modules are both connected to the 3V3 power supply terminal, and the 3V3 power supply terminal on the 91302-32-067RDM module on the right side is grounded.

2. The device for high-speed transmission hard disk supporting SATA and NVME protocols according to claim 1, characterized in that: The BACKUP circuit includes an NC circuit and an LED indication circuit, the NC circuit includes a resistor R11 and a resistor R31, the resistor R11 and the resistor R31 are connected in parallel and grounded, a switch SW1 is connected between the resistor R11 and the resistor R31, the LED indication circuit includes an LED1 indicator light, one pin of the LED1 indicator light is connected to a resistor R27, the other pin of the resistor R27 is connected to a 3V power supply, and the other pin of the LED1 indicator light is grounded.

3. The device for high-speed transmission hard disk supporting SATA and NVME protocols according to claim 2, characterized in that: The POWER circuit includes a voltage stabilizing chip MP2482DN-LF-P, and a plurality of grounded voltage stabilizers are connected to the pins of the voltage stabilizing chip.

4. The device for high-speed transmission hard disk supporting SATA and NVME protocols according to claim 3, characterized in that: The SFF-8639 interface circuit includes a SATA-68P module, a plurality of PERs and PETs are connected to the pins of the SATA-68P module, the plurality of PERs and PETs are all grounded, and the P13, P14 and P15 pins of the SATA-68P module are connected to the same 12V port.

5. The device for high-speed transmission hard disk supporting SATA and NVME protocols according to claim 4, characterized in that: The EPPROM circuit includes four NC circuits of the timer circuit, and the timer circuit includes a timer chip U2. Pins 1, 2 and 3 of the timer chip U2 are all connected to the anode, pin 4 of the timer chip U2 is grounded, pins 5 and 6 of the timer chip U2 are respectively connected to resistors R28 and R29, and pin 8 of the timer chip U2 is connected to C13.

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