Heterojunction solar cell and photovoltaic module
By setting an N-type carbon doped polysilicon layer on the back of the silicon substrate of a heterojunction solar cell and an intrinsic hydrogenated amorphous silicon carbide layer and a p-type hydrogenated microcrystalline silicon carbide layer on the front, the problem of insufficient bandwidth is solved, and battery efficiency is improved and cost reduction is achieved.
Patent Information
- Application Number
- CN202422138121.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-30
- Publication Date
- 2025-07-11
- Estimated Expiration
- 2034-08-30
AI Technical Summary
The bandwidth of existing heterojunction solar cells is limited, and how to effectively increase the bandwidth of the bandwidth has become an urgent problem.
An N-type doped polysilicon layer is provided as the first doped layer on the back of the silicon substrate, and an intrinsic hydrogenated amorphous silicon carbide layer and a p-type hydrogenated microcrystalline silicon carbide layer are provided on the front. By controlling the thickness relationship of each layer, T1=(0.1-1)*(T3+T4-T2) is satisfied to increase the bandwidth of the band gap.
Effectively increase the bandwidth of the bandage, improve battery efficiency, reduce negative impacts of optical performance, reduce surface composite, reduce equipment costs, and improve battery life.
Smart Images
Figure CN223094139U_ABST
Abstract
Description
Technical Field
[0001] This application relates to the technical field of solar cells, and more particularly, to a heterojunction solar cell and a photovoltaic module. Background Art
[0002] The crystalline silicon heterojunction solar cell (HJT) is made by depositing an amorphous silicon thin film on crystalline silicon. It combines the advantages of crystalline silicon cells and thin film cells, and has the advantages of simple structure, low process temperature, good passivation effect, bifacial power generation, high open circuit voltage or good temperature characteristics.
[0003] Currently, the bandgap of the heterojunction solar cell made by depositing an amorphous silicon thin film on crystalline silicon is limited. How to effectively increase the bandgap of the heterojunction solar cell has become an urgent problem to be solved. Summary of the Utility Model
[0004] The purpose of this application includes, for example, providing a heterojunction solar cell and a photovoltaic module that can effectively increase the bandgap.
[0005] The embodiments of this application can be implemented as follows:
[0006] In a first aspect, an embodiment of this application provides a heterojunction solar cell, which includes a silicon substrate, a first passivation layer, a second passivation layer, a first doping layer, and a second doping layer. The first passivation layer and the first doping layer are sequentially disposed on the back surface of the silicon substrate, and the second passivation layer and the second doping layer are sequentially disposed on the front surface of the silicon substrate. Among them, the first doping layer is an N-type carbon-doped polysilicon layer.
[0007] Optionally, the thickness relationship among the first passivation layer, the first doping layer, the second passivation layer, and the second doping layer satisfies:
[0008] T1 = (0.1 - 1) * (T3 + T4 - T2);
[0009] Wherein, T1 is the thickness of the first passivation layer, T2 is the thickness of the first doping layer, T3 is the thickness of the second passivation layer, and T4 is the thickness of the second doping layer.
[0010] Optionally, the first passivation layer is a silicon dioxide layer, and the thickness of the first passivation layer is 0.8 - 5 nm.
[0011] Optionally, the thickness of the first doping layer is 30 - 60 nm.
[0012] Optionally, the second passivation layer is an intrinsic hydrogenated amorphous silicon carbide layer, and the thickness of the second passivation layer is 5 - 10 nm.
[0013] Optionally, the second doped layer is a p-type hydrogenated microcrystalline silicon carbide layer, and the thickness of the second doped layer is 15 - 45 nm.
[0014] Optionally, a first conductive film layer is disposed on a side of the first doped layer away from the first passivation layer, and a second conductive film layer is disposed on a side of the second doped layer away from the second passivation layer.
[0015] Optionally, the thickness of the first conductive film layer is 80 - 170 nm, the thickness of the second conductive film layer is 70 - 150 nm, and the thickness of the first conductive film layer is greater than that of the second conductive film layer.
[0016] Optionally, the thickness of the silicon substrate is 80 - 180 μm, and the resistivity of the silicon substrate is 0.1 - 10 Ω·cm.
[0017] In a second aspect, an embodiment of the present application further provides a photovoltaic module, which includes a battery string and encapsulation adhesive films respectively disposed on two sides of the battery string. The battery string includes a plurality of the heterojunction solar cells, and the plurality of heterojunction solar cells are connected in series in sequence.
[0018] The beneficial effects of the heterojunction solar cell provided by the embodiment of the present application include, for example: in order to effectively increase the band gap, a heterojunction solar cell is designed. The heterojunction solar cell includes a silicon substrate, a first doped layer, a second doped layer, a first passivation layer, and a second passivation layer. The first passivation layer and the first doped layer are sequentially disposed on the back surface of the silicon substrate, and the second passivation layer and the second doped layer are sequentially disposed on the front surface of the silicon substrate. Among them, the first doped layer is an N-type carbon-doped polysilicon layer, the first passivation layer is a silicon dioxide layer, the second passivation layer is an intrinsic hydrogenated amorphous silicon carbide layer, and the second doped layer is a p-type hydrogenated microcrystalline silicon carbide layer. By sequentially disposing a silicon dioxide layer and an N-type carbon-doped polysilicon layer on the back surface of the silicon substrate, and sequentially disposing an intrinsic hydrogenated amorphous silicon carbide layer and a p-type hydrogenated microcrystalline silicon carbide layer on the front surface of the silicon substrate, the band gap can be effectively increased to ensure the battery efficiency.
[0019] The beneficial effects of the photovoltaic module provided by the embodiment of the present application are substantially the same as those of the heterojunction solar cell, and will not be elaborated here. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings required in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as limiting the scope. For those of ordinary skill in the art, other related drawings can be obtained based on these drawings without creative efforts.
[0021] Figure 1This is a schematic structural diagram of the heterojunction solar cell in the embodiments of the present application.
[0022] Icon: 1 - silicon substrate; 2 - first passivation layer; 3 - second passivation layer; 4 - first doping layer; 5 - second doping layer; 6 - first conductive film layer; 7 - second conductive film layer; 8 - first metal electrode; 9 - second metal electrode. Detailed implementation manners
[0023] To make the objectives, technical solutions, and advantages of the embodiments of the present application clearer, the following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are some, but not all, of the embodiments of the present application. Usually, the components of the embodiments of the present application described and illustrated in the accompanying drawings here can be arranged and designed in various different configurations.
[0024] Therefore, the following detailed description of the embodiments of the present application provided in the accompanying drawings is not intended to limit the scope of the present application claimed, but merely represents the selected embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present application without making creative efforts fall within the scope of protection of the present application.
[0025] It should be noted that similar reference numerals and letters denote similar items in the following drawings. Therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings.
[0026] In the description of the present application, it should be noted that if terms such as "upper", "lower", "inner", "outer", etc. are used to indicate the orientation or positional relationship, it is based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the utility model product is usually placed during use. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present application.
[0027] In addition, if terms such as "first" and "second" are only used for distinguishing descriptions, they cannot be understood as indicating or implying relative importance.
[0028] It should be noted that the features in the embodiments of the present application can be combined with each other without conflict.
[0029] The inventors of the present application have found that currently, the band gap of the heterojunction solar cell made by depositing amorphous silicon thin film on crystalline silicon is not large. How to effectively increase the band gap of the heterojunction solar cell has become an urgent problem to be solved. The embodiments of the present application provide a heterojunction solar cell, which is at least used to solve this technical problem.
[0030] Please refer to Figure 1 , the heterojunction solar cell provided by the embodiment of the present application includes a silicon substrate 1, a first passivation layer 2, a second passivation layer 3, a first doping layer 4, and a second doping layer 5. The first passivation layer 2 and the first doping layer 4 are sequentially disposed on the back surface of the silicon substrate 1, and the second passivation layer 3 and the second doping layer 5 are sequentially disposed on the front surface of the silicon substrate 1. Among them, the first doping layer 4 is an N-type carbon-doped polysilicon layer. By disposing an N-type carbon-doped polysilicon layer on the side of the first passivation layer 2 away from the silicon substrate 1 as the first doping layer 4, the N-type carbon-doped polysilicon layer can effectively increase the bandgap width.
[0031] It should be noted that the N-type carbon-doped polysilicon layer (Poly-SiC(n+)) is formed by depositing an N-type doping layer (a-SiC:H(n+)) on the first passivation layer 2 on the back surface of the silicon substrate 1 and then performing a high-temperature annealing treatment. The N-type carbon-doped polysilicon layer on the back surface of the silicon substrate 1 can significantly reduce the negative impact on the optical performance due to being formed on the backlight side.
[0032] In some embodiments, the thickness relationship among the first passivation layer 2, the first doping layer 4, the second passivation layer 3, and the second doping layer 5 satisfies:
[0033] T1 = (0.1 - 1) * (T3 + T4 - T2);
[0034] wherein, T1 is the thickness of the first passivation layer 2, T2 is the thickness of the first doping layer 4, T3 is the thickness of the second passivation layer 3, and T4 is the thickness of the second doping layer 5.
[0035] Exemplarily, the thickness relationship among the first passivation layer 2, the first doping layer 4, the second passivation layer 3, and the second doping layer 5 satisfies: T1 = 0.1 * (T3 + T4 - T2), or, T1 = 0.3 * (T3 + T4 - T2), or, T1 = 0.5 * (T3 + T4 - T2), or, T1 = 0.7 * (T3 + T4 - T2), or, T1 = 0.9 * (T3 + T4 - T2), or, T1 = 1 * (T3 + T4 - T2).
[0036] It can be understood that as long as the thickness relationship among the first passivation layer 2, the first doping layer 4, the second passivation layer 3, and the second doping layer 5 satisfies: T1 = (0.1 - 1) * (T3 + T4 - T2), it can ensure better process standards and battery performance to a certain extent.
[0037] In some embodiments, the first passivation layer 2 is a silicon dioxide layer, and the thickness of the first passivation layer 2 is 0.8 - 5 nm.
[0038] It should be noted that the silicon dioxide layer functions as a tunneling oxide layer, blocking holes from entering the N-type doped layer. Without adding too much contact resistance, it can effectively collect electrons, reduce surface recombination, and increase the open-circuit voltage. Moreover, the silicon dioxide layer is simpler to prepare than amorphous silicon, has a stable structure, and has a field passivation effect.
[0039] Exemplarily, the thickness of the first passivation layer 2 is 0.8 nm, 1 nm, 3 nm, or 5 nm. It can be understood that the thickness of the first passivation layer 2 can be selected within the above range according to the actual working conditions.
[0040] In some embodiments, the thickness of the first doped layer 4 is 30 - 60 nm.
[0041] Exemplarily, the thickness of the first doped layer 4 is 30 nm, 40 nm, 50 nm, or 60 nm. It can be understood that the thickness of the first doped layer 4 can be selected within the above range according to the actual working conditions.
[0042] In some embodiments, the second passivation layer 3 is an intrinsic hydrogenated amorphous silicon carbide layer, and the thickness of the second passivation layer 3 is 5 - 10 nm. The second doped layer 5 is a p-type hydrogenated microcrystalline silicon carbide layer, and the thickness of the second doped layer 5 is 15 - 45 nm.
[0043] It should be noted that an intrinsic hydrogenated amorphous silicon carbide layer (a-SiC:H(i)) and a p-type hydrogenated microcrystalline silicon carbide layer (uc-SiC:H(p+)) are sequentially arranged on the front surface of the silicon substrate 1. Since both the intrinsic hydrogenated amorphous silicon carbide layer and the p-type hydrogenated microcrystalline silicon carbide layer contain carbon, the bandgap width can be significantly increased, optimizing the optical performance of the front surface of the battery. Moreover, due to the significantly stronger stability of the Si-C bond than the Si-H bond, the battery life can be effectively improved.
[0044] Exemplarily, the thickness of the second passivation layer 3 is 5 nm, 7 nm, or 10 nm, and the thickness of the second doped layer 5 is 15 nm, 30 nm, or 45 nm. It can be understood that the thicknesses of both the second passivation layer 3 and the second doped layer 5 can be selected within the above range according to the actual working conditions.
[0045] In some embodiments, a first conductive film layer 6 is disposed on the side of the first doped layer 4 away from the first passivation layer 2, and a second conductive film layer 7 is disposed on the side of the second doped layer 5 away from the second passivation layer 3.
[0046] It should be noted that both the first conductive film layer 6 and the second conductive film layer 7 are transparent conductive films made by physical vapor deposition (PVD) or reactive ion deposition (RPD) equipment. The materials of the first conductive film layer 6 and the second conductive film layer 7 include but are not limited to: indium tin oxide (ITO) thin film, indium tungsten oxide (IWO) thin film, indium titanium oxide (ITiO) thin film, or aluminum-doped zinc oxide (AZO) thin film.
[0047] In some embodiments, the thickness of the first conductive film layer 6 is 80 - 170 nm, the thickness of the second conductive film layer 7 is 70 - 150 nm, and the thickness of the first conductive film layer 6 is greater than that of the second conductive film layer 7. By defining that the thickness of the first conductive film layer 6 is greater than that of the second conductive film layer 7, the effect of compensating for the insufficient electric field strength of the back potential of the battery is achieved.
[0048] Exemplarily, the thickness of the first conductive film layer 6 is 80 nm, 100 nm, 120 nm, 150 nm, or 170 nm, and the thickness of the second conductive film layer 7 is 70 nm, 90 nm, 110 nm, 130 nm, or 150 nm. It can be understood that the thicknesses of the first conductive film layer 6 and the second conductive film layer 7 can be selected within the above ranges according to the actual working conditions.
[0049] In some embodiments, the thickness of the silicon substrate 1 is 80 - 180 μm, and the resistivity of the silicon substrate 1 is 0.1 - 10 Ω·cm.
[0050] It should be noted that the silicon substrate 1 is an N-type silicon wafer. The thickness of the N-type silicon wafer is 80 μm, 100 μm, 120 μm, 140 μm, 160 μm, or 180 μm, and the resistivity of the silicon substrate 1 is 0.1 Ω·cm, 1 Ω·cm, 5 Ω·cm, or 10 Ω·cm. It can be understood that the thickness and resistivity of the silicon substrate 1 can be selected within the above ranges according to the actual working conditions.
[0051] The preparation method of the heterojunction solar cell provided by the embodiments of the present application includes:
[0052] Step 1: Clean the silicon substrate 1 to remove organic dirt, metal impurities, and surface damage layer on the surface of the silicon substrate 1. After cleaning, texture the front and back surfaces of the silicon substrate 1 to form a textured surface layer.
[0053] Step 2: Deposit a silicon dioxide layer and an N-type doping layer on the back surface of the silicon substrate 1 by techniques such as plasma-enhanced chemical vapor deposition (PECVD), hot wire chemical vapor deposition (HWCVD), low-pressure chemical vapor deposition (LPCVD), etc., and then perform high-temperature annealing treatment to form an N-type carbon-doped polysilicon layer on the silicon dioxide layer. Among them, the thickness of the silicon dioxide layer is 0.8 - 5 nm, and the thickness of the N-type carbon-doped polysilicon layer is 30 - 60 nm.
[0054] Step 3: Deposit an intrinsic hydrogenated amorphous silicon carbide layer and a p-type hydrogenated microcrystalline silicon carbide layer on the front side of the silicon substrate 1 by techniques such as plasma enhanced chemical vapor deposition (PECVD), hot wire chemical vapor deposition (HWCVD), and low pressure chemical vapor deposition (LPCVD), forming a p-n heterojunction on the front side of the battery. Among them, the thickness of the intrinsic hydrogenated amorphous silicon carbide layer is 5 - 10 nm, and the thickness of the p-type hydrogenated microcrystalline silicon carbide layer is 15 - 45 nm.
[0055] Step 4: Deposit a transparent conductive film on the p-type hydrogenated microcrystalline silicon carbide layer and on the N-type carbon-doped polysilicon layer by using physical vapor deposition (PVD) or reactive ion deposition (RPD) equipment technology. Among them, the thickness of the transparent conductive film on the p-type hydrogenated microcrystalline silicon carbide layer is 70 - 150 nm, and the thickness of the transparent conductive film on the N-type carbon-doped polysilicon layer is 80 - 170 nm.
[0056] Step 5: Metallization is carried out by screen printing technology or electroplating technology to form a first metal electrode 8 on the transparent conductive film on the front side of the battery and a second metal electrode 9 on the transparent conductive film on the back side of the battery. Among them, the battery pattern can adopt a multi-main grid line scheme or a no-main grid scheme.
[0057] The embodiment of the present application also provides a photovoltaic module, including a battery string, encapsulation adhesive films respectively arranged on both sides of the battery string. The battery string includes several of the above-mentioned heterojunction solar cells, and the several heterojunction solar cells are connected in series in sequence.
[0058] It can be understood that multiple photovoltaic modules can form multiple photovoltaic arrays. The photovoltaic arrays are connected to a junction box, and the junction box can converge the current generated by the photovoltaic arrays. The converged current flows through an inverter to be converted into alternating current required by the mains power grid and then accesses the mains network to achieve solar power supply. This photovoltaic module can be applied in all fields that require solar power generation, including but not limited to being applied in photovoltaic power stations, such as ground power stations, rooftop power stations, or water surface power stations, etc., or being applied to devices or apparatuses that use solar energy for power generation, such as user solar power supplies, solar street lamps, solar cars, or solar buildings, etc.
[0059] The technical effects of the heterojunction solar cell and photovoltaic module provided by the embodiments of the present application at least include: by disposing an N-type carbon-doped polysilicon layer as the first doping layer 4 on the side of the first passivation layer 2 facing away from the silicon substrate 1, the N-type carbon-doped polysilicon layer can effectively increase the bandgap width; since the N-type carbon-doped polysilicon layer is formed on the backlight surface, it can significantly reduce the negative impact on the optical performance; the silicon dioxide layer functions as a tunneling oxide layer to block holes from entering the N-type doping layer, and can achieve effective electron collection without increasing too much contact resistance, reduce surface recombination, and improve the open-circuit voltage; by sequentially disposing an intrinsic hydrogenated amorphous silicon carbide layer and a p-type hydrogenated microcrystalline silicon carbide layer on the front surface of the silicon substrate 1, the bandgap width can be significantly increased and the optical performance of the front surface of the battery can be optimized; while ensuring the bandgap width of the passivation layer and the battery efficiency, the equipment cost is greatly reduced, and the energy consumption of the polysilicon on the back of the battery is lower than that of microcrystalline silicon during the production process, which is more environmentally friendly.
[0060] In summary, the embodiments of the present application provide a heterojunction solar cell and a photovoltaic module. By sequentially disposing a silicon dioxide layer and an N-type carbon-doped polysilicon layer on the back surface of the silicon substrate 1, and sequentially disposing an intrinsic hydrogenated amorphous silicon carbide layer and a p-type hydrogenated microcrystalline silicon carbide layer on the front surface of the silicon substrate 1, the bandgap width can be effectively increased and the battery efficiency can be ensured.
[0061] As mentioned above, the above is only the specific implementation manner of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by those skilled in the art within the technical scope disclosed by the present application should be covered by the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the protection scope of the claimed rights.
Claims
1. A heterojunction solar cell, characterized in that, It includes a silicon substrate, a first passivation layer, a second passivation layer, a first doping layer and a second doping layer. The first passivation layer and the first doping layer are sequentially disposed on the back surface of the silicon substrate, and the second passivation layer and the second doping layer are sequentially disposed on the front surface of the silicon substrate. Among them, the first doping layer is an N-type carbon-doped polysilicon layer.
2. The heterojunction solar cell according to claim 1, wherein, The thickness relationship among the first passivation layer, the first doping layer, the second passivation layer and the second doping layer satisfies: T1 = (0.1 - 1) * (T3 + T4 - T2); wherein, T1 is the thickness of the first passivation layer, T2 is the thickness of the first doping layer, T3 is the thickness of the second passivation layer, and T4 is the thickness of the second doping layer.
3. The heterojunction solar cell according to claim 2, wherein, The first passivation layer is a silicon dioxide layer, and the thickness of the first passivation layer is 0.8 - 5 nm.
4. The heterojunction solar cell according to claim 2, characterized in that, The thickness of the first doping layer is 30 - 60 nm.
5. The heterojunction solar cell according to claim 2, wherein, The second passivation layer is an intrinsic hydrogenated amorphous carbon silicon layer, and the thickness of the second passivation layer is 5 - 10 nm.
6. The heterojunction solar cell according to claim 2, characterized in that, The second doping layer is a p-type hydrogenated microcrystalline carbon silicon layer, and the thickness of the second doping layer is 15 - 45 nm.
7. The heterojunction solar cell according to claim 1, characterized in that, A first conductive film layer is disposed on the side of the first doping layer away from the first passivation layer, and a second conductive film layer is disposed on the side of the second doping layer away from the second passivation layer.
8. The heterojunction solar cell according to claim 7, characterized in that, The thickness of the first conductive film layer is 80 - 170 nm, the thickness of the second conductive film layer is 70 - 150 nm, and the thickness of the first conductive film layer is greater than the thickness of the second conductive film layer.
9. The heterojunction solar cell according to claim 1, characterized in that, The thickness of the silicon substrate is 80 - 180 μm, and the resistivity of the silicon substrate is 0.1 - 10 Ω·cm.
10. A photovoltaic module, characterized in that, It includes a battery string and encapsulation adhesive films respectively disposed on both sides of the battery string. The battery string includes a plurality of heterojunction solar cells as described in any one of claims 1 to 9, and the plurality of heterojunction solar cells are sequentially connected in series.