Anti-interference brain wave acquisition device

Abstract

The utility model provides an anti-interference brain wave acquisition device which comprises an input module, an analog front-end module, an output module and a bias amplification module which are connected in sequence, and when artifact interference occurs in a brain wave signal output by the output module, the bias amplification module outputs the brain wave signal according to an externally input reference voltage. The bias amplification module generates a bias driving signal and transmits the bias driving signal to the analog front-end module, the analog front-end module controls the bias amplification module to carry out filtering and anti-aliasing processing on the brain wave signal according to the obtained bias driving signal and the reference voltage, obtains a feedback signal and transmits the feedback signal to the input module, and the feedback signal is used for counteracting artifact interference in the collected brain wave signal. And finally, the signal is output after being processed by the analog front-end module. When artifact interference occurs in the brain wave signals, anti-interference processing is carried out on the brain wave signals through the bias amplification module, interference of the collected signals is eliminated, and accuracy and stability of the collected brain wave signals are guaranteed.

Description

Technical Field

[0001] The utility model relates to the technical field of electroencephalogram signal acquisition, and particularly relates to an electroencephalogram acquisition device with anti-interference function. Background Art

[0002] With the deepening of people's research on the brain, the application field of electroencephalogram signal acquisition devices is becoming more and more extensive. Through the recognition of specific electroencephalogram signals, information interaction between the brain and external devices can be realized. The collected electroencephalogram signals are important bases for judging brain activity information such as the brain consciousness state of patients, and have important practical values in clinical medicine, ergonomics, rehabilitation medicine, sports science and other aspects.

[0003] In practical applications, the requirements for the stability and reliability of the stimulation, acquisition, recognition and analysis of electroencephalogram signals are getting higher and higher. However, due to the inherent characteristics of electroencephalogram signals with very small signal amplitudes and very low frequencies (the amplitude is usually between 10uV and 100uV, and the frequency is several Hz to more than a dozen Hz), they are easily interfered by power frequency signals and complex electromagnetic environments during signal acquisition, making it difficult to ensure the accuracy of the collected electroencephalogram signals, and the acquisition accuracy of electroencephalogram signal acquisition devices cannot reach the expected level. Summary of the Utility Model

[0004] The utility model provides an electroencephalogram acquisition device with anti-interference function, which can solve the technical problem that the electroencephalogram signals collected by the existing electroencephalogram acquisition devices with anti-interference function are easily interfered by complex environments, resulting in the decline of the accuracy of the collected signals.

[0005] In a first aspect, an embodiment of the present application provides an electroencephalogram acquisition device with anti-interference function, including:

[0006] An input module, configured to acquire electroencephalogram signals;

[0007] An analog front-end module, connected to the input module, configured to filter and amplify the acquired electroencephalogram signals and then output them;

[0008] An output module, connected to the analog front-end module, configured to output the processed electroencephalogram signals;

[0009] A bias amplification module, connected to the input module and the analog front-end module, configured to generate a bias drive signal according to an externally input reference voltage and transmit it to the analog front-end module when an artifact interference appears in the electroencephalogram signals output by the output module;

[0010] The analog front-end module is further configured to, after obtaining the bias driving signal, control the bias amplification module to filter and anti-alias the electroencephalogram signal according to the reference voltage, obtain a feedback signal and transmit it to the input module for canceling the artifact interference in the collected electroencephalogram signal.

[0011] In some embodiments, the bias amplification module includes a bias driving circuit and an amplification circuit;

[0012] The first end of the bias driving circuit is configured to obtain an externally input reference voltage, and the second end of the bias driving circuit is connected to the bias input end of the analog front-end module for outputting the bias driving signal; the first end of the amplification circuit is connected to the first output end of the input module for obtaining the electroencephalogram signal with artifact interference, the second end of the amplification circuit is connected to the bias output end of the analog front-end module, and the third end of the amplification circuit is connected to the first input end of the input module.

[0013] In some embodiments, the externally input reference voltage includes a first reference voltage and a second reference voltage;

[0014] The bias driving circuit includes a first resistor R1, a second resistor R2, and a first operational amplifier U1;

[0015] The first end of the first resistor R1 is connected to the first reference voltage; the first end of the second resistor R2 is connected to the second end of the first resistor R1, and the second end of the second resistor R2 is connected to the second reference voltage; the non-inverting input terminal of the first operational amplifier U1 is connected to the second end of the first resistor R1, the inverting input terminal of the first operational amplifier U1 is shorted to its output terminal, the output terminal of the first operational amplifier U1 is connected to the second end of the bias driving circuit, the first reference terminal of the first operational amplifier U1 is connected to the first reference voltage, and the second reference terminal of the first operational amplifier U1 is connected to the second reference voltage; wherein, the first reference voltage and the second reference voltage are inverse-phase voltages to each other.

[0016] In some embodiments, the amplification circuit includes a tenth resistor R10, a second operational amplifier U2, and a third resistor R3;

[0017] The first end of the tenth resistor R10 is connected to the first end of the amplifier circuit, and the second end of the tenth resistor R10 is connected to the second end of the amplifier circuit; the non-inverting input terminal of the second operational amplifier U2 is connected to the second end of the tenth resistor R10, the inverting input terminal of the second operational amplifier U2 is shorted to its output terminal, the first reference terminal of the second operational amplifier U2 is connected to the first reference voltage, and the second reference terminal of the second operational amplifier U2 is connected to the second reference voltage; the first end of the third resistor R3 is connected to the output terminal of the second operational amplifier U2, and the second end of the third resistor R3 is connected to the third end of the amplifier circuit.

[0018] In some embodiments, the anti-interference electroencephalogram acquisition device further includes a first filter circuit;

[0019] The first filter circuit includes a first capacitor C1 and an eighth resistor R8 connected in parallel; the first end of the first capacitor C1 is connected to an output terminal of the analog front-end module, and the second end of the first capacitor C1 is connected to the non-inverting input terminal of the second operational amplifier U2.

[0020] In some embodiments, the anti-interference electroencephalogram acquisition device further includes a protection module for preventing electrostatic and surge interference;

[0021] The protection module includes a first protection component, a second protection component, a third protection component, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7;

[0022] The first end of the first protection component is connected to the first output terminal of the input module, the second end of the first protection component is connected to the output terminal of the bias amplification module, and the third end of the first protection component is connected to the preset voltage terminal;

[0023] The first end of the second protection component is connected to the second output terminal of the input module, the second end of the second protection component is connected to the third output terminal of the input module, and the third end of the second protection component is connected to the preset voltage terminal;

[0024] The first end of the third protection component is connected to the first output terminal of the input module, the second end of the third protection component is connected to the first end of the sixth resistor R6, and the third end of the third protection component is connected to the preset voltage terminal;

[0025] The first end of the fourth resistor R4 is connected to the second end of the second protection component; the first end of the fifth resistor R5 is connected to the first end of the first protection component; the first end of the seventh resistor R7 is connected to the first end of the second protection component;

[0026] The second ends of the fourth resistor R4, the fifth resistor R5, the sixth resistor R6, and the seventh resistor R7 are respectively connected to multiple signal input ends of the analog front-end module.

[0027] In some embodiments, the first protection component, the second protection component, and the third protection component are all bidirectional ESD field effect transistors, and their reverse isolation voltage is less than 5V, and the electrostatic protection voltage is greater than 30KV.

[0028] In some embodiments, the anti-interference electroencephalogram acquisition device further includes a second filtering circuit;

[0029] The second filtering circuit includes a second capacitor C2; the first end of the second capacitor C2 is connected to the second end of the sixth resistor R6, the second end of the second capacitor C2 is connected to the second end of the seventh resistor R7, and the third end of the second capacitor C2 is connected to the preset voltage end;

[0030] In some embodiments, the second capacitor C2 is an X2Y capacitor.

[0031] In some embodiments, the output module includes a digital control port; the digital control port has a crystal oscillator, the crystal oscillator is an active crystal oscillator, and the frequency is 2.096 MHz.

[0032] In some embodiments, the analog front-end module includes an analog front-end chip; the model of the analog front-end chip is ADS1299.

[0033] The anti-interference electroencephalogram acquisition device provided by the embodiments of the present application includes an input module, an analog front-end module, and an output module that are connected in sequence, and a bias amplification module. The electroencephalogram signal acquired by the input module is filtered and amplified by the analog front-end module and then output to the next-level processing module through the output module. However, when there is artifact interference in the electroencephalogram signal output by the output module, the bias amplification module will generate a bias drive signal according to the externally input reference voltage and transmit it to the analog front-end module. The analog front-end module controls the bias amplification module to filter and anti-alias the electroencephalogram signal according to the reference voltage based on the acquired bias drive signal, obtains a feedback signal and transmits it to the input module to cancel the artifact interference in the acquired electroencephalogram signal, and finally outputs it after being processed by the analog front-end module.

[0034] The present application realizes anti-interference processing of the electroencephalogram signal when there is artifact interference through the bias amplification module, eliminates the interference of the acquired signal, ensures the accuracy and stability of the acquired electroencephalogram signal, and solves the problem of low acquisition accuracy of the electroencephalogram signal acquisition device. Description of the Drawings

[0035] The accompanying drawings herein are incorporated into the specification and form a part of this specification, showing embodiments consistent with the present application, and are used together with the specification to explain the principles of the present application.

[0036] Figure 1 The structural diagram of the anti-interference electroencephalogram acquisition device provided by an embodiment of the present application;

[0037] Figure 2 The circuit diagram of the anti-interference electroencephalogram acquisition device provided by an embodiment of the present application;

[0038] Figure 3 The circuit diagram of the anti-interference electroencephalogram acquisition device provided by another embodiment of the present application.

[0039] Through the above-mentioned accompanying drawings, specific embodiments of the present application have been shown, and there will be more detailed descriptions hereinafter. These drawings and textual descriptions are not intended to limit the scope of the concept of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. Detailed Embodiments

[0040] The present application will be further described in detail below in conjunction with the accompanying drawings through specific embodiments. Similar elements in different embodiments are labeled with related similar element numbers. In the following embodiments, many detailed descriptions are provided to enable a better understanding of the present application. However, those skilled in the art can easily recognize that some of the features can be omitted in different situations, or can be replaced by other elements, materials, or methods. In some cases, some operations related to the present application are not shown or described in the specification, which is to avoid the core part of the present application being overwhelmed by excessive descriptions. For those skilled in the art, it is not necessary to describe these related operations in detail, and they can fully understand the related operations based on the descriptions in the specification and general technical knowledge in the art.

[0041] In addition, the features, operations, or characteristics described in the specification can be combined in any suitable manner to form various embodiments. At the same time, the steps or actions in the method description can also be reordered or adjusted in a manner obvious to those skilled in the art. Therefore, the various sequences in the specification and drawings are only for clearly describing a certain embodiment and do not mean that they are necessary sequences, unless it is stated that a certain sequence must be followed.

[0042] The terms "first", "second", etc. in the description and claims of this application are used to distinguish similar objects, rather than to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of this application can be implemented in an order other than those illustrated or described here, and the objects distinguished by "first", "second", etc. are usually of the same type, and the number of objects is not limited. For example, the first object can be one or more. In addition, "and / or" in the description and claims means at least one of the connected objects, and the character " / " generally means that the related objects before and after are in an "or" relationship. And the "connection" and "coupling" mentioned in this application, unless otherwise specified, both include direct and indirect connection (coupling).

[0043] This application intends to use a current transformer to replace the traditional sampling resistor for sampling the transmitted current and / or transmitted voltage. Based on the electromagnetic induction principle of the current transformer, after the input interface and the output interface are connected to the terminal, the current and / or voltage between the input interface and the output interface are induced to generate corresponding electrical signals, and the electrical signals are output to the control module to achieve direct sampling of the transmitted current and / or transmitted voltage of the data line in the working state. In the traditional sampling through a sampling resistor, due to the temperature drift phenomenon of the resistance value caused by the ambient temperature or the heat generated by itself, after the change in the sampling accuracy is amplified, the deviation value will be amplified sharply, resulting in a decrease in the sampling accuracy and the inability to accurately monitor the current value or voltage value.

[0044] The following will specifically describe the technical solutions of this application and how the technical solutions of this application solve the above technical problems with specific embodiments. These specific embodiments below can be combined with each other, and the same or similar concepts or processes may not be repeated in some embodiments. The embodiments of this application will be described below with reference to the accompanying drawings.

[0045] Figure 1 It is a structural diagram of an anti-interference electroencephalogram acquisition device provided by an embodiment of this application. As Figure 1 shown, the anti-interference electroencephalogram acquisition device provided by the embodiment of this application includes an input module 110, an analog front-end module 120, an output module 130, and an offset amplification module 140.

[0046] In this embodiment, the electroencephalogram acquisition device includes at least one acquisition electrode, where the acquisition electrode is used to contact the acquisition part of the person to be acquired, capture the brain wave signal through the acquisition electrode, transmit it to the analog front-end module 120, and after being amplified and filtered in sequence, it is then transmitted to the electroencephalogram monitoring device connected to it through the output module 130 for further analysis and processing.

[0047] In some embodiments, the electroencephalogram (EEG) acquisition device can be an EEG sensor. An EEG sensor is a sensor that can sense the potential waveforms of the cerebral cortex and convert them into available output signals. By contacting the sensor electrodes with the scalp surface, the electrical activity signals of brain neurons can be captured. The EEG sensor can be a disposable EEG sensor or a reusable EEG sensor.

[0048] In this embodiment, the analog front-end module 120 is connected to the input module 110 and is used to amplify and filter the acquired EEG signals and then output them.

[0049] In some embodiments, the analog front-end module 120 at least includes an amplification component and a filtering component. Since the EEG signals are very weak, usually only in the microvolt level, an amplifier in the analog front-end module 120 is required to amplify the signals for subsequent processing and analysis. The amplifier is usually integrated inside the EEG sensor or in a device connected thereto to ensure that the signals are not disturbed and attenuated during transmission. At the same time, in order to improve the signal-to-noise ratio and accuracy of the signals, the filtering component can filter out high-frequency noise and low-frequency interference.

[0050] In some embodiments, the analog front-end module 120 includes at least one acquisition chip, which can amplify, filter, etc. the EEG signals collected by the acquisition electrodes and output these electrical signals as digital signals when necessary.

[0051] In some embodiments, the acquisition chip uses an analog front-end chip model ADS1299 produced by TI (Texas Instruments). ADS1299 is a low-noise, multi-channel, simultaneous sampling 24-bit delta-sigma analog-to-digital converter (ADC). It has 8 low-noise programmable gain amplifiers (PGAs) and 8 high-resolution synchronous sampling ADCs. The input reference noise is very low, about 1.0 μVPP (70 Hz bandwidth), and the power consumption per channel is only 5 mW. It also has an internal reference voltage source, oscillator, bias drive amplifier, lead detection and test signal generation, etc. Moreover, it supports single-pole or bipolar power supply operation, and the digital power supply voltage range is from 1.8 V to 3.6 V. Due to its high integration and excellent performance, ADS1299 is widely used in the field of medical instruments, such as EEG, ECG, auditory evoked potential (EAP), bispectral index (BIS) of electroencephalogram, and sleep research monitoring, etc.

[0052] Moreover, ADS1299 has a timing interrupt mode. Timing interrupt acquisition can ensure that data sampling is carried out at fixed time intervals, which makes the sampling frequency highly deterministic. By configuring the interrupt period of the timer, the sampling frequency can be precisely controlled to meet the requirements of specific applications for sampling accuracy, the time of the next sampling can be predicted, and the utilization of system resources can be optimized to improve the overall performance of the system.

[0053] In this embodiment, the output module 130 is connected to the analog front-end module 120 and is used to output the processed electroencephalogram (EEG) signal.

[0054] In some embodiments, the output module 130 includes a digital control port. While outputting the processed EEG signal, it can receive an externally input acquisition control signal and transmit it to the analog front-end module 120 to further control the EEG acquisition device to start or stop acquisition. The digital control port is an interface that adjusts and controls the behavior of a device or system through digital signals. Digital signals have distinct high and low voltage states, making the control process more precise and reliable. Compared with analog signals, digital signals are less affected by interference during transmission and have better anti-interference capabilities.

[0055] In some embodiments, the digital control port has a crystal oscillator. The crystal oscillator is an active crystal oscillator with a frequency of 2.096 MHz, which can ensure that the output EEG signal is more stable.

[0056] In this embodiment, the bias amplification module 140 is connected to the input module 110 and the analog front-end module 120. When an artifact interference appears in the EEG signal output by the output module 130, it generates a bias drive signal according to an externally input reference voltage and transmits it to the analog front-end module 120.

[0057] The analog front-end module 120 is also used to, after obtaining the bias drive signal, control the bias amplification module 140 to filter and anti-alias the EEG signal according to the reference voltage, obtain a feedback signal, and transmit it to the input module 110 to cancel the artifact interference in the acquired EEG signal.

[0058] It can be understood that EEG signals are relatively weak, generally in the microvolt range, and are prone to interference due to EEG lead methods (including monopolar lead method, bipolar lead method, and triangular lead method). Common interferences are: electrooculogram (EOG) interference, electromyogram (EMG) interference, electrocardiogram (ECG) interference, high-frequency noise interference, etc. These interferences usually come from potential activities outside the brain, and these interferences are called artifacts.

[0059] The sources of artifacts in EEG signals may be artifacts from the instrument, such as: scanner failure, poor electrode contact or failure, alternating current interference, etc.; they may also be artifacts from the human body, such as: eyelid and eyeball movement, muscle contraction, electrocardiogram, breathing, skin sweating, blood vessel pulsation, etc.; they may also be physical artifacts, such as: 50Hz interference, static electricity interference, radio signals, poor electrode contact, electromagnetic waves, power line interference, etc.

[0060] In an electroencephalogram (EEG) signal, there are irrelevant artifact signals with similar characteristics, which interfere with the EEG signal. When processed by the system software, it will cause logical confusion and increase the possibility of incorrect judgment, thus failing to achieve the expected effect.

[0061] Therefore, in this embodiment, when the artifact characteristics with similar features are captured, the aliased artifact interference signal captured can be amplified by the bias amplification module 140 and transmitted to the analog front-end module 120 for filtering and anti-aliasing, so as to reduce interference during EEG signal acquisition, ensure the acquisition of high-quality signals, reduce the steps in subsequent preprocessing, and achieve the expected effect.

[0062] It should be noted that when no artifact appears in the observed or detected EEG signal, the EEG signal obtained through the input module 110 will directly enter the analog front-end module 120 for amplification and filtering processing and then be output through the output module 130. Only when no artifact appears in the observed or detected EEG signal, the EEG signal obtained through the input module 110 will preferentially enter the bias amplification module 140. The bias amplification module 140 generates a bias drive signal according to the externally input reference voltage and transmits it to the analog front-end module 120. After obtaining the bias drive signal, the analog front-end module 120 controls the bias amplification module 140 to perform filtering and anti-aliasing processing on the EEG signal according to the reference voltage, obtains a feedback signal and transmits it to the input module to cancel the artifact interference in the collected EEG signal.

[0063] In summary, the anti-interference EEG acquisition device provided by the embodiment of the present application includes an input module, an analog front-end module, and an output module connected in sequence, as well as a bias amplification module. The EEG signal collected through the input module is filtered and amplified by the analog front-end module and then output to the next-level processing module through the output module. However, when there is artifact interference in the EEG signal output by the output module, the bias amplification module will generate a bias drive signal according to the externally input reference voltage and transmit it to the analog front-end module. The analog front-end module controls the bias amplification module to perform filtering and anti-aliasing processing on the EEG signal according to the obtained bias drive signal, obtains a feedback signal and transmits it to the input module to cancel the artifact interference in the collected EEG signal, and finally outputs it after being processed by the analog front-end module.

[0064] The present application realizes anti-interference processing for the EEG signal when there is artifact interference through the bias amplification module, eliminates the interference of the collected signal, ensures the accuracy and stability of the collected EEG signal, and solves the problem of low acquisition accuracy of the EEG signal acquisition device.

[0065] Figure 2The circuit diagram of the anti-interference electroencephalogram acquisition device provided by an embodiment of the present application is as follows. As Figure 2 shown, in the anti-interference electroencephalogram acquisition device provided by the embodiment of the present application, the bias amplification module 140 includes a bias drive circuit and an amplification circuit.

[0066] In this embodiment, the first end of the bias drive circuit is used to obtain an externally input reference voltage, and the second end of the bias drive circuit is connected to the bias input end of the analog front-end module 120 for outputting a bias drive signal; the first end of the amplification circuit is connected to the first output end of the input module 110, that is, the 5th pin of the input module 110, for obtaining an electroencephalogram signal with artifact interference, the second end of the amplification circuit is connected to the bias output end of the analog front-end module 120, and the third end of the amplification circuit is connected to the first input end of the input module 110, that is, the 4th pin of the input module 110.

[0067] In this embodiment, the externally input reference voltage includes a first reference voltage AVCC and a second reference voltage -AVCC, and the bias drive circuit includes a first resistor R1, a second resistor R2, and a first operational amplifier U1. Specifically, the first end of the first resistor R1 is connected to the first reference voltage AVCC; the first end of the second resistor R2 is connected to the second end of the first resistor R1, and the second end of the second resistor R2 is connected to the second reference voltage -AVCC; the non-inverting input terminal of the first operational amplifier U1 is connected to the second end of the first resistor R1, the inverting input terminal of the first operational amplifier U1 is shorted to its output terminal, the output terminal of the first operational amplifier U1 is connected to the second end of the bias drive circuit, the first reference terminal of the first operational amplifier U1 is connected to the first reference voltage AVCC, and the second reference terminal of the first operational amplifier U1 is connected to the second reference voltage -AVCC; wherein, the first reference voltage AVCC and the second reference voltage -AVCC are inverse-phase voltages. In some embodiments, AVCC = +2.5V and -AVCC = -2.5V.

[0068] In this embodiment, the amplification circuit includes a tenth resistor R10, a second operational amplifier U2, and a third resistor R3. Specifically, the first end of the tenth resistor R10 is connected to the first end of the amplification circuit, and the second end of the tenth resistor R10 is connected to the second end of the amplification circuit; the non-inverting input terminal of the second operational amplifier U2 is connected to the second end of the tenth resistor R10, the inverting input terminal of the second operational amplifier U2 is shorted to its output terminal, the first reference terminal of the second operational amplifier U2 is connected to the first reference voltage AVCC, and the second reference terminal of the second operational amplifier U2 is connected to the second reference voltage -AVCC; the first end of the third resistor R3 is connected to the output terminal of the second operational amplifier U2, and the second end of the third resistor R3 is connected to the third end of the amplification circuit.

[0069] Figure 3The circuit diagram of the anti-interference electroencephalogram acquisition device provided by another embodiment of the present application. As Figure 3 shown, the anti-interference electroencephalogram acquisition device provided by the embodiment of the present application further includes a protection module 150 for preventing electrostatic and surge interference.

[0070] In this embodiment, the protection module 150 for electrostatic and surge interference is connected between the input module 110, the bias amplification module 140 and the analog front-end module 120, and can prevent damage to the acquisition device caused by electrostatic discharge and surges in the input voltage or current in the circuit.

[0071] As Figure 3 shown, in this embodiment, the protection module 150 includes a first protection component IC1, a second protection component IC2, a third protection component IC3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6 and a seventh resistor R7. Specifically, the first end of the first protection component IC1 is connected to the first output end of the input module 110, that is, pin 5 of the input module 110. The second end of the first protection component IC1 is connected to the output end of the bias amplification module 140. The third end of the first protection component IC1 is connected to the preset voltage terminal. The first end of the second protection component IC2 is connected to the second output end of the input module 110, that is, pin 2 of the input module 110. The second end of the second protection component IC2 is connected to the third output end of the input module 110, that is, pin 1 of the input module 110. The third end of the second protection component IC2 is connected to the preset voltage terminal. The first end of the third protection component IC3 is connected to the first output end of the input module 110, that is, pin 5 of the input module 110. The second end of the third protection component IC3 is connected to the first end of the sixth resistor R6. The third end of the third protection component IC3 is connected to the preset voltage terminal. The first end of the fourth resistor R4 is connected to the second end of the second protection component IC2. The first end of the fifth resistor R5 is connected to the first end of the first protection component IC1. The first end of the seventh resistor R7 is connected to the first end of the second protection component IC2. The second ends of the fourth resistor R4, the fifth resistor R5, the sixth resistor R6 and the seventh resistor R7 are respectively connected to multiple signal input ends of the analog front-end module 120.

[0072] In some embodiments, the first protection component IC1, the second protection component IC2, and the third protection component IC3 are all bidirectional ESD field effect transistors, and their reverse isolation voltage is less than 5V, and the electrostatic protection voltage is greater than 30KV. The bidirectional ESD field effect transistor is widely used in various electronic devices that require electrostatic protection. It is a component that can provide electrostatic discharge protection in two directions. It combines the characteristics of the field effect transistor and can quickly respond when an electrostatic discharge event occurs to protect the circuit from damage. When an electronic device is threatened by electrostatic discharge, the bidirectional ESD field effect transistor can quickly absorb and dissipate the electrostatic energy, thereby protecting other sensitive components in the circuit from damage.

[0073] As Figure 3 shown, in this embodiment, the anti-interference electroencephalogram acquisition device further includes a first filtering circuit 160 and a second filtering circuit 170.

[0074] In this embodiment, the first filtering circuit 160 includes a first capacitor C1 and an eighth resistor R8 connected in parallel. Specifically, the first end of the first capacitor C1 is connected to an output end of the analog front-end module, and the second end of the first capacitor C1 is connected to the non-inverting input end of the second operational amplifier U2.

[0075] In this embodiment, the second filtering circuit 170 includes a second capacitor C2. Specifically, the first end of the second capacitor C2 is connected to the second end of the sixth resistor R6, the second end of the second capacitor C2 is connected to the second end of the seventh resistor R7, and the third end of the second capacitor C2 is connected to the preset voltage terminal.

[0076] In some embodiments, the second capacitor C2 is an X2Y capacitor. The X2Y capacitor plays an important role in electronic devices due to its advantages such as high reliability, low loss, high-frequency characteristics, easy processing and large-scale production, and balanced design.

[0077] In summary, the anti-interference electroencephalogram acquisition device provided by the embodiments of the present application includes an input module, an analog front-end module, and an output module that are connected in sequence, as well as a bias amplification module. The electroencephalogram signal acquired by the input module is filtered and amplified by the analog front-end module and then output to the next-stage processing module through the output module. However, when there is artifact interference in the electroencephalogram signal output by the output module, the bias amplification module will generate a bias drive signal according to the externally input reference voltage and transmit it to the analog front-end module. The analog front-end module controls the bias amplification module to filter and anti-alias the electroencephalogram signal according to the reference voltage based on the acquired bias drive signal, obtains a feedback signal and transmits it to the input module to cancel the artifact interference in the acquired electroencephalogram signal, and finally outputs it after being processed by the analog front-end module, eliminating the interference of the acquired signal, ensuring the accuracy and stability of the acquired electroencephalogram signal, and solving the problem of low acquisition accuracy of the electroencephalogram signal acquisition device.

[0078] The embodiments of the present application have been described above in conjunction with the accompanying drawings. However, the present application is not limited to the above specific embodiments. The above specific embodiments are merely illustrative and not restrictive. Under the inspiration of the present application, those of ordinary skill in the art can make several simple deductions, deformations, or substitutions without departing from the purpose of the present application and the scope protected by the claims. For those skilled in the technical field to which the present application belongs, according to the idea of the present application, they still fall within the protection scope of the present application.

Claims

1. An anti-interference electroencephalogram acquisition device, characterized in that, Comprising: An input module for acquiring the collected electroencephalogram signals; An analog front-end module connected to the input module, for filtering and amplifying the acquired electroencephalogram signals and then outputting; An output module connected to the analog front-end module, for outputting the processed electroencephalogram signals; A bias amplification module connected to the input module and the analog front-end module, for generating a bias drive signal according to an externally input reference voltage and transmitting it to the analog front-end module when an artifact interference appears in the electroencephalogram signals output by the output module; The analog front-end module is further configured to, after acquiring the bias drive signal, control the bias amplification module to perform filtering and anti-aliasing processing on the electroencephalogram signals according to the reference voltage, obtain a feedback signal and transmit it to the input module, for canceling the artifact interference in the collected electroencephalogram signals.

2. The anti-interference electroencephalogram acquisition device according to claim 1, wherein The bias amplification module includes a bias drive circuit and an amplification circuit; The first end of the bias drive circuit is used for acquiring the externally input reference voltage, and the second end of the bias drive circuit is connected to the bias input end of the analog front-end module, for outputting the bias drive signal; The first end of the amplification circuit is connected to the first output end of the input module, for acquiring the electroencephalogram signals with artifact interference, the second end of the amplification circuit is connected to the bias output end of the analog front-end module, and the third end of the amplification circuit is connected to the first input end of the input module.

3. The anti-interference electroencephalogram acquisition device according to claim 2, wherein The externally input reference voltage includes a first reference voltage and a second reference voltage; The bias drive circuit includes a first resistor R1, a second resistor R2, and a first operational amplifier U1; The first end of the first resistor R1 is connected to the first reference voltage; the first end of the second resistor R2 is connected to the second end of the first resistor R1, and the second end of the second resistor R2 is connected to the second reference voltage; the non-inverting input terminal of the first operational amplifier U1 is connected to the second end of the first resistor R1, the inverting input terminal of the first operational amplifier U1 is short-circuited to its output terminal, the output terminal of the first operational amplifier U1 is connected to the second end of the bias drive circuit, the first reference terminal of the first operational amplifier U1 is connected to the first reference voltage, and the second reference terminal of the first operational amplifier U1 is connected to the second reference voltage; wherein, the first reference voltage and the second reference voltage are inverse-phase voltages to each other.

4. The anti-interference electroencephalogram acquisition device according to claim 3, wherein The amplification circuit includes a tenth resistor R10, a second operational amplifier U2, and a third resistor R3; The first end of the tenth resistor R10 is connected to the first end of the amplifier circuit, and the second end of the tenth resistor R10 is connected to the second end of the amplifier circuit; the non-inverting input terminal of the second operational amplifier U2 is connected to the second end of the tenth resistor R10, the inverting input terminal of the second operational amplifier U2 is shorted to its output terminal, the first reference terminal of the second operational amplifier U2 is connected to the first reference voltage, and the second reference terminal of the second operational amplifier U2 is connected to the second reference voltage; the first end of the third resistor R3 is connected to the output terminal of the second operational amplifier U2, and the second end of the third resistor R3 is connected to the third end of the amplifier circuit.

5. The anti-interference electroencephalogram acquisition device according to claim 4, characterized in that, It further includes a first filter circuit; The first filter circuit includes a first capacitor C1 and an eighth resistor R8 connected in parallel; the first end of the first capacitor C1 is connected to an output terminal of the analog front-end module, and the second end of the first capacitor C1 is connected to the non-inverting input terminal of the second operational amplifier U2.

6. The anti-interference electroencephalogram acquisition device according to claim 4, wherein, It further includes a protection module for preventing electrostatic and surge interference; The protection module includes a first protection component, a second protection component, a third protection component, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, and a seventh resistor R7; The first end of the first protection component is connected to the first output terminal of the input module, the second end of the first protection component is connected to the output terminal of the bias amplification module, and the third end of the first protection component is connected to the preset voltage terminal; The first end of the second protection component is connected to the second output terminal of the input module, the second end of the second protection component is connected to the third output terminal of the input module, and the third end of the second protection component is connected to the preset voltage terminal; The first end of the third protection component is connected to the first output terminal of the input module, the second end of the third protection component is connected to the first end of the sixth resistor R6, and the third end of the third protection component is connected to the preset voltage terminal; The first end of the fourth resistor R4 is connected to the second end of the second protection component; the first end of the fifth resistor R5 is connected to the first end of the first protection component; the first end of the seventh resistor R7 is connected to the first end of the second protection component; The second ends of the fourth resistor R4, the fifth resistor R5, the sixth resistor R6, and the seventh resistor R7 are respectively connected to multiple signal input terminals of the analog front-end module.

7. The anti-interference electroencephalogram acquisition device according to claim 6, wherein The first protection component, the second protection component, and the third protection component are all bidirectional ESD field-effect transistors, and their reverse isolation voltage is less than 5V, and the electrostatic protection voltage is greater than 30KV.

8. The anti-interference electroencephalogram acquisition device according to claim 6, wherein, It further includes a second filter circuit; The second filter circuit includes a second capacitor C2; the first end of the second capacitor C2 is connected to the second end of the sixth resistor R6, the second end of the second capacitor C2 is connected to the second end of the seventh resistor R7, and the third end of the second capacitor C2 is connected to the preset voltage terminal; The second capacitor C2 is an X2Y capacitor.

9. The anti-interference electroencephalogram acquisition device according to claim 1, characterized in that, The output module includes a digital control port; the digital control port has a crystal oscillator, and the crystal oscillator is an active crystal oscillator with a frequency of 2.096 MHz.

10. The anti-interference electroencephalogram acquisition device according to claim 1, wherein The analog front-end module includes an analog front-end chip; the model of the analog front-end chip is ADS1299.

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