Flexible charging control system

Abstract

The utility model discloses a flexible charging control system, and relates to the technical field of charging control. The flexible charging control system is arranged in a charging pile, and comprises a switch assembly which is connected between a power grid and a load to be charged and comprises a plurality of phase line change-over switches; the voltage sampling circuit is connected with the output end of the switch assembly and used for detecting the output voltage of the power grid; the controller is used for sending out a control signal of the phase line change-over switch; the logic self-locking circuit is used for outputting a charging control signal when it is detected that the power grid does not output voltage and it is detected that only one of the control signals, sent by the controller, of the phase line change-over switch is effective; and the switch driving circuit is used for controlling the phase line change-over switch to be closed when the control signal and the charging control signal of only one phase line change-over switch are received, so that only one phase line is connected with a load in the same charging period. According to the system, the safety and reliability of the charging control system can be effectively improved, and the complexity of system installation is reduced.

Description

Technical Field

[0001] This application relates to the field of charging control technology, and particularly to a flexible charging control system. Background Art

[0002] With the rapid development of the new energy industry, the penetration rate of new energy products (such as electric vehicles) is getting higher and higher, and the demand for energy (such as electric energy) is also increasing. Currently, after the three-phase charging network is laid, there are still a large number of electric vehicles with single-phase charging systems in the market. When these electric vehicles with single-phase charging systems use the charging piles of the three-phase charging system, problems such as unbalanced three-phase loads often occur, causing overloading of the single-phase load of the power grid, unstable voltage output, and even problems such as the distribution transformer catching fire and burning out.

[0003] In traditional technologies, the problem of unbalanced power grid loads is mainly solved by passive methods. Among them, passive means that when installing the charging pile, the charging piles are grouped, and then the load power on the three phases is made close by adjusting the connection phase sequence inside the charging pile to achieve power grid load balance. However, the passive method cannot dynamically adjust the problem of unbalanced loads and needs to be achieved by setting up a no-charge guide to direct users to charge at a specified location, making it difficult to achieve true balance and difficult to improve the utilization rate of the power grid. Moreover, special treatment needs to be done on the power distribution during the installation of the charging pile, thus increasing the complexity of the construction during the installation of the charging pile. Summary of the Utility Model

[0004] In view of this, the embodiments of this application provide a flexible charging control system, mainly aiming to solve the technical problems of low power grid utilization rate, high potential safety hazards, and high complexity of charging pile power distribution installation when charging the load of a single-phase charging system through a three-phase charging system.

[0005] According to one aspect of this application, a flexible charging control system is provided, and the system includes:

[0006] A switch assembly, connected between the power grid side and the load to be charged, including a plurality of phase line switching switches, each of the phase line switching switches being connected in series between the power grid side of a phase line and the load;

[0007] A voltage sampling circuit, connected to the output end of the switch assembly, for detecting the output voltage of the power grid;

[0008] A controller, for sending a control signal for the phase line switching switch;

[0009] A logic self-locking circuit, connected to the output end of the voltage sampling circuit and the output end of the controller, is used to output a charging control signal when it detects that the power grid does not output voltage and only one of the control signals of the phase line switching switch issued by the controller is valid;

[0010] A switch driving circuit, connected to the output end of the controller and the output end of the logic self-locking circuit, is used to control the phase line switching switch to close when it receives only one control signal of the phase line switching switch and the charging control signal, so that only one phase line is connected to the load during the same charging period.

[0011] Optionally, the switch assembly includes three phase line switching switches. The first ends of the three phase line switching switches are respectively connected to three phase lines, and the second ends of the three phase line switching switches are connected together as the output end of the switch assembly and connected to the input end of the voltage sampling circuit.

[0012] Optionally, the switch assembly further includes at least one main power switch, and the main power switch is connected in series between a phase line and the load and is used to control the on-off between a phase line and the load.

[0013] Optionally, the output end of the logic self-locking circuit is further connected to the input end of the controller, and the logic self-locking circuit is further used to output a charging state signal to the controller.

[0014] Optionally, the logic self-locking circuit includes a first logic self-locking circuit and a second logic self-locking circuit. Among them, the input end of the first logic self-locking circuit is connected to the output end of the controller, and the output end is connected to the enable end of the second logic self-locking circuit; the first logic self-locking circuit is used to receive control signals of multiple phase line switching switches and output a charging enable signal when it detects that only one control signal of the phase line switching switch is valid; the input end of the second logic self-locking circuit is connected to the output end of the voltage sampling circuit, the enable end is connected to the output end of the first logic self-locking circuit, and the output end is connected to the input end of the switch driving circuit; the second logic self-locking circuit is used to follow and hold the voltage detection signal output by the voltage sampling circuit when it receives the charging enable signal to obtain the charging control signal.

[0015] Optionally, the output end of the second logic self-locking circuit includes a first output end and a second output end. The first output end is connected to the input end of the switch driving circuit, and the second output end is connected to the input end of the controller; the second logic self-locking circuit is used to output the charging control signal to the switch driving circuit and output a charging state signal to the controller.

[0016] Optionally, the switch assembly includes a first phase wire changeover switch, a second phase wire changeover switch, and a third phase wire changeover switch; the first logic self-locking circuit includes a first exclusive-OR gate circuit, a second exclusive-OR gate circuit, a first AND gate circuit, and a second AND gate circuit. Among them, the three input terminals of the first exclusive-OR gate circuit are respectively connected to the first output terminal, the second output terminal, and the third output terminal of the controller; the first exclusive-OR gate circuit is used to receive the control signals of the first phase wire changeover switch, the second phase wire changeover switch, and the third phase wire changeover switch, and output a first logic operation signal; the two input terminals of the first AND gate circuit are respectively connected to the first output terminal and the second output terminal of the controller; the first AND gate circuit is used to receive the control signals of the first phase wire changeover switch and the second phase wire changeover switch, and output a second logic operation signal; the two input terminals of the second AND gate circuit are respectively connected to the third output terminal of the controller and the output terminal of the first AND gate circuit; the second AND gate circuit is used to receive the control signal of the third phase wire changeover switch and the second logic operation signal, and output a third logic operation signal; the two input terminals of the second exclusive-OR gate circuit are respectively connected to the output terminal of the first exclusive-OR gate circuit and the output terminal of the second AND gate circuit, and the output terminal is connected to the enable terminal of the second logic self-locking circuit; the second exclusive-OR gate circuit is used to receive the first logic operation signal and the third logic operation signal, and output the charging enable signal.

[0017] Optionally, the first logic self-locking circuit further includes at least one first delay circuit, where the first delay circuit is arranged between the output terminal of the controller and the input terminal of the first exclusive-OR gate circuit; and / or, the first delay circuit is arranged between the output terminal of the controller and the input terminal of the first AND gate circuit; and / or, the first delay circuit is arranged between the output terminal of the controller and the input terminal of the second AND gate circuit; and / or, the first delay circuit is arranged between the output terminal of the first exclusive-OR gate circuit and the input terminal of the second exclusive-OR gate circuit; and / or, the first delay circuit is arranged between the output terminal of the second AND gate circuit and the input terminal of the second exclusive-OR gate circuit.

[0018] Optionally, the second logic self-locking circuit includes a D flip-flop, where the data input terminal of the D flip-flop is connected to the output terminal of the voltage sampling circuit, the clock signal input terminal and the clear enable terminal are respectively connected to the output terminal of the first logic self-locking circuit, and the output terminal is connected to the input terminal of the switch driving circuit; the D flip-flop is used to follow and hold the voltage detection signal when receiving the charging enable signal, and output the charging control signal.

[0019] Optionally, the second logic self-locking circuit further includes a third AND gate circuit and a fourth AND gate circuit. Among them, two input terminals of the third AND gate circuit are respectively connected to an output terminal of the voltage sampling circuit and an output terminal of the first logic self-locking circuit, and an output terminal is connected to a clock signal input terminal of the D flip-flop; the third AND gate circuit is configured to receive the voltage detection signal and the charging enable signal, and output a clock signal to the D flip-flop; two input terminals of the fourth AND gate circuit are connected to the output terminal of the first logic self-locking circuit, and an output terminal is connected to a clear enable terminal of the D flip-flop; the fourth AND gate circuit is configured to receive the charging enable signal, and output a stop clear signal to the D flip-flop.

[0020] Optionally, the second logic self-locking circuit further includes at least one second delay circuit. Among them, the second delay circuit is disposed between an output terminal of the first logic self-locking circuit and an input terminal of the third AND gate circuit, and / or the second delay circuit is disposed between an output terminal of the voltage sampling circuit and an input terminal of the third AND gate circuit, and / or the second delay circuit is disposed between an output terminal of the voltage sampling circuit and a data input terminal of the D flip-flop, and / or the second delay circuit is disposed between an output terminal of the third AND gate circuit and a clock signal input terminal of the D flip-flop, and / or the second delay circuit is disposed between an output terminal of the fourth AND gate circuit and a clear enable terminal of the D flip-flop.

[0021] Optionally, a delay duration of the second delay circuit disposed between an output terminal of the fourth AND gate circuit and a clear enable terminal of the D flip-flop is shorter than a delay duration of the second delay circuit disposed between an output terminal of the third AND gate circuit and a clock signal input terminal of the D flip-flop.

[0022] Optionally, the switch driving circuit includes a plurality of fifth AND gate circuits. Among them, two input terminals of the fifth AND gate circuit are respectively connected to an output terminal of the logic self-locking circuit and an output terminal of the controller, and an output terminal of the fifth AND gate circuit is connected to a control terminal of the phase line switching switch; the fifth AND gate circuit is configured to output a switch driving signal to the control terminal of the phase line switching switch when receiving the charging control signal and a control signal of the phase line switching switch, so that the phase line switching switch is closed, and the phase line where the phase line switching switch is located is connected to the load.

[0023] Optionally, the switch driving circuit further includes at least one third delay circuit. Among them, the third delay circuit is disposed between an output terminal of the logic self-locking circuit and an input terminal of the fifth AND gate circuit, and / or the third delay circuit is disposed between an output terminal of the controller and an input terminal of the fifth AND gate circuit.

[0024] Optionally, the voltage sampling circuit includes an optocoupler; two input terminals of the optocoupler are respectively connected to the neutral line of the power grid and the output terminal of the switch assembly, and the output terminal is connected to the input terminal of the logic self-locking circuit; the optocoupler is used to convert the output voltage of the power grid into a voltage detection signal of the power grid and output it to the logic self-locking circuit.

[0025] Optionally, the optocoupler is an AC optocoupler or a DC optocoupler; when the optocoupler is the DC optocoupler, the voltage sampling circuit further includes a rectifier bridge circuit and a voltage stabilization and filtering circuit, wherein two input terminals of the rectifier bridge circuit are respectively connected to the neutral line of the power grid and the output terminal of the switch assembly, the output terminal of the rectifier bridge circuit is connected to the input terminal of the voltage stabilization and filtering circuit, the output terminal of the voltage stabilization and filtering circuit is connected to two input terminals of the optocoupler, and the output terminal of the optocoupler is connected to the input terminal of the logic self-locking circuit.

[0026] Optionally, the system further includes a cloud server, the cloud server is connected to the controller, and the cloud server is used to generate a phase line switching instruction according to the power of each phase line and send the phase line switching instruction to the controller, so that the controller generates a control signal for the phase line switching switch corresponding to the phase line switching instruction.

[0027] By means of the above technical solution, a flexible charging control system provided by an embodiment of the present application, by setting a switch assembly, a voltage sampling circuit, a logic self-locking circuit, a controller and a switch driving circuit in the flexible charging control system, and through the mutual cooperation of each circuit module, can switch any phase line to be connected to the load according to the load condition in the power grid, and only one phase line is connected to the load within the same charging period, so as to realize dynamic adjustment of the load in the charging network, improve the utilization rate of the power grid, reduce the potential safety hazards of the system, and improve the reliability and safety of the system. Through the hardware interlock scheme, the risk of safety accidents in the case of short circuit of the switching device and failure of the software system is avoided, and the reliability of the stable operation of the system is improved. And directly using voltage sampling as the control signal for self-locking, avoiding using the feedback signal of the switching device, reducing the high reliability requirement for the switching device, improving the safety and reliability of the system while reducing the cost of the device. In addition, the above system only needs a group of switch assemblies to realize phase line switching, reducing the complexity of the system and the difficulty of distribution installation, reducing the cost of the system, and improving the safety and reliability of the system. Based on this, the above flexible charging control system can effectively reduce the charging risk caused by unbalanced load in the charging network, enable the power distribution system of the charging pile to realize flexible control of power, and can reduce the complexity of system distribution installation.

[0028] The above description is only an overview of the technical solution of the present application. In order to better understand the technical means of the present application, it can be implemented according to the content of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and understandable, the specific embodiments of the present application are given below. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] The drawings described herein are used to provide a further understanding of the present application and form a part of the present application. The schematic embodiments and descriptions thereof of the present application are used to explain the present application and do not constitute an improper limitation of the present application. In the drawings:

[0030] Figure 1 shows a schematic circuit structure diagram of a flexible charging control system provided by the prior art;

[0031] Figure 2 shows a schematic structure diagram of a flexible charging control system provided by an embodiment of the present application;

[0032] Figure 3 shows a schematic structure diagram of a flexible charging control system provided by an embodiment of the present application;

[0033] Figure 4 shows a schematic structure diagram of a flexible charging control system provided by an embodiment of the present application;

[0034] Figure 5 shows a schematic structure diagram of a flexible charging control system provided by an embodiment of the present application;

[0035] Figure 6 shows a schematic circuit structure diagram of a first self-locking circuit provided by an embodiment of the present application;

[0036] Figure 7 shows a schematic circuit structure diagram of a second self-locking circuit provided by an embodiment of the present application;

[0037] Figure 8 shows a schematic circuit structure diagram of a switch driving circuit provided by an embodiment of the present application;

[0038] Figure 9 shows a schematic circuit structure diagram of a voltage sampling circuit provided by an embodiment of the present application;

[0039] Figure 10 shows a schematic circuit structure diagram of another voltage sampling circuit provided by an embodiment of the present application;

[0040] Figure 11 shows a schematic structure diagram of another flexible charging control system provided by an embodiment of the present application. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0041] The present application will be described in detail below with reference to the accompanying drawings and in conjunction with embodiments. It should be noted that, without conflict, the embodiments in the present application and the features in the embodiments may be combined with each other.

[0042] Referring to Figure 1 , a system structure diagram of a charging control system that solves the problem of unbalanced grid load through a passive solution in the prior art is provided. As Figure 1 shown, by grouping and arranging charging piles during the construction of a charging station, the load can be adjusted through different grid configuration methods. For example, the charging piles in the three groups in the figure all supply power to single-phase loads through the line where the K2 switch is located, and the three lines of these three groups are respectively connected to the three phase lines of L1, L2, and L3. When the load powers connected to the charging piles in the three groups are basically the same, the phase balance of the load is achieved. To make the load powers of the three groups basically the same, it is necessary to guide the newly arrived vehicles to the group with a lower load power at different times for balancing. Therefore, this passive load balancing solution needs to be grouped according to the grid configuration during the installation process, and it is necessary to carefully calculate and allocate the capacities of each group, thus increasing the complexity of the power distribution system. Moreover, during the actual operation of the charging station, there will still be a problem of excessive single-phase load. It is necessary to guide users to select charging piles under unbalanced conditions, increasing the complexity of system use. In addition, the unbalanced power distribution makes the grid system need to reserve sufficient grid capacity for protection in consideration of safety, which will cause the grid capacity of the power station not to be fully utilized, resulting in a low grid capacity utilization rate.

[0043] In response to the above problems, each embodiment of the present application will adopt an active load balancing solution to achieve high-efficiency load balancing, thereby realizing flexible charging of the charging network, improving the operation efficiency of the charging station, reducing the operation cost of the charging station, and increasing the grid capacity utilization rate. At the same time, each embodiment of the present application can improve the reliability of the switching of the switch components by designing a hardware self-locking logic control circuit and using the hardware self-locking method to realize the switching of the switching devices, and avoid short-circuit faults caused by software failures or the failure of the switching devices. In addition, the active balancing solution provided by the present application only requires a group of switch components to control flexible charging, reducing the complexity of system design and the product cost.

[0044] In one embodiment, as Figure 2As shown, a flexible charging control system is provided. The above flexible charging control system is arranged in a charging pile. The above flexible charging control system includes: a switch assembly 10, connected between the grid side and the load to be charged, including a plurality of phase line switching switches, each phase line switching switch being connected in series between the grid side of a phase line and the load; a voltage sampling circuit 20, connected to the output end of the switch assembly 10, for detecting the output voltage of the grid; a controller 30, for sending control signals of the phase line switching switches; a logic self-locking circuit 40, connected to the output end of the voltage sampling circuit 20 and the output end of the controller 30, for outputting a charging control signal when it is detected that the grid does not output voltage and only one of the control signals of the phase line switching switches sent by the controller 30 is valid; a switch driving circuit 50, connected to the output end of the controller 30 and the output end of the logic self-locking circuit 40, for controlling the phase line switching switch to close when only one control signal of the phase line switching switch and the charging control signal are received, so that only one phase line is connected to the load during the same charging period. The voltage sampled by the voltage sampling circuit 20 can be the phase voltage or the line voltage output by the grid, and a charging control signal is output when it is detected that the grid does not output the phase voltage or the line voltage and only one of the control signals of the phase line switching switches sent by the controller 30 is valid.

[0045] Specifically, the switch assembly 10 is disposed between the grid side and the load to be charged. Each phase line switching switch inside it is connected in series on a phase line, so as to realize the independent control function of the corresponding phase line. The voltage sampling circuit 20 is connected between the output end of the switch assembly 10 and the logic self-locking circuit 40, and can be used to monitor the voltage condition of the grid output in real time and output the voltage detection result to the logic self-locking circuit 40. The controller 30 is connected to the logic self-locking circuit 40 and the switch driving circuit 50, and can be used to send control signals of the phase line switching switch to the logic self-locking circuit 40 and the switch driving circuit 50 according to the preset logic, so as to control the switch state of the phase line switching switch through the logic self-locking circuit 40 and the switch driving circuit 50. The logic self-locking circuit 40 is connected between the voltage sampling circuit 20 and the controller 30, and can be used to detect whether there is voltage output from the grid through the voltage sampling circuit 20. When it is detected that there is no voltage output from the grid and the controller 30 only outputs a valid control signal of the phase line switching switch, the logic self-locking circuit 40 will output a charging control signal to the switch driving circuit 50. Finally, the switch driving circuit 50 can control a phase line switching switch to close according to the two signals of the received control signal of the phase line switching switch and the charging control signal, so as to ensure that only one phase line is connected to the load during the same charging period, thereby realizing the flexible charging control of the grid. It can be understood that this embodiment is directed to a load with single-phase line charging. In this scenario, after the load is connected to the corresponding charging pile, the flexible charging control system inside the charging pile can ensure that only one phase line is connected to the load during the same charging period, thereby ensuring the safety and stability of the load charging.

[0046] It should be noted that the circuit connection mode of each circuit module in the flexible charging control system and the selection of devices can be determined according to the actual situation, and this embodiment does not make specific limitations. The circuit functions of the flexible charging control system provided in this embodiment are mainly realized through the circuit connection relationship between each circuit module, rather than relying on the program module in a certain circuit module. In addition, each circuit module can be realized by an analog circuit or a digital circuit, and for a circuit module that can implant a program module, the realization of its module function can be realized by the program module provided by the prior art.

[0047] By setting a logic self-locking circuit in the flexible charging control system in this embodiment, the risk of safety accidents can be avoided in the case of short circuit of the switching device or unpredictable changes in the charging state due to software system failure, and the reliability of the stable operation of the system is improved. At the same time, by using the voltage sampling signal of the grid as the control signal of the logic self-locking circuit, the feedback signal of the switching device can be avoided as the control signal, thereby reducing the high reliability requirements for the switching device, further improving the safety and reliability of the system, and reducing the cost of the device.

[0048] The flexible charging control system provided by the embodiment of the present application can switch any phase line to be connected to the load according to the load condition in the power grid, and only one phase line is connected to the load within the same charging period, so as to realize dynamic adjustment of the load in the charging network, reduce the potential safety hazards of the system, and improve the reliability and safety of the system. In addition, the above flexible charging control system only needs a set of switch components to realize phase line switching, which reduces the complexity of the system and the difficulty of distribution installation, reduces the cost of the system, and improves the safety and reliability of the system. Based on this, the above flexible charging control system can effectively reduce the charging risk caused by unbalanced load in the charging network, enable the distribution system of the charging pile to realize flexible control of power, and can reduce the complexity of system distribution installation.

[0049] In one embodiment, as Figure 3 shown, the switch assembly 10 includes three phase line switching switches K2, K5, and K6. The first ends of the three phase line switching switches K2, K5, and K6 are respectively connected to three phase lines L1, L2, and L3, and the second ends of the three phase line switching switches K2, K5, and K6 are connected together and connected to L1 as the output end of the switch assembly 10 and connected to the input end of the voltage sampling circuit 20.

[0050] Specifically, in this embodiment, the three phase line switching switches K2, K5, and K6 are respectively connected to three phase lines in the power grid. Among them, the first ends of the three phase line switching switches are directly connected to the corresponding phase lines, and the second ends are connected together to form a common output end connected to the input end of the voltage sampling circuit 20, so that the voltage sampling circuit can detect the voltage condition of the L1 phase line after passing through the switch assembly in real time. The above switch assembly only needs to use a set of switches to realize flexible control of multiple phase lines, which not only simplifies the system structure but also reduces the cost. At the same time, due to the accurate control of the phase line switching switch, the system can operate more safely and reliably, avoiding the failure risks that may be brought by complex control logic or excessive hardware components.

[0051] This embodiment can realize flexible control of multiple phase lines on the power grid side by adopting a set of switch assemblies including three phase line switching switches. It not only reduces the complexity of the system, reduces the number of hardware components and the circuit cost, but also improves the safety and reliability of the system by simplifying the control logic. In addition, through the real-time monitoring of the voltage sampling circuit, the system can detect and respond to the voltage changes on the power grid side in time, further improving the response speed and stability of the system.

[0052] In one embodiment, as Figure 3As shown, the switch assembly 10 further includes at least one main power switch K1, K2, K3, and K4. The main power switches are connected in series between the N line or a phase line and the load, and are used to control the on / off between the N line or a phase line and the load, and can determine the on / off of the single-phase load or the three-phase load power supply. The main power switch K2 is connected in series between the phase line L1 and the load to determine the on / off of L1 during the power supply process, and at the same time serves as a phase line switching switch. Together with K5 and K6, it is controlled to be selectively connected to achieve the control of phase balance. The main power switch K1 is connected in series between the N line and the load and is used to control the on / off between the N line and the load. The main power switch K3 is connected in series between the phase line L2 and the load and is used to control the on / off between the phase line L2 and the load; the main power switch K4 is connected in series between the phase line L3 and the load and is used to control the on / off between the phase line L3 and the load.

[0053] Specifically, the switch assembly further includes at least one main power switch, such as Figure 3 K3 and K4 in. Among them, the main power switch is connected in series between a phase line and the load, and its main function is to independently control the on / off between its respective phase line and the load, so as to achieve accurate control of the grid-side output. In this embodiment, some switches in the switch assembly can have dual functions. They can not only serve as phase line switching switches and participate in the switching control of the phase line, but also serve as main power switches to directly control the connection state between a certain phase line and the load. This design not only reduces hardware redundancy, but also improves the flexibility and control efficiency of the system.

[0054] In this embodiment, the phase line switching switch can be used to switch the phase line between the grid side and the load to achieve flexible distribution of electric energy; while the main power switch controls whether the line for transmitting electric energy from the grid side to the load is connected. When it is not necessary to allocate the load, the on / off of the main power switch can be directly controlled to achieve the charging of single-phase or three-phase loads. When it is necessary to make an equalization allocation of the load, through the selective on / off control of the phase line switching switch, the conduction between the load and different phase lines is realized. For example, the load is only connected to L1 or L2 or L3 for charging. The combined use of the two can enable the system to flexibly adjust the charging strategy according to different charging demands and grid conditions, so as to improve the charging efficiency and the flexibility of system control.

[0055] In this embodiment, by combining the dual functions of the phase line switching switch and the main power switch in the switch assembly, the flexibility and application range of the flexible charging control system can be effectively improved. The independent control ability of the main power switch enables the system to freely switch the working mode of the charging pile according to needs. Whether it is single-phase charging or multi-phase charging, it can be flexibly handled to meet the charging demands in different scenarios. In addition, the shared design of the phase line switching switch and the main power switch can also reduce the waste of hardware resources and reduce the hardware cost of the system.

[0056] In one embodiment, as Figure 4 shown, the output end of the logic self-locking circuit 40 is further connected to the input end of the controller 30. Among them, the logic self-locking circuit 40 is further configured to output a charging status signal to the controller 30.

[0057] Specifically, the output end of the logic self-locking circuit can not only be connected to the input end of the switch driving circuit and is configured to output a charging control signal to the switch driving circuit under specific conditions, but also be connected to the input end of the controller and is configured to output a charging status signal to the controller. Among them, the charging status signal represents a comprehensive signal generated by the logic self-locking circuit according to the voltage sampling result, the control signal issued by the controller, and the circuit processing logic. This signal reflects whether the current charging system is in a safe and effective charging state, that is, whether it is in a state where there is no output voltage from the power grid and only one of the control signals of the three-phase line changeover switches is valid. By sending the charging status signal to the controller, the controller can combine its own control logic to accurately control the charging process. For example, when the controller receives an invalid charging status signal during the charging state, or receives a valid charging status signal during the stop state, a protection mechanism can be triggered, such as disconnecting all the phase line changeover switches in the switch assembly, so as to avoid the occurrence of safety accidents.

[0058] In this embodiment, by connecting the output end of the logic self-locking circuit to the input end of the controller, real-time feedback and closed-loop control of the charging status signal can be achieved, thereby improving the accuracy of the control of the phase line changeover switch, enabling the controller to respond more timely and accurately to external factors such as grid voltage changes and load status adjustments, and ensuring the safety and stability of the charging process.

[0059] In one embodiment, as Figure 5 shown, the logic self-locking circuit 40 includes a first logic self-locking circuit 41 and a second logic self-locking circuit 42. Among them, the input end of the first logic self-locking circuit 41 is connected to the output end of the controller 30, and the output end is connected to the enable end of the second logic self-locking circuit 42. Among them, the first logic self-locking circuit 41 can be configured to receive the control signals of multiple phase line changeover switches, and when it detects that only one of the control signals of the phase line changeover switches is valid, output a charging enable signal to the second logic self-locking circuit 42. The input end of the second logic self-locking circuit 42 is connected to the output end of the voltage sampling circuit 20, the enable end is connected to the output end of the first logic self-locking circuit 41, and the output end is connected to the input end of the switch driving circuit 50 and the input end of the controller 30. Among them, the second logic self-locking circuit 42 can be configured to follow and hold the voltage detection signal output by the voltage sampling circuit 20 when receiving the charging enable signal to obtain a charging control signal. The voltage detection signal output by the voltage sampling circuit 20 is a phase voltage detection signal or a line voltage detection signal.

[0060] Specifically, the first logic self-locking circuit serves as the front-stage logic judgment unit. Its input terminal is directly connected to the output terminal of the controller and can be used to receive the control signals of multiple phase line switching switches issued by the controller. When it is detected that only the control signal of one phase line switching switch is valid, the first logic self-locking circuit will output a charging enable signal to the enable terminal of the second logic self-locking circuit, thereby ensuring that at any moment, only one phase line is connected to the load, effectively avoiding safety problems such as overload and short circuit caused by multiple phase lines being connected simultaneously. Further, the second logic self-locking circuit serves as the rear-stage execution and protection unit. Its input terminal is connected to the output terminal of the voltage sampling circuit and is used to receive the real-time detection signal of the grid-side voltage. At the same time, its enable terminal receives the charging enable signal from the first logic self-locking circuit. Under the action of the charging enable signal, the second logic self-locking circuit will follow and hold the voltage detection signal, and finally generate a charging control signal to be output to the switch drive circuit, thereby ensuring that only when there is no voltage output on the grid side and the charging conditions are met, the corresponding phase line switching switch will be driven to close, thus improving the safety and stability of the system.

[0061] This embodiment effectively improves the safety and stability of the flexible charging control system, avoids safety problems that may be caused by multiple phase lines being connected to the load simultaneously, and ensures that the system can operate stably at any moment. Moreover, by using the voltage detection signal as the self-locking control signal source, the dependence on the reliability of the switching device is effectively reduced, further improving the overall safety of the system.

[0062] In one embodiment, as Figure 5 shown, the output terminal of the second logic self-locking circuit 42 includes a first output terminal and a second output terminal. Among them, the first output terminal of the second logic self-locking circuit 42 is connected to the input terminal of the switch drive circuit 50, and the second output terminal of the second logic self-locking circuit 42 is connected to the input terminal of the controller 30. In this embodiment, the second logic self-locking circuit 42 can be used to output a charging control signal to the switch drive circuit 50 and output a charging status signal to the controller 30.

[0063] Specifically, the second logic self-locking circuit has two independent output terminals, namely the first output terminal and the second output terminal. Among them, the first output terminal of the second logic self-locking circuit is connected to the input terminal of the switch driving circuit, and can be used to output a charging control signal and control the operation of the switch driving circuit, thereby controlling the on / off of the phase line switching switch, so as to accurately control the charging process. The second output terminal of the second logic self-locking circuit is connected to the input terminal of the controller and can be used to output a charging status signal. Among them, the charging status signal is a comprehensive signal generated by the second logic self-locking circuit based on the voltage detection signal, the charging enable signal, and internal logic judgment. This signal reflects whether the control signal of the phase line switching switch issued by the controller of the current charging system is correct, and whether the charging system is in a safe and effective charging state, that is, whether there is no output voltage from the power grid and only one of the control signals of the three phase line switching switches is valid. By receiving the charging status signal, the controller can understand the operation of the charging system in real time and make corresponding control adjustments as needed. In this embodiment, the two output terminals of the second logic self-locking circuit are independent and do not interfere with each other. This design ensures the stability and accuracy of the charging control signal and the charging status signal, and avoids misoperation or failure caused by incorrect configuration of the control signal of the phase line switching switch of the controller.

[0064] In one embodiment, the switch assembly includes a first phase line switching switch, a second phase line switching switch, and a third phase line switching switch. For example, referring to Figure 3 , the switch assembly 10 may include three phase line switching switches K2, K5, and K6. Further, referring to Figure 6, the first logic self-locking circuit includes a first exclusive-OR gate circuit U2, a second exclusive-OR gate circuit U4, a first AND gate circuit U3A, and a second AND gate circuit U3B. Among them, the three input terminals of the first exclusive-OR gate circuit U2 are respectively connected to the first output terminal, the second output terminal, and the third output terminal of the controller. The first exclusive-OR gate circuit U2 can be used to receive the control signals MCU_RLY2_CTR, MCU_RLY6_CTR, and MCU_RLY5_CTR of the first phase line changeover switch, the second phase line changeover switch, and the third phase line changeover switch, and output a first logic operation signal. The two input terminals of the first AND gate circuit U3A are respectively connected to the first output terminal and the second output terminal of the controller. The first AND gate circuit U3A can be used to receive the control signals MCU_RLY2_CTR and MCU_RLY6_CTR of the first phase line changeover switch and the second phase line changeover switch, and output a second logic operation signal. The two input terminals of the second AND gate circuit U3B are respectively connected to the third output terminal of the controller and the output terminal of the first AND gate circuit U3A. The second AND gate circuit U3B can be used to receive the control signal MCU_RLY5_CTR of the third phase line changeover switch and the second logic operation signal, and output a third logic operation signal. The two input terminals of the second exclusive-OR gate circuit U4 are respectively connected to the output terminal of the first exclusive-OR gate circuit U2 and the output terminal of the second AND gate circuit U3B, and the output terminal is connected to the enable terminal of the second logic self-locking circuit. The second exclusive-OR gate circuit U4 can be used to receive the first logic operation signal and the third logic operation signal, and output a charging enable signal MCU_CTR.

[0065] Specifically, the three input terminals of the first exclusive-OR gate circuit U2 respectively receive the control signals (MCU_RLY2_CTR, MCU_RLY6_CTR, MCU_RLY5_CTR) of the three phase line changeover switches sent from the first, second, and third output terminals of the controller. Among them, the characteristic of the exclusive-OR gate circuit is that when there are an odd number of valid signals in the input signals, the output signal is valid. In order to achieve the purpose of outputting a valid signal only when only one of the three input signals is valid, a first AND gate circuit U3A, a second AND gate circuit U3B, and a second exclusive-OR gate circuit U4 are also set in the first logic self-locking circuit, and these logic circuits are combined with the first exclusive-OR gate circuit U2 for use, so as to achieve the function of outputting a charging enable signal MCU_CTR only when only one of the control signals of the three changeover switches is valid.

[0066] In this embodiment, by combining an exclusive-OR gate circuit and an AND gate circuit in the first logic self-locking circuit, accurate control of the multi-phase line switching switch can be achieved. The above circuit can output a charging enable signal only when the control signal of only one phase line switching switch is valid, thus effectively avoiding safety problems caused by multiple phase lines being connected to the load simultaneously. In addition, by decomposing complex logical operations into simple logical operation units, the above circuit can effectively reduce the complexity and design difficulty of the circuit, thereby helping to reduce the circuit cost and improve the stability of the system.

[0067] In one embodiment, as Figure 6 shown, the first logic self-locking circuit further includes at least one first delay circuit. Among them, the first delay circuit can be set at at least one of the following positions: between the output end of the controller and the input end of the first exclusive-OR gate circuit U2; and / or, between the output end of the controller and the input end of the first AND gate circuit U3A; and / or, between the output end of the controller and the input end of the second AND gate circuit U3B; and / or, between the output end of the first exclusive-OR gate circuit U2 and the input end of the second exclusive-OR gate circuit U4; and / or, between the output end of the second AND gate circuit U3B and the input end of the second exclusive-OR gate circuit U4.

[0068] Specifically, the first delay circuit can include devices such as resistors and capacitors. Among them, the number, connection method, and specification attributes of the resistors and capacitors can be designed according to the actual function of the circuit, and no specific limitation is made here. It can be understood that the delay time of the first delay circuit can be obtained by setting the resistance value and / or capacitance value in the circuit and testing the delay situation of the circuit. In this embodiment, the first delay circuit can be flexibly set on multiple critical paths of the first logic self-locking circuit. For example, the first delay circuit can be symmetrically set between multiple input ends and multiple output ends of every two logic devices, so as to improve the consistency of signals and enhance the reliability and safety of the system.

[0069] In this embodiment, by introducing the first delay circuit into the first logic self-locking circuit, the reliability and safety of the system can be effectively improved. Among them, the design of the delay circuit can provide necessary response time for logic devices and reduce the risk of misoperation caused by transient voltage spikes or other unstable conditions. At the same time, by setting delay circuits on different paths and adjusting their delay times, the synchronization of signals can be improved, thereby enhancing the stability and consistency of the system.

[0070] In one embodiment, as a supplement to the above embodiment of the first logic self-locking circuit, as Figure 6As shown, the truth tables of the logic devices in the first self-locking circuit are shown in Table 1. Among them, the output of the first exclusive-OR gate circuit U2 and the second exclusive-OR gate circuit U4 is true (1) only when there are an odd number of true (1) values in the input, and the output of the first AND gate circuit U3A and the second AND gate circuit U3B is true (1) only when the input is all true (1).

[0071] Table 1

[0072]

[0073] As can be seen from the above table, the first self-locking circuit outputs the charging enable signal MCU_CTR (valid value is 1) only when only one of the control signals MCU_RLY2_CTR, MCU_RLY6_CTR, and MCU_RLY5_CTR of the three-phase line switching switches is valid (value is 1). This ensures that the charging enable signal is output only when only one of the control signals of the three-phase line switching switches is valid, so that only one phase line is connected to the load during the same charging period, avoiding the safety accident of short circuit caused by accidentally connecting two phase lines to the load at the same time, thus improving the safety of the charging control system.

[0074] In one embodiment, as Figure 7 shown, the second logic self-locking circuit includes a D flip-flop U5. Among them, the data input terminal D of the D flip-flop is connected to the output terminal of the voltage sampling circuit, the clock signal input terminal CLK and the clear enable terminal / CLR are respectively connected to the output terminal of the first logic self-locking circuit, the output terminal Q is connected to the input terminal of the switch driving circuit, and the output terminal / Q is connected to the input terminal of the controller. In this embodiment, the D flip-flop U5 can be used to follow and hold the voltage detection signal L1_OUT_STATUS when receiving the charging enable signal MCU_CTR, and output the charging control signal RLY_ON_ALLOW and the charging status signal ALLOW_FB. The charging control signal and the charging status signal are opposite. The charging control signal RLY_ON_ALLOW is used to indicate whether the switch driving circuit closes the switch, and the charging status signal ALLOW_FB is used to feedback the current charging control status to the controller. The controller checks whether the charging system is being correctly controlled through the returned control status, improving the system safety.

[0075] Specifically, the second logic self-locking circuit can use the D flip-flop U5 as the core logic control component. Among them, the data input terminal D of the D flip-flop U5 is connected to the output terminal of the voltage sampling circuit to receive the voltage detection signal L1_OUT_STATUS. In this way, the voltage detection signal can directly serve as the control signal of the second logic self-locking circuit, rather than using the feedback signal of the switching device as the control signal, ensuring that the charging control signal is output only when there is no output voltage in the power grid, thereby reducing the requirement for the reliability of the switching device, avoiding false detection caused by the failure of a single device, and improving the safety and reliability of the system. Further, the clock signal input terminal CLK and the clear enable terminal / CLR of the D flip-flop are respectively connected to the output terminal of the first logic self-locking circuit. Among them, the clock signal input terminal CLK can receive the charging enable signal MCU_CTR from the first logic self-locking circuit. Based on this, the triggering action of the D flip-flop U5 will depend on the validity of the charging enable signal. At the same time, the clear enable terminal / CLR can also receive the charging enable signal MCU_CTR output by the first logic self-locking circuit, and this signal can be used to keep the charging control signal generated in the current cycle of the D flip-flop in an effective state. That is, within a complete charging cycle, as long as the charging enable signal does not drop to a low level, the D flip-flop will maintain its output state unchanged and is not interfered by other signals, thereby ensuring the validity of the charging control signal and controlling the switch on the phase line to remain closed. Further, the output terminal Q of the D flip-flop is connected to the input terminal of the switch driving circuit and is used to output the charging control signal RLY_ON_ALLOW to the switch driving circuit. In this embodiment, when the D flip-flop U5 receives a valid charging enable signal and detects that there is no voltage output in the power grid, it will output a charging control signal to control the corresponding phase line switching switch to close through the switch driving circuit, thereby starting the charging process.

[0076] In this embodiment, by using the D flip-flop as the core logic control device, accurate control of the charging control signal can be achieved. By using the voltage detection signal as one of the control signals, the requirement for the reliability of the switching device can be reduced, thereby improving the safety and reliability of the system and reducing the circuit cost. In addition, the above circuit realizes complex logic operation functions through the D flip-flop without relying on software, avoiding potential safety accidents caused by the failure of the software system, and can improve the overall performance and safety of the system.

[0077] In one embodiment, as Figure 7As shown, the second logic self-locking circuit further includes a third AND gate circuit U3C and a fourth AND gate circuit U3D. Two input terminals of the third AND gate circuit U3C are respectively connected to the output terminal of the voltage sampling circuit and the output terminal of the first logic self-locking circuit, and the output terminal is connected to the clock signal input terminal CLK of the D flip-flop. The third AND gate circuit U3C can be used to receive the voltage detection signal L1_OUT_STATUS and the charging enable signal MCU_CTR, and output a status change signal to the CLK clock signal input terminal of the D flip-flop. The status change signal is determined by the status of the voltage detection and the status controlled by the MCU. According to the status change signal, the input signal, that is, the voltage detection signal, is output to the output terminal of the D flip-flop. Two input terminals of the fourth AND gate circuit U3D are connected to the output terminal of the first logic self-locking circuit, and the output terminal is connected to the clear enable terminal / CLR of the D flip-flop. The fourth AND gate circuit U3D can be used to receive the charging enable signal MCU_CTR, and output a stop clear signal to the D flip-flop to lock the status of the D flip-flop. Only when the MCU control signal transmitted by the charging enable signal MCU_CTR is charging on, the D flip-flop is enabled, and the output signal can follow the input signal. When the MCU control signal transmitted by the charging enable signal MCU_CTR is charging off, the output of the D flip-flop does not follow the input signal, and the relay closing is prohibited. The input of MCU_CTR is used as the enable terminal of the second logic self-locking circuit. By controlling the clock signal input terminal CLK and the clear enable terminal / CLR, when the charging enable signal MCU_CTR and the voltage detection signal L1_OUT_STATUS are at the same level, the charging control signal RLY_ON_ALLOW follows the voltage detection signal L1_OUT_STATUS, or when the charging enable signal MCU_CTR is at the opposite level, the charging control signal RLY_ON_ALLOW is cleared and no longer follows L1_OUT_STATUS.

[0078] Specifically, the third AND gate circuit U3C can be used as a processing unit for the clock signal. Its two input terminals are respectively connected to the output terminal of the voltage sampling circuit and the output terminal of the first logic self-locking circuit. Based on this, the third AND gate circuit U3C can receive the voltage detection signal L1_OUT_STATUS and the charging enable signal MCU_CTR at the same time. Only when these two signals simultaneously meet specific conditions, the third AND gate circuit U3C will output a valid clock signal to the clock signal input terminal CLK of the D flip-flop. In this way, it can be ensured that the voltage detection signal and the charging enable signal jointly determine the clock input signal, and control the timing when the charging control signal RLY_ON_ALLOW follows the voltage detection signal L1_OUT_STATUS. The rising edge of the clock signal triggers the following. Once the following starts, the charging control signal RLY_ON_ALLOW remains constant, and the subsequent signals of the clock signal will no longer act on it unless the rising edge occurs again.

[0079] Furthermore, the fourth AND gate circuit U3D can serve as a processing unit for the clear signal, and its two input terminals are both connected to the output terminal of the first logic self-locking circuit. Based on this, the fourth AND gate circuit U3D can be used to receive and process the charging enable signal MCU_CTR from the first logic self-locking circuit to generate a stop clear signal. That is, when the first logic self-locking circuit issues a charging enable signal to start charging, the fourth AND gate circuit U3D will output a valid stop clear signal to the clear enable terminal / CLR of the D flip-flop, so as to ensure that the charging control signal issued by the D flip-flop is not cleared until the charging enable signal MCU_CTR changes to the opposite level to end charging. The stop clear signal of the fourth AND gate circuit U3D will control the charging control signal issued by the D flip-flop to be cleared and no longer follow the voltage detection signal L1_OUT_STATUS, and the charging cycle ends. The charging enable signal MCU_CTR controls the clear enable terminal / CLR of the D flip-flop through the fourth AND gate circuit U3D, increasing the reliability of the D flip-flop and not being interfered by clutter signals.

[0080] In this embodiment, by adding a third AND gate circuit and a fourth AND gate circuit to the clock pin and clear pin of the D flip-flop, the charging enable signal not only participates in the control of the clock signal input terminal CLK, but also participates in the control of the clear enable terminal / CLR, which can effectively improve the accuracy of the charging enable signal input to the D flip-flop and effectively avoid the interference of clutter signals, thereby ensuring that the D flip-flop performs state conversion only when receiving the correct clock signal and clear signal, and thus outputting a more accurate and stable charging control signal.

[0081] In one embodiment, as Figure 7 shown, the second logic self-locking circuit further includes at least one second delay circuit, where the second delay circuit can be set at at least one of the following positions: between the output terminal of the first logic self-locking circuit and the input terminal of the third AND gate circuit U3C, and / or between the output terminal of the voltage sampling circuit and the input terminal of the third AND gate circuit U3C, and / or between the output terminal of the voltage sampling circuit and the data input terminal D of the D flip-flop U5, and / or between the output terminal of the third AND gate circuit U3C and the clock signal input terminal CLK of the D flip-flop U�, and / or between the output terminal of the fourth AND gate circuit U3D and the clear enable terminal / CLR of the D flip-flop U5.

[0082] Specifically, the second delay circuit may include devices such as resistors and capacitors. Among them, the number, connection method, and specification attributes of the resistors and capacitors can be designed according to the actual function of the circuit, and specific limitations are not made here. It can be understood that the delay duration of the second delay circuit can be obtained by setting the resistance value and / or capacitance value in the circuit and testing the delay situation of the circuit. In this embodiment, the second delay circuit can be flexibly arranged on multiple critical paths of the second logic self-locking circuit. For example, the second delay circuit can be symmetrically arranged between multiple input terminals and multiple output terminals of every two logic devices, so as to improve the signal consistency and enhance the reliability and security of the system.

[0083] In this embodiment, by arranging the second delay circuit in the second logic self-locking circuit, it can be ensured that after receiving the voltage detection signal and the charging enable signal, the logic devices in the second self-locking circuit have enough time to respond, which helps to reduce misoperations caused by potential transient voltage spikes or other unstable conditions, thereby improving the reliability and security of the system. And by arranging the second delay circuit on multiple paths in the second self-locking circuit, signals from different paths can be synchronized. In addition, by appropriately adjusting the delay time of the delay circuit, it can be ensured that the signals are input into the D flip-flop in the correct order.

[0084] In one embodiment, as Figure 7 shown, the delay duration of the second delay circuit arranged between the output terminal of the fourth AND gate circuit U3D and the clear enable terminal / CLR of the D flip-flop U5 is shorter than the delay duration of the second delay circuit arranged between the output terminal of the third AND gate circuit U3C and the clock signal input terminal CLK of the D flip-flop U5.

[0085] Specifically, the delay duration of the second delay circuit located between the output terminal of the fourth AND gate circuit U3D and the clear enable terminal / CLR of the D flip-flop U5 can be designed to be shorter than the delay duration of the delay circuit located between the output terminal of the third AND gate circuit U3C and the clock signal input terminal CLK of the D flip-flop U5. In this embodiment, the stop clear signal (from the fourth AND gate circuit U3D) can be used to prevent the D flip-flop U5 from being accidentally cleared, so as to maintain its current state. And the clock signal (from the third AND gate circuit U3C) is used to trigger the state transition of the D flip-flop. By making the delay duration of the stop clear signal shorter than that of the clock signal, it can be ensured that before the D flip-flop undergoes a state transition, the stop clear signal has reached and stably acts on the clear enable terminal of the D flip-flop, thus avoiding the problem that the D flip-flop is accidentally cleared due to the signal arrival time difference.

[0086] In this embodiment, by setting the delay duration of the second delay circuit and making it different on different paths, the stability and accuracy of the charging control signal can be effectively improved. Moreover, the above design not only improves the working reliability of the D flip-flop, but also ensures that the charging control signal can be correctly processed and transmitted in the expected logical order, thereby enhancing the security and stability of the system.

[0087] In one embodiment, as a supplement to the embodiment of the above second self-locking circuit, as Figure 7 shown, the truth table of each logic device of the second self-locking circuit is shown in Table 2. Among them, the D flip-flop U5 can follow and hold the voltage detection signal L1_OUT_STATUS when a high level is input to the clock signal input terminal CLK and the clear enable terminal / CLR, and output the charging control signal RLY_ON_ALLOW.

[0088] Table 2

[0089]

[0090]

[0091] As can be seen from the above table, the second self-locking circuit only outputs the charging control signal RLY_ON_ALLOW when both the voltage detection signal L1_OUT_STATUS and the charging enable signal MCU_CTR are valid (value is 1), thereby ensuring that only one of the control signals of the three-phase line changeover switches is valid, and when it is detected that the power grid does not output voltage, the charging control signal can be output, and then the corresponding line changeover switch is controlled to close, so that only one phase line is connected to the load during the same charging period, improving the security of the charging control system.

[0092] In one embodiment, as Figure 8 shown, the switch drive circuit includes a plurality of fifth AND gate circuits U6A, U6B, and U6C. Taking U6A as an example for illustration, the two input terminals of the fifth AND gate circuit U6A are respectively connected to the output terminal of the logic self-locking circuit and the output terminal of the controller, and the output terminal of the fifth AND gate circuit U6A is connected to the control terminal of the line changeover switch. Among them, the fifth AND gate circuit U6A can be used to output the switch drive signal RLY2_CTR to the control terminal of the line changeover switch when receiving the charging control signal RLY_ON_ALLOW and the control signal MCU_RLY2_CTR of the line changeover switch, so that the line changeover switch is closed and the phase line where the line changeover switch is located is connected to the load. It can be understood that the connection method and circuit function of the fifth AND gate circuits U6B and U6C are similar to those of U6A, and will not be elaborated here.

[0093] Specifically, by integrating multiple fifth AND gate circuits, the switch driving circuit can achieve accurate control of multiple phase line switching switches. Taking the fifth AND gate circuit U6A as an example, its two input terminals are respectively connected to the output terminal of the logic self-locking circuit and the output terminal of the controller. The logic self-locking circuit can be used to output a charging control signal RLY_ON_ALLOW, which indicates whether the current system allows charging operations; the controller is used to output a control signal MCU_RLY2_CTR for the phase line switching switch, which is used to indicate which phase line switching switch needs to be closed in the current system. Further, when the fifth AND gate circuit U6A receives both the charging control signal RLY_ON_ALLOW and the control signal MCU_RLY2_CTR for the phase line switching switch at the same time, its internal logic will perform an AND operation on these two signals, and when the operation result is true, it will output a switch driving signal RLY2_CTR to the control terminal of the phase line switching switch. This signal will prompt the phase line switching switch to close quickly, so that the phase line where the phase line switching switch is located is connected to the load, thereby realizing the transmission of electric energy. In this embodiment, the fifth AND gate circuits U6B and U6C are similar to U6A in connection method and circuit function, and they are respectively used to control the switching switches of other phase lines, which will not be elaborated here.

[0094] In this embodiment, by arranging multiple fifth AND gate circuits in the switch driving circuit, accurate control of the phase line switching switch can be achieved. The above switch driving circuit can ensure that the switching switch will only output a switch driving signal and prompt the switching switch to act when it receives a valid charging control signal and a control signal for the phase line switching switch, thereby improving the accuracy and reliability of switch control and avoiding problems such as misoperation or refusal to act of the switching switch caused by misoperation or signal interference. At the same time, since multiple fifth AND gate circuits can work in parallel, the entire switch driving circuit can efficiently process the switching requirements of multiple phase lines, thereby improving the overall performance and stability of the system.

[0095] In one embodiment, as Figure 8 shown, the switch driving circuit further includes at least one third delay circuit, where the third delay circuit can be set at at least one of the following positions: between the output terminal of the logic self-locking circuit and the input terminals of the fifth AND gate circuits U6A, U6B, and U6C, and / or, between the output terminal of the controller and the input terminals of the fifth AND gate circuits U6A, U6B, and U6C.

[0096] Specifically, the third delay circuit may include devices such as resistors and capacitors. Among them, the number, connection method, and specification attributes of the resistors and capacitors can be designed according to the actual function of the circuit, and specific limitations are not provided here. It can be understood that the delay duration of the third delay circuit can be obtained by setting the resistance value and / or capacitance value in the circuit and testing the delay situation of the circuit. In this embodiment, the third delay circuit can be flexibly set on multiple critical paths of the switch drive circuit. For example, the third delay circuit can be symmetrically set between the input ends of the controller, the logic self-locking circuit, and each AND gate circuit to improve the signal consistency and enhance the reliability and safety of the system.

[0097] In this embodiment, by setting the third delay circuit in the switch drive circuit, it can be ensured that after receiving the control signal of the phase line changeover switch and the charging control signal, the fifth AND gate circuit has sufficient time to respond, which helps to reduce misoperations caused by potential transient voltage spikes or other unstable conditions, thereby improving the reliability and safety of the system. Moreover, by setting the third delay circuit at the input end of the fifth AND gate circuit, signals from different paths can be synchronized. In addition, by appropriately adjusting the delay time of the delay circuit, the synchronization between different signals can be improved.

[0098] In one embodiment, as Figure 9 shown, the voltage sampling circuit includes an optocoupler U44. Among them, the two input ends of the optocoupler U44 are respectively connected to the neutral line of the power grid and the output end of the switch assembly, and the output end is connected to the input end of the logic self-locking circuit. Among them, the optocoupler U44 can be used to convert the output phase voltage of the power grid, that is, the voltage between L1_RLY_OUT and N_IN, into the voltage detection signal L1_OUT_STATUS of the power grid and output it to the logic self-locking circuit.

[0099] Specifically, as a special electronic component, the optocoupler can electrically isolate the input and output while transmitting signals. In this embodiment, the two input ends of the optocoupler U44 are respectively connected to the neutral line (N_IN) of the power grid and the output end (L1_RLY_OUT) of the switch assembly. Based on this, the optocoupler U44 can monitor the output voltage of the power grid between L1_RLY_OUT and N_IN, that is, monitor the actual phase voltage on the power grid. When the voltage of the power grid enters the optocoupler U44 through the two input ends, the device can use the internal photoelectric effect to convert the electrical signal into an optical signal and then convert the optical signal into an electrical signal, thereby realizing the isolated transmission of the voltage. In this process, the output end of the optocoupler U44 will generate a voltage detection signal L1_OUT_STATUS corresponding to the input voltage and transmit this signal to the input end of the logic self-locking circuit for subsequent processing.

[0100] In this embodiment, by introducing an optocoupler into the voltage sampling circuit, effective isolation between the high-voltage signal of the power grid and the low-voltage signal of the logic self-locking circuit can be achieved. In this way, not only is the low-voltage control circuit protected from high-voltage damage, but the safety of the system is improved. At the same time, the converted voltage detection signal also has a lower voltage level and better signal quality, facilitating subsequent processing by the logic self-locking circuit.

[0101] In one embodiment, the optocoupler can be an AC optocoupler or a DC optocoupler. Among them, Figure 9 The shown voltage sampling circuit is the connection method of an AC optocoupler, Figure 10 The shown voltage sampling circuit is the connection method of a DC optocoupler. Referring to Figure 10 , when the optocoupler is the DC optocoupler U45, the voltage sampling circuit further includes a rectifier bridge circuit and a voltage stabilization and filtering circuit. The two input terminals of the rectifier bridge circuit are respectively connected to the neutral line of the power grid and the output terminal of the switch assembly. The output terminal of the rectifier bridge circuit is connected to the input terminal of the voltage stabilization and filtering circuit. The output terminal of the voltage stabilization and filtering circuit is connected to the two input terminals of the optocoupler U45. The output terminal of the optocoupler U45 is connected to the input terminal of the logic self-locking circuit. Among them, the optocoupler U45 can be used to convert the output phase voltage of the power grid, that is, the voltage between L1_RLY_OUT and N_RLY_IN, into the voltage detection signal L1_OUT_STATUS of the power grid and output it to the logic self-locking circuit.

[0102] Specifically, the rectifier bridge circuit can be composed of diodes, and the voltage stabilization and filtering circuit can be composed of devices such as resistors, capacitors, and voltage stabilizing diodes. For example, referring to Figure 10 , the rectifier bridge circuit can be composed of the diode D100, and the voltage stabilization and filtering circuit can be composed of devices such as the resistors R650, R651, R652, R653, the capacitors C493, C499, C501, and the TVS tube D101. In this embodiment, the rectifier bridge can be used to convert the input AC voltage into a unidirectional pulsating DC voltage, thereby achieving the preliminary conversion from AC to DC. Subsequently, the output terminal of the rectifier bridge circuit is connected to the input terminal of the voltage stabilization and filtering circuit. The voltage stabilization and filtering circuit can be used to further process the rectified pulsating DC voltage, including stabilizing the voltage level and filtering out unnecessary ripples and noises, etc., to generate a smooth and stable DC voltage signal. The DC voltage signal processed by the voltage stabilization and filtering circuit is input to the two input terminals of the DC optocoupler U45. The optocoupler U45 can utilize the optoelectronic conversion characteristic to convert the DC voltage signal into the voltage detection signal L1_OUT_STATUS and output it to the input terminal of the logic self-locking circuit.

[0103] In this embodiment, by adopting a rectifier bridge circuit, a voltage stabilization and filtering circuit, and a DC optocoupler combined voltage sampling circuit, the detection ability and processing effect of the voltage sampling circuit on the grid voltage signal can be improved, thereby enhancing the stability and accuracy of the voltage detection signal, and further enhancing the safety and stability of the entire system.

[0104] In one embodiment, as Figure 11 shown, the above flexible charging control system further includes a cloud server 60. Among them, the cloud server 60 is connected to the controller 30 and can be used to generate a phase line switching instruction according to the power occupied by each phase line, and send the phase line switching instruction to the controller 30, so that the controller 30 generates a control signal for the phase line switching switch corresponding to the phase line switching instruction.

[0105] Specifically, the cloud server 60 can communicate with the controller 30 in real time through a network connection. During this process, the cloud server 60 can collect the real-time power data of each phase line, and these data can reflect the load conditions of different phase lines in the current charging network. Subsequently, the cloud server 60 can use a preset algorithm to process and analyze these power data to evaluate the balance state and potential risks of the current charging network. Then, based on the analysis results, a phase line switching instruction is generated and sent to the controller through the network. Further, after receiving the instruction, the controller 30 can generate corresponding control signals for the phase line switching switches. These control signals are then sent to the corresponding phase line switching switches to implement the phase line switching operation, so as to achieve the purpose of adjusting the power distribution of the charging network and optimizing the charging efficiency.

[0106] It should be noted that the method for the cloud server to generate a phase line switching instruction according to the power of each phase line can be implemented through a program module provided by the prior art, and this embodiment does not make specific limitations here.

[0107] In this embodiment, by introducing the cloud server, it is possible to collect and analyze the power data of the charging network in real time through the cloud server, and generate relatively accurate phase line switching instructions accordingly, thereby solving the charging risk problem caused by the imbalance of the charging network. In this way, not only the safety and stability of the charging system are improved, but also the power distribution of the charging network is optimized, reducing risks such as overheating and overloading caused by uneven loads, and enhancing the utilization rate of the overall power distribution capacity.

[0108] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered to be within the scope described in this specification.

[0109] The above-described embodiments merely represent several implementation manners of the present application. The description thereof is relatively specific and detailed, but it should not be construed as a limitation on the patent scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all fall within the protection scope of the present application. Therefore, the protection scope of the present application shall be subject to the appended claims.

Claims

1. A flexible charging control system, characterized in that, The flexible charging control system is arranged in a charging pile, and the flexible charging control system includes: A switch assembly, connected between the grid side and the load to be charged, including a plurality of phase line switching switches, each of the phase line switching switches being serially connected between the grid side of a phase line and the load; A voltage sampling circuit, connected to the output end of the switch assembly, for detecting the output voltage of the grid; A controller, for issuing control signals of the phase line switching switches; A logic self-locking circuit, connected to the output end of the voltage sampling circuit and the output end of the controller, for outputting a charging control signal when it is detected that the grid does not output voltage and only one of the control signals of the phase line switching switches issued by the controller is valid; A switch driving circuit, connected to the output end of the controller and the output end of the logic self-locking circuit, for controlling the phase line switching switches to close when only receiving one of the control signals of the phase line switching switches and the charging control signal, so that only one phase line is connected to the load during the same charging period.

2. The system according to claim 1, wherein The switch assembly includes three phase line switching switches, the first ends of the three phase line switching switches are respectively connected to three phase lines, and the second ends of the three phase line switching switches are connected together as the output end of the switch assembly and connected to the input end of the voltage sampling circuit.

3. The system according to claim 2, wherein The switch assembly further includes at least one main power switch, the main power switch being serially connected between a phase line and the load, for controlling the on-off between a phase line and the load.

4. The system according to claim 1, wherein The output end of the logic self-locking circuit is further connected to the input end of the controller, and the logic self-locking circuit is further used for outputting a charging state signal to the controller.

5. The system according to claim 1, wherein The logic self-locking circuit includes a first logic self-locking circuit and a second logic self-locking circuit, wherein, The input end of the first logic self-locking circuit is connected to the output end of the controller, and the output end is connected to the enable end of the second logic self-locking circuit; the first logic self-locking circuit is used for receiving control signals of a plurality of the phase line switching switches and outputting a charging enable signal when it is detected that only one of the control signals of the phase line switching switches is valid; The input end of the second logic self-locking circuit is connected to the output end of the voltage sampling circuit, the enable end is connected to the output end of the first logic self-locking circuit, and the output end is connected to the input end of the switch driving circuit; the second logic self-locking circuit is used for following and holding the voltage detection signal output by the voltage sampling circuit when receiving the charging enable signal to obtain the charging control signal.

6. The system according to claim 5, wherein The output end of the second logic self-locking circuit includes a first output end and a second output end, the first output end is connected to the input end of the switch driving circuit, and the second output end is connected to the input end of the controller; the second logic self-locking circuit is used for outputting the charging control signal to the switch driving circuit and outputting a charging state signal to the controller.

7. The system according to claim 5, wherein The switch assembly includes a first phase wire change-over switch, a second phase wire change-over switch, and a third phase wire change-over switch; the first logic self-locking circuit includes a first exclusive-OR gate circuit, a second exclusive-OR gate circuit, a first AND gate circuit, and a second AND gate circuit, where, Three input terminals of the first exclusive-OR gate circuit are respectively connected to the first output terminal, the second output terminal, and the third output terminal of the controller; the first exclusive-OR gate circuit is configured to receive control signals of the first phase wire change-over switch, the second phase wire change-over switch, and the third phase wire change-over switch, and output a first logic operation signal; Two input terminals of the first AND gate circuit are respectively connected to the first output terminal and the second output terminal of the controller; the first AND gate circuit is configured to receive control signals of the first phase wire change-over switch and the second phase wire change-over switch, and output a second logic operation signal; Two input terminals of the second AND gate circuit are respectively connected to the third output terminal of the controller and the output terminal of the first AND gate circuit; the second AND gate circuit is configured to receive the control signal of the third phase wire change-over switch and the second logic operation signal, and output a third logic operation signal; Two input terminals of the second exclusive-OR gate circuit are respectively connected to the output terminal of the first exclusive-OR gate circuit and the output terminal of the second AND gate circuit, and the output terminal is connected to the enable terminal of the second logic self-locking circuit; the second exclusive-OR gate circuit is configured to receive the first logic operation signal and the third logic operation signal, and output the charging enable signal.

8. The system according to claim 7, wherein The first logic self-locking circuit further includes at least one first delay circuit, where, The first delay circuit is disposed between the output terminal of the controller and the input terminal of the first exclusive-OR gate circuit; and / or, the first delay circuit is disposed between the output terminal of the controller and the input terminal of the first AND gate circuit; and / or, the first delay circuit is disposed between the output terminal of the controller and the input terminal of the second AND gate circuit; and / or, the first delay circuit is disposed between the output terminal of the first exclusive-OR gate circuit and the input terminal of the second exclusive-OR gate circuit; and / or, the first delay circuit is disposed between the output terminal of the second AND gate circuit and the input terminal of the second exclusive-OR gate circuit.

9. The system according to claim 5 or 6, characterized in that, The second logic self-locking circuit includes a D flip-flop, where, The data input terminal of the D flip-flop is connected to the output terminal of the voltage sampling circuit, the clock signal input terminal and the clear enable terminal are respectively connected to the output terminal of the first logic self-locking circuit, and the output terminal is connected to the input terminal of the switch driving circuit; the D flip-flop is configured to follow and hold the voltage detection signal when receiving the charging enable signal, and output the charging control signal.

10. The system according to claim 9, wherein The second logic self-locking circuit further includes a third AND gate circuit and a fourth AND gate circuit, where, The two input terminals of the third AND gate circuit are respectively connected to the output terminal of the voltage sampling circuit and the output terminal of the first logic self-locking circuit, and the output terminal is connected to the clock signal input terminal of the D flip-flop; the third AND gate circuit is used to receive the voltage detection signal and the charging enable signal, and output a clock signal to the D flip-flop; The two input terminals of the fourth AND gate circuit are connected to the output terminal of the first logic self-locking circuit, and the output terminal is connected to the clear enable terminal of the D flip-flop; the fourth AND gate circuit is used to receive the charging enable signal, and output a stop clear signal to the D flip-flop.

11. The system according to claim 10, wherein The second logic self-locking circuit further includes at least one second delay circuit, wherein, The second delay circuit is arranged between the output terminal of the first logic self-locking circuit and the input terminal of the third AND gate circuit, and / or, the second delay circuit is arranged between the output terminal of the voltage sampling circuit and the input terminal of the third AND gate circuit, and / or, the second delay circuit is arranged between the output terminal of the voltage sampling circuit and the data input terminal of the D flip-flop, and / or, the second delay circuit is arranged between the output terminal of the third AND gate circuit and the clock signal input terminal of the D flip-flop, and / or, the second delay circuit is arranged between the output terminal of the fourth AND gate circuit and the clear enable terminal of the D flip-flop.

12. The system according to claim 11, wherein The delay time of the second delay circuit arranged between the output terminal of the fourth AND gate circuit and the clear enable terminal of the D flip-flop is shorter than the delay time of the second delay circuit arranged between the output terminal of the third AND gate circuit and the clock signal input terminal of the D flip-flop.

13. The system according to claim 1, wherein, The switch driving circuit includes a plurality of fifth AND gate circuits, wherein, The two input terminals of the fifth AND gate circuit are respectively connected to the output terminal of the logic self-locking circuit and the output terminal of the controller, and the output terminal of the fifth AND gate circuit is connected to the control terminal of the phase line changeover switch; the fifth AND gate circuit is used to output a switch driving signal to the control terminal of the phase line changeover switch when receiving the charging control signal and the control signal of the phase line changeover switch, so that the phase line changeover switch is closed, and the phase line where the phase line changeover switch is located is connected to the load.

14. The system according to claim 13, wherein The switch driving circuit further includes at least one third delay circuit, wherein, The third delay circuit is arranged between the output terminal of the logic self-locking circuit and the input terminal of the fifth AND gate circuit, and / or, the third delay circuit is arranged between the output terminal of the controller and the input terminal of the fifth AND gate circuit.

15. The system according to claim 1, wherein The voltage sampling circuit includes an optocoupler; the two input terminals of the optocoupler are respectively connected to the neutral line of the power grid and the output terminal of the switch assembly, and the output terminal is connected to the input terminal of the logic self-locking circuit; the optocoupler is used to convert the output voltage of the power grid into a voltage detection signal of the power grid, and output it to the logic self-locking circuit.

16. The system according to claim 15, wherein The opto-coupler is an AC opto-coupler or a DC opto-coupler; when the opto-coupler is the DC opto-coupler, the voltage sampling circuit further includes a rectifier bridge circuit and a voltage stabilizing and filtering circuit, wherein, Two input ends of the rectifier bridge circuit are respectively connected to the neutral line of the power grid and the output end of the switch assembly, the output end of the rectifier bridge circuit is connected to the input end of the voltage stabilizing and filtering circuit, the output end of the voltage stabilizing and filtering circuit is connected to two input ends of the opto-coupler, and the output end of the opto-coupler is connected to the input end of the logic self-locking circuit.

17. The system according to claim 1, wherein The system further includes a cloud server, the cloud server is connected to the controller, and the cloud server is configured to generate a phase line switching instruction according to the power of each phase line and send the phase line switching instruction to the controller, so that the controller generates a control signal of the phase line switching switch corresponding to the phase line switching instruction.

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