Solar cell and cell module
By setting a uniformly distributed textured surface on the silicon substrate, the problem of high light reflectivity on the surface of crystalline silicon solar cells is solved, thereby improving light energy utilization and cell efficiency.
Patent Information
- Application Number
- CN202422195707.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-06
- Publication Date
- 2025-08-01
- Estimated Expiration
- 2034-09-06
AI Technical Summary
In existing technologies, the pyramidal textured surface of crystalline silicon solar cells varies in size, resulting in significant light reflection, insufficient light energy utilization, and reduced photoelectric conversion efficiency.
A first textured region and a second textured region are formed on the surface of a silicon substrate. The textured structure of the first textured region is distributed along a preset baseline, and the textured structure of the second textured region is randomly distributed. The combination of the two is to improve the light trapping effect and reduce the light reflectivity.
The uniformly distributed velvet structure reduces light reflectivity, increases light absorption, enhances photoelectric conversion efficiency, and improves passivation film deposition.
Smart Images
Figure CN223182591U_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of photovoltaic technology, and particularly relates to a solar cell and a battery module. Background Art
[0002] In the prior art, in order to reduce the reflection of light on the surface of a solar cell and increase the absorption of light energy, the surface of the solar cell is textured. Usually, before texturing the surface of a crystalline silicon cell, it is necessary to remove impurities on the surface of the silicon wafer, eliminate the damaged layer on the surface of the silicon wafer, perform polishing and leveling treatment, and then anisotropically etch it with an alkaline solution. In this way, a pyramid texture can be formed on the surface of the crystalline silicon cell. However, the sizes of the pyramid texture structures formed in this way are different, which is not conducive to the generation of the light trapping effect. There is still a large light reflection effect on the surface of the crystalline silicon cell, and the utilization of light energy is insufficient, thereby affecting the photoelectric conversion efficiency of the crystalline silicon cell. Summary of the Utility Model
[0003] This application provides a solar cell, aiming to solve the problems that the sizes of the pyramid texture structures are different, which is not conducive to the generation of the light trapping effect, there is still a large light reflection effect on the surface of the crystalline silicon cell, the utilization of light energy is insufficient, and thereby the photoelectric conversion efficiency of the crystalline silicon cell is affected.
[0004] This application is implemented as follows. A solar cell includes a silicon substrate. The silicon substrate has a first surface and a second surface which are oppositely arranged. At least one of the first surface and the second surface has a first texture region and a second texture region. The first texture region includes texture structures distributed along a preset reference line, and the second texture region includes texture structures randomly distributed in the second texture region.
[0005] Optionally, within a preset area, the standard deviation of the height of the texture structures located in the first texture region is less than the standard deviation of the height of the texture structures located in the second texture region.
[0006] Optionally, within the preset area, the standard deviation of the vertex distance between adjacent texture structures located in the first texture region is less than the standard deviation of the vertex distance between adjacent texture structures located in the second texture region.
[0007] Optionally, within the preset area, the standard deviation of the base width of the texture structures located in the first texture region is less than the standard deviation of the base width of the texture structures located in the second texture region.
[0008] Optionally, the area of the first texture region is larger than the area of the second texture region.
[0009] Optionally, in the direction perpendicular to the preset reference line, the maximum width of the first texture region is less than 80 micrometers.
[0010] Optionally, the ratio of the depth of the first matte region to the thickness of the silicon substrate is less than or equal to 5%.
[0011] Optionally, the depth of the first matte region is greater than 1 μm and less than or equal to 10 μm.
[0012] Optionally, the first matte region extends in at least one of a straight line, a broken line, and a curve.
[0013] Optionally, the first matte region extends in a straight line, and the length of the first matte region is greater than or equal to 10 μm.
[0014] In this application, by providing a first matte region and a second matte region on the surface of the silicon substrate, the first matte region includes matte structures distributed along a preset reference line, and the second matte region includes randomly distributed matte structures. The matte structures in the first matte region are distributed along the preset reference line, with a more uniform structure, good light trapping effect, reduced light reflectivity. Moreover, the cooperation between the matte structures in the first matte region and the matte structures in the second matte region strengthens the light trapping effect on sunlight. At the same time, the matte structures in the first matte region also increase the specific surface area of the silicon substrate, which is more conducive to the absorption of sunlight and the deposition of the passivation film.
[0015] A battery assembly includes the above-mentioned solar cell. The technical effects of this application are the same as those of the above-mentioned solar cell, and will not be elaborated here. Description of the Drawings
[0016] Figure 1 is a schematic structural diagram of the solar cell provided by the present application;
[0017] Figure 2 is a schematic diagram of the surface structure of the silicon substrate of the solar cell provided by the present application
[0018] Figure 3 is a schematic structural diagram of the first matte region extending in a straight line on the surface of the silicon substrate of the solar cell provided by the present application;
[0019] Figure 4 is a schematic structural diagram of the height of the matte structure on the surface of the silicon substrate of the solar cell provided by the present application;
[0020] Figure 5 is a schematic structural diagram of the distance between the vertices of two adjacent matte structures on the surface of the silicon substrate of the solar cell provided by the present application.
[0021] Description of the Reference Numerals:
[0022] 10. Silicon substrate; 101. First surface; 102. Second surface. Detailed implementation manners
[0023] In order to make the objectives, technical solutions and advantages of the present application clearer and more understandable, the present application will be further described in detail below with reference to the accompanying drawings and embodiments. The examples of the embodiments are shown in the accompanying drawings, where the same or similar reference numerals represent the same or similar elements or elements with the same or similar functions from beginning to end. The embodiments described below by referring to the accompanying drawings are exemplary and are only used to explain the present application, and should not be construed as a limitation to the present application. In addition, it should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.
[0024] In the description of the present application, it should be understood that the orientation or positional relationship indicated by the terms "length", "width", "upper", "lower", "left", "right", "horizontal", "top", "bottom", etc. is based on the orientation or positional relationship shown in the accompanying drawings. It is only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present application.
[0025] In addition, the terms "first" and "second" are only used for descriptive purposes and should not be construed as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of the said features. In the description of the present application, "a plurality" means two or more, unless otherwise specifically defined.
[0026] In the description of the present application, it should be noted that unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection, an electrical connection, or a connection that can communicate with each other; it may be directly connected, or indirectly connected through an intermediate medium, and it may be the internal communication of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to specific circumstances.
[0027] In this application, unless otherwise clearly specified and defined, the first feature being "on" or "under" the second feature may include direct contact between the first and second features, or may include the first and second features not being in direct contact but in contact through additional features therebetween. Moreover, the first feature being "above", "over" and "on top of" the second feature includes the first feature being directly above and obliquely above the second feature, or merely indicating that the first feature has a higher horizontal height than the second feature. The first feature being "under", "below" and "beneath" the second feature includes the first feature being directly below and obliquely below the second feature, or merely indicating that the first feature has a lower horizontal height than the second feature.
[0028] The following disclosure provides many different embodiments or examples for implementing different structures of this application. To simplify the disclosure of this application, components and settings of specific examples are described below. Of course, they are merely examples and are not intended to limit this application. In addition, this application may repeat reference numerals and / or reference letters in different examples. Such repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between various embodiments and / or settings discussed. In addition, this application provides examples of various specific processes and materials, but those of ordinary skill in the art can be aware of the application of other processes and / or the use of other materials.
[0029] As Figure 1 shown, a solar cell includes a silicon substrate. The silicon substrate 10 serves as the support and foundation of the cell sheet, and the silicon substrate 10 has excellent semiconductor performance and mechanical stability. The material of the silicon substrate 10 can be an elemental semiconductor material. Specifically, the elemental semiconductor material is composed of a single element, for example, it can be silicon or germanium. Among them, the elemental semiconductor material can be in single crystal state, polycrystalline state, amorphous state or microcrystalline state (a state having both single crystal state and amorphous state is called microcrystalline state). For example, silicon can be at least one of single crystal silicon, polycrystalline silicon, amorphous silicon or microcrystalline silicon. Preferably, the silicon substrate 10 is made of n-type single crystal silicon.
[0030] The silicon substrate has a first surface and a second surface which are oppositely arranged. In the embodiments of this application, the first surface 101 and the second surface 102 can be respectively the light-facing surface and the backlight surface of the silicon substrate 10. The light-facing surface can be understood as the side facing the sun when installing the solar cell 100, and the backlight surface can be understood as the side facing away from the sun when installing the solar cell 100. In some embodiments, the solar cell is a bifacial cell, that is, both the first surface 101 and the second surface 102 of the silicon substrate 10 can be used as light-receiving surfaces and can be used to receive incident light.
[0031] As Figure 2As shown, at least one of the first surface and the second surface has a first matte area and a second matte area. That is to say, on these two surfaces, at least one of them (which may be the first surface 101, the second surface 102, or both) is divided into a first matte area and a second matte area.
[0032] The first matte area includes matte structures distributed along a preset reference line, and the second matte area includes matte structures randomly distributed in the second matte area.
[0033] In this application, by setting a first matte area and a second matte area on the surface of the silicon substrate, the first matte area includes matte structures distributed along a preset reference line. The preset reference line can be a groove formed on the surface of the silicon substrate by using a laser, or a scratch on the surface. Then, through etching with an alkaline solution and / or an acid solution, matte structures are formed at the preset reference line, and the pyramids grow along the preset reference line. The pyramids are formed more uniformly, with a good light-trapping effect, a reduced light reflectance, and can form a fully black panel. At the same time, the short-circuit current of the solar cell is increased. The second matte area includes randomly distributed matte structures. For example, the second matte area can be the polished surface of the silicon substrate, and conventional pyramidal matte structures of different sizes and randomly distributed are formed by etching the polished surface with an alkaline solution and / or an acid solution.
[0034] In some embodiments, the matte structures in the first matte area are distributed along the preset reference line, with a more uniform structure, a good light-trapping effect, and a reduced light reflectance. The second matte area is disorderly distributed on the surface of the silicon substrate, with different sizes. There is a height difference between the matte structures in the first matte area and the matte structures in the second matte area on the surface of the silicon substrate. The cooperation of the matte structures in the first matte area and the matte structures in the second matte area further strengthens the light-trapping effect on sunlight. At the same time, the first matte structure also increases the specific surface area of the silicon substrate, which is more conducive to the absorption of sunlight and the deposition of the passivation film.
[0035] As Figure 4 shown, in some embodiments, within a preset area, the standard deviation of the heights of the matte structures in the first matte area is less than the standard deviation of the heights of the matte structures in the second matte area. For example, within a 100μm×100μm area range, the heights of the matte structures in the first matte area are more uniform than the heights of the matte structures in the second matte area, that is, the heights of the matte structures in the first matte area are more consistent, thereby effectively reducing the light reflectance in the first matte area.
[0036] As Figure 5As shown, in some embodiments, within a preset area, the standard deviation of the vertex distances between adjacent textured structures in the first textured area is less than the standard deviation of the vertex distances between adjacent textured structures in the second textured area. For example, within a unit area, in a 100 μm × 100 μm area range, the distances between the vertices of two adjacent textured structures in the first textured area are more uniform than the distances between the vertices of two adjacent textured structures in the second textured area, thereby effectively reducing the light reflectance in the first textured area.
[0037] In some embodiments, within a preset area, the standard deviation of the base widths of the textured structures in the first textured area is less than the standard deviation of the base widths of the textured structures in the second textured area. In the embodiments of the present application, the width of the base can be the base dimension in the same direction of the textured structures in the first textured area and the textured structures in the second textured area. When the base is of an irregular shape, the width of the base can be the width of its longest side. Exemplarily, within a unit area, in a 100 μm × 100 μm area range, the base dimensions of the textured structures in the first textured area are more consistent than the base dimensions of the textured structures in the second textured area, that is, the sizes of the textured structures in the first textured area are more uniform, thereby effectively reducing the light reflectance in the first textured area.
[0038] The area of the first textured area is larger than the area of the second textured area. This can ensure the area ratio of the first textured area, greatly improve the light absorption capacity of the surface of the silicon substrate, effectively reduce the light reflectance of the surface of the silicon substrate, and thus improve the conversion efficiency of the solar cell.
[0039] Furthermore, in other embodiments, the area ratio of the first textured area to the second textured area is more preferably greater than or equal to 80% and less than 150%, and most preferably greater than or equal to 80% and less than 100%.
[0040] In the direction perpendicular to the preset reference line, the maximum width of the first textured area is less than 80 microns. Preferably, the maximum width of the first textured area is less than 30 microns, and since the first textured area includes micron-scale trench structures, it can increase the surface area of the passivation layer in the first textured area in subsequent processes, thereby enhancing the passivation effect.
[0041] In some embodiments, the ratio of the depth of the first matte region to the thickness of the silicon substrate is less than or equal to 5%. For example, the ratio of the depth of the first matte region to the thickness of the silicon substrate can be 1%, 2%, 3%, 4%, 5%, etc. Preferably, the ratio of the depth of the first matte region to the thickness of the silicon substrate is greater than or equal to 2% and less than or equal to 4%. When the ratio of the depth of the first matte region to the thickness of the silicon substrate is within this range, the damage to the silicon substrate is minimized to the greatest extent when pyramids are effectively grown along the extension direction of the first matte region, and it is easier to produce a better passivation effect and form a relatively smooth passivation layer. In addition, if the ratio of the depth of the first matte region to the thickness of the silicon substrate is too large, the silicon substrate will be severely damaged, there will be more surface recombination on the silicon substrate, and if the silicon substrate is too thin, the mechanical strength is low and it is also prone to occur latent cracks.
[0042] In some embodiments, the depth of the first matte region is greater than 1 μm and less than or equal to 10 μm. Preferably, the depth of the first matte region is greater than or equal to 3 μm and less than or equal to 6 μm. For example, the depth of the first matte region can be 3 μm, 4 μm, 5 μm, 6 μm, etc. When the depth of the first matte region is any value within the above range, the size of the depth of the first matte region is more appropriate, so that the presence of the first matte region has less impact on the strength of the silicon substrate itself. When the depth of the first matte region is within any of the above ranges, the first matte region can be filled by the electrode without forming voids, thereby improving the cell efficiency of the solar cell.
[0043] As Figure 3 shown, in some embodiments, the first matte region extends in at least one of a straight line, a broken line, and a curve. For example, the first matte region can all extend in a straight line, or a part can extend in a straight line form and another part can extend in a broken line form. This application does not limit this. The matte structure of the first matte region is conducive to light entering deeper into the interior of the silicon substrate, thereby improving the utilization rate of light. Preferably, the first matte region extends in a straight line form, and the length of the first matte region is greater than or equal to 10 μm, so that within a larger range, the first matte region has more uniform pyramids. The straight line mentioned in the embodiments of this application is not a straight line in the geometric concept, but has a small fluctuation error. The first matte region as a whole looks to be arranged in a straight line type. Exemplarily, for example, the fluctuation amplitude of the connection line of the vertices of the pyramids within the first matte region is less than 0.5 μm, or the fluctuation amplitude of the connection line of the bottoms of the pyramids within the first matte region is less than 0.5 μm.
[0044] In some embodiments, a battery module includes the above-mentioned solar cell. Based on the above-mentioned solar cell, those skilled in the art know that by using a plurality of such solar cells and / or other corresponding existing accessories, the corresponding battery module can be obtained.
[0045] In the description of this specification, the descriptions referring to terms such as "some embodiments", "schematic embodiments", "examples", "specific examples", or "some examples", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiments or examples are included in at least one embodiment or example of the present application. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiments or examples. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.
[0046] The above are only the preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present application shall be included within the protection scope of the present application.
Claims
1. A solar cell, characterized in that, It includes a silicon substrate having a first surface and a second surface arranged opposite to each other, at least one of the first surface and the second surface having a first matte surface area and a second matte surface area. The first matte surface area includes matte surface structures distributed along a preset reference line, and the second matte surface area includes matte surface structures randomly distributed in the second matte surface area.
2. The solar cell according to claim 1, characterized in that, Within a preset area, the standard deviation of the height of the matte surface structures located in the first matte surface area is less than the standard deviation of the height of the matte surface structures located in the second matte surface area.
3. The solar cell according to claim 1, wherein, Within the preset area, the standard deviation of the vertex distance between adjacent matte surface structures located in the first matte surface area is less than the standard deviation of the vertex distance between adjacent matte surface structures located in the second matte surface area.
4. The solar cell according to claim 1, characterized in that, Within the preset area, the standard deviation of the base width of the matte surface structures located in the first matte surface area is less than the standard deviation of the base width of the matte surface structures located in the second matte surface area.
5. The solar cell according to claim 1, characterized in that, The area of the first matte surface area is larger than the area of the second matte surface area.
6. The solar cell according to claim 1, wherein In the direction perpendicular to the preset reference line, the maximum width of the first matte surface area is less than 80 microns.
7. The solar cell according to claim 1, wherein, The ratio of the depth of the first matte surface area to the thickness of the silicon substrate is less than or equal to 5%.
8. The solar cell according to claim 1, characterized in that, The depth of the first matte surface area is greater than 1 micron and less than or equal to 10 microns.
9. The solar cell according to claim 1, wherein, The first matte surface area extends in at least one of the ways of a straight line, a broken line, and a curve.
10. The solar cell according to claim 9, characterized in that, The first matte surface area extends in a straight line form, and the length of the first matte surface area is greater than or equal to 10 microns.
11. A battery assembly, characterized in that, It includes a solar cell according to any one of claims 1-10 above.