Display panel and display device

Abstract

The utility model discloses a display panel and a display device. The display panel comprises a plurality of data signal lines, a plurality of first pixel circuit columns and a plurality of first light-emitting element columns, and a plurality of first pixel circuits arranged in the first direction are electrically connected with the same data signal line; the first pixel circuit columns comprise a plurality of first pixel circuits arranged in the first direction, the first light-emitting element columns comprise light-emitting elements which are arranged in the first direction and have different light-emitting colors, and the two light-emitting elements with different light-emitting colors are electrically connected with the first pixel circuits located in the different first pixel circuit columns respectively. The plurality of first pixel circuits in the same first pixel circuit row are electrically connected with the plurality of light-emitting elements of the same color. According to the scheme, one data signal line can only transmit the data signal required by the corresponding light-emitting element with one color, so that the stable data signal is transmitted on the data signal, and the power consumption of the display controller and the display panel is reduced.

Description

Technical Field

[0001] Embodiments of the present utility model relate to the field of display technologies, and in particular, to a display panel and a display device. Background Art

[0002] In order to improve the display effect of a display panel, in related technologies, there is a situation where sub-pixels of different colors are arranged in a sub-pixel column, and the sub-pixels of different colors in the sub-pixel column receive data signals transmitted by the same data line. This setting method will increase the power consumption of the display controller in the display panel. Content of the Utility Model

[0003] Based on the above problems, the present utility model provides a display panel and a display device, which reduce the power consumption of the display controller and the display panel while ensuring the display effect.

[0004] In a first aspect, embodiments of the present utility model provide a display panel, including:

[0005] Multiple data signal lines, the multiple data signal lines extend along a first direction and are arranged along a second direction, and the first direction and the second direction intersect;

[0006] Multiple first pixel circuits, the multiple first pixel circuits arranged along the first direction are electrically connected to the same data signal line;

[0007] Multiple first pixel circuit columns and multiple first light-emitting element columns; the first pixel circuit columns include the multiple first pixel circuits arranged along the first direction; the first light-emitting element columns include two light-emitting elements with different emission colors arranged along the first direction, and the two light-emitting elements with different emission colors are respectively electrically connected to the first pixel circuits in different first pixel circuit columns, and the multiple first pixel circuits in the same first pixel circuit column are electrically connected to multiple light-emitting elements of the same color.

[0008] In a second aspect, embodiments of the present utility model provide a display device, including the display panel described in the first aspect of the present utility model.

[0009] The display panel provided by the embodiment of the present utility model includes multiple data signal lines, multiple first pixel circuit columns, and multiple first light-emitting element columns. Multiple first pixel circuits arranged along the first direction are electrically connected to the same data signal line; the multiple first pixel circuit columns include multiple first pixel circuits arranged along the first direction, the multiple first light-emitting element columns include light-emitting elements with different emission colors arranged along the first direction, two light-emitting elements with different emission colors are electrically connected to the first pixel circuits in different first pixel circuit columns, and multiple first pixel circuits in the same first pixel circuit column are electrically connected to multiple light-emitting elements of the same color. By adopting the above solution, multiple first pixel circuits connected to the same data signal line are electrically connected to the light-emitting elements of the same color located in different first light-emitting element columns. Only the data signals required by the light-emitting elements of the corresponding color can be transmitted on one data signal line, so that stable data signals are transmitted on the data signal line, and there is no problem of voltage jump on the data signals on the data signal line, thereby reducing the power consumption of the display controller and the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] Figure 1 FIG. is a schematic structural diagram of a display panel in a related art provided by an embodiment of the present utility model;

[0011] Figure 2 is Figure 1 a timing diagram of the data signal line in the shown display panel;

[0012] Figure 3 FIG. is a schematic structural principle diagram of a display panel provided by an embodiment of the present utility model;

[0013] Figure 4 is Figure 3 a partial film layer structure diagram of the shown display panel;

[0014] Figure 5 is Figure 3 a timing diagram of the data signal line in the shown display panel;

[0015] Figure 6 FIG. is a schematic circuit diagram of a first pixel circuit provided by an embodiment of the present utility model;

[0016] Figure 7 is Figure 6 a driving timing diagram of the shown embodiment;

[0017] Figure 8 is Figure 4 a partial enlarged structural diagram of the shown display panel;

[0018] Figure 9 FIG. is a schematic structural diagram of another display panel provided by an embodiment of the present utility model;

[0019] Figure 10 is Figure 9 a schematic cross-sectional structure diagram along the A-A' direction;

[0020] Figure 11 is a schematic structure diagram of another display panel provided by an embodiment of the present invention;

[0021] Figure 12 is Figure 11 a partially enlarged schematic structure diagram of the shown display panel;

[0022] Figure 13 is a schematic structure diagram of another display panel provided by an embodiment of the present invention;

[0023] Figure 14 is Figure 13 a partially enlarged schematic structure diagram of the shown display panel;

[0024] Figure 15 is a schematic structure diagram of another display panel provided by an embodiment of the present invention;

[0025] Figure 16 Figure 15 a partially enlarged schematic structure diagram of the shown display panel;

[0026] Figure 17 is a schematic structure diagram of another display panel provided by an embodiment of the present invention;

[0027] Figure 18 is a schematic structure diagram of another display panel provided by an embodiment of the present invention;

[0028] Figure 19 is a schematic cross-sectional structure diagram of a display panel provided by an embodiment of the present invention;

[0029] Figure 20 is Figure 19 a schematic diagram of a part of the structure in the shown display panel;

[0030] Figure 21 is Figure 19 a schematic diagram of another part of the structure in the shown display panel;

[0031] Figure 22 is Figure 19 a schematic diagram of another part of the structure in the shown display panel;

[0032] Figure 23 is Figure 19 a schematic diagram of another part of the structure in the shown display panel;

[0033] Figure 24 is Figure 19 a schematic diagram of another part of the structure in the shown display panel;

[0034] Figure 25 is Figure 19 a schematic diagram of another part of the structure in the shown display panel;

[0035] Figure 26 is Figure 19 a schematic diagram of another part of the structure in the shown display panel;

[0036] Figure 27 is Figure 19 a schematic diagram of another part of the structure in the shown display panel;

[0037] Figure 28 is Figure 19 a schematic diagram of another part of the structure in the shown display panel;

[0038] Figure 29 is a schematic diagram of the structure of another display panel provided by an embodiment of the present invention;

[0039] Figure 30 is a schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention;

[0040] Figure 31 is Figure 30 a schematic diagram of a part of the structure in the shown display panel;

[0041] Figure 32 is Figure 30 a schematic diagram of another part of the structure in the shown display panel;

[0042] Figure 33 is Figure 30 a schematic diagram of another part of the structure in the shown display panel;

[0043] Figure 34 is Figure 30 a schematic diagram of another part of the structure in the shown display panel;

[0044] Figure 35 is Figure 30 a schematic diagram of another part of the structure in the shown display panel;

[0045] Figure 36 is Figure 30 a schematic diagram of another part of the structure in the shown display panel;

[0046] Figure 37 is Figure 30 a schematic diagram of another part of the structure in the shown display panel;

[0047] Figure 38 is Figure 30 a schematic diagram of another part of the structure in the shown display panel;

[0048] Figure 39 Schematic diagram of the structure of the seventh metal layer in a display panel provided by an embodiment of the present invention;

[0049] Figure 40 Schematic diagram of the structure of the eighth metal layer in a display panel provided by an embodiment of the present invention;

[0050] Figure 41 Schematic diagram of the structure of the anode layer in a display panel provided by an embodiment of the present invention;

[0051] Figure 42 Schematic diagram of the stacked structure of partial film layers of a display panel provided by an embodiment of the present invention;

[0052] Figure 43 Schematic diagram of the structure of the anode of a light-emitting element provided by an embodiment of the present invention;

[0053] Figure 44 Schematic diagram of the structure of another anode of a light-emitting element provided by an embodiment of the present invention;

[0054] Figure 45 Schematic diagram of the cross-sectional structure of another display panel provided by an embodiment of the present invention;

[0055] Figure 46 Schematic diagram of the cross-sectional structure of yet another display panel provided by an embodiment of the present invention;

[0056] Figure 47 Schematic diagram of the structure of yet another display panel provided by an embodiment of the present invention;

[0057] Figure 48 Schematic diagram of the structure of a display device provided by an embodiment of the present invention. Detailed implementation manners

[0058] The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It can be understood that the specific embodiments described herein are only used to explain the present invention, rather than limiting the present invention. Additionally, it should be noted that for the sake of description, only parts related to the present invention are shown in the accompanying drawings rather than all structures.

[0059] It should be noted that the terms "having", "including", "comprising", etc. described in this application all have an open meaning. That is, when it is described that a module "has", "includes", or "comprises" a first element, a second element, and / or a third element, it means that the module includes other elements in addition to the first element, the second element, and / or the third element. In addition, the ordinal numbers such as "first", "second", and "third" in this application are not intended to limit the specific order, but only to distinguish each part. In this application, when it is described that layer A and layer B are "arranged in the same layer", it means that layer A and layer B are made of the same material and by the same process.

[0060] Figure 1 FIG. 4 is a schematic structural diagram of a display panel in a related art provided by an embodiment of the present invention. Figure 2 is Figure 1 a timing diagram of a data signal line in the shown display panel. Reference can be made to Figure 1 , in the related art, there are some sub-pixel columns including red sub-pixels R and blue sub-pixels B arranged alternately along the column direction. The pixel circuits corresponding to the red sub-pixels R and the blue sub-pixels B in the same column are electrically connected to the same data signal line Data, and the data signal line Data provides data signals to the pixel circuits corresponding to the red sub-pixels R and the blue sub-pixels B respectively. Reference can be made to Figure 2 , since the voltage magnitudes of the data signals required by the red sub-pixels R and the blue sub-pixels B are different, the data signal voltage on the data signal line Data needs to jump between two different voltage values. As Figure 2 shown, when displaying a certain picture, such as a pure red, blue, or white picture, etc., there is a large voltage fluctuation on the data signal line Data, resulting in an increase in the power consumption of the display controller (such as a driving chip).

[0061] Based on the defects of the above-mentioned related art, the present application proposes a display panel. Figure 3 FIG. 19 is a schematic structural principle diagram of a display panel provided by an embodiment of the present invention. Figure 4 is Figure 3 a partial film layer structure schematic diagram of the shown display panel. Reference can be made to Figure 3 and Figure 4, the display panel may include: multiple data signal lines Data, the multiple data signal lines Data extend along a first direction X and are arranged along a second direction Y, and the first direction X and the second direction Y intersect; multiple first pixel circuits 10, the multiple first pixel circuits 10 arranged along the first direction X are electrically connected to the same data signal line Data; multiple first pixel circuit columns 10c and multiple first light-emitting element columns 20c; the first pixel circuit column 10c includes multiple first pixel circuits 10 arranged along the first direction X; the first light-emitting element column 20c includes two light-emitting elements 20 with different emission colors arranged along the first direction X, and the two light-emitting elements 20 with different emission colors are respectively electrically connected to the first pixel circuits 10 in different first pixel circuit columns 10c, and the multiple first pixel circuits 10 in the same first pixel circuit column 10c are electrically connected to multiple light-emitting elements 20 of the same color.

[0062] As Figure 3 and Figure 4 shown, the display panel may include multiple data signal lines Data, multiple pixel circuits, and multiple light-emitting elements 20. The multiple pixel circuits include multiple first pixel circuits 10, and the multiple first pixel circuits 10 are arranged in an array along the first direction X and the second direction Y. Figure 3 As shown, the first direction X may be the column direction, and the second direction Y may be the row direction, but actually it is not limited thereto. In this embodiment, the first direction X is taken as the column direction and the second direction Y is taken as the row direction for illustration. The multiple first pixel circuits 10 arranged along the first direction X constitute the first pixel circuit column 10c, and the multiple first pixel circuit columns 10c are arranged along the second direction Y. One data signal line Data is electrically connected to the multiple first pixel circuits 10 arranged along the first direction X, that is, one data signal line Data is connected to the multiple first pixel circuits 10 in the same first pixel circuit column 10c, and the same data signal line Data transmits data signals to the multiple first pixel circuits 10 arranged along the first direction X. Figure 3 Shown is a schematic diagram of the electrical connection relationship between the data signal line Data, the first pixel circuit 10, and the light-emitting element 20, rather than the actual wiring diagram. Figure 3 shows that one data signal line Data is connected to the light-emitting elements 20 of one color through a column of first pixel circuits 10.

[0063] Continue to refer to Figure 3 and Figure 4, the pixel circuit 1 is electrically connected to the light-emitting element 20, thereby driving the light-emitting element 20 to emit light and realizing the display of the display panel. Among them, the multiple light-emitting elements 20 at least include light-emitting elements 20 of two colors. The light-emitting element 20 can be an organic light-emitting diode. The multiple light-emitting elements 20 arranged along the first direction X form the first light-emitting element column 20c, and the multiple first light-emitting element columns 20c are arranged along the second direction Y. Among them, at least two colors of light-emitting elements 20 are included in the same first light-emitting element column 20c, that is, the multiple light-emitting elements 20 arranged along the first direction X include light-emitting elements 20 with different colors. Figure 3 In the figure, the light-emitting elements 20 of different colors are represented by diamond-shaped figures with different filling patterns. The embodiment of the present invention defines that the light-emitting elements 20 with different colors in the same first light-emitting element column 20c are electrically connected to the first pixel circuits 10 in different first pixel circuit columns 10c, and the multiple first pixel circuits 10 in the same first pixel circuit column 10c are electrically connected to the multiple light-emitting elements 20 of the same color. In other words, the first pixel circuits 10 in the same column are connected to the light-emitting elements 20 of the same color, and the light-emitting elements 20 connected by the first pixel circuits 10 in the same column are located in different first light-emitting element columns 20c. Among them, along the thickness direction of the display panel, the first pixel circuit column 10c can overlap with the first light-emitting element column 20c, that is, the first pixel circuit column 10c overlaps with at least two light-emitting elements 20 with different emission colors.

[0064] In this setting method, the multiple first pixel circuits 10 connected to the same data signal line Data are connected to the light-emitting elements 20 of the same color in different first light-emitting element columns 20c. A data signal line Data provides data signals to the multiple light-emitting elements 20 of the same color and located in different first light-emitting element columns 20c through the multiple first pixel circuits 10 arranged along the first direction X.

[0065] Figure 5 For Figure 3 the timing diagram on the data signal line in the shown display panel, refer to Figures 3 to 5, since the same data signal line Data is connected to the light-emitting elements 20 of the same color, a data signal required by the light-emitting elements 20 of one color is transmitted on one data signal line Data. That is, only one stable data signal can be transmitted on one data signal line Data, or in other words, there is no need to provide a data signal with a changing voltage value on the same data signal line Data. There is no problem of signal voltage jump on the data signal line Data, thus solving the problem of relatively high power consumption of the display controller (driver chip) in the related art, achieving the purpose of reducing the power consumption of the display controller, and further reducing the overall power consumption of the display panel. According to tests, by adopting the solution in the embodiment of the utility model, the power consumption of the display controller can be reduced by about 25%. In addition, since there is no need to transmit a changing data signal on the same data signal line Data, the problem that the jumping data signal is easily coupled with other signals can also be avoided, ensuring the stability of signal transmission in the display panel.

[0066] Exemplarily, the first light-emitting element column 20c may include red light-emitting elements and blue light-emitting elements arranged along the first direction X. The red light-emitting elements and blue light-emitting elements arranged along the first direction X are connected to different columns of the first pixel circuits 10. Or, the red light-emitting elements and blue light-emitting elements connected to the same column of the first pixel circuits 10 are located in different first light-emitting element columns 20c. The arrangement of the light-emitting elements 20 of different colors is more uniform, which is beneficial to improving the color deviation and jagged phenomena and enhancing the display effect of the display panel.

[0067] Figure 3 and Figure 4 In the shown embodiment, two light-emitting elements 20 with different light-emitting colors are respectively electrically connected to the first pixel circuits 10 in two columns of the first pixel circuit columns 10c. That is, multiple light-emitting elements 20 of one color in the same first light-emitting element column 20c are electrically connected to multiple first pixel circuits 10 in one column of the first pixel circuit columns 10c, and multiple light-emitting elements 20 of another color are electrically connected to multiple first pixel circuits 10 in another column of the first pixel circuit columns 10c. The actual situation is not limited to this. In other embodiments, multiple light-emitting elements 20 of one color in the same first light-emitting element column 20c can also be electrically connected to the first pixel circuits 10 in two or more columns of the first pixel circuit columns 10c, and multiple light-emitting elements 20 of another color are electrically connected to the first pixel circuits 10 in two or more other columns of the first pixel circuit columns 10c, as long as the light-emitting elements 20 connected to the same column of the first pixel circuits 10 have the same color. The embodiment of the present utility model does not limit this.

[0068] It should be noted that Figure 3 and Figure 4Among them, the thick dotted line extending along the first direction can be understood as the approximate position of the boundary line between adjacent columns of pixel circuits, and the thick dotted line extending along the second direction can be understood as the approximate position of the boundary line between adjacent rows of pixel circuits.

[0069] The display panel provided by the embodiment of the present invention includes multiple data signal lines, multiple first pixel circuit columns, and multiple first light-emitting element columns. Multiple first pixel circuits arranged along the first direction are electrically connected to the same data signal line; the multiple first pixel circuit columns include multiple first pixel circuits arranged along the first direction, and the multiple first light-emitting element columns include light-emitting elements with different emission colors arranged along the first direction. Two light-emitting elements with different emission colors are electrically connected to the first pixel circuits located in different first pixel circuit columns, and multiple first pixel circuits in the same first pixel circuit column are electrically connected to multiple light-emitting elements of the same color. By adopting the above solution, multiple first pixel circuits connected to the same data signal line are electrically connected to the light-emitting elements of the same color located in different first light-emitting element columns. Only the data signals required by the corresponding light-emitting elements of one color can be transmitted on one data signal line, so that stable data signals are transmitted on the data signal line, and there is no problem of voltage jump on the data signal line, thereby reducing the power consumption of the display controller and the display panel.

[0070] In addition, in the embodiment of the present invention, the light-emitting elements in the first light-emitting element column 20c are connected to the first pixel circuit 10, which may refer to that the light-emitting elements in the first light-emitting element column 20c are connected to a certain node of the first pixel circuit 10. Figure 6 It is a circuit schematic diagram of a first pixel circuit provided by an embodiment of the present invention. Figure 7 For Figure 6 The driving timing diagram of the shown embodiment. The setting method of the first pixel circuit 10 has diversity. Figure 6 Taking the pixel circuit as an example of "8T1C", where "T" represents a transistor and "C" represents a capacitor, the embodiment of the present invention only takes this as an example for illustration. Other pixel circuits, such as "6T1C", "7T1C" pixel circuits, etc., are within the scope of the technical solutions protected by the embodiment of the present invention.

[0071] Exemplarily, as Figure 6 and Figure 7 shown, the pixel circuit may include a first light-emitting control transistor T1, a data writing transistor T2, a driving transistor T3, a threshold compensation transistor T4, an initialization transistor T5, a second light-emitting control transistor T6, a reset transistor T7, and a storage capacitor Cst. Further, Figure 6 the pixel circuit in Figure 6 and Figure 7For example, the first scan signal line S1 can control the on or off of the initialization transistor T5 of the pixel circuit, and reset the gate potential of the driving transistor T3 when the initialization transistor T5 is on, that is, transmit the initialization signal of the initialization signal line VREF1 to the initialization transistor T5 and reset the connection node (the first node N1) of the driving transistor T3, the initialization transistor T5, the threshold compensation transistor T4 and the storage capacitor Cst. The third scan signal line SP* controls the on and off of the data writing transistor T2 of the pixel circuit, and writes the data signal on the data signal line Data to the gate of the driving transistor T3 when the data writing transistor T2 is on. The second scan signal line S2 can control the on and off of the threshold compensation transistor T4, and compensate the threshold voltage of the driving transistor T3 when the threshold compensation transistor T4 is on. At the same time, the fourth scan signal line SP controls the on and off of the reset transistor T7, and resets the anode of the light-emitting element connected to the pixel circuit when the reset transistor T7 is on, that is, transmits the reset signal of the reset signal line VREF2 to the anode of the light-emitting element. The light emission control signal line EMIT controls the on and off of the first light emission control transistor T1 and the second light emission control transistor T6, and transmits the power supply signal transmitted by the power supply signal line PVDD to the light-emitting element when controlling the first light emission control transistor T1 and the second light emission control transistor T6 to be on, so as to realize the display and light emission of the light-emitting element. Further, refer to Figure 6As shown, the pixel circuit further includes a bias transistor T8. The fourth scan signal line SP controls the conduction or cutoff of the bias transistor T8, and biases and adjusts the driving transistor T3 when the bias transistor T8 is conducting, that is, transmits the bias signal of the bias voltage signal line DVH to the bias transistor T8, and biases and adjusts the connection node (the second node N2) of the driving transistor T3, the first light-emitting control transistor T1, and the data writing transistor T2, ensuring the operating stability of the driving transistor T3. It can be understood that the bias transistor T8 can also be electrically connected to the third node N3 (the connection node of the driving transistor T3, the second light-emitting control transistor T6, and the threshold compensation transistor T4), or the bias transistor T8 is electrically connected to both the second node N2 and the third node N3 simultaneously. The bias signal of the bias voltage signal line DVH includes an enable level and a non-enable level. The enable level can make the bias transistor T8 conduct; the non-enable level can make the bias transistor T8 cutoff (or non-conducting). By setting the bias transistor T8, the brightness of the first frame during the picture display can be improved, avoiding the first frame from being too dark, and ensuring better consistency in the picture display effect. In addition, under low-frequency driving, the leakage situation is more obvious. By controlling the conduction of the bias transistor T8 and writing the bias voltage to the source and / or drain of the driving transistor T3 using the bias transistor T8, the bias state of the driving transistor T3 can be maintained consistent with the bias state when the data voltage is just written, so as to improve the stability of the operating state of the driving transistor T3, improve low-frequency flicker, and thus enhance the picture display effect of the display panel.

[0072] Exemplarily, continue to refer to Figure 6 and Figure 7 , taking the initialization transistor T5 and the threshold compensation transistor T4 in the pixel circuit as N-type transistors, and the remaining transistors as P-type transistors as an example. The enable level can make the transistor conduct, and the non-enable level can make the transistor cutoff (or non-conducting). Among them, the non-enable level of the light-emitting control signal EMIT is a high level, and the enable level is a low level; the enable level of the signals transmitted by the first scan signal line S1 and the second scan signal line S2 is a high level, and the non-enable level is a low level; the enable level of the signals transmitted by the fourth scan signal line SP and the fourth scan signal line SP* is a low level, and the non-enable level is a high level. Specifically, in one driving cycle Y of the pixel circuit, the gate signal transmitted by the light-emitting control signal line EMIT includes multiple non-enable level stages and multiple enable level stages, and the multiple non-enable level stages and multiple enable level stages are arranged alternately. Among them, when the light-emitting control signal line EMIT is at the non-enable level, the first light-emitting control transistor T1 and the second light-emitting control transistor T6 are cutoff, and when the light-emitting control signal line EMIT is at the enable level, the first light-emitting control transistor T1 and the second light-emitting control transistor T6 are conducting.

[0073] Further, in a driving cycle Y of the pixel circuit, it includes a data writing stage Y1, a light emitting stage Y2, and a light emission maintaining stage Y3. Among them, the data writing stage Y1 includes a non-enabling level stage of the light emission control signal EMIT, the light emitting stage Y2 includes an enabling level stage of the light emission control signal EMIT, and in the light emission maintaining stage Y3, the light emission control signal EMIT includes multiple non-enabling level stages and at least one enabling level stage. Figure 7 Taking one enabling level stage as an example for illustration. At the same time, the level of the bias voltage signal line DVH in the data writing stage Y1 and the light emitting stage Y2 can be the same as or different from the level of the bias voltage signal line DVH in the light emission maintaining stage Y3. Figure 7 As shown.

[0074] Further, the data writing stage Y1 includes a first bias adjustment stage Y11. In the first bias adjustment stage Y11, the signal transmitted by the fourth scan signal line SP includes at least one low level period, and during this period, the signal transmitted by the second scan signal line S2 includes at least one high level period. In other words, in the first bias adjustment stage Y11, at least the bias transistor T8 and the threshold compensation transistor T4 are turned on. The bias signal of the bias voltage signal line DVH is transmitted to the driving transistor T3 through the bias transistor T8, and then transmitted to the gate of the driving transistor T3 through the threshold compensation transistor T4. That is, in the first bias adjustment stage Y11, the bias signal can bias and adjust the first node N1, the second node N2, and the third node N3. The data writing stage Y1 also includes an initialization and second bias adjustment stage Y12. In the initialization and second bias adjustment stage Y12, the signal transmitted by the second scan signal line S2 includes at least one high level period, and at the same time, there is also at least one high level period when the signal transmitted by the second scan signal line S2. In other words, in the initialization and second bias adjustment stage Y12, the initialization transistor T5 is turned on, and the later threshold compensation transistor T4 is also turned on. The initialization signal line VREF1 can adjust the gate of the driving transistor T3 through the initialization transistor T5, and the initialization signal line VREF1 can also adjust the third node N3 through the initialization transistor T5 and the threshold compensation transistor T4.

[0075] The data writing stage Y1 further includes a data signal writing stage Y13. During the period when the signal transmitted by the second scanning signal line S2 includes a high level in the data signal writing stage Y13, it also includes at least one period when the signal transmitted by the third scanning signal line SP* includes a low level. In other words, in the data signal writing stage Y13, the data writing transistor T2 and the threshold compensation transistor T4 are turned on, and the data signal can be transmitted to the gate of the driving transistor T3 through the data writing transistor T2 and the threshold compensation transistor T4. The data writing stage Y1 further includes a third bias adjustment stage Y14. In the third bias adjustment stage Y14, the signal transmitted by the fourth scanning signal line SP includes at least one period of low level, and the second stage N2 can be further biased and adjusted through the bias transistor T8 during this time period.

[0076] Furthermore, if a driving cycle Y of the pixel circuit is a low-frequency cycle, the driving cycle Y includes a data writing stage Y1, a light-emitting stage Y2, and a light-emitting holding stage Y3. If a driving cycle Y of the pixel circuit is a high-frequency cycle, the driving cycle Y includes a data writing stage Y1 and a light-emitting stage Y2.

[0077] Optionally, the types of transistors in the pixel circuit are diverse. For example, the transistors can all be low-temperature poly-silicon (LTPS) transistors, or all be indium gallium zinc oxide (IGZO) transistors, or some be LTPS transistors and the other part be IGZO transistors. LTPS transistors have advantages such as high switching speed, high carrier mobility, and low power. IGZO transistors have advantages such as low leakage current. A display panel of low-temperature polycrystalline oxide (LTPO) combining LTPO and IGZO not only has the advantages of high resolution, high response speed, high brightness, and high aperture ratio of the LTPS display panel, but also has the advantage of low leakage current of IGZO. Exemplarily, the first light-emitting control transistor T1, the data writing transistor T2, the driving transistor T3, the second light-emitting control transistor T6, and the reset transistor T7 can be PMOS transistors; at least one of the threshold compensation transistor T4 and the initialization transistor T5 can be a PMOS transistor, or at least one can be an NMOS transistor. In this embodiment of the present invention, only the case where the threshold compensation transistor T4 and the initialization transistor T5 are both NMOS transistors is taken as an example for illustration. Based on the specific type of the display panel, this embodiment of the present invention is not limited and can be adaptively adjusted according to actual production requirements.

[0078] In addition, the threshold compensation transistor T4 and the initialization transistor T5 can be single-gate transistors or double-gate transistors. When double-gate transistors are adopted, the leakage current of the transistors can be reduced to improve the display effect of the display panel. The present utility model only takes the example that both the threshold compensation transistor T4 and the initialization transistor T5 are top-bottom double-gate transistors for illustration.

[0079] As Figure 6 shown, the reset transistor T7 and the second light-emitting control transistor T6 are connected to the anode of the light-emitting element. The connection node of the reset transistor T7 and the second light-emitting control transistor T6 with the anode of the light-emitting element is the fourth node N4. The pixel circuit is connected to the anode of the light-emitting element through the fourth node N4. Figure 4 The connection node of the light-emitting element 20 and the first pixel circuit 10 shown is the fourth node N4. The anode of the light-emitting element 20 is connected to the fourth node N4 corresponding to the first pixel circuit 10.

[0080] Figure 3 and Figure 4 do not show all the structures of the first pixel circuit 10. The first pixel circuit 10 is represented by the fourth node N4 of the first pixel circuit 10. Both the first pixel circuit column 10c and the first pixel circuit row 10r are divided by the fourth node N4.

[0081] Optionally, reference can be continued to Figure 3 and Figure 4 , in a possible embodiment, the display panel further includes a plurality of first pixel circuit rows 10r and a plurality of first light-emitting element rows 20r; the first pixel circuit row 10r includes a plurality of first pixel circuits 10 arranged along the second direction Y; the first light-emitting element column 20c includes first color light-emitting elements R and second color light-emitting elements B arranged alternately along the first direction X, and the first light-emitting element row 20r includes first color light-emitting elements R and second color light-emitting elements B arranged alternately along the second direction Y; the light-emitting colors of the first color light-emitting elements R and the second color light-emitting elements B are different; the plurality of first pixel circuits 10 in the same first pixel circuit column 10c are electrically connected to the first color light-emitting elements R in at least two adjacent columns of the first light-emitting element columns 20c arranged along the second direction Y, or are electrically connected to the second color light-emitting elements B in at least two adjacent columns of the first light-emitting element columns 20c arranged along the second direction Y; the plurality of first pixel circuits 10 in the same first pixel circuit row 10r are electrically connected to the plurality of light-emitting elements 20 in the same first light-emitting element row 20r.

[0082] As Figure 3 and Figure 4As shown, a plurality of first pixel circuits 10 arranged along the second direction Y form a first row of pixel circuits 10r, and a plurality of first rows of pixel circuits 10r are arranged along the first direction X. The light-emitting elements 20 with different emission colors at least include a first-color light-emitting element R and a second-color light-emitting element B. In the first light-emitting element column 20c, the first-color light-emitting element R and the second-color light-emitting element B are alternately arranged in sequence. In the first light-emitting element row 20r, the first-color light-emitting element R and the second-color light-emitting element B are alternately arranged in sequence. That is, along the first direction X and the second direction Y, a second-color light-emitting element B is arranged between any two adjacent first-color light-emitting elements R. This enables the uniform arrangement of the first-color light-emitting element R and the second-color light-emitting element B in the display panel, improving the color mixing effect.

[0083] Furthermore, as Figure 3 and Figure 4 shown, it can be set that a plurality of first pixel circuits 10 in the same first pixel circuit column 10c are electrically connected to the light-emitting elements 20 of the same color in at least two adjacent columns of first light-emitting element columns 20c arranged along the second direction Y. That is, the light-emitting elements 20 with the same emission color connected by the plurality of first pixel circuits 10 arranged along the first direction X are located in at least two adjacent columns of first light-emitting element columns 20c. Thus, a plurality of light-emitting elements 20 of the same color in at least two adjacent columns of first light-emitting element columns 20c are driven by one column of first pixel circuit columns 10c. The distance between the light-emitting elements 20 connected by the first pixel circuit 10 along the second direction Y is relatively short, which can reduce the connection line length between the first pixel circuit 10 and the light-emitting elements 20 in different columns and lower the wiring difficulty. In addition, in this embodiment, a plurality of first pixel circuits 10 arranged along the second direction Y are connected to a plurality of light-emitting elements in the same first light-emitting element row 20r. That is, a plurality of first pixel circuits 10 in the same first row of pixel circuits 10r are respectively electrically connected to the light-emitting elements 20 of different colors in the corresponding first light-emitting element row 20r, so that a plurality of first pixel circuits 10 in the first row of pixel circuits 10r drive a plurality of light-emitting elements 20 in the corresponding first light-emitting element row 20r.

[0084] Reference Figure 3 and Figure 4, when the first light-emitting element column 20c includes the first-color light-emitting elements R and the second-color light-emitting elements B, and the first light-emitting element row 20r includes the first-color light-emitting elements R and the second-color light-emitting elements B, there are multiple first pixel circuits 10 in some of the first pixel circuit columns 10c that are connected to the first-color light-emitting elements R in adjacent different first light-emitting element columns 20c, and there are multiple first pixel circuits 10 in another part of the first pixel circuit columns 10c that are connected to the second-color light-emitting elements B in adjacent different first light-emitting element columns 20c. That is, in the same first light-emitting element column 20c, multiple first-color light-emitting elements R are electrically connected to the first pixel circuits 10 in one column of the first pixel circuit columns 10c, and multiple second-color light-emitting elements B are electrically connected to the first pixel circuits 10 in another column of the first pixel circuit columns 10c. Among the multiple first pixel circuits 10 arranged along the second direction Y (i.e., the first pixel circuits 10 in the same row), some of the first pixel circuits 10 are connected to the first-color light-emitting elements R, and some of the first pixel circuits 10 are connected to the second-color light-emitting elements B.

[0085] Exemplarily, Figure 3 and Figure 4 In the illustrated embodiment, along the direction from left to right shown in the figure, the first column of the first pixel circuit columns 10c is connected to the multiple first-color light-emitting elements R in the first column and the second column of the first light-emitting element columns 20c, and the second column of the first pixel circuit columns 10c is connected to the multiple second-color light-emitting elements B in the first column and the second column of the first light-emitting element columns 20c.

[0086] Furthermore, continue to refer to Figure 3 , the display panel further includes multiple second pixel circuit columns 11c and multiple second pixel circuit rows 11r. The second pixel circuit columns 11c include multiple second pixel circuits 11 arranged along the first direction X, and the second pixel circuit rows 11r include multiple second pixel circuits 11 arranged along the second direction Y; the second pixel circuit columns 11c are electrically connected to the same data signal line Data; the display panel further includes multiple second light-emitting element columns 21c and multiple second light-emitting element rows 21r. The second light-emitting element columns 21c include multiple third-color light-emitting elements G arranged along the first direction X, and the second light-emitting element rows 21r include multiple third-color light-emitting elements G arranged along the second direction Y; the light-emitting colors of the third-color light-emitting elements G are different from those of the first-color light-emitting elements R and the second-color light-emitting elements B; multiple second pixel circuits 11 in the same second pixel circuit column 11c are electrically connected to multiple third-color light-emitting elements G in the same second light-emitting element column 21c, and multiple second pixel circuits 11 in the same second pixel circuit row 11r are electrically connected to multiple third-color light-emitting elements G in the same second light-emitting element row 21r.

[0087] As Figure 3 and Figure 4 shown, the pixel circuit further includes a second pixel circuit 11. The second pixel circuits 11 can be arranged in an array along a first direction X and a second direction Y. A plurality of second pixel circuits 11 arranged along the first direction X constitute a second pixel circuit column 11c. The plurality of second pixel circuit columns 11c are arranged along the second direction Y. A plurality of second pixel circuits 11 arranged along the second direction Y constitute a second pixel circuit row 11r. The plurality of second pixel circuit rows 11r are arranged along the first direction X. The data signal line Data is connected to a plurality of second pixel circuits 11 in the same second pixel circuit column 11c, and the same data signal line Data transmits data signals to the plurality of second pixel circuits 11 arranged along the first direction X.

[0088] Continuing to refer to Figure 3 and Figure 4 , the light-emitting element further includes a third-color light-emitting element G. A plurality of third-color light-emitting elements G arranged along the first direction X constitute a second light-emitting element column 21c. The plurality of second light-emitting element columns 21c are arranged along the second direction Y. A plurality of third-color light-emitting elements G arranged along the second direction Y constitute a second light-emitting element row 21r. The plurality of second light-emitting element rows 21r are arranged along the second direction Y. When the first-color light-emitting element R is a red light-emitting element and the second-color light-emitting element B is a blue light-emitting element, the third-color light-emitting element G can be a green light-emitting element, and the combination of the red light-emitting element, the blue light-emitting element, and the green light-emitting element realizes full-color display.

[0089] Among them, the second pixel circuit column 11c can be correspondingly arranged with the second light-emitting element column 21c. A plurality of second pixel circuits 11 in the same second pixel circuit column 11c are electrically connected to a plurality of third-color light-emitting elements G in the same second light-emitting element column 21c. The data signal line Data electrically connected to the second pixel circuit column 11c can only transmit data signals corresponding to the third-color light-emitting element G, and there is no voltage jump on the data signal line Data. The second pixel circuit row 11r can be correspondingly arranged with the second light-emitting element row 21r, so that a plurality of second pixel circuits 11 in the second pixel circuit row 11r drive a plurality of light-emitting elements 20 in the corresponding second light-emitting element row 21r.

[0090] Furthermore, continuing to refer to Figure 3As shown, the first pixel circuit 10 and the second pixel circuit 11 are alternately arranged in the same pixel circuit row. In a row of pixel circuits, the pixel circuit driving the first light-emitting element is the first pixel circuit, forming the first pixel circuit row, and the pixel circuit driving the second light-emitting element is the second pixel circuit, forming the second pixel circuit row. Further, the first pixel circuit column 10c and the second pixel circuit column 11c are alternately arranged in the second direction, that is, there is one column of the second pixel circuit column 11c between two adjacent columns of the first pixel circuit column 10c, and there is one column of the first pixel circuit column 10c between two adjacent columns of the second pixel circuit 11c. The two adjacent columns of the first pixel columns 10c mentioned above can be understood as two columns of the first pixel circuit columns 10c with one column of the second pixel circuit column 11c interposed therebetween, rather than two directly adjacent pixel columns.

[0091] Optionally, continue to refer to Figure 4 , along the first direction X, the first light-emitting element rows 20r and the second light-emitting element rows 21r are alternately arranged; along the second direction Y, the first light-emitting element columns 20c and the second light-emitting element columns 21c are alternately arranged.

[0092] As Figure 4 shown, the first light-emitting element rows 20r and the second light-emitting element rows 21r are alternately arranged along the first direction X, that is, there is a second light-emitting element row 21r between two adjacent first light-emitting element rows 20r, making the arrangement of different color sub-pixels relatively uniform and improving the color mixing effect. The first light-emitting element columns 20c and the second light-emitting element columns 21c are alternately arranged along the first direction X, that is, the red and blue light-emitting element columns and the green light-emitting element columns are alternately arranged along the second direction Y, which can ensure the uniform mixing of red, green, and blue lights and ensure the image display effect. Further, in the embodiments of the present invention, it is defined that the light-emitting elements 20 in at least two adjacent first light-emitting element columns 20c do not include the light-emitting elements 20 in the second light-emitting element column 21c.

[0093] Optionally, continue to refer to Figure 3 and Figure 4 , in some embodiments, there may also be a second light-emitting element column 21c between two adjacent first light-emitting element columns 20c. The second light-emitting element column 21c includes a plurality of light-emitting elements 2 of the same color arranged along the first direction X, and the light-emitting elements 2 in the second light-emitting element column 21c have different light-emitting colors from the light-emitting elements 2 in the first light-emitting element column 20c. For example, the second light-emitting element column 21c may include a plurality of third-color light-emitting elements G arranged along the first direction X, aiming to make the arrangement of different color light-emitting elements 2 more uniform and improve the color cast phenomenon.

[0094] Further, Figure 8 For Figure 4 the partial enlarged structural schematic diagram of the display panel shown, reference can be made in combination withFigure 3 , Figure 4 and Figure 8 , at least partially adjacent first pixel circuit column groups 100 and second pixel circuit column groups 101 include the i-th column first pixel circuit column 10c and the (i + 1)-th column first pixel circuit column 10c; at least two partially adjacent first pixel circuits 10 in the i-th column first pixel circuit column 10c include the i- j th first pixel circuit 10i j and the i- (j+1) th first pixel circuit 10i (j+1) ; at least two partially adjacent first pixel circuits 10 in the (i + 1)-th column first pixel circuit column 10c include the (i + 1)- j th first pixel circuit 10(i + 1) j and the (i + 1)- (j+1) th first pixel circuit 10(i + 1) (j+1) ; at least two partially adjacent columns of first light-emitting element columns 20c include the p-th column first light-emitting element column 20c and the (p + 1)-th column first light-emitting element column 20c; at least two partially adjacent light-emitting elements in the p-th column first light-emitting element column 20c include the p- q th light-emitting element 20p q and the p- (q+1) th light-emitting element 20p (q+1) ; at least two partially adjacent light-emitting elements in the (p + 1)-th column first light-emitting element column 20c include the (p + 1)- q th light-emitting element 20(p + 1) q and the (p + 1)- (q+1) th light-emitting element 20(p + 1) (q+1) ; where i, j, p, and q are all positive integers; the i- j th first pixel circuit 10i j is electrically connected to the p- q th light-emitting element 20p q ; the i- (j+1) th first pixel circuit 10i (j+1) is electrically connected to the (p + 1)- (q+1) th light-emitting element 20(p + 1) (q+1) ; the (i + 1)- j th first pixel circuit 10(i + 1) j is electrically connected to the (p + 1)- q th light-emitting element 20(p + 1) q ; the (i + 1)- (j+1) th first pixel circuit 10(i + 1) (j+1) is electrically connected to the p- (q+1) th light-emitting element 20p (q+1) electrically.

[0095] As Figure 3 and Figure 4 shown, the first pixel circuit column 10c in the first pixel circuit column group 100 may be the i-th column of the first pixel circuit column 10c, and the first pixel circuit column 10c in the second pixel circuit column group 101 adjacent to the first pixel circuit column group 100 may be the (i + 1)-th column of the first pixel circuit column 10c. Two adjacent first pixel circuits 10 in the i-th column of the first pixel circuit column 10c are respectively the i j -th first pixel circuit 10i j and the i (j+1) -th first pixel circuit 10i (j+1) . Two adjacent first pixel circuits 10 in the (i + 1)-th column of the first pixel circuit column 10c are respectively the (i + 1) j -th first pixel circuit 10(i + 1) j and the (i + 1) (j+1) -th first pixel circuit 10(i + 1) (j+1) . The values of i and j are not limited, and the two may be equal or unequal. It can be understood that i corresponds to a certain column of the first pixel circuit column 10c, j corresponds to a certain row of the first pixel circuit row 10r, i may be less than the total number of columns of the first pixel circuit column 10c, and j may be less than the total number of rows of the first pixel circuit row 10r.

[0096] Two adjacent columns of the first light-emitting element columns 20c may be the p-th column of the first light-emitting element column 20c and the (p + 1)-th column of the first light-emitting element column 20c. Two adjacent light-emitting elements in the p-th column of the first light-emitting element column 20c are respectively the p q -th light-emitting element 20p q and the p (q+1) -th light-emitting element 20p (q+1) . Two adjacent light-emitting elements in the (p + 1)-th column of the first light-emitting element column 20c are respectively the (p + 1) q -th light-emitting element 20(p + 1) q and the (p + 1) (q+1) -th light-emitting element 20(p + 1) (q+1) . Among them, the p q -th light-emitting element 20p q and the (p + 1) (q+1) -th light-emitting element (p + 1) (q+1) may be the first color light-emitting element R, the p (q+1) -th light-emitting element 20p (q+1) and the (p + 1) q -th light-emitting element 20(p + 1) qIt can be the second color light-emitting element B. The values of p and q are not limited, and the two can be equal or unequal. p corresponds to the first light-emitting element column 20c of a certain column, and q corresponds to the first light-emitting element row 20r of a certain row. P can be less than the total number of columns of the first light-emitting element column 20c, and q can be less than the total number of rows of the first light-emitting element row 20r.

[0097] Optionally, the first pixel circuit column 10c of the i-th column can refer to the first pixel circuit column 10c of the odd-numbered columns of the display panel. The first pixel circuit column 10c of the (i + 1)-th column can refer to the first pixel circuit column 10c of the even-numbered columns of the display panel. The first pixel circuit row 10r of the j-th row can refer to the first pixel circuit row 10r of the odd-numbered rows of the display panel. The first pixel circuit row 10r of the (j + 1)-th row can refer to the first pixel circuit row 10r of the even-numbered rows of the display panel. The first light-emitting element column 20c of the p-th column can refer to the first light-emitting element column 20c of the odd-numbered columns of the display panel. The first light-emitting element column 20c of the (p + 1)-th column can refer to the first light-emitting element column 20c of the even-numbered columns of the display panel. The first light-emitting element row 20r of the q-th row can refer to the first light-emitting element row 20r of the odd-numbered rows of the display panel. The first light-emitting element row 20r of the (q + 1)-th row can refer to the first light-emitting element row 20r of the even-numbered rows of the display panel. Alternatively, the first pixel circuit column 10c of the i-th column can refer to the first pixel circuit column 10c of the even-numbered columns of the display panel. The first pixel circuit column 10c of the (i + 1)-th column can refer to the first pixel circuit column 10c of the odd-numbered columns of the display panel. The first pixel circuit row 10r of the j-th row can refer to the first pixel circuit row 10r of the even-numbered rows of the display panel. The first pixel circuit row 10r of the (j + 1)-th row can refer to the first pixel circuit row 10r of the even-numbered rows of the display panel. The first light-emitting element column 20c of the p-th column can refer to the first light-emitting element column 20c of the even-numbered columns of the display panel. The first light-emitting element column 20c of the (p + 1)-th column can refer to the first light-emitting element column 20c of the odd-numbered columns of the display panel. The first light-emitting element row 20r of the q-th row can refer to the first light-emitting element row 20r of the even-numbered rows of the display panel. The first light-emitting element row 20r of the (q + 1)-th row can refer to the first light-emitting element row 20r of the odd-numbered rows of the display panel. The embodiments of the present invention do not limit whether i, j, p, and q are odd or even.

[0098] As Figure 4 and Figure 8 shown, the j-th first pixel circuit 10 of the i-th column (i.e., the i-th j first pixel circuit 10i j ) can be electrically connected to the q-th light-emitting element of the p-th column (i.e., the p-th q light-emitting element 20p q ); the (j + 1)-th first pixel circuit 10 of the i-th column (i.e., the i-th (j+1) first pixel circuit 10i (j+1) ) can be electrically connected to the (q + 1)-th light-emitting element of the (p + 1)-th column (i.e., the (p + 1)-th(q+1) The (p + 1)-th light-emitting element 20(p + 1) (q+1) ) is electrically connected; the j-th first pixel circuit 10 in the (i + 1)-th column (i.e., the (i + 1) j )th first pixel circuit 10(i + 1) j ) can be electrically connected to the q-th light-emitting element in the (p + 1)-th column (i.e., the (p + 1) q )th light-emitting element 20(p + 1) q ) is electrically connected; the (j + 1)-th first pixel circuit 10 in the (i + 1)-th column (i.e., the (i + 1) (j+1) )th first pixel circuit 10(i + 1) (j+1) ) can be electrically connected to the (q + 1)-th light-emitting element in the p-th column (i.e., the p (q+1) )th light-emitting element 20p (q+1) ) is electrically connected. That is, in the first pixel circuit column 10c of the i-th column, some first pixel circuits 10 are electrically connected to the first-color light-emitting element R in the first light-emitting element column 20c of the p-th column, and some other first pixel circuits 10 are electrically connected to the first-color light-emitting element R in the first light-emitting element column 20c of the (p + 1)-th column, and the first pixel circuits 10 connected to the first-color light-emitting element R in the first light-emitting element column 20c of the p-th column and the first pixel circuits 10 connected to the first-color light-emitting element R in the first light-emitting element column 20c of the (p + 1)-th column are arranged alternately in sequence along the first direction X. In the first pixel circuit column 10c of the (i + 1)-th column, some first pixel circuits 10 are electrically connected to the second-color light-emitting element B in the first light-emitting element column 20c of the p-th column, and some other first pixel circuits 10 are electrically connected to the second-color light-emitting element B in the first light-emitting element column 20c of the (p + 1)-th column, and the first pixel circuits 10 connected to the second-color light-emitting element B in the first light-emitting element column 20c of the p-th column and the first pixel circuits 10 connected to the second-color light-emitting element B in the first light-emitting element column 20c of the (p + 1)-th column are arranged alternately in sequence along the first direction X. The first-color light-emitting element R in the first light-emitting element column 20c of the p-th column and the first light-emitting element column 20c of the (p + 1)-th column can be electrically connected to the first pixel circuits 10 in the first pixel circuit column 10c of the i-th column, and the second-color light-emitting element B in the first light-emitting element column 20c of the p-th column and the first light-emitting element column 20c of the (p + 1)-th column can be electrically connected to the first pixel circuits 10 in the first pixel circuit column 10c of the (i + 1)-th column.

[0099] Exemplarily, taking i, j, p, and q as equal and all being 1 for example, the first first pixel circuit 10 in the first column can be electrically connected to the first light-emitting element (first-color light-emitting element R) in the first column, the second first pixel circuit 10 in the first column can be electrically connected to the second light-emitting element (first-color light-emitting element R) in the second column, the first first pixel circuit 10 in the second column can be electrically connected to the first light-emitting element (second-color light-emitting element B) in the first column, and the second first pixel circuit 10 in the second column can be electrically connected to the second light-emitting element (second-color light-emitting element B) in the first column.

[0100] It should be noted that the light-emitting elements in the above-mentioned p-th column and (p + 1)-th column are the light-emitting elements in the adjacent first light-emitting element column 20c and do not include the light-emitting elements in the second light-emitting element column 21c.

[0101] It can be understood that the display panel includes two adjacent first pixel circuit columns (first A pixel circuit column and first B pixel circuit column) and two adjacent first light-emitting element columns (first A light-emitting element column and first B light-emitting element column). The first pixel circuit column and the first light-emitting element column correspond to each other, or it can be understood that the first pixel circuit column and the first light-emitting element column overlap in the thickness direction of the display panel. For example, the first A pixel circuit column and the first A light-emitting element column overlap, and the first B pixel circuit column and the first B light-emitting element column overlap. For the first A light-emitting element column, a part of the light-emitting elements in the first A light-emitting element column are correspondingly electrically connected to a part of the first pixel circuits in the first A pixel circuit column, and another part of the light-emitting elements in the first A light-emitting element column are electrically connected to a part of the first pixel circuits in the first B pixel circuit column. For the first B light-emitting element column, a part of the light-emitting elements in the first B light-emitting element column are correspondingly electrically connected to another part of the first pixel circuits in the first A pixel circuit column, and another part of the light-emitting elements in the first B light-emitting element column are electrically connected to another part of the first pixel circuits in the first B pixel circuit column. For example, the red light-emitting elements in the first A light-emitting element column can be correspondingly electrically connected to a part of the first pixel circuits in the first A pixel circuit column, and the blue light-emitting elements in the first A light-emitting element column are electrically connected to a part of the first pixel circuits in the first B pixel circuit column; the red light-emitting elements in the first B light-emitting element column can be correspondingly electrically connected to a part of the first pixel circuits in the first A pixel circuit column, and the blue light-emitting elements in the first B light-emitting element column are electrically connected to another part of the first pixel circuits in the first B pixel circuit column.

[0102] In other words, for a certain row or several rows of first pixel circuit rows, the light-emitting elements are not electrically connected to the pixel circuits directly below them, but to other pixel circuits. Figure 3As shown, two adjacent light-emitting elements in the light-emitting elements located in a row exchange the corresponding first pixel circuits with each other, so that only one color of light-emitting elements is driven by a column of first pixel circuits.

[0103] Figure 9 It is a schematic structural diagram of another display panel provided by an embodiment of the present invention. Figure 10 It is Figure 9 A schematic cross-sectional structure diagram along the A-A' direction, which can be combined with reference to Figure 4 、 Figures 8 to 10 The light-emitting element 20 includes an anode 22, and the anode 22 includes a connected anode main body portion 221 and an anode connection portion 222; the display panel further includes a pixel defining layer 30 and a plurality of pixel openings 31 provided in the pixel defining layer 30. Along the thickness direction Z of the display panel, the anode main body portion 221 overlaps with the pixel opening 31, and the anode connection portion 222 does not overlap with the pixel opening 31; the i (j+1) th first pixel circuit 10i (j+1) is electrically connected to the anode connection portion 222 of the (p + 1) (q+1) th light-emitting element 20(p + 1) (q+1) ; the (i + 1) (j+1) th first pixel circuit 10(i + 1) (j+1) is electrically connected to the anode connection portion 222 of the p (q+1) th light-emitting element 20p (q+1) The anode connection portion 222 is electrically connected.

[0104] Figure 9 Only the anode 22 of the light-emitting element 20 is shown in Figure 8 、 Figure 9 and Figure 10The display panel may include a substrate 40, a pixel circuit layer 50, a pixel defining layer 30 and a display function layer 60. The pixel circuit layer 50 is provided on one side of the substrate 40, and the above-mentioned first pixel circuit, data signal line and anode 22 of the light-emitting element 20 may be located in the pixel circuit layer 50. The pixel defining layer 30 is located on the side of the pixel circuit layer 50 away from the substrate 40, specifically on the side of the film layer where the anode 22 is located away from the substrate 40. The pixel circuit layer 50 includes a plurality of pixel openings 31, and the pixel openings 31 are provided corresponding to the anode 22. Along the thickness direction Z of the display panel, the pixel opening 31 overlaps with the anode 22 facing the light-emitting element 20, and the anode 22 may be exposed from the pixel opening 31. The display function layer 60 may include a hole layer 61, a light-emitting layer 62 and an electron layer 63 stacked in sequence, but is not limited thereto. The above-mentioned display function layer 60 is at least located in the pixel opening 31. The display functional layer 60 may further include a cathode layer (not shown in the figure) on the side away from the film layer where the anode is located. The cathode layer may be provided as a whole layer or include multiple separately provided cathodes. The cathode layer is used to provide electrons to the display functional layer 60, and the anode is used to provide holes to the display functional layer 60. The holes and electrons combine to emit light.

[0105] Further, continue to refer to Figure 4 、 Figures 8 to 10 The anode 22 may include an anode main portion 221 and an anode connecting portion 222, wherein the anode main portion 221 is connected to the anode connecting portion 222. The anode main portion 221 overlaps with the pixel opening 31 along the thickness direction Z of the display panel, while the anode connecting portion 222 does not overlap with the pixel opening 31. The anode main portion 221 is electrically connected to the corresponding first pixel circuit 10 via the anode connecting portion 222, thereby achieving electrical connection between the light-emitting element and the pixel circuit.

[0106] For example, Figure 8 and Figure 9 As shown, the i j A first pixel circuit 10i j With the p q Light-emitting element 20p q The anode connection portion 222 is electrically connected to the i (j+1) A first pixel circuit 10i (j+1) and (p+1) (q+1) Light-emitting element 20(p+1) (q+1) The anode connection portion 222 is electrically connected to the (i+1) j First pixel circuit 10(i+1) j and (p+1) q Light-emitting element 20(p+1) q The anode connection portion 222 is electrically connected to the (i+1) (j+1) First pixel circuit 10(i+1) (j+1) With the p(q+1) The anode connection part 222 of the light-emitting element 20p (q+1) is electrically connected.

[0107] Optionally, as Figure 4 and Figure 8 shown, based on the arrangement of the pixel circuits and the light-emitting elements in the display panel, when i and p are equal, and j and q are equal, the positive projection of the anode main body 221 of the p q th light-emitting element 20p q on the plane where the substrate 40 is located and the positive projection of the i j th first pixel circuit 10i j on the plane where the substrate 40 is located (the distance between their projections in the second direction Y) is less than the positive projection of the anode main body 221 of the (p + 1) (q+1) th light-emitting element 20(p + 1) (q+1) on this plane and the positive projection of the i (j+1) th first pixel circuit 10i (j+1) on this plane (the distance between their projections in the second direction Y). Therefore, the extension length of the positive projection of the anode connection part 222 of the p q th light-emitting element 20p q on the plane where the substrate 40 is located can be set to be less than the extension length of the positive projection of the anode connection part 222 of the (p + 1) (q+1) th light-emitting element 20(p + 1) (q+1) on the plane where the substrate 40 is located.

[0108] It should be noted that, as Figure 9 and Figure 10 shown, the area of the positive projection of the pixel aperture 31 on the plane where the substrate 40 is located may be smaller than the area of the positive projection of the anode 22 on this plane. That is, along the thickness direction Z of the display panel, the anode 22 may cover the pixel aperture 31. In this setting method, the overlapping part of the projection of the anode 22 and the pixel aperture 31 and the part similar to the shape of the pixel aperture 31 all refer to the anode main body 221. In other words, in the positive projection pattern on the plane where the substrate 40 is located, the part that surrounds the pixel aperture 31 and extends parallel to the pixel aperture 31 can be called the anode main body 221. The anode connection part 222 generally refers to the part that is connected to the anode main body 221 and has a width much smaller than that of the anode main body 221. Taking the anode shown in the figure as an example of a rhomboid-like shape as a whole, the regular rhomboid part can refer to the anode main body 221, and the part connected to the rhomboid edge and extending outward from the rhomboid edge is the anode connection part 222.

[0109] The relative positional relationship between the anode main body portion 221 and the anode connection portion 222 can be designed by those skilled in the art according to actual requirements, and the embodiments of the present utility model do not limit this. Hereinafter, several different design schemes of the anode connection portion 222 will be introduced in combination with several embodiments.

[0110] Exemplarily, reference can be continued to Figure 4 and Figure 9 , in some embodiments, the (p + 1)-th q light-emitting element 20(p + 1) q has its anode connection portion 222 located on the side of its anode main body portion 221 close to the first pixel circuit column 10c of the (i + 1)-th column; the p-th (q+1) light-emitting element 20p (q+1) has its anode connection portion 222 located on the side of its anode main body portion 221 close to the first pixel circuit column 10c of the (i + 1)-th column.

[0111] As described in the above embodiments, the (p + 1)-th q light-emitting element 20(p + 1) q and the p-th (q+1) light-emitting element 20p (q+1) can be the second-color light-emitting elements B. The second-color light-emitting elements B in the p-th first light-emitting element column 20c and the (p + 1)-th first light-emitting element column 20c can be electrically connected to the first pixel circuit 10 in the first pixel circuit column 10c of the (i + 1)-th column. The anode main body portions 221 of the second-color light-emitting elements B in the p-th first light-emitting element column 20c and the (p + 1)-th first light-emitting element column 20c can be located on both sides of the first pixel circuit column 10c of the (i + 1)-th column along the second direction Y. In other words, the anode main body portions 221 of the second-color light-emitting elements B in the p-th first light-emitting element column 20c and the (p + 1)-th first light-emitting element column 20c are located on the left and right sides of multiple fourth nodes N4 in the first pixel circuit column 10c of the (i + 1)-th column.

[0112] On this basis, as Figure 4 and Figure 9 shown, in this embodiment, it can be set that the anode connection portion 222 of the q-th in the (p + 1)-th column (i.e., the (p + 1)-th q light-emitting element 20(p + 1) q ) is located on the side of its anode main body portion 221 close to the first pixel circuit column 10c of the (i + 1)-th column; the (q + 1)-th light-emitting element in the p-th column (i.e., the p-th (q+1) light-emitting element 20p (q+1)) The anode connection part 222 of the [anode] is located on the side of its anode main body part 221 close to the first pixel circuit column 10c of the (i + 1)-th column. The anode connection part 222 of the second-color light-emitting element B in the p-th column of the first light-emitting element column 20c extends towards the direction close to the (p + 1)-th column of the first light-emitting element column 20c and is connected to the fourth node N4 of the first pixel circuit 10 in the (i + 1)-th column of the first pixel circuit column 10c; the anode connection part 222 of the second-color light-emitting element B in the (p + 1)-th first light-emitting element column 20c extends towards the direction close to the p-th column of the first light-emitting element column 20c and is connected to the fourth node N4 of the first pixel circuit 10 in the (i + 1)-th column of the first pixel circuit column 10c. In this setting mode, the distance between the (p + 1)-th q light-emitting element 20(p + 1) q and the fourth node N4 of the (i + 1)j-th first pixel circuit 10(i + 1)j connected thereto is relatively close in the second direction Y, and the distance between the p-th (q+1) light-emitting element 20p (q+1) and the fourth node N4 of the (i + 1)-th (j+1) first pixel circuit 10(i + 1) (j+1) connected thereto is relatively close in the second direction Y, which can reduce the length of the anode connection part 222 of the light-emitting element and facilitate the connection between the light-emitting element and the corresponding first pixel circuit 10.

[0113] For example, as Figure 4 shown, along the direction from left to right in the figure, the anode connection part 222 of the first light-emitting element in the 2nd column is located on the side of its anode main body part 221 close to the first pixel circuit column 10c of the 2nd column and extends towards the first pixel circuit 10 in the 2nd column, and the anode connection part 222 of the second light-emitting element in the 1st column is located on the side of its anode main body part 221 close to the first pixel circuit column 10c of the 2nd column and extends towards the second pixel circuit 10 in the 2nd column.

[0114] Exemplarily, Figure 11 FIG. [figure number] is a schematic structural diagram of another display panel provided by an embodiment of the present invention, Figure 12 which is Figure 11 a partial enlarged structural schematic diagram of the shown display panel, and reference can be made to Figure 11 and Figure 12 , the anode connection part 222 of the (p + ...... (q+1) light-emitting element 20(p + 1) (q+1) is located on the side of its anode main body part 221 close to the first pixel circuit column 10c of the i-th column; the anode connection part 222 of the p-th (q+1) light-emitting element 20p (q+1) is located on the side of its anode main body part 221 close to the first pixel circuit column 10c of the (i + 1)-th column. It should be noted that some parts in the original text seem to be incomplete or have unclear references (such as the missing description of "the [anode]" at the beginning of and some unclear notations like ,

[0113] etc. in the middle). The translation is done based on the best understanding of the existing text. If there are more specific requirements or corrections, the translation can be adjusted accordingly.

[0115] the p-th (q+1) light-emitting element 20p (q+1) and the (p + 1)-th (q+1) light-emitting element 20(p + 1) (q+1) are both located in the p-th first light-emitting element column 20c, and are two adjacent light-emitting elements 20 in the p-th first light-emitting element column 20c. Figure 11 and Figure 12 In the embodiment shown, the second-color light-emitting element B in the first light-emitting element column 20c may be the same as that in the embodiment shown Figure 4 and Figure 8 shown, and will not be described herein again. As Figure 11 and Figure 12 shown, in this embodiment, it is further defined that the anode connection portion 222 of the first-color light-emitting element R in the (p + 1)-th first light-emitting element column 20c is located on the side of its anode main body portion 221 close to the i-th first pixel circuit column 10c, that is, the anode connection portion 222 of the (p + 1)-th (q+1) light-emitting element 20(p + 1) (q+1) is located on the side of its anode main body portion 221 close to the i-th first pixel circuit column 10c, and the anode connection portion 222 of the (p + 1)-th (q+1) light-emitting element 20(p + 1) (q+1) extends towards the i-th (j+1) first pixel circuit 10i (j+1) and is connected to the fourth node N4 of the i-th (j+1) first pixel circuit 10i (j+1) .

[0116] In this setting mode, the anode connection portions 222 of the (p + 1)-th (q+1) light-emitting element 20(p + 1) (q+1) and the p-th (q+1) light-emitting element 20p (q+1) are arranged facing each other, and the distance between the light-emitting element 20 and the fourth node N4 in the corresponding first pixel circuit 10 in the second direction Y is relatively close, so as to reduce the wire-drawing length between different colors in the p-th first light-emitting element column 20c and the corresponding first pixel circuit 10.

[0117] Figure 13 FIG. Figure 14 is Figure 13 a partial enlarged structural schematic diagram of the display panel shown ​ FIG. ​ ​ is another structural schematic diagram of the display panel provided by the embodiment of the present invention, ​ and​ , in a possible embodiment, as ​ and ​ shown, the (p + 1) (q+1) th light-emitting element 20(p + 1) (q+1) has an anode connection portion 222 including a first end portion 2221 connected to its anode main body portion 221 and a second end portion 2222 connected to the first pixel circuit 10. The first end portion 2221 is located on a side of its anode main body portion 221 away from the first pixel circuit column 10c of the i-th column; the (i + 1) (j+1) th first pixel circuit 10(i + 1) (j+1) is electrically connected to the anode connection portion 222 of the p (q+1) th light-emitting element 20p (q+1) . The anode connection portion 222 of the p (q+1) th light-emitting element 20p (q+1) includes a third end portion 2223 connected to its anode main body portion 221 and a fourth end portion 2224 connected to the first pixel circuit 10. The third end portion 2223 is located on a side of its anode main body portion 221 close to the first pixel circuit column 10c of the (i + 1)-th column; or, as ​ and ​ shown, the (p + 1) (q+1) th light-emitting element 20(p + 1) (q+1) has an anode connection portion 222 including a fifth end portion 2225 connected to its anode main body portion 221 and a sixth end portion 2226 connected to the first pixel circuit 10. The fifth end portion 2225 is located on a side of its anode main body portion 221 close to the first pixel circuit column 10c of the i-th column; the (i + 1) (j+1) th first pixel circuit 10(i + 1) (j+1) is electrically connected to the anode connection portion 222 of the p (q+1) th light-emitting element 20p (q+1) . The anode connection portion 222 of the p (q+1) th light-emitting element 20p (q+1) includes a seventh end portion 2227 connected to its anode main body portion 221 and an eighth end portion 2228 connected to the first pixel circuit 10. The seventh end portion 2227 is located on a side of its anode main body portion 221 away from the first pixel circuit column 10c of the (i + 1)-th column.

[0118] As described in the above embodiment, the first-color light-emitting element R in the first light-emitting element column 20c of the (p + 1)-th column is connected to the first pixel circuit 10 in the first pixel circuit column 10c of the i-th column. For example, the (p + 1) (q+1) th light-emitting element 20(p + 1) (q+1) is connected to the i (j+1) th first pixel circuit 10i (j+1)Connection, the (p + 1)-th (q+1) light-emitting element 20(p + 1) (q+1) The entire anode connection portion 222 can extend along the second direction Y, and then connect to the fourth node N4 of the i-th (j+1) first pixel circuit 10i (j+1) connection.

[0119] ​ and ​ In the embodiment shown, the (p + 1)-th (q+1) light-emitting element 20(p + 1) (q+1) The anode connection portion 222 includes a first end portion 2221 and a second end portion 2222. The first end portion 2221 is close to the (p + 1)-th (q+1) light-emitting element 20(p + 1) (q+1) in the direction of the plane where the substrate 40 is located and is connected to the anode main body portion 221; the second end portion 2222 extends toward the fourth node N4 of the i-th (j+1) first pixel circuit 10i (j+1) and is connected to the fourth node N4. The first end portion 2221 is located on the side of the anode main body portion 221 away from the first pixel circuit column 10c of the i-th column, that is, the first end portion 2221 is located on the side of the anode main body portion 221 away from the p-th (q+1) light-emitting element 20p (q+1) side. It can be interpreted that the anode connection portion 222 of the (p + 1)-th (q+1) light-emitting element 20(p + 1) (q+1) first extends a certain length through the first end portion 2221 to the side away from the first pixel circuit column 10c of the i-th column, and then is connected to the fourth node N4 through the second end portion 2222. The anode connection portion 222 of the p-th (q+1) light-emitting element 20p (q+1) includes a third end portion 2223 and a fourth end portion 2224. The third end portion 2223 is close to the anode main body portion 221 in the direction of the plane where the substrate 40 is located and is connected to the anode main body portion 221 of the p-th (q+1) light-emitting element 20p (q+1) ; the fourth end portion 2224 extends toward the fourth node N4 of the (i + 1)-th (j+1) first pixel circuit 10(i + 1) (j+1) and is connected to the fourth node N4. The third end portion 2223 and the fourth end portion 2224 as a whole can be located on the side of the anode main body portion 221 close to the first pixel circuit column 10c of the (i + 1)-th column.

[0120] ​ and ​ In the setting manner shown, the p-th (q+1) light-emitting element 20p (q+1)The connection end portion of the anode connection portion 222 close to the anode main body portion 221, and the (p + 1)-th (q+1) light-emitting element 20(p + 1) (q+1) The connection end portion of the anode connection portion 222 close to the anode main body portion 221 are respectively located on the same side (for example, the right side in the figure) of their respective anode main body portions 221. That is, among the first-color light-emitting elements R and the second-color light-emitting elements B adjacent along the second direction Y, the orientations of the partial anode connection portions 222 close to their respective anode main body portions 221 are the same. Thus, it is possible to avoid the problem of increasing the difficulty of pulling wires due to limited space when the first end portion 2221 of the (p + 1)-th (q+1) light-emitting element 20(p + 1) (q+1) and the second end portion 2222 of the p-th (q+1) light-emitting element 20p (q+1) are arranged between their anode main body portions 221, and ensure that both the first end portion 2221 and the second end portion 2222 have a relatively large arrangement space.

[0121] ​ and ​ In the embodiment shown in, the anode connection portion 222 of the (p + 1)-th (q+1) light-emitting element 20(p + 1) (q+1) includes a fifth end portion 2225 and a sixth end portion 2226. The fifth end portion 2225 is close to the (p + 1)-th (q+1) light-emitting element 20(p + 1) (q+1) in the direction of the plane where the substrate 40 is located and is connected to the anode main body portion 221; the sixth end portion 2226 extends towards the fourth node N4 of the i-th (j+1) first pixel circuit 10i (j+1) and is connected to the fourth node N4. The fifth end portion 2225 is located on the side of the anode main body portion 221 close to the first pixel circuit column 10c of the i-th column, that is, the fifth end portion 2225 is located on the side of the anode main body portion 221 close to the p-th (q+1) light-emitting element 20p (q+1) . It can be interpreted that the anode connection portion 222 of the (p + 1)-th (q+1) light-emitting element 20(p + 1) (q+1) first extends a certain length towards the side close to the first pixel circuit column 10c of the i-th column through the fifth end portion 2225, and then is connected to the fourth node N4 through the sixth end portion 2226. The anode connection portion 222 of the p-th (q+1) light-emitting element 20p (q+1) includes a seventh end portion 2227 and an eighth end portion 2228. The seventh end portion 2227 is close to the anode main body portion 221 in the direction of the plane where the substrate 40 is located and is connected to the anode main body portion 221; the eighth end portion 2228 extends towards the (i + 1)-th (j+1)The fourth node N4 of a first pixel circuit 10(i + 1) (j+1) extends and is connected to the fourth node N4. The seventh end portion 2227 may be located on a side of the anode main body portion 221 away from the (i + 1)-th column first pixel circuit column 10c, that is, the seventh end portion 2227 is located on a side of the anode main body portion 221 away from the (p + 1)<s (q+1) light-emitting elements 20(p + 1) (q+1) One side. One end of the eighth end portion 2228 is connected to the seventh end portion 2227, and the other two ends of the eighth end portion 2228 extend towards the (i + 1) (j+1) first pixel circuits 10(i + 1) (j+1) extends and is connected to the fourth node N4.

[0122] ​ and ​ In the setting manner shown, for the p (q+1) light-emitting elements 20p (q+1) The connecting end portion of the anode connecting portion 222 close to the anode main body portion 221, and the (p + 1) (q+1) light-emitting elements 20(p + 1) (q+1) The connecting end portion of the anode connecting portion 222 close to the anode main body portion 221 are respectively located on the same side (for example, the left side in the figure) of their respective anode main body portions 221. Among the first color light-emitting element R and the second color light-emitting element B adjacent along the second direction Y, the orientations of the partial anode connecting portions 222 close to their respective anode main body portions 221 are the same. Similarly, it can be ensured that both the first end portion 2221 and the second end portion 2222 have a relatively large layout space. In addition, ​ and ​ In the embodiment shown, the extension lengths of the anode connecting portions 222 of the first color light-emitting element R and the second color light-emitting element B in the (p + 1)-th column first light-emitting element column 20c in the second direction Y are close, for example, both are greater than or equal to the extension length of the anode main body portion 221 of the second color light-emitting element B in the second direction Y. This makes the wire-drawing lengths between different color elements and the corresponding first pixel circuits 10 in the same column first light-emitting element column 20c consistent, and the impedances on the signal lines are relatively close.

[0123] The above ​ 、 ​ 、 ​In the illustrated embodiment, the anodes 22 of the multiple first-color light-emitting elements R in the first light-emitting element row 20r of the q-th row can be connected to the corresponding first pixel circuits 10 in the same manner, and the anodes 22 of the multiple second-color light-emitting elements B in the first light-emitting element row 20r of the q-th row can be connected to the corresponding first pixel circuits 10 in the same manner, and both are the same as in the related art. There is no need to change the connection manner between the first-color light-emitting elements R and the second-color light-emitting elements B in the first light-emitting element row 20r of the q-th row and the corresponding first pixel circuits 10, which can simplify the process.

[0124] Reference can be made in combination with ​ 、 ​ 、 ​ , the display panel further includes a substrate 40 and a virtual connection structure 223; the orthographic projection of the virtual connection structure 223 on the plane where the substrate 40 is located is on one side of the orthographic projection of the anode main body 221 of the p q -th light-emitting element 20p q on the plane where the substrate 40 is located; and / or, the orthographic projection of the virtual connection structure 223 on the plane where the substrate 40 is located is on one side of the orthographic projection of the anode main body 221 of the (p + 1) q -th light-emitting element 20(p + 1) q on the plane where the substrate 40 is located.

[0125] Continue to refer to ​ 、 ​ 、 ​ 、 ​ In the illustrated embodiment, the light-emitting elements 20 in different columns in the first light-emitting element row 20r of the q-th row are respectively connected to the first pixel circuits 10 in different columns in the first pixel circuit row 10r of the j-th row. When q = j and p = i, the distance between the light-emitting element 20 in the first light-emitting element row 20r of the q-th row and the corresponding connected first pixel circuit 10 in the direction of the plane where the substrate 40 is located is smaller, and the overall extension length of the anode connection portion 222 in the first light-emitting element row 20r of the q-th row is smaller. And at least some of the light-emitting elements 20 in the (q + 1)-th row of the first light-emitting element row 20r need to be connected to the first pixel circuits 10 in every other column. For example, the (p + 1) (q+1) -th light-emitting element 20(p + 1)(q + 1) is connected to the i (j+1) -th first pixel circuit 10i(j + 1), resulting in a larger overall extension length of the anode connection portion 222 in the (q + 1)-th row of the first light-emitting element row 20r.

[0126] When there is a difference in the length of the anode connection portions 222 in odd rows and even rows, it may lead to differences in the trace impedance (or RC Loading) of odd-row pixels and even-row pixels and differences in the light reflectivity of the anode connection portions 222, thereby affecting signal transmission and causing visual effect problems. Based on this, the embodiments of the present utility model propose that a virtual connection structure 223 can be added to the display panel, and the orthographic projection of the virtual connection structure 223 on the plane where the substrate 40 is located can be close to the 20r-th row of the first light-emitting elements in the q-th row.

[0127] Exemplarily, in some embodiments, such as ​ , ​ , ​ ​ and ​ shown, the orthographic projection of the virtual connection structure 223 on the plane where the substrate is located is located on one side of the orthographic projection of the anode main body portion 221 of the 20p-th q light-emitting element 20p q on the plane where the substrate is located, so as to improve the consistency of the trace impedance of odd-row pixels and even-row pixels and ensure that the light reflectivities of the anode connection portions 222 in odd rows and even rows are close, avoiding the situation of uneven display effects of the display panel.

[0128] Exemplarily, in some other embodiments, the orthographic projection of the virtual connection structure 223 on the plane where the substrate is located can be set to be located on one side of the orthographic projection of the anode main body portion 221 of the 20(p + 1)-th q light-emitting element 20(p + 1) q on the plane where the substrate is located. This embodiment is not shown in the drawings of the present utility model, and can be adaptively adjusted based on the above ​ , ​ ​ and ​ shown embodiments.

[0129] Exemplarily, in some other embodiments, the orthographic projection of the virtual connection structure 223 on the plane where the substrate is located can be set to be located on one side of the orthographic projection of the anode main body portion 221 of the 20p-th q light-emitting element 20p q on the plane where the substrate is located, and the orthographic projection of the virtual connection structure 223 on the plane where the substrate is located is located on one side of the orthographic projection of the anode main body portion 221 of the 20(p + 1)-th q light-emitting element 20(p + 1) q on the plane where the substrate is located. The embodiments of the present utility model do not elaborate on this either, and can be adaptively adjusted based on the above embodiments.

[0130] Further, referring to ​ shown, the p-th qThere is a break between the orthographic projection of the anode main body of the p-th light-emitting element on the plane where the substrate is located and the orthographic projection of the virtual connection structure 223 on the plane where the substrate is located; and / or, there is a break between the orthographic projection of the anode main body of the (p + 1)-th q light-emitting element on the plane where the substrate is located and the orthographic projection of the virtual connection structure 223 on the plane where the substrate is located.

[0131] Specifically, there is a break between the orthographic projection of the anode main body of the p-th q light-emitting element on the plane where the substrate is located and the orthographic projection of the virtual connection structure 223 on the plane where the substrate is located, which can be understood as the anode main body of the p-th q light-emitting element is insulated from the virtual connection structure 223; there is a break between the orthographic projection of the anode main body of the (p + 1)-th q light-emitting element on the plane where the substrate is located and the orthographic projection of the virtual connection structure 223 on the plane where the substrate is located, which can be understood as the anode main body of the (p + 1)-th q light-emitting element is insulated from the virtual connection structure 223. In this case, the setting of the virtual connection structure 223 can ensure that the distribution density or coverage area of the metal structures between different rows of pixel circuits is the same, ensure that the light transmittance and reflectance between different rows of pixel circuits are the same or similar, and ensure that the light transmission effect and visual effect of the display panel are the same or similar.

[0132] Furthermore, as shown in ​ and ​ , the anode main body of the p-th q light-emitting element is electrically connected to the virtual connection structure 223; and / or, the anode main body of the (p + 1)-th q light-emitting element is electrically connected to the virtual connection structure 223.

[0133] Specifically, the anode main body of the p-th q light-emitting element is electrically connected to the virtual connection structure 223, but the virtual connection structure 223 will not be electrically connected to the first pixel circuit, so as to avoid connecting the same anode to two first pixel circuits and causing display abnormalities; at the same time, the anode main body of the (p + 1)-th q light-emitting element is electrically connected to the virtual connection structure 223, but the virtual connection structure 223 will not be electrically connected to the first pixel circuit, so as to avoid connecting the same anode to two first pixel circuits and causing display abnormalities. Furthermore, the anode main body of the p-th q light-emitting element is electrically connected to the virtual connection structure 223, and / or, the anode main body of the (p + 1)-th qThe anode main body of a light-emitting element is electrically connected to the virtual connection structure 223. This not only ensures that the distribution density or coverage area of the metal structures between different rows of pixel circuits is the same, ensuring that the light transmittance and reflectance between different rows of pixel circuits are the same or similar, and ensuring that the light transmission effect and visual effect of the display panel are the same or similar. It also ensures that the trace impedance (or RCLoading) of the anode connection parts in the anodes of light-emitting elements of the same color at different positions is consistent or nearly consistent, ensuring that the display effects of light-emitting elements of the same color at different positions are the same or nearly consistent, avoiding display differences in light-emitting elements of the same color at different positions, and ensuring good overall display uniformity of the display panel.

[0134] Furthermore, the shape of the virtual connection structure 223 and the shape of the anode connection part 222 are similar figures. The length of the virtual connection structure 223 is L1, the width is D1, the length of the anode connection part 222 is L2, and the width is D2. Among them, |L1 - L2| / L1 ≤ 20%, |D1 - D2| / D1 ≤ 20%. As ​ 、 ​ shown, the virtual connection structure 223 and the anode connection part 222 can be set to have the same or similar shapes, lengths, and widths, etc., further improving the consistency of the trace impedance between odd-row pixels and even-row pixels.

[0135] Optionally, continue to refer to ​ 、 ​ 、 ​ and ​ shown, the virtual connection structure 223 and the anode connection part 222 are staggeredly arranged in both the first direction X and / or the second direction Y.

[0136] As ​ 、 ​ ​ and ​ shown, for the (p + 1) (q+1) th light-emitting element 20(p + 1) (q+1) (the first-color light-emitting element R), the extension length of the anode connection part 222 is relatively long. To balance the impedance of the anode connection part 222, the virtual connection structure 223 can be set to overlap or have a break with the first-color light-emitting element R in the qth row of the first light-emitting element row 20r. The virtual connection structure 223 and the anode connection part 222 are located in different first light-emitting element rows 20r, so they are staggeredly arranged along the second direction Y.

[0137] Based on the scheme where the first-color light-emitting element R and the second-color light-emitting element B are alternately arranged in both the first direction X and the second direction Y, in the qth row of the first light-emitting element row 20r, the (p + 1) (q+1) th light-emitting element 20(p + 1) (q+1)The first color light-emitting element R with a relatively short distance is the (p + 2)-th q light-emitting element (the light-emitting element in the (p + 2)-th row and the q-th column in the figure). Therefore, the virtual connection structure 223 can be set to overlap with the orthographic projection of the (p + 2) (q) light-emitting elements, and its shape, length, width, etc. are the same as those of the anode connection part 222 of the (p + 1)-th (q+1) light-emitting element 20(p + 1). (q+1) Since the (p + 2)-th q light-emitting element and the (p + 1)-th (q+1) light-emitting element 20(p + 1) (q+1) are staggered along the first direction X, the virtual connection structure 223 and the anode connection part 222 are staggered along the first direction X. In this way, the distribution of the virtual connection structure 223 and the anode connection part 222 in the display panel is relatively uniform, improving the impedance consistency while ensuring the display effect.

[0138] In other words, there is a gap between the orthographic projections of two adjacent anode connection parts 222 on the substrate. Along the first direction, the orthographic projection of the virtual connection structure 223 on the substrate overlaps with the gap; or rather, along the first direction, the orthographic projection of the virtual connection structure 223 on the substrate is located between the orthographic projections of two adjacent anode connection parts 222 on the substrate.

[0139] Optionally, in some embodiments, the virtual connection structure 223 and the anode connection part 222 are provided in the same layer. In this way, the virtual connection structure 223 and the anode connection part 222 can be fabricated in the same process, which can not only simplify the process but also ensure the accuracy of the formation positions of the virtual connection structure 223 and the anode connection part 222, and ensure the impedance balance effect of the virtual connection structure 223 on the anode connection part 222.

[0140] In summary, the above embodiments have been described by taking the first pixel circuit column group 100 including one column of the first pixel circuit column 10c and the second pixel circuit column group 101 including one column of the first pixel circuit column 10c as an example. It can be understood that the first pixel circuit column group 100 may further include at least two columns of the first pixel circuit column 10c, and the second pixel circuit column group 101 may further include at least two columns of the first pixel circuit column 10c. The following describes this case.

[0141] In some embodiments, as ​ and ​ shown, the virtual connection structure 223 and the anode main body are provided in the same layer.

[0142] In other embodiments, as ​ 、 ​ and ​ shown, the virtual connection structure 223 and the anode main body are provided in different layers.

[0143] ​ A schematic structural diagram of another display panel provided by an embodiment of the present invention is continued to be referred to ​ , at least some adjacent first pixel circuit column groups 100 and second pixel circuit column groups 101 include the h-th column first pixel circuit column 10c, the (h + 1)-th column first pixel circuit column 10c, the (h + 2)-th column first pixel circuit column 10c, and the (h + 3)-th column first pixel circuit column 10c; at least some adjacent two first pixel circuits 10 in the h-th column first pixel circuit column 10c include the h k -th first pixel circuit 10 and the h (k+1) -th first pixel circuit 10; at least some adjacent two first pixel circuits 10 in the (h + 1)-th column first pixel circuit column 10c include the (h + 1) k -th first pixel circuit 10 and the (h + 1) (k+1) -th first pixel circuit 10, at least some adjacent two first pixel circuits 10 in the (h + 2)-th column first pixel circuit column 10c include the (h + 2) k -th first pixel circuit 10 and the (h + 2) (k+1) -th first pixel circuit 10; at least some adjacent two first pixel circuits 10 in the (h + 3)-th column first pixel circuit column 10c include the (h + 3) k -th first pixel circuit 10 and the (h + 3) (k+1) -th first pixel circuit 10; at least some adjacent four columns of first light-emitting element columns 20c include the m-th column first light-emitting element column 20c, the (m + 1)-th column first light-emitting element column 20c, the (m + 2)-th column first light-emitting element column 20c, and the (m + 3)-th column first light-emitting element column 20c; at least some adjacent two light-emitting elements in the m-th column first light-emitting element column 20c include the m n -th light-emitting element and the m (n+1) -th light-emitting element; at least some adjacent two light-emitting elements in the (m + 1)-th column first light-emitting element column 20c include the (m + 1) n -th light-emitting element and the (m + 1) (n+1) -th light-emitting element; at least some adjacent two light-emitting elements in the (m + 2)-th column first light-emitting element column 20c include the (m + 2) n -th light-emitting element and the (m + 2) (n+1) -th light-emitting element; at least some adjacent two light-emitting elements in the (m + 3)-th column first light-emitting element column 20c include the (m + 3) n -th light-emitting element and the (m + 3) (n+1) -th light-emitting element; wherein, h, k, m, and n are all positive integers; the h k -th first pixel circuit 10 and the mn luminescent elements are electrically connected; the h (k+1) first pixel circuits 10 are electrically connected to the (m + 1) (n+1) luminescent elements; the (h + 1) k first pixel circuits 10 are electrically connected to the (m + 1) n luminescent elements; the (h + 1) (k+1) first pixel circuits 10 are electrically connected to the m (n+1) luminescent elements; the (h + 2) k first pixel circuits 10 are electrically connected to the (m + 3) n luminescent elements; the (h + 2) (k+1) first pixel circuits 10 are electrically connected to the (m + 2) (n+1) luminescent elements; the (h + 3) k first pixel circuits 10 are electrically connected to the (m + 2) n luminescent elements; the (h + 3) (k+1) first pixel circuits 10 are electrically connected to the (m + 3) (n+1) luminescent elements.

[0144] As ​ shown, the h-th column first pixel circuit column 10c, the (h + 1)-th column first pixel circuit column 10c, the (h + 2)-th column first pixel circuit column 10c, and the (h + 3)-th column first pixel circuit column 10c are arranged along the second direction Y to form a repeating unit. Among the two adjacent first pixel circuits 10 in the h-th column first pixel circuit column 10c, they are respectively the h k first pixel circuits 10 and the h (k+1) first pixel circuits 10. Among the two adjacent first pixel circuits 10 in the (h + 1)-th column first pixel circuit column 10c, they are respectively the (h + 1) k first pixel circuits 10 and the (h + 1) (k+1) first pixel circuits 10. Among the two adjacent first pixel circuits 10 in the (h + 2)-th column first pixel circuit column 10c, they are respectively the (h + 2) k first pixel circuits 10 and the (h + 2) (k+1) first pixel circuits 10. Among the two adjacent first pixel circuits 10 in the (h + 3)-th column first pixel circuit column 10c, they are respectively the (h + 3) k first pixel circuits 10 and the (h + 3) (k+1) first pixel circuits 10. Here, the values of h and k are not limited, and the two can be equal or unequal. It can be understood that h corresponds to a certain column of the first pixel circuit column 10c, k corresponds to a certain row of the first pixel circuit row 10r, h can be less than the total number of columns of the first pixel circuit column 10c, and k can be less than the total number of rows of the first pixel circuit row 10r.

[0145] The four adjacent columns of the first light-emitting element columns 20c can be the m-th column of the first light-emitting element columns 20c, the (m + 1)-th column of the first light-emitting element columns 20c, the (m + 2)-th column of the first light-emitting element columns 20c, and the (m + 3)-th column of the first light-emitting element columns 20c. Two adjacent light-emitting elements in the m-th column of the first light-emitting element columns 20c can be the m n th light-emitting element and the m (n+1) th light-emitting element. Two adjacent light-emitting elements in the (m + 1)-th column of the first light-emitting element columns 20c can be the (m + 1) n th light-emitting element and the (m + 1) (n+1) th light-emitting element. Two adjacent light-emitting elements in the (m + 2)-th column of the first light-emitting element columns 20c can be the (m + 2) n th light-emitting element and the (m + 2) (n+1) th light-emitting element. Two adjacent light-emitting elements in the (m + 3)-th column of the first light-emitting element columns 20c can be the (m + 3) n th light-emitting element and the (m + 3) (n+1) th light-emitting element. Here, the values of m and n are not limited, and they can be equal or unequal. It can be understood that m corresponds to a certain column of the first light-emitting element columns 20c, n corresponds to a certain row of the first light-emitting element rows 20r, m can be less than the total number of columns of the first light-emitting element columns 20c, and n can be less than the total number of rows of the first light-emitting element rows 20r.

[0146] Optionally, the h-th column of the first pixel circuit columns 10c and the (h + 2)-th column of the first pixel circuit columns 10c can refer to the first pixel circuit columns 10c of the odd-numbered columns (or even-numbered columns) of the display panel. The (h + 1)-th column of the first pixel circuit columns 10c and the (h + 3)-th column of the first pixel circuit columns 10c can refer to the first pixel circuit columns 10c of the even-numbered columns (or odd-numbered columns) of the display panel. The k-th row of the first pixel circuit rows 10r can refer to the first pixel circuit rows 10r of the odd-numbered rows (or even-numbered rows) of the display panel. The (k + 1)-th row can refer to the first pixel circuit rows 10r of the even-numbered rows (or odd-numbered rows) of the display panel. The m-th column of the first light-emitting element columns 20c and the (m + 2)-th column of the first light-emitting element columns 20c can refer to the first light-emitting element columns 20c of the odd-numbered columns (or even-numbered columns) of the display panel. The (m + 1)-th column of the first light-emitting element columns 20c and the (m + 3)-th column of the first light-emitting element columns 20c can refer to the first light-emitting element columns 20c of the even-numbered columns (or odd-numbered columns) of the display panel. The n-th row can refer to the first light-emitting element rows 20r of the odd-numbered rows (or even-numbered rows) of the display panel. The (n + 1)-th row can refer to the first light-emitting element rows 20r of the even-numbered rows (or odd-numbered rows) of the display panel.

[0147] As ​ shown, the k-th first pixel circuit 10 in the h-th column (i.e., the h kA first pixel circuit 10 can be electrically connected to the m-th column and n-th light-emitting element (i.e., the m-th n light-emitting element); the h-th column and (k + 1)-th first pixel circuit 10 (i.e., the h-th (k+1) first pixel circuit 10) can be electrically connected to the (m + 1)-th column and (n + 1)-th light-emitting element (i.e., the (m + 1)-th (n+1) light-emitting element); the (h + 1)-th column and k-th first pixel circuit 10 (i.e., the (h + 1)-th k first pixel circuit 10 first pixel circuit 10) can be electrically connected to the (m + 1)-th column and n-th light-emitting element (i.e., the (m + 1)-th n light-emitting element); the (h + 1)-th column and (k + 1)-th first pixel circuit 10 (i.e., the (h + 1)-th (k+1) first pixel circuit 10) can be electrically connected to the m-th column and (n + 1)-th light-emitting element (i.e., the m-th (n+1) light-emitting element); the (h + 2)-th column and k-th first pixel circuit 10 (i.e., the (h + 2)-th k first pixel circuit 10) can be electrically connected to the (m + 3)-th column and n-th light-emitting element (i.e., the (m + 3)-th n light-emitting element); the (h + 2)-th column and (k + 1)-th first pixel circuit 10 (i.e., the (h + 2)-th (k+1) first pixel circuit 10) can be electrically connected to the (m + 2)-th column and (n + 1)-th light-emitting element (i.e., the (m + 2)-th (n+1) light-emitting element); the (h + 3)-th column and k-th first pixel circuit 10 (i.e., the (h + 3)-th k first pixel circuit 10) can be electrically connected to the (m + 2)-th column and n-th light-emitting element (i.e., the (m + 2)-th n light-emitting element); the (h + 3)-th column and (k + 1)-th first pixel circuit 10 (i.e., the (h + 3)-th (k+1) first pixel circuit 10) can be electrically connected to the (m + 3)-th column and (n + 1)-th light-emitting element (i.e., the (m + 3)-th (n+1) light-emitting element) is electrically connected.

[0148] For explanation, in the first pixel circuit column 10c of the h-th column, a part of the first pixel circuits 10 is electrically connected to the first color light-emitting element R in the first light-emitting elements of the m-th column, and another part of the first pixel circuits 10 is electrically connected to the first color light-emitting element R in the first light-emitting elements of the (m + 1)-th column. Moreover, the first pixel circuits 10 connected to the first color light-emitting element R in the first light-emitting element column 20c of the m-th column and the first pixel circuits 10 connected to the first color light-emitting element R in the first light-emitting element column 20c of the (m + 1)-th column are arranged alternately in sequence along the first direction X. In the first pixel circuit column 10c of the (h + 1)-th column, a part of the first pixel circuits 10 is electrically connected to the second color light-emitting element B in the first light-emitting element column 20c of the m-th column, and another part of the first pixel circuits 10 is electrically connected to the second color light-emitting element B in the first light-emitting element column 20c of the (m + 1)-th column. Moreover, the first pixel circuits 10 connected to the second color light-emitting element B in the first light-emitting element column 20c of the m-th column and the first pixel circuits 10 connected to the second color light-emitting element B in the first light-emitting element column 20c of the (m + 1)-th column are arranged alternately in sequence along the first direction X. The first color light-emitting element R in the first light-emitting element column 20c of the m-th column and the first light-emitting element column 20c of the (m + 1)-th column can be electrically connected to the first pixel circuits 10 in the first pixel circuit column 10c of the h-th column, and the second color light-emitting element B in the first light-emitting element column 20c of the m-th column and the first light-emitting element column 20c of the (m + 1)-th column can be electrically connected to the first pixel circuits 10 in the first pixel circuit column 10c of the (h + 1)-th column.

[0149] In the first pixel circuit column 10c of the (h + 2)-th column, part of the first pixel circuits 10 are electrically connected to the second-color light-emitting element B in the first light-emitting elements of the (m + 2)-th column, and the other part of the first pixel circuits 10 are electrically connected to the second-color light-emitting element B in the first light-emitting elements of the (m + 3)-th column. Moreover, the first pixel circuits 10 connected to the second-color light-emitting element B in the first light-emitting elements column 20c of the (m + 3)-th column and the first pixel circuits 10 connected to the second-color light-emitting element B in the first light-emitting elements of the (m + 2)-th column are arranged alternately in sequence along the first direction X. In the first pixel circuit column 10c of the (h + 3)-th column, part of the first pixel circuits 10 are electrically connected to the first-color light-emitting element R in the first light-emitting elements of the (m + 2)-th column, and the other part of the first pixel circuits 10 are electrically connected to the first-color light-emitting element R in the first light-emitting elements of the (m + 3)-th column. Moreover, the first pixel circuits 10 connected to the first-color light-emitting element R in the first light-emitting elements column 20c of the (m + 2)-th column and the first pixel circuits 10 connected to the first-color light-emitting element R in the first light-emitting elements of the (m + 3)-th column are arranged alternately in sequence along the first direction X. The second-color light-emitting element B in the first light-emitting elements column 20c of the (m + 2)-th column and the first light-emitting elements column 20c of the (m + 3)-th column can be electrically connected to the first pixel circuits 10 in the first pixel circuit column 10c of the (h + 2)-th column, and the first-color light-emitting element R in the first light-emitting elements column 20c of the (m + 2)-th column and the first light-emitting elements column 20c of the (m + 3)-th column can be electrically connected to the first pixel circuits 10 in the first pixel circuit column 10c of the (h + 3)-th column.

[0150] Exemplarily, taking h, k, m, and n to be equal and all being 1, the first first pixel circuit 10 in the first column can be electrically connected to the first light-emitting element (first-color light-emitting element R) in the first column, the second first pixel circuit 10 in the first column can be electrically connected to the second light-emitting element (first-color light-emitting element R) in the second column, the first first pixel circuit 10 in the second column can be electrically connected to the first light-emitting element (second-color light-emitting element B) in the second column, and the second first pixel circuit 10 in the second column can be electrically connected to the second light-emitting element (second-color light-emitting element B) in the first column. The first first pixel circuit 10 in the third column can be electrically connected to the first light-emitting element (second-color light-emitting element B) in the fourth column, the second first pixel circuit 10 in the third column can be electrically connected to the second light-emitting element (second-color light-emitting element B) in the third column, the first first pixel circuit 10 in the fourth column can be electrically connected to the first light-emitting element (first-color light-emitting element R) in the third column, and the second first pixel circuit 10 in the fourth column can be electrically connected to the second light-emitting element (first-color light-emitting element R) in the fourth column.

[0151] It should be noted that the light-emitting elements in the m-th column, the (m + 1)-th column, the (m + 2)-th column, and the (m + 3)-th column above are the light-emitting elements in the adjacent first light-emitting element column 20c, and do not include the light-emitting elements in the second light-emitting element column (not shown in the figure).

[0152] Optionally, reference may continue to be made to ​ , ​ and ​ , the light-emitting element 20 includes an anode 22, and the anode includes an anode main body portion 221 and an anode connection portion 222 connected to 22; the display panel further includes a pixel defining layer 30 and a plurality of pixel openings 31 provided in the pixel defining layer 30. Along the thickness direction of the display panel, the anode main body portion 221 overlaps with the pixel opening 31, and the anode connection portion 222 does not overlap with the pixel opening 31; the h (k+1) th first pixel circuit 10 is electrically connected to the anode connection portion 222 of the (m + 1) (n+1) th light-emitting element; the (h + 2) k th first pixel circuit 10 is electrically connected to the anode connection portion 222 of the (m + 3) n th light-emitting element.

[0153] The specific setting manner of the pixel defining layer 30 is the same as that in the above embodiment, and the relative positional relationship between the anode main body portion 221 and the anode connection portion 222 and the pixel opening 31 is also the same as that in the above embodiment, and will not be elaborated here. Similar to the above embodiment, in this embodiment, the anode main body portion 221 is electrically connected to the corresponding first pixel circuit 10 through the anode connection portion 222, thereby realizing the electrical connection between the light-emitting element and the pixel circuit.

[0154] Exemplarily, the h k th first pixel circuit 10 is electrically connected to the anode connection portion 222 of the m n [[ID=...]]th light-emitting element, the h (k+1) th first pixel circuit 10 is electrically connected to the anode connection portion 222 of the (m + 1) (n+1) th light-emitting element; the (h + 1) k th first pixel circuit 10 is electrically connected to the anode connection portion 222 of the (m + 1) n th light-emitting element, the (h + 1) (k+1) th first pixel circuit 10 is electrically connected to the anode connection portion 222 of the m (n+1) th light-emitting element; the (h + 2) k th first pixel circuit 10 is electrically connected to the anode connection portion 222 of the (m + 3) n th light-emitting element, the (h + 2) (k+1) th first pixel circuit 10 is electrically connected to the anode connection portion 222 of the (m + 2) (n+1) th light-emitting element; the (h + 3)k One first pixel circuit 10 is electrically connected to the anode connection part 222 of the (m + 2) n light-emitting elements, and the (h + 3) (k+1) first pixel circuits 10 are electrically connected to the anode connection part 222 of the (m + 3) (n+1) light-emitting elements.

[0155] ​ In the illustrated embodiment, the corresponding connection relationship between the light-emitting elements in the m-th column and the (m + 1)-th column and the first pixel circuits 10 in the h-th column and the (h + 1)-th column is the same as the corresponding connection relationship between the light-emitting elements in the p-th column and the (p + 1)-th column and the first pixel circuits 10 in the i-th column and the (j + 1)-th column in the above embodiment. Correspondingly, the setting manner of the anode connection part 222 of the light-emitting elements in the m-th column and the (m + 1)-th column, the setting manner of the fourth node N4 of the first pixel circuits 10 in the h-th column and the (h + 1)-th column, and the connection manner between the anode connection part 222 and the fourth node N4 can all refer to the ​ 、 ​ description of the corresponding embodiment. ​ The difference in the illustrated embodiment lies in the setting manner of the anode connection part 222 of the light-emitting elements in the (m + 2)-th column and the (m + 3)-th column, and the setting manner of the fourth node N4 of the first pixel circuits 10 in the (h + 2)-th column and the (h + 3)-th column.

[0156] Specifically, as ​ shown, when h, k, m, and n are equal, in the orthographic projection on the plane where the substrate 40 is located, the distance between the anode main body part 221 of the (m + 2) n light-emitting elements and the fourth node N4 of the (h + 3) k first pixel circuits 10 (the distance between their projections in the second direction Y) is less than the distance between the anode main body part 221 of the (m + 3) n light-emitting elements and the fourth node N4 of the (h + 2) k first pixel circuits 10 (the distance between their projections in the second direction Y). Therefore, the extension length of the orthographic projection of the anode connection part 222 of the (m + 2) n light-emitting elements on the plane where the substrate 40 is located can be set to be less than the extension length of the orthographic projection of the anode connection part 222 of the (m + 3) n light-emitting elements on the plane where the substrate 40 is located.

[0157] In addition, the anode connection part 222 of the (m + 2) n light-emitting elements can be located on the side of its anode main body part 221 away from the first pixel circuit column 10c in the (h + 2)-th column, and the anode connection part 222 of the (m + 3) nThe anode connection part 222 of a light-emitting element may be located on the side of its anode main body part 221 close to the first pixel circuit column 10c of the (h + 2)-th column. That is, the anode connection parts 222 of these two light-emitting elements may be arranged facing each other. The (n+1) anode connection part 222 of the (m + 2)-th (n+1) light-emitting element may be located on the side of its anode main body part 221 close to the first pixel circuit column 10c of the (h + 2)-th column. The anode connection part 222 of the (m + 3)-th

[0158] It should be noted that ​ in the illustrated embodiment, anode connection parts 222 are provided in both the first light-emitting element rows 20r of odd rows and even rows. The distribution of the anode connection parts 222 is relatively uniform. At this time, the virtual connection structure 223 may not be provided any more to reduce the number of wirings ( ​ as shown); or, virtual connection structures 223 are arranged on both sides of at least some of the anode connection parts 222 along the first direction X and / or the second direction Y ( ​ not shown), so that the anode connection parts 222 and the virtual connection structures 223 overlap along the first direction X and / or the second direction Y, further ensuring the in-plane impedance consistency.

[0159] Optionally, in the embodiment of the present invention, the anode connection part 222 and the anode main body part 221 are provided on the same layer; or, the display panel further includes a substrate 40, and the film layer where the anode connection part 222 is located is between the film layer where the anode main body part 221 is located and the film layer where the substrate 40 is located.

[0160] ​ FIG. [X] is a schematic structural diagram of another display panel provided by the embodiment of the present invention, ​ FIG. [Y] is a schematic cross-sectional structural diagram of a display panel provided by the embodiment of the present invention, ​ is ​ a schematic diagram of a part of the structure in the illustrated display panel; ​ is ​ a schematic diagram of another part of the structure in the illustrated display panel; ​ is ​ a schematic diagram of another part of the structure in the illustrated display panel; ​ is ​ a schematic diagram of another part of the structure in the illustrated display panel; ​ is ​ a schematic diagram of another part of the structure in the illustrated display panel; ​ is ​ a schematic diagram of another part of the structure in the illustrated display panel; ​ Note: The specific figure numbers [X] and [Y] need to be filled in according to the actual figures in the original text. Also, the (n+1) , (n+1) , etc. tags are preserved as they are without translation as they are likely some kind of internal identifiers in the original patent context.is ​ a schematic diagram of another part of the structure in the display panel shown; ​ is ​ a schematic diagram of another part of the structure in the display panel shown; ​ is ​ a schematic diagram of another part of the structure in the display panel shown. The display panel is formed by laminating multiple film layers, ​ shows a top view of a partial film layer stack of the display panel, ​ shows a cross-sectional view of the overall film layer of the display panel, ​ showing different film layers in the display panel from top to bottom.

[0161] Reference can be made to ​ , taking the LTPO display panel as an example. Along the thickness direction Z of the display panel, one side of the substrate 40 may include a buffer layer 70, a first semiconductor layer POLY, a first metal layer M1, a second metal layer MC, a second semiconductor layer IGZO, a fifth metal layer MG, a third metal layer M2, a fourth metal layer M3, a planarization layer PLN, and an anode layer. An insulating layer 80 may be provided between any two adjacent conductive film layers. The third metal layer M2 can be understood as the first source-drain electrode layer, the fourth metal layer M3 can be understood as the second source-drain electrode layer, and the anode layer RE can be understood as the film layer where the anode main body 221 is located. For the specific film layer arrangement of the display panel, it can be adjusted adaptively according to actual production requirements, such as adding or subtracting some film layers. The embodiments of the present invention do not specifically limit this. ​ is ​ a schematic diagram of the structure of the first semiconductor layer POLY in ​ is ​ a schematic diagram of the structure of the first metal layer M1 in ​ is ​ a schematic diagram of the structure of the second metal layer MC in ​ is ​ a schematic diagram of the structure of the second semiconductor layer IGZO in ​ is ​ a schematic diagram of the structure of the fifth metal layer MG in ​ is ​ a schematic diagram of the structure of the third metal layer M2 in ​ is ​ a schematic diagram of the structure of the fourth metal layer M3 in ​ is ​ a schematic diagram of the structure of the anode layer RE in ​ is a schematic diagram of the stacked structure of the fourth metal layer M3 and the anode layer RE. To clearly show the multi-film layer stack structure diagram, ​Not all the film layers are shown. Only the first semiconductor layer POLY, the first metal layer M1, the second metal layer MC, and the third metal layer M2 are shown. For the structures of other film layers, reference can be made to the corresponding single-film layer schematic diagrams.

[0162] Reference ​ 、 ​ 、 ​ , the fourth node N4 of the first pixel circuit 10 is connected to the second light-emitting control transistor T6, the reset transistor T7, and the anode 22 of the light-emitting element 20. The connection region of the second light-emitting control transistor T6 and the reset transistor T7 can be connected to the anode 22 of the light-emitting element through the connection cross-wire of the third metal layer M2 and the fourth metal layer M3. The fourth node N4 can be regarded as the wiring structure at the overlapping position of the projection of this connection region in the third metal layer M2 and the fourth metal layer M3. In this embodiment, the anode connection portion 222 can be provided on the same layer as the anode main body portion 221, and both are located in the anode layer RE.

[0163] Such as ​ 、 ​ 、 ​As shown, the active layers of the first light-emitting control transistor T1, data writing transistor T2, driving transistor T3, second light-emitting control transistor T6, and reset transistor T7 may be located in the first semiconductor layer POLY, and the active layers of the threshold compensation transistor T4 and initialization transistor T5 may be located in the second semiconductor layer IGZO. The first metal layer M1 may include the first electrode plate C1 of the storage capacitor Cst, the third scan signal line SP*, and the fourth scan signal line SP. The second metal layer MC may include the first electrode plate C1 of the storage capacitor Cst, the first scan signal line S1-1 extending along the second direction Y, the second scan signal line S2-1, the initialization signal line VREF1, and the reset signal line VREF2. The overlapping part of the first scan signal line S1-1 and the initialization transistor T5 also serves as the bottom gate of the initialization transistor T5, and the overlapping part of the second scan signal line S2-1 and the threshold compensation transistor T4 also serves as the bottom gate of the threshold compensation transistor T4. The fifth metal layer MG may include the bias voltage signal line DVH, the first scan signal line S1-2, the second scan signal line S2-2, and a partial shielding structure 90. The overlapping part of the first scan signal line S1-2 and the initialization transistor T5 also serves as the top gate of the initialization transistor T5, and the overlapping part of the second scan signal line S2-2 and the threshold compensation transistor T4 also serves as the top gate of the threshold compensation transistor T4; the shielding structure may be located between the signal line with signal transition and the first node, and the shielding structure may be set to be electrically connected to a fixed potential, so as to avoid the influence of signal transitions of other signals on the potential of the first node. The third metal layer M2 may include the data assist line FIAA extending along the second direction Y and some connection cross lines, etc. There may also be a fourth metal layer M3 between the third metal layer M2 and the planarization layer PLN. The fourth metal layer M3 may include the power supply signal line PVDD, data signal line Data, and data assist line FIAA extending along the first direction X, and some connection cross lines, etc.; the data assist line FIAA may be used to connect the data signal line Data and the display controller. The connection region of the reset transistor T7 and the second light-emitting control transistor T6 and the connection cross lines (connection cross lines in the third metal layer M2 and the fourth metal layer M3) overlapping the projection of the connection region may be regarded as the fourth node N4.

[0164] Furthermore, at least one of the initialization signal line VREF1, reset signal line VREF2, and bias voltage signal line DVH may have a grid-like structure, that is, at least one of the initialization signal line VREF1, reset signal line VREF2, and bias voltage signal line DVH may include at least two film layer structures with different extension directions. By setting the grid-like structure, the loss of signals during transmission can be reduced, and the signal transmission accuracy can be improved. Specifically, refer to ​ 、 ​ 、 ​ and ​As shown, the initialization signal line VREF1 can be a single film layer structure, which is located in the second metal layer MC. The reset signal line VREF2 can include two film layers. The reset signal line VREF2 can include a first reset signal line VREF21 and a second reset signal line VREF22. The first reset signal line VREF21 extends along the first direction and can be located in the fourth metal layer M3. The second reset signal line VREF22 extends along the second direction and can be located in the second metal layer MC. The bias voltage signal line DVH can include two film layers. The bias voltage signal line DVH can include a first bias voltage signal line DVH1 and a second bias voltage signal line DVH2. The first bias voltage signal line DVH1 extends along the first direction and can be located in the fourth metal layer M3. The second bias voltage signal line DVH2 extends along the second direction and can be located in the fifth metal layer MG. Moreover, the first reset signal line VREF21 and the first bias voltage signal line DVH1 that are both located in the fourth metal layer M3 can be alternately arranged in the second direction.

[0165] ​ Schematic diagram of the structure of another display panel provided by an embodiment of the present invention ​ Schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention ​ is ​ Schematic diagram of a part of the structure in the shown display panel; ​ is ​ Schematic diagram of another part of the structure in the shown display panel; ​ is ​ Schematic diagram of another part of the structure in the shown display panel; ​ is ​ Schematic diagram of another part of the structure in the shown display panel; ​ is ​ Schematic diagram of another part of the structure in the shown display panel; ​ is ​ Schematic diagram of another part of the structure in the shown display panel; ​ is ​ Schematic diagram of another part of the structure in the shown display panel; ​ is ​ Schematic diagram of another part of the structure in the shown display panel. ​ Shows a top view of a partial film stack of the display panel ​ Shows a cross-sectional view of the overall film layer of the display panel ​ Shows the different film layers in the display panel from top to bottom.

[0166] Can be combined with reference to ​, still taking the LTPO display panel as an example, along the thickness direction Z of the display panel, one side of the substrate 40 may include a buffer layer 70, a first semiconductor layer POLY, a first metal layer M1, a second metal layer MC, a second semiconductor layer IGZO, a fifth metal layer MG, a third metal layer M2, a fourth metal layer M3, a sixth metal layer M4, a planarization layer PLN, and an anode layer RE. An insulating layer 80 may be provided between any two adjacent conductive film layers. The third metal layer M2 can be understood as a first source-drain electrode layer, the fourth metal layer M3 can be understood as a second source-drain electrode layer, and the sixth metal layer M4 can be understood as a third source-drain metal layer. For the specific film layer arrangement of the display panel, it can be adjusted adaptively according to actual production requirements, such as adding or removing some film layers. The embodiments of the present invention do not specifically limit this. ​ is ​ the schematic structural diagram of the first semiconductor layer POLY in ​ is ​ the schematic structural diagram of the first metal layer M1 in ​ is ​ the schematic structural diagram of the second metal layer MC in ​ is ​ the schematic structural diagram of the third metal layer M2 in ​ is ​ the schematic structural diagram of the fourth metal layer M3 in ​ is ​ the schematic structural diagram of the sixth metal layer M4 in ​ is ​ the schematic structural diagram of the anode layer RE in ​ is ​ the schematic structural diagram of the fourth metal layer M3, the sixth metal layer M4, and the anode layer RE in ​ In order to clearly show the multi-film stack structure diagram, not all film layers are shown in

[0167] ​ The structures of the second semiconductor layer IGZO and the fifth metal layer MG in the shown display panel are the same as those in ​ the shown display panel. The second semiconductor layer IGZO can be referred to ​ shown, and the fifth metal layer MG can be referred to ​ shown, and no further description will be given here.

[0168] ​ The embodiment shown in ​ differs from the embodiment shown in ​ in the film layers of the display panel and the wiring between some film layers. Compared with ​The display panel shown adds a metal layer between the third metal layer M2 and the anode layer RE, which can ​ set some of the traces in the fourth metal layer M3 shown in ​ the fourth metal layer M3 and the sixth metal layer M4 shown respectively, thus reducing the wiring difficulty. ​ In the embodiment shown, the connection area of the second light-emitting control transistor T6 and the reset transistor T7 can be connected to the anode 22 of the light-emitting element through the connection jumper of the third metal layer M2, the fourth metal layer M3 and the sixth metal layer M4. The fourth node N4 can be regarded as the wiring structure at the overlapping position of the projection of this connection area with the third metal layer M2, the fourth metal layer M3 and the sixth metal layer M4. In this embodiment, the anode connection portion 222 can be arranged on the same layer as the anode main body portion 221, both located in the anode layer RE.

[0169] ​ In the embodiment shown, the wiring methods in the first semiconductor layer POLY, the first metal layer M1, the second semiconductor layer IGZO and the fifth metal layer MG are the same as those in ​ the embodiment shown, which will not be elaborated here. Only the differences from the above embodiments will be introduced here. Refer to Figures 29 to 38 , Figures 29 to 38 In the display panel shown, the second metal layer MC can include the first electrode plate C1 of the storage capacitor Cst, the scan signal line S1-1 extending along the second direction Y, the second scan signal line S2-1, the second reset signal line VREF22, etc. The third metal layer M2 can include the initialization signal line VREF1 extending along the first direction X, the first reset signal line VREF21, the first bias voltage signal line DVH1 and some connection jumpers. The first reset signal line VREF21 and the second reset signal line VREF22 are connected to form a grid, and the first bias voltage signal line DVH1 and the second bias voltage signal line DVH2 are connected to form a grid. Among them, in the third metal layer M2, the reset signal line VREF2 (the first reset signal line VREF21) and the bias voltage signal line DVH (the first bias voltage signal line DVH1) are arranged alternately along the first direction X and the second direction Y. The fourth metal layer M3 can include the data assist line FIAA, the power supply signal line PVDD extending along the second direction Y, and some connection jumpers, etc. The sixth metal layer M4 can include the power supply signal line PVDD, the data signal series Data and the data assist line FIAA extending along the first direction X, and some connection jumpers, etc.

[0170] The above Figure 18 and Figure 28In the illustrated embodiment, the anode connection and the anode connection portion 222 are provided on the same layer as the anode main body portion 221. The anode connection portion 222 and the anode main body portion 221 can be fabricated in the same patterning process, and no additional via connection is required between them. However, it is necessary to ensure that the anode connection portion 222 of one light-emitting element is not connected to the anodes (including the anode main body portion 221 and the anode connection portion 222) of other light-emitting elements to avoid short-circuiting of the anodes of different light-emitting elements. For example Figure 28 and Figure 38 as shown, the anode connection portion 222 of some light-emitting elements can be arranged to surround a part of the anode main body portion 221 of the adjacent light-emitting element and extend to the fourth node N4 of the first pixel circuit connected to this light-emitting element.

[0171] Figure 39 FIG. is a schematic structural diagram of a fourth metal layer in a display panel provided by an embodiment of the present invention, Figure 40 FIG. is a schematic structural diagram of a sixth metal layer in a display panel provided by an embodiment of the present invention, Figure 41 FIG. is a schematic structural diagram of an anode layer in a display panel provided by an embodiment of the present invention, Figure 42 FIG. is a schematic partial film layer stack structure diagram of a display panel provided by an embodiment of the present invention. Figures 39 to 42 The overall film layer of the corresponding display panel can be the same as that in Figure 29 the illustrated embodiment. The wiring methods of the first semiconductor layer POLY, the first metal layer M1, the second metal layer MC, the second semiconductor layer IGZO, the fifth metal layer MG, and the third metal layer M2 can be the same as those in Figure 29 the illustrated embodiment, and will not be elaborated here.

[0172] Figures 39 to 42 In the illustrated embodiment, the anode main body portion 221 and the anode connection portion 222 are provided on different layers. For example, the anode main body portion 221 is located in the anode layer RE, and the anode connection portion 222 can be located in at least one metal layer between the first semiconductor layer POLY and the anode layer RE. In the figure, taking the anode connection portion 222 being located in the fourth metal layer M3 as an example, the anode connection portion 222 and the anode main body portion 221 are connected through a via. Thus, the anode connection portion 222 can be partially on the same layer as and connected to the fourth node N4, and the two can be fabricated in the same patterning process. The film layer where the anode connection portion 222 is located is not limited to the above-mentioned fourth metal layer M3, and at least one of the first metal layer M1, the second metal layer MC, the second semiconductor layer IGZO, the fifth metal layer MG, the fourth metal layer M3, and the sixth metal layer M4 can be used to form the anode connection portion 222.

[0173] Optionally, continue to refer to Figure 29 、 Figures 39 to 42, the film layer where the anode connection part 222 is located is between the film layer where the anode main body part 221 is located and the film layer where the substrate is located; along the thickness direction of the display panel, at least part of the anode connection part 222 overlaps with the anode main body part 221.

[0174] As Figure 29 , Figures 39 to 42 shown, when the anode connection part 222 is located in at least one conductive film layer between the anode layer RE and the substrate 40, the positive projection of the anode connection part 222 on the plane where the substrate 40 is located can be set to overlap with the positive projection of the anode main body part 221 on the plane where the substrate 40 is located. In this way, the influence of the anode connection part 222 on the light transmittance of the display panel can be reduced, and the display effect can be ensured.

[0175] Figures 39 to 42 also shows a virtual connection structure 223. The layout method of the virtual connection structure 223 can refer to any of the above embodiments and will not be elaborated here.

[0176] Exemplarily, Figure 43 is a schematic structural diagram of an anode of a light-emitting element provided by an embodiment of the present invention. Refer to Figure 43 , in some embodiments, in the thickness direction of the display panel, the anode main body part 221 overlapping with the anode connection part 222 includes a first anode main body part 2211; the first anode main body part 2211 includes a first virtual symmetry axis ax1, and the first anode main body part 2211 is symmetrically arranged about the first virtual symmetry axis ax1; along the thickness direction of the display panel, one anode connection part 222 overlaps with the first anode main body part 2211, and this anode connection part 222 overlaps with the first virtual symmetry axis ax1.

[0177] As Figure 43 shown, the anode main body part 221 includes a first anode main body part 2211. The positive projection of the first anode main body part 2211 on the plane where the substrate 40 is located is an axisymmetric figure and is symmetric about the first virtual symmetry axis ax1. Among them, the extension direction of the first virtual symmetry axis ax1 is not limited. Figure 43For example only, and not limited thereto in actuality, any symmetry axis of the first anode main body portion 2211 is the first virtual symmetry axis ax1. Along the thickness direction of the display panel, one first anode main body portion 2211 overlaps with one anode connection portion 222, and the anode connection portion 222 overlaps with the first virtual symmetry axis ax1 such that the anode connection portion 222 can only be close to the symmetry axis position of the first anode main body portion 2211. In the orthographic projection on the plane where the substrate 40 is located, the anode connection portion 222 is close to the axis of the first anode main body portion 2211, and the anode connection portion 222 approximately bisects the first anode main body portion 2211, such that the areas of the two parts of the first anode main body portion 2211 divided by one anode connection portion 222 are substantially the same, balancing the brightness difference of the light-emitting elements overlapping with the anode connection portion 222 at different viewing angles, thereby avoiding the problem of color deviation in four directions of the display panel and improving the display effect.

[0178] Exemplarily, Figure 44 is a schematic structural diagram of another anode of a light-emitting element provided by an embodiment of the present invention, which can be referred to Figure 44 , in some other embodiments, along the thickness direction of the display panel, the anode main body portion 221 overlapping with the anode connection portion 222 includes a second anode main body portion 2212; along the thickness direction of the display panel, two anode connection portions 222 overlap with the second anode main body portion 2212; the second anode main body portion 2212 includes a second virtual symmetry axis ax2, and the orthographic projections of the portions where the two anode connection portions 222 overlap with the second anode main body portion 2212 on the plane where the substrate 40 is located are symmetrically arranged with respect to the orthographic projection of the second virtual symmetry axis ax2 on the plane where the substrate 40 is located.

[0179] As Figure 44 shown, the anode main body portion 221 includes a second anode main body portion 2212, and the orthographic projection of the second anode main body portion 2212 on the plane where the substrate 40 is located is an axisymmetric figure, which is symmetric with respect to the second virtual symmetry axis ax2. The shapes of the second anode main body portion 2212 and the first anode main body portion 2212 may be the same or different, and the first virtual symmetry axis ax1 and the second virtual symmetry axis ax2 may extend in the same or different directions. Figure 44 Exemplarily shows that the first virtual symmetry axis ax1 and the second virtual symmetry axis ax2 extend in different directions, and it is not limited thereto in actuality. Along the thickness direction of the display panel, one second anode main body portion 2212 overlaps with two anode connection portions 222. In the orthographic projection on the plane where the substrate is located, these two anode connection portions 222 are symmetric with respect to the second virtual symmetry axis ax2, and the two anode connection portions 222 approximately trisect the second anode main body portion 2212, such that the areas of the three parts of the second anode main body portion 2212 divided by the two anode connection portions 222 are substantially the same, avoiding color deviation in four directions of the display panel.

[0180] Optionally, in a possible embodiment, the display panel further includes a light-transmitting hole that penetrates at least part of the film layers in the display panel; the light-transmitting hole is used to transmit external light to the photosensitive element; along the thickness direction of the display panel, the anode connection portion does not overlap with the light-transmitting hole.

[0181] Among them, the light-transmitting hole can be the area where the under-screen hole-drilling light-transmitting hole of the display panel is located, and can be used to arrange photosensitive elements. The photosensitive elements include, but are not limited to, cameras, infrared sensors, etc. The light-transmitting hole allows external light to pass through, and then is captured by the photosensitive element. In the solution where a light-transmitting hole is provided in the display panel, when arranging the anode connection portion, it is possible to avoid the overlap of the anode connection portion and the light-transmitting hole in the thickness direction of the display panel, so that the anode connection portion avoids the light-transmitting hole, preventing the anode connection portion from affecting the light transmittance at the light-transmitting hole and ensuring the photosensitive effect of the photosensitive element.

[0182] Optionally, Figure 45 FIG. is a schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention, which can be referred to in combination with Figure 4 、 Figure 6 and Figure 45 , in some embodiments, the anode connection portion 222 is located between the film layer where the anode main body portion 221 is located and the film layer where the substrate 40 is located; the first pixel circuit 10 includes at least one transistor (such as Figure 6 T1-T8 in

[0183] Specifically, in this embodiment, the transistors in the first pixel circuit 10 (such as the above-mentioned T1 to T8 transistors) are LTPS transistors, forming an LTPS display panel. Along the direction away from the substrate 40, the display panel may include a buffer layer 70, a first semiconductor layer POLY, a first metal layer M1, a second metal layer MC, a third metal layer M2, a fourth metal layer M3, a planarization layer PLN, and an anode layer RE. An insulating layer 80 is provided between any two adjacent conductive film layers. The first active layer of the transistor is located in the first semiconductor layer POLY. The first electrode plate C1 of the storage capacitor Cst, the first scanning signal line S1, the second scanning signal line S2, the light emission control signal line EMIT, etc. may be located in the first metal layer M1. The gate of the transistor is formed at the overlapping portion of the scanning signal line and the active layer of the transistor. The second electrode plate C2 of the storage capacitor Cst may be formed in the second metal layer MC. The second metal layer MC may further include signal lines and shielding structures extending along the second direction Y, such as the initialization signal line VREF1 and / or the reset signal line VREF2 extending along the second direction Y. The third metal layer M2 serves as the first source-drain metal layer and may include connection jumper lines between the conductive film layers. The fourth metal layer M3 serves as the second source-drain metal layer and may include a power supply signal line PVDD, a data signal line Data, and data auxiliary lines extending along the first direction X. The layout of the signal lines between the above metal layers is only for illustrative purposes, and the layout of the specific signal lines in the metal layer can be adjusted according to actual needs. Among them, the anode connection portions 222 of the light-emitting elements 22 in the first light-emitting element column 20c may be formed in at least one of the first metal layer M1, the second metal layer MC, and the third metal layer M2, realizing flexible layout of the anode connection portions 222.

[0184] Optionally, Figure 46 It is a schematic cross-sectional structure diagram of another display panel provided by an embodiment of the present invention, which can be referred to in combination with Figure 4 、 Figure 6 and Figure 46, in some other embodiments, the anode connection portion 222 is located between the film layer where the anode main body portion 221 is located and the film layer where the substrate 40 is located; the pixel circuit includes at least one transistor, and the transistor includes a first active layer; the pixel circuit further includes a storage capacitor Cst, and the storage capacitor Cst includes a first electrode plate C1 and a second electrode plate C2 arranged oppositely, and the second electrode plate C2 is located on a side of the first electrode plate C1 away from the first active layer; the display panel further includes a first semiconductor layer POLY, a first metal layer M1, a second metal layer MC, a third metal layer M2, and a fourth metal layer M3; the first active layer is located in the first semiconductor layer POLY, the first electrode plate C1 is located in the first metal layer M1, the second electrode plate C2 is located in the second metal layer MC, the third metal layer M2 is located on a side of the second metal layer MC away from the first active layer, and the fourth metal layer M3 is located on a side of the third metal layer M2 away from the first active layer; the anode connection portion 222 is located in at least one of the first metal layer M1, the second metal layer MC, the third metal layer M2, or the fourth metal layer M3.

[0185] Specifically, in this embodiment, the transistor in the first pixel circuit 10 (such as may include the above-mentioned transistors T1 to T8) is an LTPS transistor, forming an LTPS display panel. Along the direction away from the substrate 40, the display panel may include a buffer layer 70, a first semiconductor layer POLY, a first metal layer M1, a second metal layer MC, a third metal layer M2, a fourth metal layer M3, a fifth metal layer M4, a planarization layer PLN, and an anode layer RE, and an insulating layer 80 is provided between any two adjacent conductive film layers. The signal line layout manner in the first semiconductor layer POLY, the first metal layer M1, the second metal layer MC, and the third metal layer M2 may be the same as or different from the Figure 45 corresponding embodiment, and the embodiments of the present invention do not limit this. The fourth metal layer M3 may include a part of the power supply signal line PVDD, a part of the data auxiliary line, and connection jumper lines between the conductive film layers, etc. The fifth metal layer M5 may include another part of PVDD, another part of the data auxiliary line FIAA, and data signal lines Data, etc. The layout of the signal lines between the above metal layers is only for illustrative purposes, and the layout of the specific signal lines in the metal layer can be adjusted according to actual needs. Among them, the anode connection portion 222 of each light-emitting element in the first light-emitting element column 20c may be formed in at least one of the first metal layer M1, the second metal layer MC, the third metal layer M2, and the fourth metal layer M3, realizing a flexible layout of the anode connection portion 222.

[0186] Optionally, reference may be continued to Figure 4 , Figure 8 , Figures 18 to 28, the anode connection portion 222 is located between the film layer where the anode main body portion 221 is located and the film layer where the substrate 40 is located; the first pixel circuit 10 includes at least one first-type transistor and at least one second-type transistor. The first-type transistor includes a first active layer, and the second-type transistor includes a second active layer and a top gate, and the top gate is located on the side of the second active layer away from the first active layer; the first pixel circuit 10 further includes a storage capacitor Cst, and the storage capacitor Cst includes a first electrode plate C1 and a second electrode plate C2 arranged opposite to each other, and the second electrode plate C2 is located on the side of the first electrode plate C1 away from the first active layer; the display panel further includes a first semiconductor layer POLY, a first metal layer M1, a second metal layer MC, a second semiconductor layer IGZO, a fifth metal layer MG, a third metal layer M2, and a fourth metal layer M3; the first active layer is located in the first semiconductor layer POLY, the first electrode plate C1 is located in the first metal layer M1, the second electrode plate C2 is located in the second metal layer MC, the second active layer is located in the second semiconductor layer IGZO, the top gate is located in the fifth metal layer MG, the third metal layer M2 is located on the side of the fifth metal layer MG away from the first active layer, and the fourth metal layer M3 is located on the side of the third metal layer M2 away from the first semiconductor layer POLY; the anode connection portion 222 is located in at least one of the first metal layer M1, the second metal layer MC, the second semiconductor layer IGZO, the fifth metal layer MG, the third metal layer M2, or the fourth metal layer M3.

[0187] Specifically, as Figure 4 , Figure 8 , Figures 18 to 28 shown, the first-type transistor may refer to the above-mentioned LTPS transistor, and the second-type transistor may refer to the above-mentioned IGZO transistor, thereby forming an LTPO display panel. The threshold compensation transistor T4 and the initialization transistor T5 may be second-type transistors, and the first light-emitting control transistor T1, the data writing transistor T2, the driving transistor T3, the second light-emitting control transistor T6, and the reset transistor T7 may be second-type transistors. The first-type transistor includes a first active layer and a first gate, and the second-type transistor may include a second active layer, a top gate, and a bottom gate. The first gate of the first-type transistor may be located on the side of the first active layer close to the second active layer to form a transistor with a top-gate structure, or the first gate may be located on the side of the first active layer away from the second active layer to form a transistor with a bottom-gate structure. The top gate of the second-type transistor is located on the side of the second active layer away from the first active layer, and the bottom gate is located on the side of the second active layer close to the first active layer. Exemplarily, the first gate may be located in the first metal layer M1, the bottom gate may be located in the second metal layer MC, and the top gate may be located in the fifth metal layer MG. The specific arrangement manners in the first metal layer M1, the second metal layer MC, the fifth metal layer MG, the third metal layer M2, and the fourth metal layer M3 are not limited, and reference may be made to Figures 18 to 28 shown, and details are not described herein again.

[0188] Among them, the anode connection portion 222 of the light-emitting element 22 can be formed in at least one of the first metal layer M1, the second metal layer MC, the second semiconductor layer IGZO, the fifth metal layer MG, the third metal layer M2, and the fourth metal layer M3, so as to achieve flexible layout of the anode connection portion 222. Specifically, as Figure 39 shown, Figure 39 the case where the anode connection portion 222 is disposed on the fourth metal layer M3 is taken as an example for illustration.

[0189] Optionally, reference can be made to Figure 27 , a plurality of first-color light-emitting elements R and second-color light-emitting elements B form a first virtual quadrilateral Z1. The first-color light-emitting element R is located at the first vertex of the first virtual quadrilateral Z1, the second-color light-emitting element B is located at the second vertex of the first virtual quadrilateral Z1, and the third-color light-emitting element G is located inside the first virtual quadrilateral Z1; a plurality of third-color light-emitting elements G form a second virtual quadrilateral Z2, and the plurality of third-color light-emitting elements G are respectively located at the vertices of the second virtual quadrilateral Z2, and the first-color light-emitting element R or the second-color light-emitting element B is located inside the second virtual quadrilateral Z2; the first-color light-emitting element R includes one of a red light-emitting element and a blue light-emitting element, and the second-color light-emitting element B includes the other of a red light-emitting element and a blue light-emitting element; the third-color light-emitting element G includes a green light-emitting element.

[0190] A plurality of first-color light-emitting elements R and second-color light-emitting elements B form a first virtual quadrilateral Z1. Two first-color light-emitting elements R are located at the diagonals of the first virtual quadrilateral Z1, and two second-color light-emitting elements B are located at the other two diagonals of the first virtual quadrilateral Z1. And the third-color light-emitting element G is placed inside the first virtual quadrilateral Z1. A plurality of third-color light-emitting elements G can also form a second virtual quadrilateral Z2. In the second virtual quadrilateral Z2, it can be the first-color light-emitting element R located in the second virtual quadrilateral Z2, or the second-color light-emitting element B located in the second virtual quadrilateral Z2.

[0191] The first color, the second color, and the third color respectively correspond to one of red, blue, and green. Through the above arrangement of the light-emitting elements, the rendering effect of the light-emitting elements can be ensured to be better, and further the color display effect of the display panel can be ensured.

[0192] Figure 47 This is a schematic structural diagram of another display panel provided by an embodiment of the present invention. Reference can be made to Figure 47The display panel also includes a display area AA and a non-display area NA that at least partially surrounds the display area AA. The display area AA includes a first display area AA1 and a second display area AA2. The second display area AA2 is located on at least one side of the first display area AA1 along the second direction Y. The first display area AA1 and the second display area AA2 both include a plurality of data signal lines Data. The non-display area NA includes a fan-out area NA1 located on one side of the display area AA along the first direction X. The fan-out area NA1 includes a plurality of fan-out wirings 23. The display panel also includes a data auxiliary line FIAA at least located in the display area AA. The data signal line Data located in the second display area AA2 is electrically connected to the fan-out wiring 23 through the data auxiliary line FIAA.

[0193] Light-emitting elements (not shown in the figure), pixel circuits (not shown in the figure), and data signal lines Data may be arranged in the display area AA to realize the display function of the display panel. The non-display area NA may include a display controller (not shown in the figure) connected to the data signal lines Data, such as a driver chip, etc., which provides data signals to the data signal lines Data through the display controller, thereby driving the display panel to realize the display function. The non-display area NA surrounds at least a portion of the display area AA. The specific positions of the display area AA and the non-display area NA are not specifically limited in the embodiment of the present invention.

[0194] Further, such as Figure 47 As shown, in this embodiment, the display area AA may include a first display area AA1 and a second display area AA2. The figure exemplarily shows that the second display area AA2 is located on both sides of the first display area AA1 along the second direction Y, but is not limited thereto. In this arrangement, along Figure 47 In the illustrated orientation, the second display area AA2 is located between the first display area AA1 and the non-display areas NA on its left and right sides. Along the second direction Y, the first display area AA1 is closer to the center of the display panel, while the second display area AA2 is closer to the edge of the display panel. The non-display area NA includes a fan-out area NA1, which is located to one side of the display area AA along the first direction X. Using the lower side as an example, the fan-out area NA1 can be equipped with multiple fan-out traces 23. These traces are electrically connected to the data signal lines Data, thereby connecting the data signal lines Data to the display controller and ensuring stable transmission of the data signals.

[0195] Continue to refer Figure 47, a plurality of data signal lines Data are provided in both the first display area AA1 and the second display area AA2. The data signal lines Data located in the first display area AA1 can be directly electrically connected to the fan-out routing 23, and the data signal lines Data located in the second display area AA2 are electrically connected to the fan-out routing 23 through the data auxiliary line FIAA within the display area AA. In this way, the fan-out routing 23 can be centrally provided in the fan-out area NA1 below the first display area AA1, thereby reducing the occupied space of the fan-out routing 23, reducing the set area of the fan-out area NA1, effectively reducing the proportion of the non-display area NA, increasing the proportion of the display area AA of the display panel, enhancing the display effect of the display panel, and achieving a narrow border.

[0196] Optionally, reference can be made to Figures 18 to 28 and Figure 47 , the data auxiliary line FIAA includes a first auxiliary branch FIAA1. The first auxiliary branch FIAA1 extends along the first direction X and is electrically connected to the fan-out routing 23. The light-emitting element includes a first-color light-emitting element R and a second-color light-emitting element B with different light-emitting colors. The first-color light-emitting element R or the second-color light-emitting element B includes a third virtual symmetry axis ax3 that extends along the first direction X. The light-emitting element further includes an anode, and the anode includes an anode main body 221. The display panel further includes a pixel defining layer 30 and a plurality of pixel openings 31 provided in the pixel defining layer 30. Along the thickness direction of the display panel, the anode main body 221 overlaps with the pixel openings 31. And the anode main body 221 of the first-color light-emitting element R or the second-color light-emitting element B is symmetrically arranged with respect to the third virtual symmetry axis ax3. The display panel further includes a substrate 40, and the positive projections of two first auxiliary branches FIAA1 overlapping with the same anode main body 221 on the plane of the substrate 40 are symmetrically arranged with respect to the positive projection of the third virtual symmetry axis ax3 on the plane of the substrate 40.

[0197] As Figures 18 to 28 and Figure 47 shown, the data auxiliary line FIAA may include a first auxiliary branch FIAA1 and a second auxiliary branch FIAA2. The first auxiliary branch FIAA1 extends along the first direction X, and the second auxiliary branch FIAA2 extends along the second direction Y. The first auxiliary branch FIAA1 can be arranged in the first display area AA1. The first end of the first auxiliary branch FIAA1 is connected to the fan-out routing 23, the second end of the first auxiliary branch FIAA1 is connected to the first end of the second auxiliary branch FIAA2, and the second end of the second auxiliary branch FIAA2 extends towards the second display area AA2 and is electrically connected to the data signal lines Data in the second display area AA2.

[0198] The extending directions of the first auxiliary branch FIAA1 and the second auxiliary branch FIAA2 are different. The first auxiliary branch FIAA1 and the second auxiliary branch FIAA2 can be arranged in different film layers, and the electrical connection relationship can be ensured through vias. Exemplarily, the first auxiliary branch FIAA1 can be located on the side of the second auxiliary branch FIAA2 away from the substrate. For example Figures 18 to 28 as shown, the first auxiliary branch FIAA1 can be located in the fourth metal layer M3, and the second auxiliary branch FIAA2 can be located in the third metal layer M2.

[0199] Continue to refer to Figures 18 to 28 , the first color light-emitting element R or the second color light-emitting element B includes a third virtual symmetry axis ax3 extending along the first direction X. The anode main body 221 of the first color light-emitting element R is symmetric about the third virtual symmetry axis ax3, or the anode main body 221 of the second color light-emitting element B is symmetric about the third virtual symmetry axis ax3. In the figure, taking the anode main body 221 of the first color light-emitting element R and the anode main body 221 of the second color light-emitting element B as an example of being symmetrically arranged about the third virtual symmetry axis ax3, the actual situation is not limited to this.

[0200] Among them, as Figures 18 to 28 shown, along the thickness direction of the display panel, at least part of the first auxiliary branch FIAA1 can overlap with the anode main body 221 of the first color light-emitting element R and / or the anode main body 221 of the second color light-emitting element B, and at least two first auxiliary branches FIAA1 overlap with the same anode main body 221. In the orthographic projection on the plane where the substrate 40 is located, the two first auxiliary branches FIAA1 overlapping with the same anode main body 221 are symmetric about the third virtual symmetry axis ax3. As Figures 18 to 28 shown, the data auxiliary line FIAA can be arranged on the side of the anode layer RE close to the substrate 40. The first auxiliary branch FIAA1 is located in the film layer under the anode main body 221. Two first auxiliary branches FIAA1 are symmetric about the third virtual symmetry axis ax3, and the two first auxiliary branches FIAA1 approximately trisect the anode main body 221, so that the areas of the three parts of the anode main body 221 divided by the two first auxiliary branches FIAA1 are basically the same, avoiding color deviation in the four directions of the display panel. In addition, since the anode main body 221 can cover part of the first auxiliary branch FIAA1, it can avoid the change of the light transmission direction caused by the first auxiliary branch FIAA1 made of metal material, and can also ensure the display effect of the display panel.

[0201] Optionally, continue to refer to Figure 28, along the thickness direction of the display panel, among the two first auxiliary sub-parts FIAA1 and the two data signal lines Data that overlap with the same anode main body part 221, the first auxiliary sub-part FIAA1 and the data signal line Data located on the same side of the third virtual symmetry axis ax3, the data signal line Data is located on the side of the first auxiliary sub-part FIAA1 away from the third virtual symmetry axis ax3.

[0202] Specifically, along the thickness direction of the display panel, there are at least two data signal lines Data that overlap with the anode main body part 221 of the first color light-emitting element R or the anode main body part 221 of the second color light-emitting element B. That is, along the thickness direction of the display panel, there are two first auxiliary sub-parts FIAA1 and two data signal lines Data that overlap with the same anode main body part 221, and the anode main body part 221 here is the anode main body part 221 of the first color light-emitting element R or the second color light-emitting element B. The positive projections of the two data signal lines Data that overlap with the same anode main body part 221 on the plane where the substrate is located are symmetrically arranged with respect to the positive projection of the third virtual symmetry axis ax3 on the plane where the substrate is located. In the positive projection on the plane where the substrate is located, there is a first auxiliary sub-part FIAA1 and a data signal line Data on both the left and right sides of the third virtual symmetry axis ax3 along the second direction Y.

[0203] Among them, Figure 28 In the shown embodiment, for the first auxiliary sub-part FIAA1 and the data signal line Data located on the same side of the third virtual symmetry axis ax3, the data signal line Data is located on the side of the first auxiliary sub-part FIAA1 away from the third virtual symmetry axis ax3. In other words, the first auxiliary sub-part FIAA1 is located between the third virtual symmetry axis ax3 and the data signal line Data, and the data signal line Data is closer to the light-emitting elements in the adjacent columns along the second direction Y.

[0204] Optionally, in other embodiments not shown in the other drawings of the present utility model, among the two first auxiliary sub-parts FIAA1 and the two data signal lines Data that overlap with the same anode main body part 221 along the thickness direction of the display panel, for the first auxiliary sub-part FIAA1 and the data signal line Data located on the same side of the third virtual symmetry axis ax3, the data signal line Data is located on the side of the first auxiliary sub-part FIAA1 close to the third virtual symmetry axis ax3.

[0205] Specifically, for the first auxiliary sub-part FIAA1 and the data signal line Data located on the same side of the third virtual symmetry axis ax3, the data signal line Data is located on the side of the first auxiliary sub-part FIAA1 close to the third virtual symmetry axis ax3. In other words, the data signal line Data is located between the third virtual symmetry axis ax3 and the first auxiliary sub-part FIAA1, and the first auxiliary sub-part FIAA1 is closer to the light-emitting elements in the adjacent columns along the second direction Y.

[0206] In summary, by reasonably setting the overlapping manner of the anode main body 221 with the first auxiliary branch FIAA1 and the data signal line Data, the influence of the first auxiliary branch FIAA1 and the data signal line Data at different positions in the display panel on the anode main body 221 is made the same or similar, ensuring the uniformity of display.

[0207] Optionally, reference may be further made to Figure 47 , in a possible embodiment, the display panel may further include virtual auxiliary lines DF, and the virtual auxiliary lines DF include a first virtual auxiliary line DF1 and a second virtual auxiliary line DF2. As shown in Figure 47 , both the first virtual auxiliary line DF1 and the second virtual auxiliary line DF2 are insulated from the data auxiliary line FIAA. The setting of the virtual auxiliary lines DF can compensate for the length of the data auxiliary line FIAA. For example, the first virtual auxiliary line DF1 can be used to compensate the first auxiliary branch FIAA1, and the second virtual auxiliary line DF2 is used to compensate the second auxiliary branch FIAA2. That is, by setting the virtual auxiliary lines DF, the wiring of the data auxiliary line FIAA in the overall setting area is balanced, ensuring the density balance of the wiring settings in different areas, and further avoiding different light reflectance rates in different areas of the display panel due to unbalanced wiring settings, and avoiding the situation of unbalanced display effects of the display panel.

[0208] Furthermore, the virtual auxiliary line DF can be electrically connected to a fixed potential terminal. On the one hand, it can avoid interference to the display caused by floating potential coupling of other signals due to the floating potential of the virtual auxiliary line DF. On the other hand, by being connected in parallel with the fixed potential terminal, the resistance on the fixed signal terminal or the fixed potential signal line can be reduced, ensuring that the loss of the fixed potential signal during transmission is small.

[0209] Based on the same concept, an embodiment of the present invention further provides a display device. Figure 48 FIG. is a schematic structural diagram of a display device provided by an embodiment of the present invention. As shown in Figure 48 , the display device includes the display panel 1000 provided by any embodiment of the present invention. Therefore, the display device provided by the embodiment of the present invention has the corresponding beneficial effects of the display panel 1000 provided by the embodiment of the present invention, which will not be elaborated here. Exemplarily, the display device may be an electronic device such as a mobile phone, a computer, a smart wearable device (for example, a smart watch), and an in-vehicle display device, etc., and the embodiment of the present invention does not limit this.

[0210] Note that the above is only the preferred embodiment of the present utility model and the applied technical principles. Those skilled in the art will understand that the present utility model is not limited to the specific embodiments described herein. Various obvious changes, re-adjustments, combinations with each other, and substitutions can be made by those skilled in the art without departing from the protection scope of the present utility model. Therefore, although the present utility model has been described in more detail through the above embodiments, the present utility model is not limited to the above embodiments. Without departing from the concept of the present utility model, it can also include more other equivalent embodiments, and the scope of the present utility model is determined by the scope of the appended claims.

Claims

1. A display panel, characterized in that: include: a plurality of data signal lines, wherein the plurality of data signal lines extend along a first direction and are arranged along a second direction, wherein the first direction and the second direction intersect; a plurality of first pixel circuits, wherein the plurality of first pixel circuits arranged along the first direction are electrically connected to the same data signal line; Multiple first pixel circuit columns and multiple first light-emitting element columns; the first pixel circuit columns include multiple first pixel circuits arranged along the first direction; the first light-emitting element columns include two light-emitting elements with different luminous colors arranged along the first direction, and the two light-emitting elements with different luminous colors are respectively electrically connected to the first pixel circuits located in different first pixel circuit columns, and multiple first pixel circuits in the same first pixel circuit column are electrically connected to multiple light-emitting elements of the same color.

2. The display panel according to claim 1, wherein: The display panel further includes a plurality of first pixel circuit rows and a plurality of first light emitting element rows; The first pixel circuit row includes a plurality of first pixel circuits arranged along the second direction; the first light-emitting element column includes first color light-emitting elements and second color light-emitting elements arranged alternately along the first direction; the first light-emitting element row includes first color light-emitting elements and second color light-emitting elements arranged alternately along the second direction; the first color light-emitting elements and the second color light-emitting elements emit different colors; Multiple first pixel circuits in the same first pixel circuit column are electrically connected to the first color light-emitting elements in at least two columns of the first light-emitting element adjacent to each other along the second direction, or are electrically connected to the second color light-emitting elements in at least two columns of the first light-emitting element adjacent to each other along the second direction; multiple first pixel circuits in the same first pixel circuit row are electrically connected to multiple light-emitting elements in the same first light-emitting element row.

3. The display panel according to claim 2, wherein: At least part of the adjacent first pixel circuit columns include the i-th first pixel circuit column and the (i+1)-th first pixel circuit column; At least partially adjacent two first pixel circuits in the i-th column of first pixel circuits include the i-th column j a first pixel circuit and an i-th pixel circuit (j+1) a first pixel circuit; At least partially adjacent two first pixel circuits in the (i+1)th column of first pixel circuits include the (i+1)th column of first pixel circuits. j the first pixel circuit and the (i+1)th pixel circuit (j+1) a first pixel circuit; At least two adjacent columns of the first light emitting element columns include the p-th column of the first light emitting element column and the (p+1)-th column of the first light emitting element column; At least partially adjacent two light emitting elements in the p-th column of the first light emitting element column include the p-th column q The light emitting element and the pth (q+1) light-emitting elements; At least partially adjacent two light emitting elements in the (p+1)th column of the first light emitting element include the (p+1)th column of the first light emitting element. q light emitting element and the (p+1)th (q+1) light-emitting elements; wherein i, j, p and q are all positive integers; The i j a first pixel circuit and the pth q The light emitting elements are electrically connected; The i (j+1) The first pixel circuit and the (p+1)th (q+1) The light emitting elements are electrically connected; The (i+1)th j The first pixel circuit and the (p+1)th q The light emitting elements are electrically connected; The (i+1)th (j+1) a first pixel circuit and the pth (q+1) The light emitting elements are electrically connected.

4. The display panel according to claim 3, wherein: The light-emitting element includes an anode, the anode including an anode main portion and an anode connecting portion connected to each other; the display panel also includes a pixel defining layer and a plurality of pixel openings provided in the pixel defining layer, along a thickness direction of the display panel, the anode main portion overlaps with the pixel openings, and the anode connecting portion does not overlap with the pixel openings; The i (j+1) The first pixel circuit and the (p+1)th (q+1) The anode connection parts of the light-emitting elements are electrically connected; The (i+1)th (j+1) a first pixel circuit and the pth (q+1) The anode connecting portions of the light emitting elements are electrically connected.

5. The display panel according to claim 4, wherein: The (p+1)th q The anode connection portion of each light emitting element is located on a side of the anode main portion thereof close to the (i+1)th column of the first pixel circuit column; The p (q+1) The anode connection portion of each light emitting element is located on a side of the anode main portion thereof close to the (i+1)th column of the first pixel circuit column.

6. The display panel according to claim 4, wherein: The (p+1)th (q+1) The anode connection portion of each light emitting element is located on a side of the anode main portion thereof close to the i-th column of the first pixel circuit; The p (q+1) The anode connection portion of each light emitting element is located on a side of the anode main portion thereof close to the (i+1)th column of the first pixel circuit column.

7. The display panel according to claim 4, wherein: The (p+1)th (q+1) The anode connection portion of the light emitting element includes a first end connected to the anode main portion thereof and a second end connected to the first pixel circuit, wherein the first end is located on a side of the anode main portion thereof away from the first pixel circuit column of the i-th column; the (i+1)th (j+1) a first pixel circuit and the pth (q+1) The anode connection portion of the light emitting element is electrically connected, and the p (q+1) The anode connection portion of each light-emitting element includes a third end connected to the anode main portion thereof and a fourth end connected to the first pixel circuit, wherein the third end is located on a side of the anode main portion thereof close to the (i+1)th column of the first pixel circuit; Alternatively, the (p+1)th (q+1) The anode connection portion of the light emitting element includes a fifth end connected to the anode main portion thereof and a sixth end connected to the first pixel circuit, the fifth end being located on a side of the anode main portion thereof close to the first pixel circuit column of the i-th column; the (i+1)th (j+1) a first pixel circuit and the pth (q+1) The anode connection portion of the light emitting element is electrically connected, and the p (q+1) The anode connection portion of each light emitting element includes a seventh end connected to its anode main portion and an eighth end connected to the first pixel circuit. The seventh end is located on a side of its anode main portion away from the (i+1)th column of the first pixel circuit.

8. The display panel according to claim 4, wherein: The display panel further includes a substrate and a dummy connection structure; The orthographic projection of the virtual connection structure on the plane where the substrate is located is located on the p q The anode main body of each light-emitting element is on one side of the orthographic projection of the plane where the substrate is located; and / or, The orthographic projection of the virtual connection structure on the plane where the substrate is located is located at the (p+1)th q The anode main body of each light-emitting element is located on one side of the orthographic projection of the plane where the substrate is located.

9. The display panel according to claim 8, wherein: The dummy connection structures and the anode connection parts are alternately arranged in the first direction and / or the second direction.

10. The display panel according to claim 8, wherein The dummy connection structure and the anode connection portion are arranged on the same layer.

11. The display panel according to claim 8, wherein The p q There is a break between the orthographic projection of the anode main body of each light-emitting element on the plane where the substrate is located and the orthographic projection of the virtual connection structure on the plane where the substrate is located; and / or, the (p+1)th q There is a break between the orthographic projection of the anode main body of each light-emitting element on the plane where the substrate is located and the orthographic projection of the dummy connection structure on the plane where the substrate is located.

12. The display panel according to claim 8, wherein The p q The anode main body of each light emitting element is electrically connected to the dummy connection structure; and / or, the (p+1)th q The anode main body of each light emitting element is electrically connected to the dummy connection structure.

13. The display panel according to claim 2, wherein: At least some of the adjacent first pixel circuit columns include the hth first pixel circuit column, the (h+1)th first pixel circuit column, the (h+2)th first pixel circuit column, and the (h+3)th first pixel circuit column; At least partially adjacent two first pixel circuits in the hth column of first pixel circuits include the hth column of first pixel circuits k a first pixel circuit and an hth pixel circuit (k+1) first pixel circuits; at least partially adjacent two first pixel circuits in the (h+1)th column of first pixel circuits include the (h+1)th column of first pixel circuits; k The first pixel circuit and the (h+1)th pixel circuit (k+1) first pixel circuits, at least partially adjacent two first pixel circuits in the (h+2)th column of first pixel circuits include the (h+2)th column of first pixel circuits. k The first pixel circuit and the (h+2)th pixel circuit (k+1) first pixel circuits; at least partially adjacent two first pixel circuits in the (h+3)th column of first pixel circuits include the (h+3)th column of first pixel circuits; k The first pixel circuit and the (h+3)th pixel circuit (k+1) a first pixel circuit; At least partially adjacent four columns of the first light-emitting element columns include the mth column of the first light-emitting element column, the (m+1)th column of the first light-emitting element column, the (m+2)th column of the first light-emitting element column, and the (m+3)th column of the first light-emitting element column; The at least partially adjacent two light-emitting elements in the m-th column of the first light-emitting element include the m-th column n The mth light emitting element and (n+1) light-emitting elements; At least partially adjacent two light emitting elements in the (m+1)th column of the first light emitting element include the (m+1)th column of the first light emitting element. n light emitting element and the (m+1)th (n+1) light-emitting elements; At least partially adjacent two light emitting elements in the (m+2)th column of first light emitting elements include the (m+2)th column of first light emitting elements. n light emitting element and the (m+2)th (n+1) light-emitting elements; At least partially adjacent two light emitting elements in the (m+3)th column of the first light emitting element include the (m+3)th column of the first light emitting element. n light emitting element and the (m+3)th (n+1) light-emitting elements; wherein h, k, m and n are all positive integers; The h k a first pixel circuit and the mth n The light emitting elements are electrically connected; The h (k+1) The first pixel circuit and the (m+1)th (n+1) The light emitting elements are electrically connected; The (h+1)th k The first pixel circuit and the (m+1)th n The light emitting elements are electrically connected; The (h+1)th (k+1) a first pixel circuit and the mth (n+1) The light emitting elements are electrically connected; The (h+2) k The first pixel circuit and the (m+3)th n The light emitting elements are electrically connected; The (h+2) (k+1) The first pixel circuit and the (m+2)th (n+1) The light emitting elements are electrically connected; The (h+3) k The first pixel circuit and the (m+2)th n The light emitting elements are electrically connected; The (h+3) (k+1) The first pixel circuit and the (m+3)th (n+1) The light emitting elements are electrically connected.

14. The display panel according to claim 13, wherein: The light-emitting element includes an anode, the anode including an anode main portion and an anode connecting portion connected to each other; the display panel also includes a pixel defining layer and a plurality of pixel openings provided in the pixel defining layer, along a thickness direction of the display panel, the anode main portion overlaps with the pixel openings, and the anode connecting portion does not overlap with the pixel openings; The h (k+1) The first pixel circuit and the (m+1)th (n+1) The anode connection parts of the light-emitting elements are electrically connected; The (h+2) k The first pixel circuit is connected to the (m+3)th n The anode connecting portions of the light emitting elements are electrically connected.

15. The display panel according to claim 7 or 14, characterized in that: The anode connecting portion is provided on the same layer as the anode main body; Alternatively, the display panel further includes a substrate, and the film layer where the anode connecting portion is located is located between the film layer where the anode main body portion is located and the film layer where the substrate is located.

16. The display panel according to claim 15, wherein: The film layer where the anode connecting portion is located is located between the film layer where the anode main body portion is located and the film layer where the substrate is located; At least a portion of the anode connecting portion overlaps the anode main portion along a thickness direction of the display panel.

17. The display panel according to claim 16, wherein: In the thickness direction of the display panel, the anode main body portion overlapping the anode connecting portion includes a first anode main body portion; The first anode body portion includes a first virtual symmetry axis, and the first anode body portion is symmetrically arranged about the first virtual symmetry axis; Along the thickness direction of the display panel, one of the anode connecting portions overlaps with the first anode main portion, and the anode connecting portion overlaps with the first virtual symmetry axis.

18. The display panel according to claim 16, wherein: In the thickness direction of the display panel, the anode main body portion overlapping the anode connecting portion includes a second anode main body portion; Along the thickness direction of the display panel, two anode connecting portions overlap with the second anode main portion; The second anode body includes a second virtual symmetry axis, and the orthographic projections of the overlapping portions of the two anode connecting portions and the second anode body on the plane where the substrate is located are symmetrical about the orthographic projections of the second virtual symmetry axis on the plane where the substrate is located.

19. The display panel according to claim 7 or 14, characterized in that: The display panel further includes a light-transmitting hole, which penetrates at least a portion of the film layer in the display panel; the light-transmitting hole is used to transmit external light to the photosensitive element; Along a thickness direction of the display panel, the anode connecting portion and the light transmission hole do not overlap.

20. The display panel according to claim 15, wherein The anode connecting portion is located between the film layer where the anode main body portion is located and the film layer where the substrate is located; The first pixel circuit includes at least one transistor, and the transistor includes a first active layer; The first pixel circuit further includes a storage capacitor, the storage capacitor including a first electrode plate and a second electrode plate that are oppositely arranged, and the second electrode plate is located on a side of the first electrode plate away from the first active layer; The display panel further includes a first semiconductor layer, a first metal layer, a second metal layer and a third metal layer; The first active layer is located in the first semiconductor layer, the first electrode is located in the first metal layer, the second electrode is located in the second metal layer, and the third metal layer is located on a side of the second metal layer away from the first active layer; The anode connecting portion is located in at least one of the first metal layer, the second metal layer, or the third metal layer.

21. The display panel according to claim 15, wherein The anode connecting portion is located between the film layer where the anode main body portion is located and the film layer where the substrate is located; The pixel circuit includes at least one transistor, wherein the transistor includes a first active layer; The pixel circuit further includes a storage capacitor, the storage capacitor including a first electrode plate and a second electrode plate arranged opposite to each other, the second electrode plate being located on a side of the first electrode plate away from the first active layer; The display panel further includes a first semiconductor layer, a first metal layer, a second metal layer, a third metal layer and a fourth metal layer; The first active layer is located on the first semiconductor layer, the first electrode is located on the first metal layer, the second electrode is located on the second metal layer, the third metal layer is located on a side of the second metal layer away from the first active layer, and the fourth metal layer is located on a side of the third metal layer away from the first active layer; The anode connecting portion is located in at least one of the first metal layer, the second metal layer, the third metal layer, or the fourth metal layer.

22. The display panel according to claim 15, wherein: The anode connecting portion is located between the film layer where the anode main body portion is located and the film layer where the substrate is located; The first pixel circuit includes at least one first-type transistor and at least one second-type transistor, the first-type transistor includes a first active layer, the second-type transistor includes a second active layer and a top gate, and the top gate is located on a side of the second active layer away from the first active layer; The first pixel circuit further includes a storage capacitor, the storage capacitor including a first electrode plate and a second electrode plate that are oppositely arranged, and the second electrode plate is located on a side of the first electrode plate away from the first active layer; The display panel further includes a first semiconductor layer, a first metal layer, a second metal layer, a second semiconductor layer, a fifth metal layer, a third metal layer, and a fourth metal layer; the first active layer is located in the first semiconductor layer, the first electrode is located in the first metal layer, the second electrode is located in the second metal layer, the second active layer is located in the second semiconductor layer, the top gate is located in the fifth metal layer, and the third metal layer is located on a side of the fifth metal layer away from the first active layer; The fourth metal layer is located on a side of the third metal layer away from the first active layer; The anode connection portion is located in at least one of the first metal layer, the second metal layer, the second semiconductor layer, the fifth metal layer, the third metal layer, or the fourth metal layer.

23. The display panel according to claim 2, wherein: The display panel further includes a plurality of second pixel circuit columns and a plurality of second pixel circuit rows, wherein the second pixel circuit columns include a plurality of second pixel circuits arranged along the first direction, and the second pixel circuit rows include a plurality of second pixel circuits arranged along the second direction; The second pixel circuit column is electrically connected to the same data signal line; The display panel further includes a plurality of second light-emitting element columns and a plurality of second light-emitting element rows, wherein the second light-emitting element columns include a plurality of third-color light-emitting elements arranged along the first direction, and the second light-emitting element rows include a plurality of the third-color light-emitting elements arranged along the second direction; the third-color light-emitting elements emit light of a different color from the first-color light-emitting elements and the second-color light-emitting elements; Multiple second pixel circuits in the same second pixel circuit column are electrically connected to multiple third color light-emitting elements in the same second light-emitting element column, and multiple second pixel circuits in the same second pixel circuit row are electrically connected to multiple third color light-emitting elements in the same second light-emitting element row.

24. The display panel according to claim 23, wherein: Along the first direction, the first light-emitting element rows and the second light-emitting element rows are alternately arranged; Along the second direction, the first light emitting element columns and the second light emitting element columns are alternately arranged.

25. The display panel according to claim 23, wherein: A plurality of the first color light-emitting elements and the second color light-emitting elements form a first virtual quadrilateral, the first color light-emitting elements are located at first vertices of the first virtual quadrilateral, the second color light-emitting elements are located at second vertices of the first virtual quadrilateral, and the third color light-emitting elements are located inside the first virtual quadrilateral; The plurality of third color light emitting elements form a second virtual quadrilateral, the plurality of third color light emitting elements are respectively located at vertices of the second virtual quadrilateral, and the first color light emitting element or the second color light emitting element is located inside the second virtual quadrilateral; The first color light emitting element includes one of a red light emitting element and a blue light emitting element, and the second color light emitting element includes the other of a red light emitting element and a blue light emitting element; The third color light emitting element includes a green light emitting element.

26. The display panel according to claim 1, wherein The display panel further includes a display area and a non-display area at least partially surrounding the display area, the display area including a first display area and a second display area, the second display area being located on at least one side of the first display area along the second direction; the first display area and the second display area each including a plurality of the data signal lines; the non-display area including a fan-out area located on one side of the display area along the first direction, the fan-out area including a plurality of fan-out traces; The display panel further includes a data auxiliary line at least located in the display area, and the data signal line located in the second display area is electrically connected to the fan-out line through the data auxiliary line.

27. The display panel according to claim 26, wherein: The data auxiliary line includes a first auxiliary branch, the first auxiliary branch extends along the first direction and is electrically connected to the fan-out line; The light-emitting elements include a first color light-emitting element and a second color light-emitting element with different luminous colors, the first color light-emitting element or the second color light-emitting element includes a third virtual symmetry axis, and the third virtual symmetry axis extends along the first direction; The light-emitting element further includes an anode, the anode including an anode main portion; the display panel further includes a pixel defining layer and a plurality of pixel openings provided in the pixel defining layer, wherein the anode main portion overlaps with the pixel openings along a thickness direction of the display panel; and the anode main portion of the first color light-emitting element or the second color light-emitting element is symmetrically arranged about the third virtual symmetry axis; The display panel further includes a substrate, and the orthographic projections of two first auxiliary sub-portions overlapping the same anode main portion on the plane where the substrate is located are symmetrically arranged with respect to the orthographic projection of the third virtual symmetry axis on the plane where the substrate is located.

28. The display panel according to claim 27, wherein: Along the thickness direction of the display panel, among the two first auxiliary divisions and the two data signal lines overlapping with the same anode main body, the first auxiliary division and the data signal line are located on the same side of the third virtual symmetry axis, and the data signal line is located on the side of the first auxiliary division close to the third virtual symmetry axis.

29. The display panel according to claim 27, wherein: Along the thickness direction of the display panel, among the two first auxiliary divisions and the two data signal lines overlapping with the same anode main body, the first auxiliary division and the data signal line are located on the same side of the third virtual symmetry axis, and the data signal line is located on the side of the first auxiliary division away from the third virtual symmetry axis.

30. A display device, characterized in that: A display panel comprising any one of claims 1-29.

Images