GNSS displacement monitor

Abstract

The utility model relates to the technical field of displacement monitoring, in particular to a GNSS (Global Navigation Satellite System) displacement monitor, which comprises a GNSS radio frequency front-end circuit, a processor, a communication module, a power supply module, a self-checking module and a control module, the processor is respectively connected with the GNSS radio frequency front-end circuit and the communication module, and the power supply module is respectively connected with the GNSS radio frequency front-end circuit, the processor and the communication module; the GNSS radio frequency front-end circuit is connected with the processor through the self-checking module and the control module in sequence; according to the utility model, a dual-channel receiving design is adopted, data at the same position are received and screened independently by two channels, and a strong signal channel is preferably selected for transmission, so that the signal receiving stability and reliability of the processor are ensured, the signal receiving stability is improved, and the fault-tolerant capability of the system is enhanced. According to the utility model, the technical problem that a traditional GNSS displacement monitor is unstable in signal reception in a complex environment is solved.

Description

Technical Field

[0001] The utility model relates to the technical field of displacement monitoring, in particular to a GNSS displacement monitor. Background Art

[0002] The GNSS displacement monitor is a specialized device that utilizes Global Navigation Satellite System technology for displacement monitoring. It accurately captures position and deformation information, ensuring the reliability of monitoring for dam horizontal displacement, geological hazards, and surface deformation. During monitoring, if abnormal displacement is detected, an early warning mechanism is immediately triggered, rapidly notifying relevant departments for timely response and effectively preventing potential safety risks.

[0003] Traditional GNSS displacement monitoring systems rely on stable GNSS receivers. However, when a single receiver experiences weak signals or fails to receive a strong enough signal, it can malfunction, effectively processing or transmitting accurate data. This can lead to data processing errors for the entire GNSS displacement monitoring system, reducing monitoring accuracy and reliability. More seriously, it increases the risk of false alarms, impacting emergency response decisions. Therefore, ensuring the stability of traditional GNSS displacement monitoring instruments in complex environments is crucial. Utility Model Content

[0004] The purpose of this application is to provide a GNSS displacement monitor that solves the technical problem of unstable signal reception of traditional GNSS displacement monitors in complex environments.

[0005] In order to solve the above technical problems, the solution adopted by this application is as follows:

[0006] The utility model provides a GNSS displacement monitor, comprising a plurality of GNSS radio frequency front-end circuits, a processor, a communication module, and a power supply module, wherein the processor is respectively connected to the GNSS radio frequency front-end circuit and the communication module, and the power supply module is respectively connected to the GNSS radio frequency front-end circuit, the processor, and the communication module; the utility model is characterized in that the utility model further comprises a self-test module and a control module, and the GNSS radio frequency front-end circuit is sequentially connected to the processor via the self-test module, the control module, and the processor;

[0007] The self-test module includes a differential amplifier circuit and a comparison circuit. The input end of the differential amplifier circuit is connected to the output end of the GNSS radio frequency front-end circuit as the input end of the self-test module; the output end of the differential amplifier circuit is connected to the input end of the comparison circuit.

[0008] The comparison circuit includes an upper limit comparator and a lower limit comparator, wherein the positive input terminal of the upper limit comparator is connected to the negative input terminal of the lower limit comparator, and the input terminal of this connection portion is provided as the input terminal of the comparison circuit; the output terminal of the upper limit comparator serves as an output terminal of the self-test module, and the output terminal of the lower limit comparator serves as a second output terminal of the self-test module;

[0009] The control module includes a channel selection circuit and an alarm circuit, wherein the channel selection circuit is connected to the alarm circuit; the signal input end of the channel selection circuit is connected to the output end of the GNSS radio frequency front-end circuit, and the control input end of the channel selection circuit is connected to the first output end and the second output end of the self-test module respectively;

[0010] The channel selection circuit includes a first NOT gate, a first AND gate, a second NOT gate, a second AND gate, a switch component 1, and a switch component 2. An input end of the first AND gate is connected to an input end of the second NOT gate, and the input end is set here as a control input end of the channel selection circuit; an input end of the second AND gate is connected to an input end of the first NOT gate, and the input end is set here as a second control input end of the channel selection circuit; the output end of the first NOT gate is connected to two input ends of the first AND gate, the output end of the second NOT gate is connected to two input ends of the second AND gate, the output end of the first AND gate is connected to the switch component 1, and the output end of the second AND gate is connected to the switch component 2.

[0011] In some embodiments, the switch component one includes field effect transistor one, and the switch component two includes field effect transistor two; the gate of the field effect transistor one is connected to the output end of the first AND gate; the gate of the field effect transistor two is connected to the output end of the second AND gate; the source of the field effect transistor one and the source of the field effect transistor two are connected and the output end is set here as the signal output end of the control module, and the drain of the field effect transistor one and the drain of the field effect transistor two are respectively set as the signal input end of the control module.

[0012] In some embodiments, the drain of the first field effect transistor and the drain of the second field effect transistor are connected to a first voltage follower and a second voltage follower, respectively.

[0013] In some embodiments, the channel selection circuit further includes an indicator light 1 and an indicator light 2, wherein the indicator light 1 and the indicator light 2 are connected to the output end of the first AND gate and the output end of the second AND gate, respectively.

[0014] In some embodiments, the alarm circuit includes an XOR gate, a third NOT gate, a transistor, and an alarm, wherein an input end of the XOR gate is connected to the output end of the first AND gate, an input end of the XOR gate is connected to the output end of the second AND gate, the output end of the XOR gate is connected to the input end of the third NOT gate, and the output end of the third NOT gate drives the alarm through the transistor; the emitter of the transistor is provided with the control output end of the control module.

[0015] In some embodiments, the alarm is a buzzer.

[0016] In some embodiments, an auxiliary sensor module is further included, and the auxiliary sensor module is connected to the processor.

[0017] In some embodiments, the processor includes a DSP chip and an FPGA chip, the input end of the DSP chip is connected to the signal input end of the processor and the signal output end of the control module, the output end of the DSP chip is connected to the signal input end of the FPGA chip, the control input end of the FPGA chip is connected to the control module, and the output end of the FPGA chip is connected to the communication module.

[0018] The technical solution of this application has at least the following advantages and beneficial effects:

[0019] This new system features a self-check module and a control module, and employs a dual-channel reception design. For the same position data, both channels independently receive and filter it, prioritizing the strongest signal channel for transmission, ensuring stable and reliable signal reception by the processor. This design not only improves signal reception stability but also enhances the system's fault tolerance. Even if one channel fails, the other can take over, ensuring uninterrupted monitoring. This new system effectively addresses the problem of unstable signal reception in traditional GNSS displacement monitors in complex environments, improving the overall system stability and reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 This is a signal flow diagram of the present utility model;

[0021] Figure 2 This is the circuit diagram of the self-test module of the utility model;

[0022] Figure 3 This is the circuit diagram of the control module of the utility model. DETAILED DESCRIPTION

[0023] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0024] It should be noted that similar reference numerals and letters denote similar items in the following figures. Therefore, once an item is defined in one figure, it does not require further definition or explanation in subsequent figures. Terms such as "center," "upper," "lower," "inner," and "outer" indicate positions or locations based on the positions or locations shown in the figures, or the positions or locations in which the product is typically placed when in use. These terms are used solely for ease of description and simplification of the present application. They do not indicate or imply that the device or component referred to must have a specific position, be constructed, or operate in a specific orientation, and are not to be construed as limiting the present application. It should also be noted that, unless otherwise expressly specified or limited, the terms "disposed," "mounted," and "connected" should be interpreted broadly. For example, they can refer to fixed, removable, or integral connections; mechanical or electrical connections; direct connections or indirect connections through an intermediary; or internal connections between two components. Those skilled in the art will understand the specific meanings of these terms in this application in specific contexts.

[0025] Example 1

[0026] Please refer to Figure 1-Figure 3 The present invention provides a GNSS displacement monitor, which is the same as the prior art and includes multiple GNSS radio frequency front-end circuits, a processor, a communication module, and a power supply module. The processor is connected to the GNSS radio frequency front-end circuit and the communication module respectively.

[0027] The GNSS RF front-end circuit includes an antenna, a low-noise filter amplifier, and a frequency converter module. It is mainly used to perform preliminary processing on the weak GNSS RF signal received by the antenna and output the intermediate frequency signal to the processor after the processing is completed.

[0028] In this embodiment, the processor includes a DSP chip and an FPGA chip. The input end of the DSP chip is connected to the signal input end of the processor and the signal output end of the control module. The output end of the DSP chip is connected to the signal input end of the FPGA chip. The control input end of the FPGA chip is connected to the control module. The output end of the FPGA chip is connected to the communication module.

[0029] The processor calculates the position according to the received signal and compares the calculation result with the set data. After the comparison is completed, the processor contacts the monitoring end through the communication module and sends the calculation result and comparison result to the monitoring end.

[0030] In this embodiment, the GNSS radio frequency front-end circuit, DSP chip, FPGA chip, and communication module all belong to the prior art and are not described in detail here.

[0031] Unlike the prior art, the present invention further includes a self-test module and a control module, and the GNSS radio frequency front-end circuit is connected in sequence through the self-test module, the control module and the processor;

[0032] The self-test module includes a differential amplifier circuit and a comparison circuit. The input end of the differential amplifier circuit is connected to the output end of the GNSS radio frequency front-end circuit as the input end of the self-test module; the output end of the differential amplifier circuit is connected to the input end of the comparison circuit.

[0033] The comparison circuit includes an upper limit comparator and a lower limit comparator, wherein the positive input terminal of the upper limit comparator is connected to the negative input terminal of the lower limit comparator, and the input terminal of this connection portion is provided as the input terminal of the comparison circuit; the output terminal of the upper limit comparator serves as the first output terminal of the self-test module, and the output terminal of the lower limit comparator serves as the second output terminal of the self-test module;

[0034] Furthermore, the self-test module includes operational amplifiers U1, U2, U3, diodes D1, D2, resistors R1, R2, R3, R4, R5, R6, R7, R8, R9, R10;

[0035] The differential amplifier circuit includes an operational amplifier U1, resistors R1, R2, R3, R4, R5, and R6; the comparison circuit includes operational amplifiers U2 and U3, resistors R7, R8, R9, and R10, and diodes D1 and D2;

[0036] It should be explained that in the comparison circuit, the upper limit comparator includes an operational amplifier U2, resistors R7, R8, and a diode D1; the lower limit comparator includes an operational amplifier U3, resistors R9, R10, and a diode D2;

[0037] Specifically, one end of the resistor R1 is set as the d_in1 input terminal, and the other end of the resistor R1, one end of the resistor R4, one end of the resistor R3, and the negative input terminal of the operational amplifier U1 are connected; one end of the resistor R2 is set as the d_in2 input terminal, and the other end of the resistor R2, one end of the resistor R5, one end of the resistor R6, and the positive input terminal of the operational amplifier U1 are connected; the other end of the resistor R6 is grounded, and the other end of the resistor R5 is connected to pin 2 of the operational amplifier U1 and connected to the power supply; the other end of the resistor R4 is connected to pin 5 of the operational amplifier U1 and grounded, and the other end of the resistor R3, the other end of the operational amplifier U1, the output terminal of the operational amplifier U1, the positive input terminal of the operational amplifier U2, and the negative input terminal of the operational amplifier U3 are connected, and the operational amplifier U2 is connected. The negative input terminal of the operational amplifier U3, one end of the resistor R7, and one end of the resistor R8 are connected, the other end of the resistor R8 is grounded, and the other end of the resistor R7 is connected to the power supply; pin 5 of the operational amplifier U2 is grounded, and pin 4 is connected to the power supply, the output terminal of the operational amplifier U2 is connected to the anode of the diode D1, and the d_out1 output terminal is set here; the positive input terminal of the operational amplifier U3, one end of the resistor R9, and one end of the resistor R10 are connected, the other end of the resistor R9 is grounded, the other end of the resistor R10 is connected to pin 4 of the operational amplifier U3 and connected to the power supply, the output terminal of the operational amplifier U3 is connected to the anode of the diode D2 and the d_out2 output terminal is set here, the cathode of the diode D1, the cathode of the diode D2, and pin 5 of the operational amplifier U3 are connected and grounded.

[0038] It should be noted that the operational amplifier U1 in the differential amplifier circuit calculates the voltage difference between its positive input and negative input terminals, and adds this difference to a reference voltage, thereby ensuring that an adjusted positive level signal is generated at the output terminal of U1. This positive level signal is convenient for comparison by the subsequent comparison circuit.

[0039] In the present invention, the input end of each self-test module is respectively configured with two GNSS RF front-end circuits, and these two GNSS RF front-end circuits simultaneously receive the same location information data; the self-test module is mainly used to compare and determine which of the two GNSS RF front-end circuits receives a higher signal strength, thereby outputting a control signal to the control module.

[0040] The control module includes a channel selection circuit and an alarm circuit, which are connected to each other; a signal input terminal of the channel selection circuit is connected to an output terminal of the GNSS radio frequency front-end circuit, and a control input terminal of the channel selection circuit is connected to an output terminal 1 and an output terminal 2 of the self-test module respectively;

[0041] The channel selection circuit includes a first NOT gate, a first AND gate, a second NOT gate, a second AND gate, a switch component 1, and a switch component 2. An input end of the first AND gate is connected to an input end of the second NOT gate, and the input end is set here as a control input end of the channel selection circuit; an input end of the second AND gate is connected to an input end of the first NOT gate, and the input end is set here as a second control input end of the channel selection circuit; an output end of the first NOT gate is connected to two input ends of the first AND gate, an output end of the second NOT gate is connected to two input ends of the second AND gate, an output end of the first AND gate is connected to switch component 1, and an output end of the second AND gate is connected to switch component 2;

[0042] The channel selection circuit also includes an indicator light 1 and an indicator light 2, wherein the indicator light 1 and the indicator light 2 are connected to the output end of the first AND gate and the output end of the second AND gate respectively.

[0043] In this embodiment, switch assembly 1 includes field effect transistor 1, and switch assembly 2 includes field effect transistor 2; the gate of field effect transistor 1 is connected to the output end of the first AND gate; the gate of field effect transistor 2 is connected to the output end of the second AND gate; the source of field effect transistor 1 and the source of field effect transistor 2 are connected and an output end is set here as the signal output end of the control module, and the drain of field effect transistor 1 and the drain of field effect transistor 2 are respectively set as the signal input end of the control module;

[0044] In this embodiment, the drain of the first field effect transistor and the drain of the second field effect transistor are connected to the first voltage follower and the second voltage follower respectively.

[0045] The alarm circuit includes an XOR gate, a third NOT gate, a transistor, and an alarm. An input end of the XOR gate is connected to the output end of the first AND gate, an input end of the XOR gate is connected to the output end of the second AND gate, the output end of the XOR gate is connected to the input end of the third NOT gate, and the output end of the third NOT gate drives the alarm through the transistor; the emitter of the transistor is provided with a control output end of the control module;

[0046] In this embodiment, the alarm is a buzzer.

[0047] Furthermore, the control module includes a first NOT gate U6, a first AND gate U7, a second NOT gate U8, a second AND gate U9, a field effect transistor Q1, a field effect transistor Q2, a voltage follower U4, a voltage follower U5, an indicator light LED1, an indicator light LED2, an XOR gate U10, a third NOT gate U11, transistors Q3, Q4, Q5, a buzzer U12, and resistors R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, and R21;

[0048] Among them, the channel selection circuit includes a first NOT gate U6, a first AND gate U7, a second NOT gate U8, a second AND gate U9, a field effect transistor Q1, a field effect transistor Q2, a voltage follower U4, a voltage follower U5, an indicator light LED1, an indicator light LED2, transistors Q3 and Q4, a buzzer U12, resistors R11, R12, R13, R14, R15, R16, and R17; the alarm circuit includes an XOR gate U10, a third NOT gate U11, resistors R18, R19, R20, and R21, a transistor Q5, and a buzzer U12;

[0049] Specifically, pin 5 of the voltage follower U4 is grounded and pin 2 is connected to the power supply. The positive input terminal of the voltage follower U4 is set to the ch_in1 input terminal, the negative input terminal of the voltage follower U4, the output terminal of the voltage follower U4, and one end of the resistor R11 are connected. The other end of the resistor R11 is connected to the drain of the field effect transistor Q1, the gate of the field effect transistor Q1, the output terminal of the first AND gate U7, and one end of the resistor R13 are connected. One input terminal of the first AND gate U7 is connected to the input terminal of the second NOT gate U8 and the ch_in2 input terminal is set here. The second input terminal of the first AND gate U7 is connected to the output terminal of the first NOT gate U6. The input end of the first NOT gate U6 is connected to an input end of the second AND gate U9, and the ch_in3 input end is set here; the output end of the second NOT gate U8 is connected to the second input end of the second AND gate U9, the output end of the second AND gate U9, one end of the resistor R14, and the gate of the second field effect transistor Q2 are connected, the drain of the second field effect transistor Q2 is connected to one end of the resistor R12, the other end of the resistor R12, the output end of the second voltage follower U5, and the negative input end of the second voltage follower U5 are connected, and the positive input end of the second voltage follower U5 is set as the ch_in4 input end; the source of the first field effect transistor Q1 and the source of the field effect transistor Q2 are connected, and c is set here. h_out1 output terminal; the other end of the resistor R13 is connected to the base of the transistor Q3, the collector of the transistor Q3, the collector of the transistor Q4, and one end of the resistor R16 are connected, and the other end of the resistor R16 is connected to the power supply; the emitter of the transistor Q3, the A end of the XOR gate U10, the anode of the indicator light LED1, and one end of the resistor R15 are connected; the other end of the resistor R14 is connected to the base of the transistor Q4, the emitter of the transistor Q4, one end of the resistor R17, the anode of the indicator light LED2, and the B end of the XOR gate U10; the other end of the resistor R15, the cathode of the indicator light LED1, the cathode of the indicator light LED2 The cathode, the other end of the resistor R17, one end of the resistor R20, and one end of the resistor R21 are connected and grounded; the output end of the XOR gate U10 is connected to the input end of the third NOT gate U11, the output end of the third NOT gate U11 is connected to one end of the resistor R18, the other end of the resistor R18, the other end of the resistor R20, and the base of the transistor Q5 are connected, the collector of the transistor Q5, one end of the resistor R19, and one end of the buzzer U12 are connected, the other end of the buzzer U12 is connected to the other end of the resistor R19 and connected to the power supply; the emitter of the transistor Q5 is connected to the other end of the resistor R21 and the ch_out2 output end is set here.

[0050] It should be noted that the field effect transistor is an NMOS tube and the transistor is an NPN tube.

[0051] It should be noted that the d_in1 input terminal and the ch_in1 input terminal are simultaneously connected to the output terminal of a GNSS RF front-end circuit, and the d_in2 input terminal and the ch_in4 input terminal are simultaneously connected to the output terminal of another GNSS RF front-end circuit; the d_out1 output terminal and the ch_in2 input terminal are connected, and the d_out2 output terminal and the ch_in3 input terminal are connected; the ch_out1 output terminal and the ch_out2 output terminal are connected to different pins of the processor.

[0052] The control module is used to switch channels. It opens the transmission channel with higher signal strength according to the control signal transmitted by the self-test module to ensure that the signal received by the processor is stable and reliable. If one of the two channels fails, the other channel can take over to ensure uninterrupted monitoring of the displacement monitor.

[0053] To facilitate understanding, the working principles of the self-test module and the control module are explained below:

[0054] The two different GNSS RF front-end circuits receiving the same data transmit the processed data to the differential amplifier circuit of the self-test module. The operational amplifier U1 in the differential amplifier circuit processes the received signal and outputs a positive level signal biased by the reference voltage to the comparison circuit.

[0055] The upper limit comparator and the lower limit comparator of the comparison circuit compare the positive level signal at the same time, and the comparison results are output to the ch_in2 input terminal and the ch_in3 input terminal of the control module respectively;

[0056] If the ch_in2 input receives a high level and the ch_in3 input receives a low level, the channel where the FET Q1 is located is turned on and the channel where the FET Q2 is located is turned off. The processor receives the signal from the channel turned on by the FET Q1. At the same time, the indicator LED1 lights up.

[0057] If the ch_in2 input terminal receives a low level and the ch_in3 input terminal receives a high level, the channel where the FET Q1 is located is closed and the channel where the FET Q2 is located is opened, and the processor receives the signal from the channel opened by the FET Q2; at the same time, the indicator LED2 lights up;

[0058] If the system is in working state, the ch_in2 input terminal and the ch_in3 input terminal receive a high level or a low level at the same time, it means that errors have occurred in both channels at the same time, both channels are closed, and the buzzer U12 is powered on and starts working. At the same time, the control module outputs a signal from the ch_out2 output terminal to the processor, and the processor informs the monitoring end through the communication module.

[0059] It should be noted that, in the present invention, indicator light LED1 is used to indicate that the channel where field effect transistor Q1 is located is in the on state, and indicator light LED2 is used to indicate that the channel where field effect transistor Q2 is located is in the on state; when the staff regularly checks the GNSS displacement monitor, they can give priority to detecting the channel where the indicator light is not on, which is convenient for efficient troubleshooting.

[0060] This embodiment also includes an auxiliary sensor module, which is connected to the processor; the auxiliary sensor module transmits the detected external environmental data of the GNSS displacement monitor to the processor, and the processor compensates the signal transmitted by the GNSS RF front-end circuit based on the environmental information, so that the data transmitted by the GNSS RF front-end circuit is more accurate.

[0061] It should be noted that the auxiliary sensor module includes a temperature sensor and a humidity sensor.

[0062] The power module provides power and is connected to the GNSS RF front-end circuit, processor, communication module, self-test module, control module, and auxiliary sensor module. Power modules are state-of-the-art and will not be described in detail here.

[0063] Thus far, various embodiments of the present invention have been described in detail. To avoid obscuring the concept of the present invention, some details known in the art have been omitted. Based on the above description, those skilled in the art will fully understand how to implement the technical solutions of the present invention. The scope of the present invention is defined by the appended claims.

Claims

1. A GNSS displacement monitor, comprising a plurality of GNSS radio frequency front-end circuits, a processor, a communication module, and a power module, wherein the processor is connected to the GNSS radio frequency front-end circuits and the communication module, respectively, and the power module is connected to the GNSS radio frequency front-end circuits, the processor, and the communication module, respectively; characterized in that: It also includes a self-test module and a control module, and the GNSS radio frequency front-end circuit is connected to the self-test module, the control module and the processor in sequence; The self-test module includes a differential amplifier circuit and a comparison circuit. The input end of the differential amplifier circuit is connected to the output end of the GNSS radio frequency front-end circuit as the input end of the self-test module; the output end of the differential amplifier circuit is connected to the input end of the comparison circuit. The comparison circuit includes an upper limit comparator and a lower limit comparator, wherein the positive input terminal of the upper limit comparator is connected to the negative input terminal of the lower limit comparator, and the input terminal of this connection portion is provided as the input terminal of the comparison circuit; the output terminal of the upper limit comparator serves as an output terminal of the self-test module, and the output terminal of the lower limit comparator serves as a second output terminal of the self-test module; The control module includes a channel selection circuit and an alarm circuit, wherein the channel selection circuit is connected to the alarm circuit; the signal input end of the channel selection circuit is connected to the output end of the GNSS radio frequency front-end circuit, and the control input end of the channel selection circuit is connected to the first output end and the second output end of the self-test module respectively; The channel selection circuit includes a first NOT gate, a first AND gate, a second NOT gate, a second AND gate, a switch component 1, and a switch component 2. An input end of the first AND gate is connected to an input end of the second NOT gate, and the input end is set here as a control input end of the channel selection circuit; an input end of the second AND gate is connected to an input end of the first NOT gate, and the input end is set here as a second control input end of the channel selection circuit; the output end of the first NOT gate is connected to two input ends of the first AND gate, the output end of the second NOT gate is connected to two input ends of the second AND gate, the output end of the first AND gate is connected to the switch component 1, and the output end of the second AND gate is connected to the switch component 2.

2. A GNSS displacement monitor according to claim 1, characterized in that: The switch component 1 includes a field effect transistor 1, and the switch component 2 includes a field effect transistor 2; the gate of the field effect transistor 1 is connected to the output end of the first AND gate; the gate of the field effect transistor 2 is connected to the output end of the second AND gate; the source of the field effect transistor 1 and the source of the field effect transistor 2 are connected and the output end is set here as the signal output end of the control module, and the drain of the field effect transistor 1 and the drain of the field effect transistor 2 are respectively set as the signal input end of the control module.

3. A GNSS displacement monitor according to claim 2, characterized in that: The drain of the first field effect transistor and the drain of the second field effect transistor are connected to a first voltage follower and a second voltage follower respectively.

4. A GNSS displacement monitor according to claim 1, characterized in that: The channel selection circuit further includes an indicator light 1 and an indicator light 2, wherein the indicator light 1 and the indicator light 2 are connected to the output end of the first AND gate and the output end of the second AND gate respectively.

5. The GNSS displacement monitor according to claim 1, characterized in that: The alarm circuit includes an XOR gate, a third NOT gate, a transistor, and an alarm. An input end of the XOR gate is connected to the output end of the first AND gate, an input end of the XOR gate is connected to the output end of the second AND gate, the output end of the XOR gate is connected to the input end of the third NOT gate, and the output end of the third NOT gate drives the alarm through the transistor; the emitter of the transistor is provided with the control output end of the control module.

6. A GNSS displacement monitor according to claim 5, characterized in that: The alarm is a buzzer.

7. The GNSS displacement monitor according to claim 1, characterized in that: The system further includes an auxiliary sensor module connected to the processor.

8. The GNSS displacement monitor according to claim 1, characterized in that: The processor includes a DSP chip and an FPGA chip. The input end of the DSP chip is connected to the signal input end of the processor and the signal output end of the control module. The output end of the DSP chip is connected to the signal input end of the FPGA chip. The control input end of the FPGA chip is connected to the control module. The output end of the FPGA chip is connected to the communication module.

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