Road vehicle license plate recognition device

Abstract

A road vehicle license plate recognition device comprises an image acquisition sensor, a signal conditioning module, an image processing module and a data transmission module, the image acquisition sensor is used for capturing image signals of vehicles running on a road, and the signal conditioning module comprises a differential amplification circuit, an amplitude limiting adjusting circuit, a sampling control circuit and an A / D converter. According to the device, the CMOS image sensor is adopted to capture a vehicle image, common-mode interference is effectively filtered through the differential amplification circuit, and the signal-to-noise ratio is increased; and the amplitude limiting adjusting circuit intelligently adjusts the signal range, suppresses noise and ensures that the image is stable and clear under complex illumination. Through fine cooperation of the sampling control circuit and the A / D converter, accurate sampling and analog-to-digital conversion of image signals are realized, and high-quality digital signals are provided for subsequent digital image processing. In cooperation with the efficient image processing capability of the FPGA processing chip, the device can quickly and accurately recognize license plate information, and the definition and recognition accuracy of a license plate image are improved.

Description

Technical Field

[0001] The utility model relates to the technical field of intelligent license plate recognition, in particular to a road vehicle license plate recognition device. Background Art

[0002] Vehicle license plate recognition is a crucial component of intelligent transportation systems. Existing license plate recognition systems often face numerous challenges in practical applications. First, poor image acquisition quality is a common problem. Due to the complexity of road environments, such as lighting variations, weather conditions, and vehicle speed, license plate images captured by image acquisition sensors often suffer from blurring, high noise levels, and low contrast, severely impacting subsequent license plate recognition accuracy. For example, the utility model patent with authorization publication number CN 208384804 U discloses a novel, separate tracking license plate recognition camera. This camera utilizes an ISP image processing module to capture vehicle license plate image signals. Its signal processing relies heavily on the system's internal algorithms. Because these algorithms are typically optimized for specific scenarios, they may not maintain optimal image processing performance in extreme or complex road environments. For example, under extreme lighting conditions (such as strong backlight or extremely dark nighttime conditions), the algorithms may not be able to effectively suppress noise or enhance contrast, resulting in a decrease in license plate image quality, increasing the difficulty and error rate of license plate recognition.

[0003] Therefore, the utility model provides a new solution to solve this problem. Utility Model Content

[0004] In view of the above situation, in order to overcome the defects of the prior art, the purpose of the present utility model is to provide a road vehicle license plate recognition device.

[0005] The technical solution is: a road vehicle license plate recognition device, including an image acquisition sensor, a signal conditioning module, an image processing module and a data transmission module. The image acquisition sensor is used to capture image signals of vehicles traveling on the road. The signal conditioning module includes:

[0006] A differential amplifier circuit, configured to differentially amplify the output signal of the image acquisition sensor;

[0007] A limiting adjustment circuit, used for limiting and compressing the dynamic range of the output signal of the differential amplifier circuit;

[0008] A sampling control circuit, configured to control and optimize the sampling process of the image signal, wherein the sampling control terminal is electrically connected to the image processing module and adjusts the sampling conduction state by receiving instructions from the image processing module;

[0009] The A / D converter is used to perform analog-to-digital conversion on the image sampling signal and send the converted digital signal to the image processing module for processing.

[0010] Preferably, the differential amplifier circuit includes an op amp U1, the inverting input terminal of the op amp U1 is connected to the first signal output terminal of the image acquisition sensor through a resistor R1, and is connected to the output terminal of the op amp U1 through a resistor R4; the non-inverting input terminal of the op amp U1 is connected to the second signal output terminal of the image acquisition sensor through a resistor R2, and is grounded through a resistor R3.

[0011] Preferably, the amplitude limiting adjustment circuit includes a diode D1, a diode D2 and an op amp U2, the cathode of the diode D1 is connected to the output end of the op amp U1 through a capacitor C1 and is grounded through a resistor R5, the anodes of the diode D1 and the diode D2 are connected to resistors R7, one end of the resistor R8 and the cathode of the voltage zener diode DZ1, the other end of the resistor R7 and the anode of the voltage zener diode DZ1 are grounded, and the other end of the resistor R8 is connected to a +5V power supply; the cathode of the diode D2 is connected to the inverting input end of the op amp U2 and one end of the resistor R9 through a capacitor C2 and is grounded through the other end of the resistor R6, and the output end of the op amp U2 is connected to the other end of the resistor R9 and the input end of the sampling control circuit.

[0012] Preferably, the sampling control circuit includes:

[0013] A voltage follower, configured to losslessly transmit the image signal processed by the amplitude limiting adjustment circuit to a subsequent circuit;

[0014] A sample-and-hold device, used to control the backward sampling process of the output signal of the voltage follower, and to sample and hold the image signal for subsequent conversion by the A / D converter;

[0015] The photoelectric isolator is arranged between the sample holder and the A / D converter and is used to provide electrical isolation during the analog-to-digital conversion process.

[0016] Preferably, the sample and hold device includes a MOS transistor Q1 and a capacitor C3, the source of the MOS transistor Q1 is connected to the output end of the voltage follower, the drain of the MOS transistor Q1 is connected to the input end of the optoelectronic isolator through a resistor R11, and is grounded through the capacitor C3, the gate of the MOS transistor Q1 is connected to the cathode of the Zener diode DZ2, one end of the resistor R10 and the image processing module, and the cathode of the Zener diode DZ2 and the other end of the resistor R10 are grounded.

[0017] Preferably, the image acquisition sensor is a CMOS image sensor.

[0018] Preferably, the image processing module uses an FPGA processing chip.

[0019] Preferably, the data transmission module includes a network port and a wireless interface, which are used to transmit the data processed by the FPGA processing chip to the host computer in real time.

[0020] Through the above technical solutions, the beneficial effects of the present invention are as follows: the device uses a CMOS image sensor as the core of image acquisition, and designs a signal conditioning module to process the image signal. In the signal conditioning module, a differential amplifier circuit is used to effectively suppress common-mode signal interference and improve the signal-to-noise ratio of the image signal; the limit adjustment circuit further performs dynamic range compression and spike noise suppression on the signal, ensuring the stability and accuracy of the image signal under complex lighting conditions, greatly improving the image quality, and reducing blur and noise problems. Through the precise coordination of the sampling control circuit and the A / D converter, accurate sampling and analog-to-digital conversion of the image signal are achieved, providing high-quality digital signals for subsequent digital image processing. Combined with the efficient image processing capabilities of the FPGA processing chip, the device can quickly and accurately identify license plate information, improving the clarity and recognition accuracy of the license plate image. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 This is a system module structure diagram of the utility model.

[0022] Figure 2 This is the control principle diagram of the signal conditioning module in this utility model.

[0023] Figure 3 This is a connection principle diagram of the differential amplifier circuit and the amplitude limiting adjustment circuit in the utility model.

[0024] Figure 4 This is the principle diagram of the sampling control circuit in this utility model. DETAILED DESCRIPTION

[0025] The above and other technical contents, features and effects of the present invention are described in detail below with reference to the attached Figure 1 To the attached Figure 4 The detailed description of the embodiments will clearly show that the structural contents mentioned in the following embodiments are all based on the accompanying drawings.

[0026] Various exemplary embodiments of the present invention will be described below with reference to the accompanying drawings.

[0027] like Figure 1As shown, a road vehicle license plate recognition device includes an image acquisition sensor, a signal conditioning module, an image processing module, and a data transmission module. The image acquisition sensor is used to capture image signals of vehicles traveling on the road. In this embodiment, the image acquisition sensor uses a CMOS image sensor as its core component. CMOS image sensors are widely used in various vision systems due to their low power consumption, high integration, fast read speed, and excellent image quality.

[0028] The signal conditioning module receives the original image signal from the image acquisition sensor and performs preprocessing to improve the image quality, such as Figure 2 As shown, specifically including:

[0029] A differential amplifier circuit, used for differentially amplifying the output signal of the image acquisition sensor;

[0030] A limiting adjustment circuit is used to limit and compress the dynamic range of the output signal of the differential amplifier circuit;

[0031] The sampling control circuit is used to control and optimize the sampling process of the image signal. The sampling control terminal is electrically connected to the image processing module and adjusts the sampling conduction state by receiving instructions from the image processing module.

[0032] The A / D converter is used to perform analog-to-digital conversion on the image sampling signal and send the converted digital signal to the image processing module for processing.

[0033] In the above, if Figure 3 As shown, the differential amplifier circuit includes an op amp U1, the inverting input terminal of the op amp U1 is connected to the first signal output terminal Sensor- of the image acquisition sensor through a resistor R1, and is connected to the output terminal of the op amp U1 through a resistor R4; the non-inverting input terminal of the op amp U1 is connected to the second signal output terminal Sensor+ of the image acquisition sensor through a resistor R2, and is grounded through a resistor R3.

[0034] After capturing a vehicle image, the image acquisition sensor generates two differential signals, which are fed into op amp U1 through its first and second signal output terminals for differential amplification. When a common-mode signal exists in the two input signals, due to the symmetry of the circuit, the common-mode signals cancel each other out at the output of op amp U1. This suppresses the common-mode signal, reduces interference caused by environmental factors such as temperature changes and power supply fluctuations, and improves the signal-to-noise ratio of the image signal.

[0035] Under extreme lighting conditions, spike interference is easily generated in the acquisition signal of the image acquisition sensor. This interference can easily cause the acquired license plate image to be blurred and noisy. Therefore, a limit adjustment circuit is used to further process the image signal after differential amplification. Specifically, Figure 3As shown, the amplitude limiting adjustment circuit includes a diode D1, a diode D2 and an op amp U2. The cathode of the diode D1 is connected to the output terminal of the op amp U1 through the capacitor C1 and is grounded through the resistor R5. The anodes of the diode D1 and the diode D2 are connected to the resistor R7, one end of the resistor R8 and the cathode of the voltage zener diode DZ1. The other end of the resistor R7 and the anode of the voltage zener diode DZ1 are grounded, and the other end of the resistor R8 is connected to a +5V power supply; the cathode of the diode D2 is connected to the inverting input terminal of the op amp U2 and one end of the resistor R9 through the capacitor C2 and is grounded through the other end of the resistor R6. The output terminal of the op amp U2 is connected to the other end of the resistor R9 and the input terminal of the sampling control circuit.

[0036] During the operation of the amplitude limiting circuit, capacitor C1, resistor R5, capacitor C2, and resistor R6 form RC high-pass filters to eliminate unwanted DC current and low-frequency noise. Diodes D1 and D2 clamp the signal, limiting its dynamic range to within the system's preset range. This effectively suppresses the effects of spike noise, prevents image signal distortion, and ensures accurate image acquisition. Op amp U2 adjusts the amplitude of the limited signal to ensure effective image signal output. Through this signal amplification and amplitude limiting process, the image acquisition system can better cope with complex environments and changing conditions, improving system stability and reliability.

[0037] The image signal processed by the limit adjustment circuit is input into the sampling control circuit, such as Figure 4 As shown, the sampling control circuit specifically includes:

[0038] The voltage follower U3 is used to transmit the image signal processed by the limit adjustment circuit to the subsequent circuit without loss;

[0039] The sample-and-hold device is used to control the backward sampling process of the output signal of the voltage follower U3, and to sample and hold the image signal for subsequent conversion by the A / D converter;

[0040] The optoelectronic isolator U4 is provided between the sample-and-hold device and the A / D converter to provide electrical isolation for the analog-to-digital conversion process.

[0041] The sample-and-hold device includes a MOS transistor Q1 and a capacitor C3. The source of the MOS transistor Q1 is connected to the output of the voltage follower. The drain of the MOS transistor Q1 is connected to the input of the optoelectronic isolator via a resistor R11 and is grounded via the capacitor C3. The gate of the MOS transistor Q1 is connected to the cathode of the Zener diode DZ2, one end of the resistor R10, and the image processing module. The cathode of the Zener diode DZ2 and the other end of the resistor R10 are grounded.

[0042] During the operation of the sampling control circuit, voltage follower U3 features high input impedance and low output impedance, ensuring that image signals are transmitted without attenuation or distortion. During the sampling phase, the sample-and-hold circuit is controlled by the image processing module, which generates a control voltage signal to control the conduction state of MOS transistor Q1. If the control voltage signal is high, MOS transistor Q1 conducts; if the control voltage signal is low, MOS transistor Q1 is turned off, and sampling ceases. The sampling process of the control signal determines the system sampling time point. By continuously adjusting and optimizing the control signal generation logic and parameters, sampling accuracy and image processing efficiency can be further improved. During the hold phase, capacitor C3 acts as a storage element, storing the sampled signal value for subsequent conversion by the A / D converter. Optoelectronic isolator U4 uses photoelectric conversion to isolate and transmit signals, enhancing the system's anti-interference capability and security.

[0043] The A / D converter converts the image sampling signal into a digital signal, which is then fed into the image processing module for processing. Specifically, the image processing module uses an FPGA processing chip, leveraging the FPGA's high flexibility and parallel processing capabilities to efficiently complete image processing tasks. Leveraging sophisticated image preprocessing technology, the FPGA performs processing steps such as license plate location, character segmentation, and character recognition, enabling rapid and accurate identification of license plate information from captured image data.

[0044] The data transmission module includes both a network port and a wireless interface, used to transmit data processed by the FPGA processing chip to the host computer in real time via wired or wireless transmission. The appropriate interface for data transmission can be selected based on the actual application scenario and requirements. After receiving the FPGA-processed data, the host computer performs real-time analysis and displays the license plate image and recognition results. It also provides advanced functions such as data logging, historical query, intelligent alarms, and statistical analysis, providing comprehensive support for traffic management and decision-making.

[0045] In summary, this device uses a CMOS image sensor as the image acquisition core and a signal conditioning module to process the image signal. Within the signal conditioning module, a differential amplifier circuit effectively suppresses common-mode signal interference, improving the signal-to-noise ratio of the image signal. The limiter adjustment circuit further compresses the signal's dynamic range and suppresses spike noise, ensuring image signal stability and accuracy under complex lighting conditions. This significantly improves image quality and reduces blur and noise. Through the precise coordination of the sampling control circuit and the A / D converter, precise sampling and analog-to-digital conversion of the image signal are achieved, providing high-quality digital signals for subsequent digital image processing. Combined with the efficient image processing capabilities of the FPGA processing chip, this device can quickly and accurately identify license plate information, improving the clarity and accuracy of license plate images.

[0046] The above is a further detailed description of the present invention in combination with a specific implementation method, and it cannot be determined that the specific implementation of the present invention is limited to this. For technical personnel in the field of the present invention and related technical fields, based on the technical solution of the present invention, any expansion and replacement of operating methods and data should fall within the scope of protection of the present invention.

Claims

1. A road vehicle license plate recognition device, comprising an image acquisition sensor, a signal conditioning module, an image processing module, and a data transmission module, wherein the image acquisition sensor is used to capture image signals of vehicles traveling on the road, and is characterized in that: The signal conditioning module includes: A differential amplifier circuit, configured to differentially amplify the output signal of the image acquisition sensor; A limiting adjustment circuit, used for limiting and compressing the dynamic range of the output signal of the differential amplifier circuit; A sampling control circuit, configured to control and optimize the sampling process of the image signal, wherein the sampling control terminal is electrically connected to the image processing module and adjusts the sampling conduction state by receiving instructions from the image processing module; The A / D converter is used to perform analog-to-digital conversion on the image sampling signal and send the converted digital signal to the image processing module for processing.

2. A road vehicle license plate recognition device according to claim 1, characterized in that: The differential amplifier circuit includes an op amp U1, the inverting input terminal of the op amp U1 is connected to the first signal output terminal of the image acquisition sensor through a resistor R1, and is connected to the output terminal of the op amp U1 through a resistor R4; the non-inverting input terminal of the op amp U1 is connected to the second signal output terminal of the image acquisition sensor through a resistor R2, and is grounded through a resistor R3.

3. A road vehicle license plate recognition device according to claim 2, characterized in that: The amplitude limiting adjustment circuit includes a diode D1, a diode D2 and an op amp U2. The cathode of diode D1 is connected to the output end of op amp U1 through capacitor C1 and is grounded through resistor R5. The anodes of diode D1 and diode D2 are connected to resistor R7, one end of resistor R8 and the cathode of voltage zener diode DZ1. The other end of resistor R7 and the anode of voltage zener diode DZ1 are grounded, and the other end of resistor R8 is connected to a +5V power supply. The cathode of diode D2 is connected to the inverting input end of op amp U2 and one end of resistor R9 through capacitor C2 and is grounded through the other end of resistor R6. The output end of op amp U2 is connected to the other end of resistor R9 and the input end of the sampling control circuit.

4. A road vehicle license plate recognition device according to claim 3, characterized in that: The sampling control circuit includes: A voltage follower, configured to losslessly transmit the image signal processed by the amplitude limiting adjustment circuit to a subsequent circuit; A sample-and-hold device, used to control the backward sampling process of the output signal of the voltage follower, and to sample and hold the image signal for subsequent conversion by the A / D converter; The photoelectric isolator is arranged between the sample holder and the A / D converter and is used to provide electrical isolation during the analog-to-digital conversion process.

5. The road vehicle license plate recognition device according to claim 4, characterized in that: The sample-and-hold device includes a MOS transistor Q1 and a capacitor C3. The source of the MOS transistor Q1 is connected to the output end of the voltage follower. The drain of the MOS transistor Q1 is connected to the input end of the photoelectric isolator through a resistor R11 and is grounded through the capacitor C3. The gate of the MOS transistor Q1 is connected to the cathode of the Zener diode DZ2, one end of the resistor R10, and the image processing module. The cathode of the Zener diode DZ2 and the other end of the resistor R10 are grounded.

6. The road vehicle license plate recognition device according to claim 1, characterized in that: The image acquisition sensor adopts a CMOS image sensor.

7. The road vehicle license plate recognition device according to claim 1, characterized in that: The image processing module uses an FPGA processing chip.

8. The road vehicle license plate recognition device according to claim 7, characterized in that: The data transmission module includes a network port and a wireless interface, which are used to transmit the data processed by the FPGA processing chip to the host computer in real time.

Images