Display driving device and electronic equipment

Abstract

The utility model discloses a display driving device and electronic equipment, and belongs to the technical field of electronic equipment. The display driving device comprises a differential amplification circuit, the input end of the differential amplification circuit is used for receiving a data signal, the differential amplification circuit comprises a first selector, and the first selector is used for receiving a control signal; the first input end of the signal output circuit is connected with the first output end of the differential amplification circuit, the second input end of the signal output circuit is connected with the second output end of the differential amplification circuit, the first input end of the signal output circuit receives positive differential amplification signals, and the second input end of the signal output circuit receives negative differential amplification signals. The second input end of the signal output circuit is used for receiving a negative differential amplification signal; the first selector responds to a control signal and outputs a data signal to the display module through the first output end or the second output end of the signal output circuit.

Description

Technical Field

[0001] The present application belongs to the technical field of electronic equipment, and specifically relates to a display driving device and an electronic device. Background Art

[0002] As the smartphone market becomes increasingly saturated and price competition intensifies, value engineering becomes increasingly important. De-Mux (1:2 Mux, two-channel multiplexing) technology can reduce the number of driver IC (Integrated Circuit) channels by half, thereby reducing driver IC costs.

[0003] In the related technology, a high-mobility MOSFET (metal-oxide semiconductor field-effect transistor) is used on the driver IC side to replace the TFT (Thin Film Transistor) device on the display panel side to improve the switching speed and reduce power consumption. However, when a faster display module refresh frequency is required, there is a problem of slow response speed due to the signal delay caused by the on-resistance of the MOSFET switch and the panel capacitance. Utility Model Content

[0004] The present application aims to provide a display driving device and an electronic device, which can solve the problem of slow response speed in related technologies.

[0005] In a first aspect, an embodiment of the present application proposes a display driver device, which is connected to a display module and is used to transmit a data signal to the display module. The display driver device includes: a differential amplifier circuit, the input end of the differential amplifier circuit is used to receive the data signal, the differential amplifier circuit includes a first selector, and the first selector is used to receive a control signal; a signal output circuit, the first input end of the signal output circuit is connected to the first output end of the differential amplifier circuit, the second input end of the signal output circuit is connected to the second output end of the differential amplifier circuit, the first input end of the signal output circuit receives a positive differential amplified signal, and the second input end of the signal output circuit is used to receive a negative differential amplified signal; wherein, the first selector outputs the data signal to the display module through the first output end or the second output end of the signal output circuit in response to the control signal.

[0006] In a second aspect, an embodiment of the present application proposes an electronic device, comprising: the display driving device of the first aspect above; a display module, wherein the first pixel row of the display module is connected to the first output end of the signal output circuit in the display driving device, and the second pixel row of the display module is connected to the second output end of the signal output circuit.

[0007] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become obvious from the description below, or will be learned through practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The above and / or additional aspects and advantages of the present application will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0009] Figure 1 shows one of the circuit diagrams of the display driving device provided in some embodiments of the present application;

[0010] Figure 2 shows a second circuit diagram of a display driving device provided in some embodiments of the present application;

[0011] Figure 3 shows a signal timing diagram provided in some embodiments of the present application;

[0012] Figure 4 A third circuit diagram of a display driving device provided in some embodiments of the present application is shown;

[0013] Figure 5 A circuit diagram of an electronic device provided in some embodiments of the present application is shown.

[0014] Reference numerals:

[0015] 100 display driver, 110 differential amplifier circuit, 111 differential subcircuit, 112 amplifier subcircuit, 113 first selector, 120 signal output circuit, 121 second selector, 122 third selector, PMOS1 first field-effect transistor, NMOS1 second field-effect transistor, PMOS2 third field-effect transistor, NMOS2 fourth field-effect transistor, V power supply, 130 control circuit, 200 electronic device, 210 display module, 211 first pixel row, 212 second pixel row. DETAILED DESCRIPTION

[0016] The embodiments of the present application will be described in detail below. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application and are not to be construed as limiting the present application. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.

[0017] The terms "first" and "second" in the specification and claims of this application may explicitly or implicitly refer to one or more of the features. Throughout the description of this application, unless otherwise specified, "plurality" means two or more. Furthermore, "and / or" in the specification and claims refers to at least one of the connected entities, and the character " / " generally indicates an "or" relationship between the connected entities.

[0018] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0019] In the description of this application, it should be noted that, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; mechanical connections or electrical connections; direct connections or indirect connections through an intermediate medium; and internal connections between two components. Those skilled in the art will understand the specific meanings of the above terms in this application based on the specific circumstances.

[0020] The following combination Figures 1 to 5 A display driving device and an electronic device according to embodiments of the present application are described.

[0021] In some embodiments of the present application, a display driver device is provided. The display driver device is connected to a display module and is used to transmit a data signal to the display module. Figure 1 shows one of the circuit diagrams of the display driving device provided in some embodiments of the present application, Figure 2 FIG. 2 shows a second circuit diagram of a display driving device provided in some embodiments of the present application. Figure 1 and Figure 2 As shown, the display driving device 100 includes:

[0022] A differential amplifier circuit 110, wherein the input end of the differential amplifier circuit 110 is used to receive a data signal, and the differential amplifier circuit 110 includes a first selector 113, and the first selector 113 is used to receive a control signal; a signal output circuit 120, wherein the first input end of the signal output circuit 120 is connected to the first output end of the differential amplifier circuit 110, and the second input end of the signal output circuit is connected to the second output end of the differential amplifier circuit 110, and the first input end of the signal output circuit 120 receives a positive differential amplified signal, and the second input end of the signal output circuit 120 is used to receive a negative differential amplified signal; wherein the first selector 113 outputs the data signal to the display module through the first output end and the second output end of the signal output circuit 120 in response to the control signal.

[0023] In an embodiment of the present application, the display driver device 100 includes a differential amplifier circuit 110 and a signal output circuit 120. The differential amplifier circuit 110 includes an input terminal, a first output terminal, and a second output terminal. The input terminal of the differential amplifier circuit 110 is capable of receiving a data signal, which is amplified by the differential amplifier circuit 110 and then transmitted to the display module through the first output terminal or the second output terminal. The signal output circuit 120 includes a first input terminal and a second input terminal. The first input terminal of the signal output circuit 120 is used to receive a positive differential amplified signal from the differential amplifier circuit 110, i.e., a P-pole differential amplified signal, and the second input terminal of the signal output circuit 120 is used to receive a negative differential amplified signal from the differential amplifier circuit 110, i.e., an N-pole differential amplified signal. The differential amplifier circuit 110 also includes a first selector 113. The first selector 113 is capable of receiving a control signal and, based on the control signal, selects and switches to output the amplified data signal through the first output terminal or the second output terminal of the signal output circuit 120.

[0024] Exemplarily, when the control signal is a high-level signal, the positive differential amplification signal becomes larger. At this time, the differential amplifier circuit 110 transmits the data signal to the display module through the first output terminal of the signal output circuit 120 .

[0025] Exemplarily, when the control signal is a low-level signal, the negative differential amplification signal becomes larger. At this time, the differential amplifier circuit 110 transmits the data signal to the display module through the second output terminal of the signal output circuit 120 .

[0026] In related technologies, the on-off state of a MOSFET controls the transmission of data signals to the display module via the first or second output terminal. However, due to the on-resistance of the MOSFET and the equivalent capacitance of the display module, data signal transmission is delayed. Furthermore, when the MOSFET is off, it cannot control the routing signals in the display module, thus affecting EMI resistance.

[0027] In the embodiment of the present application, a first selector 113 is provided in the differential amplifier circuit 110, and the first selector 113 is used to control the signal output circuit 120 to transmit a data signal to the display module through the first output terminal or the second output terminal. This solves the problem of data signal transmission delay caused by the on-resistance of the MOSFET and the equivalent capacitance of the display module. In addition, the present application controls the first output terminal or the second output terminal to transmit the data signal through the first selector 113, and can also allow the output data signal to restrain the routing signal of the display module in the invalid area, thereby improving the EMI (Electromagnetic Interference) / EMS (Electro Magnetic Susceptibility) resistance of the display driver device 100.

[0028] like Figure 1 As shown, in some embodiments of the present application, the differential amplifier circuit 110 includes: a differential sub-circuit 111, the input end of the differential sub-circuit 111 is used to receive a data signal; a first selector 113, the first end of the first selector 113 is connected to the output end of the differential sub-circuit 111, and the second end of the first selector 113 receives a control signal; an amplifier sub-circuit 112, the positive input end of the amplifier sub-circuit 112 is connected to the positive output end of the differential sub-circuit 111, the negative input end of the amplifier sub-circuit 112 is connected to the negative output end of the differential sub-circuit 111, the positive output end of the amplifier sub-circuit 112 is the first output end of the differential amplifier circuit 110, and the negative output end of the amplifier sub-circuit 112 is the second output end of the differential amplifier circuit 110.

[0029] In the embodiment of the present application, the differential amplifier circuit 110 includes a differential subcircuit 111, an amplifier subcircuit 112, and a first selector 113. The input end of the differential subcircuit 111 serves as the input end of the data signal, and the data signal transmitted to the differential amplifier circuit 110 is transmitted to the input end of the differential subcircuit 111. The output end of the differential subcircuit 111 is connected to the first selector 113. The positive output end of the differential subcircuit 111 is connected to the positive input end of the amplifier subcircuit 112, and the negative output end of the differential subcircuit 111 is connected to the negative input end of the amplifier subcircuit 112. The positive differential signal and the negative differential amplified signal generated by the differential subcircuit 111 are transmitted to the amplifier subcircuit 112 through the positive terminal and the negative terminal, respectively, for amplification. After amplification, a positive differential amplified signal and a negative differential amplified signal are obtained. The positive differential amplified signal is transmitted to the first input end of the signal output circuit 120, and the negative differential amplified signal is transmitted to the second input end of the signal output circuit 120.

[0030] In an embodiment of the present application, the second end of the first selector 113 is the input end of the control signal, and the first end of the first selector 113 is used to transmit the received control signal to the differential sub-circuit 111, adjust the signals of the positive output end and the negative output end of the differential sub-circuit 111, thereby adjusting the positive differential amplified signal and the negative differential amplified signal output by the amplifier circuit, and then selecting to transmit the data signal through the first output end or the second output end of the signal output circuit 120.

[0031] Specifically, the positive output end of the differential sub-circuit 111 includes the P+ end and the P- end, the negative output end of the differential sub-circuit 111 includes the N+ end and the N- end, the positive output end of the amplifier sub-circuit 112 is used to transmit the positive differential amplified signal P_Signal, and the negative output end of the amplifier sub-circuit 112 is used to transmit the negative differential amplified signal N_Signal.

[0032] Take the first output terminal transmitting a data signal as an example for explanation:

[0033] When the control signal received by the first selector 113 is a high-level signal, the current at the N+ terminal decreases, the current at the N- terminal increases, the level of the reference voltage PVB1 of the PMOS (P-type field effect) tube decreases, and P_Signal increases.

[0034] Take the second output terminal transmitting a data signal as an example to illustrate:

[0035] When the control signal received by the first selector 113 is a low-level signal, the current at the P+ terminal decreases, the current at the P- terminal decreases, the level of the reference voltage NVB1 of the NMOS (N-type field effect) tube increases, and N_Signal decreases.

[0036] In an embodiment of the present application, a differential sub-circuit 111, an amplifying sub-circuit 112, and a first selector 113 are provided in the differential amplifier circuit 110, and the first selector 113 is provided at the output end of the differential sub-circuit 111. A control signal is transmitted to the first selector 113. The positive differential signal and the negative differential amplified signal transmitted from the differential sub-circuit 111 to the amplifying sub-circuit 112 can be adjusted by the first selector 113, thereby adjusting the positive differential amplified signal and the negative differential amplified signal transmitted from the amplifying sub-circuit 112 to the signal output circuit 120, so as to select whether the signal output circuit transmits a data signal through the first output end or the second output end. The first selector 113 can contain the data signal in the display module, thereby further improving the EMI / EMS resistance of the display driver device 100.

[0037] In some embodiments of the present application, the signal output circuit 120 includes: a second selector 121, wherein the first input terminal of the second selector 121 is connected to the first output terminal of the differential amplifier circuit 110, wherein the first input terminal of the second selector 121 is used to receive a positive differential amplification signal, and the second input terminal of the second selector 121 is used to receive a control signal; a third selector 122, wherein the first input terminal of the third selector 122 is connected to the second output terminal of the differential amplifier circuit 110, wherein the first input terminal of the third selector 122 is used to receive a negative differential amplification signal, and the second input terminal of the third selector 122 is used to receive a control signal.

[0038] In the embodiment of the present application, the signal output circuit 120 includes a second selector 121 and a third selector 122. Each of the second selector 121 and the third selector 122 includes two input terminals. The first input terminal of the second selector 121 and the first input terminal of the third selector 122 are connected to the first output terminal and the second output terminal of the differential amplifier circuit 110, respectively. The positive differential amplified signal output by the first output terminal of the differential amplifier circuit 110 is transmitted to the second selector 121, and the negative differential amplified signal output by the second output terminal of the differential amplifier circuit 110 is transmitted to the third selector 122. The second input terminal of the second selector 121 and the second input terminal of the third selector 122 are both used to receive a control signal. This control signal is the same control signal as the control signal transmitted to the first selector 113. In response to the control signal, the second selector 121 and the third selector 122 can switch the signal output circuit 120 to transmit the data signal to the display module through the first output terminal or the second output terminal.

[0039] Exemplarily, the second selector 121 and the third selector 122 are analog selectors.

[0040] In an embodiment of the present application, a corresponding second selector 121 and a third selector 122 are set in the signal output circuit 120. The second selector 121 can receive a positive differential amplification signal from the differential amplifier circuit 110, and the third selector 122 can receive a negative differential amplification signal from the differential amplifier circuit 110, and transmit a control signal to the second selector 121 and the third selector 122, so that the second selector 121 and the third selector 122 can switch and control the signal output circuit 120 to transmit the data signal through the first output end or the second output end in response to the control signal.

[0041] In some embodiments of the present application, the signal output circuit 120 also includes: a first field-effect transistor PMOS1, the gate of the first field-effect transistor PMOS1 is connected to the first output end of the second selector 121, and the source of the first field-effect transistor PMOS1 is connected to the power supply V; a second field-effect transistor NMOS1, the gate of the second field-effect transistor NMOS1 is connected to the first output end of the third selector 122, the source of the second field-effect transistor NMOS1 is grounded, the drain of the second field-effect transistor NMOS1 is connected to the drain of the first field-effect transistor PMOS1, and the common end of the drain of the second field-effect transistor NMOS1 and the drain of the first field-effect transistor PMOS1 is the first output end.

[0042] In the embodiment of the present application, the first field-effect transistor PMOS1 is a PMOS (P-type field-effect transistor), and the second field-effect transistor NMOS1 is an NMOS (N-type field-effect transistor). The gate of the first field-effect transistor PMOS1 and the gate of the second field-effect transistor NMOS1 are connected to the second selector 121 and the third selector 122, respectively. The source of the first field-effect transistor PMOS1 is connected to the power supply V, the drain of the first field-effect transistor PMOS1 is connected to the drain of the second field-effect transistor NMOS1, the source of the second field-effect transistor NMOS1 is grounded, and the common terminal of the first field-effect transistor PMOS1 and the second field-effect transistor NMOS1 serves as the first output terminal of the signal output circuit 120.

[0043] Specifically, when the control signals received by the second selector 121 and the third selector 122 are high-level signals, the positive differential amplified signal received by the second selector 121 increases, and the negative differential amplified signal received by the third selector 122 decreases, and the signal output circuit 120 transmits the data signal through the first output end.

[0044] In the embodiment of the present application, by providing a first field effect transistor PMOS1 and a second field effect transistor NMOS1 in the signal output circuit 120, and using the common end of the first field effect transistor PMOS1 and the second field effect transistor NMOS1 as the first output end, the first output end can be used alone to output the corresponding data signal, thereby improving the stability of data signal transmission.

[0045] In some embodiments of the present application, the data signal includes a first data signal. When the first selector 113 receives the first control signal in the control signal, the drain of the second field effect transistor NMOS1 and the drain of the first field effect transistor PMOS1 output the first data signal.

[0046] In an embodiment of the present application, the data signal includes a first data signal transmitted to the display module through the first output end, and the control signal includes a first control signal. When the first selector 113 receives the first control signal, the common end of the drain of the second field effect transistor NMOS1 and the drain of the first field effect transistor PMOS1 outputs the first data signal.

[0047] Exemplarily, the first control signal is a high-level signal.

[0048] In an embodiment of the present application, the control signal includes a first control signal for triggering the output of a first data signal through the first output end of the signal output circuit 120. When the first selector 113 receives the first control signal, the second selector 121 and the third selector 122 synchronously receive the first control signal, and output the first data signal through the first output end in response to the first control signal, thereby further improving the stability of the data signal transmission to the display module.

[0049] In some embodiments of the present application, the signal output circuit 120 also includes: a third field-effect transistor PMOS2, the gate of the third field-effect transistor PMOS2 is connected to the second output end of the second selector 121, and the source of the third field-effect transistor PMOS2 is connected to the power supply V; a fourth field-effect transistor NMOS2, the gate of the fourth field-effect transistor NMOS2 is connected to the second output end of the third selector 122, the source of the fourth field-effect transistor NMOS2 is grounded, the drain of the fourth field-effect transistor NMOS2 is connected to the drain of the third field-effect transistor PMOS2, and the common end of the source of the fourth field-effect transistor NMOS2 and the drain of the third field-effect transistor PMOS2 is the second output end.

[0050] In the embodiment of the present application, the third field-effect transistor PMOS2 is a PMOS (P-type field-effect transistor), and the fourth field-effect transistor NMOS2 is an NMOS (N-type field-effect transistor). The gate of the third field-effect transistor PMOS2 and the gate of the fourth field-effect transistor NMOS2 are connected to the second selector 121 and the third selector 122, respectively. The source of the third field-effect transistor PMOS2 is connected to the power supply V, the drain of the third field-effect transistor PMOS2 is connected to the drain of the fourth field-effect transistor NMOS2, and the source of the fourth field-effect transistor NMOS2 is grounded. The common terminal of the third field-effect transistor PMOS2 and the fourth field-effect transistor NMOS2 serves as the second output terminal of the signal output circuit 120.

[0051] Specifically, when the control signals received by the second selector 121 and the third selector 122 are low-level signals, the positive differential amplified signal received by the second selector 121 decreases, and the negative differential amplified signal received by the third selector 122 increases, and the signal output circuit 120 transmits the data signal through the second output terminal.

[0052] In the embodiment of the present application, a third field effect transistor PMOS2 and a fourth field effect transistor NMOS2 are provided in the signal output circuit 120, and the common end of the third field effect transistor PMOS2 and the fourth field effect transistor NMOS2 is used as the second output end, so that the second output end can be used alone to output the corresponding data signal, thereby improving the stability of data signal transmission.

[0053] In some embodiments of the present application, the data signal includes a second data signal. When the first selector 113 receives the second control signal in the control signal, the drain of the fourth field effect transistor NMOS2 and the drain of the third field effect transistor PMOS2 are used to output the second data signal.

[0054] In an embodiment of the present application, the data signal includes a second data signal transmitted to the display module through the second output terminal, and the control signal includes a second control signal. When the first selector 113 receives the second control signal, the common terminal of the source of the third field effect transistor PMOS2 and the drain of the fourth field effect transistor NMOS2 outputs the second data signal.

[0055] Exemplarily, the second control signal is a low level signal.

[0056] In an embodiment of the present application, the control signal includes a second control signal for triggering the output of a second data signal through the second output end of the signal output circuit 120. When the first selector 113 receives the second control signal, the second selector 121 and the third selector 122 synchronously receive the second control signal, and output the second data signal through the second output end in response to the second control signal, thereby further improving the stability of the data signal transmission to the display module.

[0057] In some embodiments of the present application, the display driving device 100 further includes: a control circuit 130, wherein a first output end of the control circuit 130 is connected to an input end of the differential amplifier circuit 110, a second output end of the control circuit 130 is connected to the first selector 113, the first output end of the control circuit 130 is used to output a data signal, and the second output end of the control circuit 130 is used to output a control signal.

[0058] In the embodiment of the present application, the display driver device 100 further includes a control circuit 130. The control circuit 130 includes two output terminals, wherein a first output terminal and a second output terminal of the control circuit 130 are respectively used to output a data signal and a control signal. The first output terminal of the control circuit 130 is connected to the input terminal of the differential amplifier circuit 110, and the data signal from the first output terminal of the control circuit 130 is transmitted to the input terminal of the differential amplifier circuit 110. The second output terminal of the control circuit 130 is connected to the first selector 113, the second selector 121, and the third selector 122, and the second output terminal of the control circuit 130 transmits the control signal to the first selector 113, the second selector 121, and the third selector 122.

[0059] Figure 3 shows a signal timing diagram provided in some embodiments of the present application, such as Figure 3 As shown, the controller inside the display driving device 100 will generate a corresponding CTS signal (control signal) waveform within 1Htime, and the differential amplifier circuit 110 will switch the signal output circuit 120 between Output1 (first output end) and Ouput2 (second output end) according to the CTS signal. At the same time, Output1 and Output2 output a high level except when outputting valid data.

[0060] In some embodiments of the present application, the number of output terminals of the first selector 113 is N, and the number of signal output circuits 120 is M, where N and M are both positive integers, and M=2 N .

[0061] In the embodiment of the present application, the display driving device 100 may include N signal output circuits 120, each signal output circuit 120 corresponding to 2 N The output ends of the first selectors 113 are arranged in a plurality of first selectors 113 , that is, when the number of the first selectors 113 is N, the number of the signal output circuits 120 is 2 to the power of N.

[0062] Exemplarily, the number of the output terminal of the first selector 113 is one, and the number of the signal output circuits 120 is two.

[0063] Exemplarily, the number of output terminals of the first selector 113 is 2, and the number of signal output circuits 120 is 4.

[0064] Figure 4 FIG3 shows a third circuit diagram of a display driving device provided in some embodiments of the present application. Figure 4 As shown, the number of signal output terminals is N, namely Output1 to OutputN.

[0065] In some embodiments of the present application, an electronic device is provided. Figure 5 1 shows a circuit diagram of an electronic device provided in some embodiments of the present application, such as Figure 5 As shown, the electronic device 200 includes a display driver device 100 and a display module 210. The first pixel row 211 of the display module 210 is connected to the first output end of the signal output circuit 120 in the display driver device 100, and the second pixel row 212 of the display module 210 is connected to the second output end of the signal output circuit 120. The display driver device 100 is the display driver device 100 in any of the above embodiments, and thus has all the beneficial technical effects of the display driver device 100 in any of the above embodiments, which will not be further elaborated here.

[0066] Throughout this specification, reference to terms such as "one embodiment," "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples" means that the specific features, structures, materials, or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.

[0067] Although the embodiments of the present application have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions, and variations may be made to the embodiments without departing from the principles and intent of the present application, and that the scope of the present application is defined by the claims and their equivalents.

Claims

1. A display driving device, characterized in that: The display driving device is connected to the display module and is used to transmit a data signal to the display module. The display driving device includes: a differential amplifier circuit, wherein an input end of the differential amplifier circuit is used to receive a data signal, and the differential amplifier circuit includes a first selector, and the first selector is used to receive a control signal; a signal output circuit, wherein a first input terminal of the signal output circuit is connected to the first output terminal of the differential amplifier circuit, a second input terminal of the signal output circuit is connected to the second output terminal of the differential amplifier circuit, the first input terminal of the signal output circuit is used to receive a positive differential amplified signal, and the second input terminal of the signal output circuit is used to receive a negative differential amplified signal; The first selector outputs the data signal to the display module through the first output terminal or the second output terminal of the signal output circuit in response to the control signal.

2. The display driving device according to claim 1, wherein: The differential amplifier circuit comprises: a differential subcircuit, wherein an input end of the differential subcircuit is used to receive a data signal; a first selector, wherein a first end of the first selector is connected to the output end of the differential subcircuit, and a second end of the first selector receives the control signal; an amplifier sub-circuit, wherein the positive input terminal of the amplifier sub-circuit is connected to the positive output terminal of the differential sub-circuit, the negative input terminal of the amplifier sub-circuit is connected to the negative output terminal of the differential sub-circuit, the positive output terminal of the amplifier sub-circuit is the first output terminal of the differential amplifier circuit, and the negative output terminal of the amplifier sub-circuit is the second output terminal of the differential amplifier circuit.

3. The display driving device according to claim 1, wherein: The signal output circuit includes: a second selector, wherein a first input terminal of the second selector is connected to the first output terminal of the differential amplifier circuit, wherein the first input terminal of the second selector is used to receive the positive differential amplified signal, and the second input terminal of the second selector is used to receive the control signal; A third selector, wherein the first input end of the third selector is connected to the second output end of the differential amplifier circuit, wherein the first input end of the third selector is used to receive the negative differential amplification signal, and the second input end of the third selector is used to receive the control signal.

4. The display driving device according to claim 3, wherein: The signal output circuit further includes: a first field effect transistor, wherein a gate of the first field effect transistor is connected to the first output terminal of the second selector, and a source of the first field effect transistor is connected to a power supply; a second field effect transistor, wherein the gate of the second field effect transistor is connected to the first output end of the third selector, the source of the second field effect transistor is grounded, the drain of the second field effect transistor is connected to the drain of the first field effect transistor, and the common end of the drain of the second field effect transistor and the drain of the first field effect transistor is the first output end.

5. The display driving device according to claim 4, wherein: The data signal includes a first data signal. When the first selector receives the first control signal among the control signals, the drain of the second field effect transistor and the drain of the first field effect transistor output the first data signal.

6. The display driving device according to claim 3, wherein: The signal output circuit further includes: a third field effect transistor, wherein a gate of the third field effect transistor is connected to the second output terminal of the second selector, and a source of the third field effect transistor is connected to a power supply; a fourth field effect transistor, wherein the gate of the fourth field effect transistor is connected to the second output end of the third selector, the source of the fourth field effect transistor is grounded, the drain of the fourth field effect transistor is connected to the drain of the third field effect transistor, and the common end of the drain of the fourth field effect transistor and the drain of the third field effect transistor is the second output end.

7. The display driving device according to claim 6, wherein: The data signal includes a second data signal. When the first selector receives the second control signal in the control signal, the drain of the fourth field effect transistor and the drain of the third field effect transistor are used to output the second data signal.

8. The display driving device according to any one of claims 1 to 7, characterized in that: Also includes: A control circuit, wherein the first output end of the control circuit is connected to the input end of the differential amplifier circuit, the second output end of the control circuit is connected to the first selector, the first output end of the control circuit is used to output the data signal, and the second output end of the control circuit is used to output the control signal.

9. The display driving device according to any one of claims 1 to 7, characterized in that: The number of output terminals of the first selector is N, and the number of signal output circuits is M, where M=2 N .

10. An electronic device, characterized in that: include: The display driving device according to any one of claims 1 to 9; A display module, wherein a first pixel row of the display module is connected to a first output end of a signal output circuit in the display driving device, and a second pixel row of the display module is connected to a second output end of the signal output circuit.

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