Bilaterally cooled power module and electrical system

Abstract

The utility model relates to a double-side cooled power module and an electrical system. There is provided a double-side cooled power module including: a first multilayer substrate including a first insulating material layer, a first metal layer, and a second metal layer, the second metal layer including a plurality of first step structures having a first height; the second multi-layer substrate comprises a second insulating material layer, a third metal layer and a fourth metal layer, and the fourth metal layer comprises a plurality of second step structures with second heights; and one or more chips disposed between the first multilayer substrate and the second multilayer substrate and attached to the second metal layer and the fourth metal layer, in which each chip is attached and supported between and electrically connected to a respective first step structure and a respective second step structure.

Description

Technical Field

[0001] The present disclosure relates generally to the field of semiconductors, and more particularly to a double-sided cooled power module, a manufacturing method thereof, and an electrical system. Background Art

[0002] The traditional dual-side cooling (DSC) power module achieves dual-side cooling by placing the chip between two copper-clad ceramic substrates. In order to support the substrates on both sides and achieve electrical connection and other purposes, spacers and support pillars are required between the two substrates in addition to the chips. The spacer is usually set between the chip and the substrate on one side, and the support pillar is directly set between the two substrates. However, the presence of spacers and support pillars will bring many negative effects, such as increasing the area and thickness of the power module, resulting in poor heat dissipation effect of the chip, etc., thereby hindering the process of further miniaturization of the power module and further improving its performance.

[0003] Therefore, there is a need in the prior art for an improved double-sided cooling power module and a manufacturing method thereof. Summary of the Invention

[0004] One of the objects of the present disclosure is to provide an improved double-side cooled power module and a method for manufacturing the same, as well as an improved electrical system.

[0005] According to one aspect of the present disclosure, a double-sided cooled power module is provided, comprising: a first multi-layer substrate, comprising: a first insulating material layer, a first metal layer, on one surface of the first insulating material layer and attached to the first insulating material layer, and a second metal layer, on the other surface opposite to the first insulating material layer and attached to the first insulating material layer, the second metal layer comprising a plurality of first step structures having a first height; a second multi-layer substrate, comprising: a second insulating material layer, a third metal layer, on one surface of the second insulating material layer and attached to the second insulating material layer, and a fourth metal layer, on the other surface opposite to the second insulating material layer and attached to the second insulating material layer, the fourth metal layer comprising a plurality of second step structures having a second height; and one or more chips, arranged between the first multi-layer substrate and the second multi-layer substrate and attached to the second metal layer and the fourth metal layer, wherein each chip is attached and supported between and electrically connected to a corresponding first step structure and a corresponding second step structure.

[0006] According to one embodiment of the present disclosure, the first height and the second height are the same, and the second metal layer and the fourth metal layer are formed by the same half etching process step.

[0007] According to one embodiment of the present disclosure, the one or more chips include: a first chip, which is attached to the second metal layer with its front side and to the fourth metal layer with its back side; and a second chip, which is attached to the fourth metal layer with its front side and to the second metal layer with its back side.

[0008] According to one embodiment of the present disclosure, the one or more chips include a plurality of first chips and a plurality of second chips of the same number; the plurality of first chips are centrally symmetrically distributed in a plane parallel to the first multi-layer substrate and the second multi-layer substrate with respect to the center of the first multi-layer substrate or the second multi-layer substrate; and the plurality of second chips are centrally symmetrically distributed in a plane parallel to the first multi-layer substrate and the second multi-layer substrate with respect to the center of the first multi-layer substrate or the second multi-layer substrate.

[0009] According to one embodiment of the present disclosure, the double-sided cooled power module further includes: one or more leads from a lead frame; wherein the second metal layer further includes one or more third step structures having a first height and arranged on the periphery of the second metal layer, each third step structure being used to attach and support a corresponding lead; and / or wherein the fourth metal layer further includes one or more fourth step structures having a second height and arranged on the periphery of the fourth metal layer, each fourth step structure being used to attach and support a corresponding lead.

[0010] According to one embodiment of the present disclosure, the one or more leads include at least one of the following: a first lead, attached and supported between the corresponding third step structure and the corresponding fourth step structure; a second lead, attached and supported between the corresponding third step structure and the edge plane portion of the fourth metal layer; and a third lead, attached and supported between the edge plane portion of the second metal layer and the corresponding fourth step structure.

[0011] According to one embodiment of the present disclosure, at least one of the third stepped structure, the fourth stepped structure, the edge planar portion of the second metal layer, and the edge planar portion of the fourth metal layer has an island-shaped blind end structure.

[0012] According to one embodiment of the present disclosure, at least one of the first step structures attached to the chip is electrically connected to the corresponding third step structure through the planar portion of the second metal layer, thereby electrically connecting the chip to the corresponding lead; and / or at least one of the second step structures attached to the chip is electrically connected to the corresponding fourth step structure through the planar portion of the fourth metal layer, thereby electrically connecting the chip to the corresponding lead.

[0013] According to one embodiment of the present disclosure, the attachment includes using electrically conductive and thermally conductive materials to join together by sintering or welding; the one or more chips are power chips; the one or more chips are attached to the second metal layer and / or the fourth metal layer by a flip-chip process; the first insulating material layer is a first ceramic substrate; the first metal layer and the second metal layer are copper layers attached to the top surface and bottom surface of the first insulating material layer, respectively; the first metal layer and the second metal layer are attached to the first insulating material layer by sintering, brazing, soldering or curing; the second insulating material layer is a second ceramic substrate; the third metal layer and the fourth metal layer are copper layers attached to the top surface and bottom surface of the second insulating material layer, respectively; and / or the third metal layer and the fourth metal layer are attached to the second insulating material layer by sintering, brazing, soldering or curing.

[0014] According to another aspect of the present disclosure, an electrical system is provided, comprising the double-side cooled power module as described above.

[0015] According to another aspect of the present disclosure, a method for manufacturing a double-sided cooled power module is provided, comprising the following steps: providing a first multi-layer substrate, the first multi-layer substrate comprising: a first insulating material layer, a first metal layer on one surface of the first insulating material layer and attached to the first insulating material layer, and a second metal layer on another surface opposite to the first insulating material layer and attached to the first insulating material layer, the second metal layer comprising a plurality of first step structures having a first height; providing a second multi-layer substrate, the second multi-layer substrate comprising: a second insulating material layer, a third metal layer on one surface of the second insulating material layer and attached to the second insulating material layer, and a fourth metal layer , on the other surface opposite to the second insulating material layer and attached to the second insulating material layer, the fourth metal layer includes a plurality of second step structures having a second height; each of the one or more chips is respectively attached to the second metal layer of the first multilayer substrate and one of the fourth metal layers of the second multilayer substrate; and the first multilayer substrate is joined to the second multilayer substrate in such a manner that the second metal layer and the fourth metal layer face each other, so that each chip is arranged between the first multilayer substrate and the second multilayer substrate and is further attached to the other of the second metal layer and the fourth metal layer, wherein each chip is attached and supported between and electrically connected to the corresponding first step structure and the corresponding second step structure.

[0016] According to one embodiment of the present disclosure, the first height and the second height are the same, and the manufacturing method further includes the following steps: forming the second metal layer and the fourth metal layer through the same half etching process step to form the multiple first step structures and the multiple second step structures respectively.

[0017] According to one embodiment of the present disclosure, the one or more chips include: a first chip, which is attached to the second metal layer with its front side and to the fourth metal layer with its back side; and a second chip, which is attached to the fourth metal layer with its front side and to the second metal layer with its back side.

[0018] According to one embodiment of the present disclosure, the step of attaching each of one or more chips to one of the second metal layer of a first multi-layer substrate and the fourth metal layer of a second multi-layer substrate, respectively, includes: attaching the first chip with its front side to the second metal layer of the first multi-layer substrate, and attaching the second chip with its front side to the fourth metal layer of the second multi-layer substrate; and the step of joining the first multi-layer substrate with the second multi-layer substrate in such a manner that the second metal layer and the fourth metal layer face each other includes: joining the first multi-layer substrate with the first chip attached and the second multi-layer substrate with the second chip attached so that the second metal layer and the fourth metal layer face each other, so that the first chip is attached to the fourth metal layer of the second multi-layer substrate with its back side and the second chip is attached to the second metal layer of the first multi-layer substrate with its back side.

[0019] According to one embodiment of the present disclosure, the one or more chips include a plurality of first chips and a plurality of second chips of the same number; the plurality of first chips are centrally symmetrically distributed in a plane parallel to the first multi-layer substrate and the second multi-layer substrate with respect to the center of the first multi-layer substrate or the second multi-layer substrate; and the plurality of second chips are centrally symmetrically distributed in a plane parallel to the first multi-layer substrate and the second multi-layer substrate with respect to the center of the first multi-layer substrate or the second multi-layer substrate.

[0020] According to one embodiment of the present disclosure, the manufacturing method also includes the following steps: attaching one or more leads from the lead frame to the second metal layer and / or the fourth metal layer; wherein the second metal layer also includes one or more third step structures arranged on the periphery of the second metal layer and having a first height, each third step structure being used to attach and support the corresponding lead; and / or wherein the fourth metal layer also includes one or more fourth step structures arranged on the periphery of the fourth metal layer and having a second height, each fourth step structure being used to attach and support the corresponding lead.

[0021] According to one embodiment of the present disclosure, the multiple first step structures and the one or more third step structures are formed through the same half etching process steps; and / or the multiple second step structures and the one or more fourth step structures are formed through the same half etching process steps.

[0022] According to one embodiment of the present disclosure, the one or more leads include at least one of the following: a first lead, attached and supported between the corresponding third step structure and the corresponding fourth step structure; a second lead, attached and supported between the corresponding third step structure and the edge plane portion of the fourth metal layer; and a third lead, attached and supported between the edge plane portion of the second metal layer and the corresponding fourth step structure.

[0023] According to one embodiment of the present disclosure, at least one of the third stepped structure, the fourth stepped structure, the edge planar portion of the second metal layer, and the edge planar portion of the fourth metal layer has an island-shaped blind end structure.

[0024] According to one embodiment of the present disclosure, at least one of the first step structures attached to the chip is electrically connected to the corresponding third step structure through the planar portion of the second metal layer, thereby electrically connecting the chip to the corresponding lead; and / or at least one of the second step structures attached to the chip is electrically connected to the corresponding fourth step structure through the planar portion of the fourth metal layer, thereby electrically connecting the chip to the corresponding lead.

[0025] According to one embodiment of the present disclosure, the attachment includes using electrically conductive and thermally conductive materials to join together by sintering or welding; the one or more chips are power chips; the one or more chips are attached to the second metal layer and / or the fourth metal layer by a flip-chip process; the first insulating material layer is a first ceramic substrate; the first metal layer and the second metal layer are copper layers attached to the top surface and bottom surface of the first insulating material layer, respectively; the first metal layer and the second metal layer are attached to the first insulating material layer by sintering, brazing, soldering or curing; the second insulating material layer is a second ceramic substrate; the third metal layer and the fourth metal layer are copper layers attached to the top surface and bottom surface of the second insulating material layer, respectively; and / or the third metal layer and the fourth metal layer are attached to the second insulating material layer by sintering, brazing, soldering or curing.

[0026] Other features and advantages of the present disclosure will become more apparent from the following detailed description of exemplary embodiments of the present disclosure with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0028] The present disclosure can be more clearly understood from the following detailed description with reference to the accompanying drawings, in which:

[0029] Figure 1 Schematically shows a cross-sectional view of a conventional double-sided cooled power module 10;

[0030] Figure 2 Schematically shows a cross-sectional view of a double-side cooled power module according to an embodiment of the present disclosure;

[0031] Figure 3 Schematically shows a schematic diagram of chip distribution when a power module includes more chips according to an embodiment of the present disclosure;

[0032] Figure 4A and Figure 4B Schematically shows a cross-sectional view of a lead connection portion of a power module according to an embodiment of the present disclosure;

[0033] Figure 5 An exemplary flow chart showing a method for manufacturing a double-side cooled power module according to an embodiment of the present disclosure is shown;

[0034] Figure 6 Schematically shows the Figure 5 A cross-sectional view of a device corresponding to some steps of the method shown;

[0035] Figure 7A FIG. 4 shows a schematic three-dimensional model of a double-side cooled power module according to an embodiment of the present disclosure. Figure 7B Shown Figure 7A A top perspective view of some components in the power module. Figure 7C Shown Figure 7A A bottom perspective view of some components in a power module.

[0036] Note that in the embodiments described below, the same reference numerals are sometimes used in common across different drawings to denote the same parts or parts having the same functions, and their repeated descriptions are omitted. In some cases, similar reference numerals and letters are used to denote similar items, so once an item is defined in one drawing, it need not be further discussed in subsequent drawings.

[0037] For ease of understanding, the positions, sizes, and ranges of various structures shown in the drawings and the like may not represent actual positions, sizes, and ranges, etc. Therefore, the present disclosure is not limited to the positions, sizes, and ranges disclosed in the drawings and the like. DETAILED DESCRIPTION

[0038] Embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit the present disclosure, its application, or use. That is, the structures and methods herein are presented in an exemplary manner to illustrate different embodiments of the structures and methods of the present disclosure. However, those skilled in the art will understand that these are merely exemplary embodiments of the present disclosure that can be implemented, and are not exhaustive.

[0039] In all examples shown and discussed here, unless otherwise specifically stated, the relative arrangement, numerical expression and numerical value of the parts and steps set forth in these embodiments do not limit the scope of the present disclosure. In all examples shown and discussed here, any specific value should be interpreted as merely exemplary, rather than as restriction. Therefore, other examples of exemplary embodiments can have different values. In addition, the accompanying drawings need not be drawn to scale, and some features may be amplified to illustrate the details of specific components.

[0040] Technologies, methods and equipment known to ordinary technicians in the relevant art may not be discussed in detail, but where appropriate, such technologies, methods and equipment should be considered part of the authorization specification.

[0041] Figure 1 A cross-sectional view of a conventional double-sided cooled power module 10 is schematically shown.

[0042] like Figure 1 As shown in FIG, a conventional double-sided cooled power module 10 includes an upper substrate, a lower substrate, and a chip 17 disposed between the two substrates. The upper substrate includes a ceramic material layer 11 and metal layers 12 and 13 attached to both sides thereof, and the lower substrate includes a ceramic material layer 14 and metal layers 15 and 16 attached to both sides thereof. In order to electrically connect the chip 17 to the metal layer 13 and the supporting substrate, a spacer 18 is further provided between the chip 17 and the metal layer 13. Similarly, in order to electrically connect the metal layers 13 and 16 to the supporting substrate, a support column 19 is further provided between the metal layers 13 and 16 at the peripheral area of the power module. In addition, the chip 17 is also electrically connected to other electronic components (such as a gate resistor) 21 via a wire 20.

[0043] The conventional power module 10 has many problems. First, the spacer 18 and support column 19 are components independent of the metal layer and chip and require a certain area and thickness, which makes it difficult to reduce the area and thickness of the power module. Furthermore, the spacer 18 and support column 19 are insufficient to achieve all electrical connections between the chip 17 and / or the metal layers 13 and 16, resulting in the chip 17 also needing to use wires 20 to connect to other electronic components. The process step of forming the wires requires a certain distance between the upper substrate and the lower substrate to enable the corresponding tools to perform wire bonding operations, which further increases the thickness of the power module. Moreover, the wires 20 themselves are prone to defects or failures, resulting in a decrease in the overall performance of the power module. Furthermore, the presence of the spacer 18 causes the heat dissipation path between the chip 17 and the metal layer 13 to further increase and the heat dissipation path on both sides of the chip 17 to be unbalanced, which reduces the heat dissipation efficiency of the chip 17. In addition, the simultaneous provision of the spacer 18, support column 19 and wire 20 in the power module results in a complex manufacturing process for the power module and high costs.

[0044] In response to the above problems, the inventors of the present application have proposed a brand-new technical solution of a double-sided cooling power module and a manufacturing method thereof, so as to overcome some or all of the above-mentioned shortcomings of the traditional power module.

[0045] Figure 2 The cross-sectional view of the double-side cooled power module 100 according to the embodiment of the present disclosure is schematically shown. Figure 2 The power module 100 shown in FIG. 1 includes various components, but this is only for the purpose of showing the various components as comprehensively as possible in the same set of drawings and is not intended to constitute any limitation. The power module 100 according to the embodiment of the present disclosure may only include Figure 2 Some of the various components shown in . In addition, Figure 2 The number, distribution, shape and size of the various components shown in the figure are only used for illustration and are not intended to constitute any limitation. The power module 100 according to the embodiment of the present disclosure may include the above-mentioned components in any number, any distribution, any shape and any size.

[0046] like Figure 2As shown, a double-sided cooled power module 100 according to an embodiment of the present disclosure may include a first multi-layer substrate and a second multi-layer substrate. The first multi-layer substrate may include: a first insulating material layer 110; a first metal layer 120 disposed on one surface of the first insulating material layer 110 and attached thereto; and a second metal layer 130 disposed on the other opposite surface of the first insulating material layer 110 and attached thereto. The second metal layer 130 may include a plurality of first stepped structures 132 having the same first height. Similar to the first multi-layer substrate, the second multi-layer substrate may include: a second insulating material layer 140; a third metal layer 150 disposed on one surface of the second insulating material layer 140 and attached thereto; and a fourth metal layer 160 disposed on the other opposite surface of the second insulating material layer 140 and attached thereto. The fourth metal layer 160 may include a plurality of second stepped structures 162 having the same second height.

[0047] In some embodiments, the first insulating material layer 110 and the second insulating material layer 140 can be formed of a ceramic material or other suitable insulating material, and the first metal layer 120, the second metal layer 130, the third metal layer 150, and the fourth metal layer 160 can be formed of, for example, copper (Cu), aluminum (Al), or other suitable metal materials. In some embodiments, the first insulating material layer 110 can be a first ceramic substrate, and the first metal layer 120 and the second metal layer 130 can be copper layers attached to the top and bottom surfaces of the first insulating material layer 110, respectively, and can be attached to the first insulating material layer 110 by processes such as sintering, brazing, soldering, or curing. In some embodiments, the second insulating material layer 140 can be a second ceramic substrate, and the third metal layer 150 and the fourth metal layer 160 can be copper layers attached to the top and bottom surfaces of the second insulating material layer 140, respectively, and can be attached to the second insulating material layer by processes such as sintering, brazing, soldering, or curing. In some embodiments, the first multi-layer substrate and / or the second multi-layer substrate may be one of the following: a direct bond copper (DBC) substrate, an active metal braze (AMB) substrate, and an insulated metal substrate.

[0048] Continue to refer Figure 2 The power module 100 further includes chips 170A and 170B. These chips are disposed between the first multi-layer substrate and the second multi-layer substrate and attached to the second metal layer 130 having the first stepped structure 132 and the fourth metal layer 160 having the second stepped structure 162. Figure 2As shown in , each chip 170A, 170B may be attached and supported between the corresponding first stepped structure 132 and the corresponding second stepped structure 162 , and electrically connected to the corresponding first stepped structure 132 and the corresponding second stepped structure 162 .

[0049] In some embodiments, chips 170A and 170B may be attached to second metal layer 130 and fourth metal layer 160 by a flip-chip process. In some embodiments, chips 170A and 170B may be power chips.

[0050] Those skilled in the art will understand that although Figure 2 Two chips 170A and 170B and their relative positions are shown in FIG, but this is not intended to constitute any limitation. The power module 100 according to the embodiment of the present disclosure may also include only one chip or more chips, and the relative position relationship of each chip can be arbitrarily set as needed.

[0051] In the embodiments of the present disclosure, "attachment" refers to, for example, bonding together by electrically and thermally conductive materials, and can be performed by processes such as sintering or welding. Figure 2 As shown in FIG, the chips 170A and 170B can be attached to the corresponding first step structure 132 and second step structure 162 by an electrically and thermally conductive attachment material layer 180. Note that Figure 2 The plurality of attachment material layers 180 in the figure are intended to illustrate the connection relationship between the components attached to each other, and do not mean that the attachment material layers 180 all contain the same material. In other words, the attachment material layers 180 may contain the same or different attachment materials, and the attachment material may be any material known in the art for attachment.

[0052] In the power module according to the embodiment of the present disclosure, the chip is attached and supported between the first multi-layer substrate and the second multi-layer substrate by using the stepped structure (e.g., the first stepped structure 132 and the second stepped structure 162) of the upper and lower metal layers (e.g., the second metal layer 130 and the fourth metal layer 160), so that the electrical connection of the chip is achieved without using spacers, and the heat generated by the chip can be evenly dissipated from both sides. In the packaged power module 100, as shown in FIG. Figure 2 As shown in the figure, the first metal layer 120 of the first multi-layer substrate and the third metal layer 150 of the second multi-layer substrate are at least partially exposed from the top surface and the bottom surface of the molded housing 102 of the power module to dissipate the heat generated by the entire power module (especially the chips therein) during operation, thereby achieving a double-sided cooling effect.

[0053] In some embodiments, the second metal layer 130 (particularly the first stepped structure 132) can be formed by a half-etching process, and the fourth metal layer 160 (particularly the second stepped structure 162) can also be formed by a half-etching process. Preferably, the first height of the first stepped structure 132 and the second height of the second stepped structure 162 can be the same. On the one hand, the same step height allows the chips 170A and 170B to be located in the thickness direction of the power module ( Figure 2 The step heights are approximately in the middle of the chip (in the Z direction shown in FIG), thereby allowing heat to be dissipated more evenly from the upper and lower sides of the chip. Furthermore, the same step height allows the second metal layer 130 (particularly its first step structure 132) and the fourth metal layer 160 (particularly its second step structure 162) to be formed using the same half-etching process, thereby simplifying the manufacturing process and reducing manufacturing costs.

[0054] In some embodiments, the chips disposed between the first multi-layer substrate and the second multi-layer substrate may be disposed in opposite directions, i.e., a portion of the chips may face the first multi-layer substrate with its front side facing the first multi-layer substrate, while another portion of the chips may face the first multi-layer substrate with its back side facing the first multi-layer substrate. It should be noted that the front side and back side of the chips are relative and interchangeable. For example, in the case where the chip is a power chip, the front side of the chip may refer to the side on which the gate contact and the source contact are disposed, and the back side of the chip may refer to the side on which the drain contact is disposed, or vice versa, i.e., the front side of the chip may refer to the side on which the drain contact is disposed, and the back side of the chip may refer to the side on which the gate contact and the source contact are disposed.

[0055] by Figure 2 For example, the chips in the power module 100 include: a first chip 170A, the front side of the first chip 170A being attached to the second metal layer 130 and the back side of the first chip 170B being attached to the fourth metal layer 160 and the back side of the second chip 170B. In more detail, the front side of the first chip 170A is arranged toward the first multi-layer substrate, such that the gate contact 172 and the source contact 176 on the front side of the first chip 170A are attached to the first stepped structure 132 of the second metal layer 130, and the drain contact 174 on the back side of the second chip 170B is attached to the second stepped structure 162 of the fourth metal layer 160; and the back side of the second chip 170B is arranged toward the first multi-layer substrate, such that the gate contact 172 and the source contact 176 on the front side of the second chip 170B are attached to the second stepped structure 162 of the fourth metal layer 160, and the drain contact 174 on the back side of the second chip 170B is attached to the first stepped structure 132 of the second metal layer 130. Of course, since the front and back sides of the chip are relative and interchangeable, it can also be considered that the first chip 170A is arranged with its back side facing the first multi-layer substrate, while the second chip 170B is arranged with its front side facing the first multi-layer substrate.

[0056] Those skilled in the art will understand that although Figure 2 The relative arrangement of the gate contacts, source contacts, and drain contacts of chips 170A and 170B is schematically shown in FIG, but this is not intended to constitute any limitation. The chips in the power module according to the embodiments of the present disclosure may include any number, distribution, shape, and size of contacts. In addition, although Figure 2 The source contact and the gate contact are shown in the same cross-sectional view, but in some embodiments, the source contact and the gate contact do not appear in the same cross-sectional view.

[0057] In some embodiments, the power module 100 may include a plurality of first chips 170A and a plurality of second chips 170B of the same number. The plurality of first chips 170A may be centrally symmetrically distributed about the center of the first multi-layer substrate or the second multi-layer substrate in a plane parallel to the first multi-layer substrate and the second multi-layer substrate, and the same is true for the plurality of second chips 170B. To illustrate this more clearly, Figure 3 The figure schematically shows a distribution diagram of chips when the power module includes more chips according to an embodiment of the present disclosure.

[0058] Compared to Figure 2 The distribution of the two chips shown in Figure 3 The figure schematically shows how these chips may be distributed when more chips are arranged in the power module. Figure 3 As shown in , the power module may include a plurality of first chips 170A arranged with their front faces facing a first multi-layer substrate, and a plurality of second chips 170B arranged with their back faces facing the first multi-layer substrate. The plurality of first chips 170A may be centrally symmetrically distributed about the center of the first multi-layer substrate or the second multi-layer substrate in a plane parallel to the first multi-layer substrate and the second multi-layer substrate, and the plurality of second chips 170B may also be centrally symmetrically distributed about the center of the first multi-layer substrate or the second multi-layer substrate in a plane parallel to the first multi-layer substrate and the second multi-layer substrate. Figure 2 The center C of the second multi-layer substrate is schematically shown in FIG.

[0059] By arranging the multiple chips in opposite directions, the performance of the power module according to the embodiment of the present disclosure is significantly improved.

[0060] On the one hand, the gate line is usually thinner than the source line and the drain line and needs to be isolated from the source line. Therefore, in a single metal layer of a multi-layer substrate, the greater the distribution density of the gate line, the greater the etching difficulty. If all the chips in the power module are arranged in the same direction, all the gate lines will be concentrated in a single metal layer of a single multi-layer substrate (for example, one of the second metal layer 130 and the fourth metal layer 160), which will cause the etching process for forming the corresponding metal layer to be extremely difficult. In an embodiment according to the present disclosure, by arranging the multiple chips of the power module in opposite directions, the gate lines can be distributed on the two metal layers of the upper and lower multi-layer substrates (for example, both the second metal layer 130 and the fourth metal layer 160), thereby halving the distribution density of the gate lines on the single metal layer. This can significantly reduce the etching difficulty of the metal layer of the multi-layer substrate and maximize the utilization of the metal layer, thereby improving the integration of the power module, simplifying its manufacturing process and reducing its manufacturing cost.

[0061] On the other hand, in a preferred embodiment, the power module includes an equal number of first chips with their front faces facing the first multi-layer substrate and second chips with their back faces facing the first multi-layer substrate. These chips are symmetrically distributed about the center of the first or second multi-layer substrate in a plane parallel to the first and second multi-layer substrates. This results in the corresponding metal layers (e.g., the second metal layer 130 and the fourth metal layer 160) above and below the chips also exhibiting a roughly symmetrical pattern distribution. This symmetrical pattern distribution ensures that the corresponding metal layers (e.g., the second metal layer 130 and the fourth metal layer 160) have roughly the same warpage after manufacturing, thereby avoiding malfunctions or performance degradation caused by different warpages of the corresponding metal layers.

[0062] Continue to refer Figure 2 The power module 100 according to an embodiment of the present disclosure may further include one or more leads (also referred to as pins) 190 from a lead frame, and at least one of the second metal layer 130 and the fourth metal layer 160 may further include a step structure for attaching and supporting the leads 190. Specifically, the second metal layer 130 may include one or more third step structures 134 disposed at a periphery of the second metal layer and having a first height, each third step structure 134 being used to attach and support a corresponding lead 190; and / or the fourth metal layer 160 may further include one or more fourth step structures 164 disposed at a periphery of the fourth metal layer and having a second height, each fourth step structure 164 being used to attach and support a corresponding lead 190.

[0063] For example, in some embodiments, the second metal layer 130 includes the third step structure 134, while the fourth metal layer 160 does not include the fourth step structure 164; in other embodiments, the fourth metal layer 160 includes the fourth step structure 164, while the second metal layer 130 does not include the third step structure 134; in still other embodiments, the second metal layer 130 includes the third step structure 134, and the fourth metal layer 160 includes the fourth step structure 164, as shown in FIG. Figure 2 As shown in .

[0064] In some embodiments, at least one of the first step structures 132 attached to the chip is electrically connected to the corresponding third step structure 134 through the planar portion 136 of the second metal layer, thereby electrically connecting the chip to the corresponding lead 190; and / or, at least one of the second step structures 162 attached to the chip is electrically connected to the corresponding fourth step structure 164 through the planar portion 166 of the fourth metal layer, thereby electrically connecting the chip to the corresponding lead 190.

[0065] In some embodiments, the lead 190 may include at least one of the following: a first lead attached and supported between the corresponding third step structure and the corresponding fourth step structure; a second lead attached and supported between the corresponding third step structure and the edge plane portion of the fourth metal layer; and a third lead attached and supported between the edge plane portion of the second metal layer and the corresponding fourth step structure. In detail, Figure 2 The lead 190 shown in FIG. 1 is a first lead attached and supported between the corresponding third step structure 134 and the corresponding fourth step structure 164 . Figure 4A and Figure 4B A cross-sectional view schematically illustrates a lead connection portion of a power module according to an embodiment of the present disclosure. Figure 4A The lead 190 shown in FIG is a second lead attached and supported between the corresponding third step structure 134 and the edge plane portion 168 of the fourth metal layer, and Figure 4B The lead 190 shown in FIG. 1 is a third lead attached and supported between the edge plane portion 138 of the second metal layer and the corresponding fourth step structure 164 .

[0066] In some embodiments, at least one of the third step structure 134, the fourth step structure 164, the edge plane portion 138 of the second metal layer, and the edge plane portion 168 of the fourth metal layer has an island-shaped blind-end structure. In the embodiments of the present disclosure, a blind-end structure refers to an island-shaped end portion of a metal layer located at the edge of the metal layer and isolated from other structures of the metal layer. Due to the isolation from other structures of the metal layer, the blind-end portion is only electrically connected to the lead attached to it. For example, Figure 2As shown in FIG, the fourth step structure 164 on the far left has an island-shaped blind end structure, which is only electrically connected to the corresponding lead 190 and isolated from the rest of the fourth metal layer. The blind end structure is used to support the lead 190 so that it is more closely connected to the metal layer on the other side.

[0067] In some embodiments, the lead 190 is used not only to realize the electrical connection extending to the outside of the housing 102 of the power module, but also to realize the electrical connection only inside the power module without leading out. Figure 2 As shown, the lead 190 on the left is attached between the corresponding third step structure 134 and the fourth step structure 164 to electrically connect the two, but does not extend the electrical connection to the outside of the power module. To this end, during the manufacturing process of the power module, the corresponding lead 190 can be shortened so that it is not exposed outside the power module housing 102.

[0068] In an embodiment of the present disclosure, by adopting a third step structure and / or a fourth step structure to support and attach the lead 190, the lead 190 can be stably electrically connected to the second metal layer 130 and the fourth metal layer 160 without using other wires, thereby achieving electrical connection with the chip. Furthermore, the combination of the lead 190 and the corresponding third and fourth step structures also forms a robust mechanical support between the first and second multi-layer substrates, thereby replacing the support pillars in the traditional power module. In addition, by using the third step structure and / or the fourth step structure to support and attach the lead 190, it is also possible to reduce the space required for attaching the lead 190 and simplify the process flow for attaching the lead 190, thereby further reducing the thickness and manufacturing cost of the power module.

[0069] Compared with the traditional power module, the power module 100 according to the embodiment of the present disclosure has achieved many improvements. First, the present application forms a step structure in the corresponding metal layer of the multi-layer substrate, and attaches the chip and the lead between the corresponding step structures. These step structures can provide both mechanical support and electrical connection, thereby replacing the spacers and support columns in the traditional power module, so that the area and thickness of the power module are greatly reduced. Furthermore, the step structure sets the chip in the middle position between the upper and lower substrates, so that the heat dissipation path lengths on both sides of the chip are similar, which can achieve better heat dissipation effect. In addition, by arranging the chips in the power module in different directions and symmetrical arrangements, it is possible to make more full use of the corresponding metal layers of the upper and lower multi-layer substrates to achieve electrical connection and avoid the use of wire connection in the packaging module, which further reduces the area and thickness of the power module. Moreover, the step structure and the metal layer in which it is located are integrated through a half-etching process, which simplifies the process steps of attaching the various components, thereby simplifying the manufacturing process of the power module and reducing manufacturing costs.

[0070] The following combination Figure 5 as well as Figure 6 A method for manufacturing a double-sided cooled power module according to an embodiment of the present disclosure is described. Figure 5 An exemplary flow chart showing a method for manufacturing a double-sided cooled power module according to an embodiment of the present disclosure is shown. Figure 6 Schematically shows the Figure 5 The cross-sectional view of the device corresponding to some steps of the method shown. Figure 5 as well as Figure 6 The described method 200 for manufacturing a double-side-cooled power module can be used to manufacture the power module 100 described in the aforementioned embodiment of the present disclosure, and therefore the aforementioned corresponding description of the power module 100 is also applicable here.

[0071] like Figure 5 As shown, the method 200 for manufacturing a double-side cooled power module according to an embodiment of the present disclosure may include step S210 , step S220 , step S230 and step S240 .

[0072] At step S210, see Figure 6 A first multi-layer substrate is provided. The first multi-layer substrate includes: a first insulating material layer 110; a first metal layer 120 on one surface of the first insulating material layer and attached to the first insulating material layer; and a second metal layer 130 on the other surface opposite to the first insulating material layer and attached to the first insulating material layer, wherein the second metal layer 130 includes a plurality of first stepped structures 132 having a first height.

[0073] At step S220, see Figure 6 A second multi-layer substrate is provided. The second multi-layer substrate includes: a second insulating material layer 140; a third metal layer 150 on one surface of the second insulating material layer and attached to the second insulating material layer; and a fourth metal layer 160 on the other surface opposite to the second insulating material layer and attached to the second insulating material layer, wherein the fourth metal layer 160 includes a plurality of second stepped structures 162 having a second height.

[0074] At step S230, see Figure 6 Each of the chips 170A and 170B is attached to one of the second metal layer 130 of the first multi-layer substrate and the fourth metal layer 160 of the second multi-layer substrate, respectively.

[0075] In some embodiments, all chips may be attached to the second metal layer 130 , or all chips may be attached to the fourth metal layer 160 , or some chips may be attached to the second metal layer 130 and other chips may be attached to the fourth metal layer 160 .

[0076] At step S240, see Figure 6 The first multi-layer substrate is bonded to the second multi-layer substrate in such a manner that the second metal layer 130 and the fourth metal layer 160 face each other, so that each chip is disposed between the first multi-layer substrate and the second multi-layer substrate and further attached to the other of the second metal layer 130 and the fourth metal layer 160. Each chip is attached and supported between and electrically connected to a corresponding first stepped structure 132 and a corresponding second stepped structure 162.

[0077] In some embodiments, the first height of the first stepped structure 132 is the same as the height of the second stepped structure 162. In this case, the manufacturing method 200 may further include the following step: forming the second metal layer 130 and the fourth metal layer 160 by the same half etching process step to form a plurality of first stepped structures 132 and a plurality of second stepped structures 162, respectively.

[0078] In some embodiments, the chip includes: a first chip 170A, attached to the second metal layer 130 with its front side and to the fourth metal layer 160 with its back side; and a second chip 170B, attached to the fourth metal layer 160 with its front side and to the second metal layer 130 with its back side. In this case, Figure 6 As shown in , step S230 of manufacturing method 200 may include attaching first chip 170A with its front side to second metal layer 130 of the first multi-layer substrate, and attaching second chip 170B with its front side to fourth metal layer 160 of the second multi-layer substrate. Step S240 of manufacturing method 200 may include bonding the first multi-layer substrate to which first chip 170A is attached and the second multi-layer substrate to which second chip 170B is attached, facing each other, in a manner such that second metal layer 130 and fourth metal layer 160 face each other, so that first chip 170A is attached with its back side to fourth metal layer 160 of the second multi-layer substrate and second chip 170B is attached with its back side to second metal layer 130 of the first multi-layer substrate.

[0079] In some embodiments, the power module includes a plurality of first chips 170A and a plurality of second chips 170B of the same number, the plurality of first chips 170A are centrally symmetrically distributed about the center of the first multi-layer substrate or the second multi-layer substrate in a plane parallel to the first multi-layer substrate and the second multi-layer substrate, and the plurality of second chips 170B are also centrally symmetrically distributed about the center of the first multi-layer substrate or the second multi-layer substrate in a plane parallel to the first multi-layer substrate and the second multi-layer substrate.

[0080] In some embodiments, the manufacturing method 200 may further include the following steps: attaching one or more leads 190 from the lead frame to the second metal layer 130 and / or the fourth metal layer 160. The second metal layer 130 may further include one or more third step structures 134 disposed on the periphery of the second metal layer and having a first height, each third step structure being used to attach and support a corresponding lead 190; and / or the fourth metal layer 160 may further include one or more fourth step structures 164 disposed on the periphery of the fourth metal layer and having a second height, each fourth step structure being used to attach and support a corresponding lead 190. Figure 6 Schematically illustrates the locations of wires 190 before attaching them to the metal layers. In some embodiments, wires 190 are first attached to one of second metal layer 130 and fourth metal layer 160, and then attached to the other of second metal layer 130 and fourth metal layer 160 in step 240. In other embodiments, wires 190 are simultaneously attached to both second metal layer 130 and fourth metal layer 160 in step 240.

[0081] In some embodiments, the first stepped structure 132 and the third stepped structure 134 are formed by the same half of the etching process; and / or the second stepped structure 162 and the fourth stepped structure 164 are formed by the same half of the etching process.

[0082] In some embodiments, the lead 190 may include at least one of: a first lead attached and supported between the corresponding third step structure and the corresponding fourth step structure; a second lead attached and supported between the corresponding third step structure and the edge plane portion of the fourth metal layer; and a third lead attached and supported between the edge plane portion of the second metal layer and the corresponding fourth step structure.

[0083] In some embodiments, at least one of the third stepped structure, the fourth stepped structure, the edge planar portion of the second metal layer, and the edge planar portion of the fourth metal layer has an island-shaped blind-end structure.

[0084] In some embodiments, at least one of the first step structures 132 attached to the chip is electrically connected to the corresponding third step structure 134 through the planar portion 136 of the second metal layer, thereby electrically connecting the chip to the corresponding lead; and / or at least one of the second step structures 162 attached to the chip is electrically connected to the corresponding fourth step structure 164 through the planar portion 166 of the fourth metal layer, thereby electrically connecting the chip to the corresponding lead.

[0085] In some embodiments, the attachment includes joining together using electrically conductive and thermally conductive materials by sintering or welding; one or more chips are power chips; one or more chips are attached to the second metal layer and / or the fourth metal layer by a flip-chip process; the first insulating material layer is a first ceramic substrate; the first metal layer and the second metal layer are copper layers attached to the top and bottom surfaces of the first insulating material layer, respectively; the first metal layer and the second metal layer are attached to the first insulating material layer by sintering, brazing, soldering or curing; the second insulating material layer is a second ceramic substrate; the third metal layer and the fourth metal layer are copper layers attached to the top and bottom surfaces of the second insulating material layer, respectively; and / or the third metal layer and the fourth metal layer are attached to the second insulating material layer by sintering, brazing, soldering or curing.

[0086] Figure 7A FIG2 shows a schematic three-dimensional model of a double-side cooled power module according to an embodiment of the present disclosure. Figure 7A , shows the distribution of pins 190 ′ of a double-sided cooled power module. Figure 7B Shown Figure 7A A top perspective view of some components in the power module (viewed from the first multi-layer substrate toward the second multi-layer substrate). Figure 7B , showing the distribution of the first chip 170A' and the fourth metal layer 160'. Figure 7C Shown Figure 7A A bottom perspective view of some components in the power module (viewed from the second multi-layer substrate toward the first multi-layer substrate). Figure 7C , showing the distribution of the second chip 170B' and the second metal layer 130'.

[0087] Those skilled in the art will understand that the above 7A to 7C The modeling model shown is only for facilitating those skilled in the art to better understand the technical concept of the present invention and is not intended to constitute any limitation.

[0088] This application also contemplates an electrical system that may include a double-sided cooled power module according to any embodiment of the present disclosure. For example, the electrical system may include, for example, an inverter, a new energy vehicle, a wind power system, a solar power generation system, an energy storage system, or any other device or system requiring the power module of the present disclosure.

[0089] As used herein, the word "chip" includes, but is not limited to, a die or a bare die.

[0090] The terms "front," "back," "top," "bottom," "above," "below," and the like, if any, in the specification and claims, are used for descriptive purposes and are not necessarily intended to describe invariant relative positions. It is understood that the terms so used are interchangeable under appropriate circumstances such that the embodiments of the disclosure described herein, for example, are capable of operation in other orientations than those illustrated or otherwise described herein.

[0091] As used herein, the word "exemplary" means "serving as an example, instance, or illustration," rather than as a "model" to be precisely copied. Any implementation described as exemplary is not necessarily to be construed as preferred or advantageous over other implementations. Furthermore, the present disclosure is not to be bound by any expressed or implied theory presented in the preceding technical field, background, summary, or detailed description.

[0092] As used herein, the term "substantially" is intended to encompass any minor variations due to design or manufacturing imperfections, device or component tolerances, environmental influences, and / or other factors. The term "substantially" also allows for deviations from a perfect or ideal condition due to parasitic effects, noise, and other practical considerations that may be present in actual implementations.

[0093] In addition, the foregoing description may have referred to elements or nodes or features being "connected" or "coupled" together. As used herein, unless expressly stated otherwise, "connected" means that one element / node / feature is directly connected (or directly communicates) with another element / node / feature, electrically, mechanically, logically, or otherwise. Similarly, unless expressly stated otherwise, "coupled" means that one element / node / feature can be mechanically, electrically, logically, or otherwise connected to another element / node / feature, directly or indirectly, to allow interaction, even if the two features may not be directly connected. In other words, "coupled" is intended to encompass both direct and indirect connections of elements or other features, including connections utilizing one or more intermediate elements.

[0094] Additionally, terms such as "first," "second," and the like may also be used herein for reference purposes only and are not intended to be limiting. For example, the terms "first," "second," and other numerical terms referring to structures or elements do not imply a sequence or order unless the context clearly indicates otherwise.

[0095] It should also be understood that when the term “include / comprises” is used in this document, it indicates the presence of the specified features, integers, steps, operations, units and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, units and / or components and / or their combinations.

[0096] In this disclosure, the term "provide" is used in a broad sense to cover all ways of obtaining an object, and thus "providing an object" includes but is not limited to "purchasing", "preparing / manufacturing", "arranging / setting up", "installing / assembling", and / or "ordering" an object, etc.

[0097] Those skilled in the art will appreciate that the boundaries between the above-mentioned operations are merely illustrative. Multiple operations can be combined into a single operation, a single operation can be distributed among additional operations, and operations can be performed at least partially overlapping in time. Moreover, alternative embodiments can include multiple instances of specific operations, and the order of operations can be changed in various other embodiments. However, other modifications, variations, and replacements are also possible. Therefore, this specification and the accompanying drawings should be considered illustrative, not restrictive.

[0098] Although some specific embodiments of the present disclosure have been described in detail by way of examples, it should be understood by those skilled in the art that the above examples are for illustration only and are not intended to limit the scope of the present disclosure. The various embodiments disclosed herein may be combined in any manner without departing from the spirit and scope of the present disclosure. It should also be understood by those skilled in the art that various modifications may be made to the embodiments without departing from the scope and spirit of the present disclosure. The scope of the present disclosure is defined by the appended claims.

Claims

1. A double-sided cooling power module, characterized in that: include: A first multi-layer substrate comprising: a first insulating material layer, a first metal layer on one surface of the first insulating material layer and attached to the first insulating material layer, and a second metal layer on the other surface opposite to the first insulating material layer and attached to the first insulating material layer, the second metal layer including a plurality of first step structures having a first height; A second multi-layer substrate comprising: a second insulating material layer, a third metal layer on one surface of the second insulating material layer and attached to the second insulating material layer, and a fourth metal layer on the other surface opposite to the second insulating material layer and attached to the second insulating material layer, the fourth metal layer including a plurality of second stepped structures having a second height; and one or more chips disposed between the first multi-layer substrate and the second multi-layer substrate and attached to the second metal layer and the fourth metal layer, Each chip is attached and supported between a corresponding first step structure and a corresponding second step structure and is electrically connected thereto.

2. The double-side cooled power module according to claim 1, characterized in that: in: The first height and the second height are the same, and The second metal layer and the fourth metal layer are formed by the same half etching process step.

3. The double-side cooled power module according to claim 1, characterized in that: in, The one or more chips include: a first chip attached with its front side to the second metal layer and with its back side to the fourth metal layer; and A second chip is attached with its front side to the fourth metal layer and with its back side to the second metal layer.

4. The double-side cooled power module according to claim 3, characterized in that: in: The one or more chips include a plurality of first chips and a plurality of second chips of the same number as each other; The plurality of first chips are centrally symmetrically distributed about the center of the first multi-layer substrate or the second multi-layer substrate in a plane parallel to the first multi-layer substrate and the second multi-layer substrate; and The plurality of second chips are distributed in a center-symmetrical manner about the center of the first multi-layer substrate or the second multi-layer substrate in a plane parallel to the first multi-layer substrate and the second multi-layer substrate.

5. The double-side cooled power module according to claim 1, characterized in that: Also includes: one or more leads from a lead frame; Wherein, the second metal layer further includes one or more third step structures arranged at the periphery of the second metal layer and having a first height, each third step structure being used for attaching and supporting a corresponding lead; and / or The fourth metal layer further includes one or more fourth step structures arranged at the periphery of the fourth metal layer and having a second height, and each fourth step structure is used to attach and support a corresponding lead.

6. The double-side cooled power module according to claim 5, characterized in that: in, The one or more leads include at least one of: a first lead attached and supported between the corresponding third step structure and the corresponding fourth step structure; a second lead attached to and supported between a corresponding third step structure and an edge planar portion of the fourth metal layer; as well as The third lead is attached to and supported between the edge plane portion of the second metal layer and the corresponding fourth step structure.

7. The double-side cooled power module according to claim 6, characterized in that: in, At least one of the third stepped structure, the fourth stepped structure, the edge planar portion of the second metal layer, and the edge planar portion of the fourth metal layer has an island-shaped blind end structure.

8. The double-side cooled power module according to claim 5, characterized in that: in: at least one of the first stepped structures to which the chip is attached is electrically connected to a corresponding third stepped structure through a planar portion of the second metal layer, thereby electrically connecting the chip to a corresponding lead; and / or At least one of the second stepped structures to which the chip is attached is electrically connected to a corresponding fourth stepped structure through a planar portion of the fourth metal layer, thereby electrically connecting the chip to a corresponding lead.

9. The double-side cooled power module according to any one of claims 1 to 8, characterized in that: in: The attachment includes joining together by sintering or welding using electrically and thermally conductive materials; The one or more chips are power chips; The one or more chips are attached to the second metal layer and / or the fourth metal layer by a flip chip process; The first insulating material layer is a first ceramic substrate; The first metal layer and the second metal layer are copper layers attached to the top surface and the bottom surface of the first insulating material layer, respectively; The first and second metal layers are attached to the first insulating material layer by sintering, brazing, soldering, or curing; The second insulating material layer is a second ceramic substrate; The third metal layer and the fourth metal layer are copper layers attached to the top surface and the bottom surface of the second insulating material layer, respectively; and / or The third and fourth metal layers are attached to the second insulating material layer by sintering, brazing, soldering or curing.

10. An electrical system, characterized in that: A double-side cooled power module comprising the double-side cooled power module according to any one of claims 1 to 9.

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