Substrate and lamp panel

Abstract

The utility model provides a substrate and a lamp panel, the substrate comprises a base material, a circuit layer and an assembly welding layer, the circuit layer covers the base material, a solder mask layer covers the outer surfaces of the base material and the circuit layer, at least one window is arranged on the solder mask layer to expose a part of the circuit layer to form a bonding pad, at least one pair of symmetrically arranged bonding pads is arranged in the window to fix a wafer, and the welding pad is arranged on the circuit layer. Wherein the connecting line direction of one pair of bonding pads is the length direction, the direction perpendicular to the length direction is the width direction, each bonding pad comprises a first area and a second area which are connected with each other, the width of the second area is smaller than that of the first area, and the second areas of the bonding pads are oppositely arranged at a certain interval; the width of each second area is greater than or equal to that of an electrode of the wafer, and when the bonding pad is welded with the wafer, the electrode of the wafer at least covers between the first area and the second area. According to the invention, the deviation angle of the wafer can be prevented from being too large, so that the optical quality of the backlight module is prevented from being influenced by the too large deviation of the wafer on the basis of ensuring the die bonding yield.

Description

Technical Field

[0001] The present invention relates to the field of LED display, and in particular to a substrate and a lamp board mainly used for LEDs. Background Art

[0002] Mini LED backlight panels can achieve local dimming, significantly improving the image quality of displays using them, making them popular in the market. Mini backlights are available in two solutions: POB (Package on Board) and COB (Chip on Board). The POB solution mounts larger LED packages on the surface of a PCB, while the COB solution mounts smaller LED chips directly on the PCB (also known as a substrate). The design of the PCB pads significantly impacts the yield of the COB solution. Mini LED panels produced using the COB solution can also be used in LED direct display modules. If the pad area of the PCB board is large, during the reflow process, the melted solder paste will infiltrate the pad, and the solder paste has the characteristic of extending along the metal surface. If there is a position deviation between the solder paste and the pad when brushing the solder paste, causing part of the solder paste to exceed the range of the pad, then after the solder paste melts, it will extend to the pad surface and may drive the chip to move, causing the chip to shift, resulting in reduced optical quality of the backlight module; if the pad area is small, then if the solder paste shifts during the solder paste brushing process, the solder paste distribution on the pad will shift to a greater extent, resulting in a reduction in the yield of die bonding (i.e., fixing the chip 140 on the pad 120, the same below). Summary of the Invention

[0003] To solve the above technical problems, the present invention provides a substrate and a light board. These can reduce the possibility of chip deviation or tilt during die bonding of LED COB products, thereby improving product yield. The technical solutions of this application are as follows:

[0004] A substrate comprises a base material, a circuit layer and a solder resist layer, wherein the circuit layer is covered on the base material, and the solder resist layer is covered on the outer surfaces of the base material and the circuit layer, and at least one window is provided on the solder resist layer to expose a portion of the circuit layer to form a solder pad, and at least a pair of symmetrically arranged solder pads are provided in the window to fix a chip, wherein the connection direction of the pair of symmetrically arranged solder pads is the length direction, and the direction perpendicular to the length direction is the width direction, each of the solder pads comprises a first area and a second area connected to each other, the width of the second area is smaller than the width of the first area, the second areas of each of the solder pads are relatively arranged at a certain distance, the width of each of the second areas is greater than or equal to the electrode width of the chip, and when the solder pad is welded to the chip, the electrode of the chip at least covers between the first area and the second area.

[0005] As can be seen from the description of the background technology, a pad area that is too large or too small is not conducive to die bonding. However, the present application divides the pad area into a first area and a second area through the above structure, and the width of the second area is smaller than the width of the first area. When the chip is bonded to the pad, solder paste is first printed on the pad, and then the chip is fixed on the solder paste by a die bonding machine, and then passed through a reflow soldering device to melt the solder paste, thereby soldering the chip to the pad. Due to the wide width of the first area, even if the solder paste is offset when printing, it will not offset the pad too much and will remain within an acceptable range. In addition, due to the small width of the second area, the solder paste will generate buoyancy on the chip after melting into liquid, lifting the chip. Moreover, the solder paste has the characteristic of extending along the metal surface. If the solder paste and the pad deviate in position when applying the solder paste, the range of the solder paste extending along the second area is smaller, which can avoid the chip from being offset too much, thereby avoiding the chip from being offset too much and affecting the optical quality of the backlight module while ensuring the die bonding yield.

[0006] In one embodiment, the width of the second region is within + / - 10% of the wafer width.

[0007] In one embodiment, the solder resist layer is a white ink layer or a black ink layer.

[0008] In a specific embodiment, the first region and the second region are axisymmetric figures, and their axes of symmetry coincide with each other.

[0009] In a specific embodiment, each of the pads is provided with a notch, and the notch is provided on both sides of the second region. The notch can reduce the width of the second region, so that the second region has a significantly different width from the first region.

[0010] In a specific embodiment, the outer contours on both sides of the second region are provided with two side edges parallel to the outer side of the wafer.

[0011] In a specific embodiment, the length of the second region is greater than that of the first region. The longer length of the second region can strengthen the constraint effect of the second region on the wafer posture and reduce the degree of wafer deviation.

[0012] In a specific embodiment, the first area is rectangular, and the second area can be rectangular, hemispherical, or semi-elliptical.

[0013] In a specific embodiment, the area of the second region is larger than the area of the first region.

[0014] In a specific embodiment, the first region and / or the second region has multiple different widths in the length direction, wherein the width at the intersection of the first region and the second region is the maximum width of the first region, and the minimum width of the first region is greater than or equal to the maximum width of the second region.

[0015] The present application also provides a light board, comprising a substrate and at least one chip, wherein the substrate comprises the substrate described above, and the bottom of each chip has an electrode corresponding to the pad, and each electrode covers between the first area and the second area.

[0016] From the above description of the substrate, it can be seen that the chip is set on the solder pad. The solder paste in the first area and the second area can exert force on the chip during reflow soldering. The first area can ensure that the contact area between the solder pad and the solder paste is sufficient, and the second area can limit the degree of deviation of the chip to avoid excessive deviation of the chip and affect the optical quality of the light board.

[0017] Furthermore, the light board also includes an optical lens, which fully covers the chip and the window and at least partially covers the solder resist layer. The bottom of the window also exposes part of the surface of the substrate, and the bottom surface of the optical lens also covers part of the surface of the substrate.

[0018] In one embodiment, the optical lens has a convex curved surface. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1.1 A schematic diagram of a substrate and a connection between a chip and a pad on the substrate in the prior art;

[0020] Figure 1.2 It is a schematic cross-sectional view taken along line AA in FIG1 ;

[0021] Figure 2.1 This is a schematic diagram of the structure of the substrate in this application from a top view;

[0022] Figure 2.2 AA cross-sectional schematic diagram of Figure 3;

[0023] Figure 2.3 is a schematic structural diagram of a substrate in a top view in another embodiment;

[0024] Figure 2.4 is a schematic structural diagram of a substrate in a top view in another embodiment;

[0025] Figure 2.5 is a schematic structural diagram of a substrate in a top view in another embodiment;

[0026] Figure 3.1 This is a schematic diagram of the light panel structure from a top view in an embodiment of the present application;

[0027] Figure 3.2 for Figure 3.1 AA section structure diagram of the local structure;

[0028] Figure 3.3This is a schematic diagram of the structure of the light panel in another embodiment from a top view;

[0029] Figure 3.4 for Figure 3.3 AA cross-sectional structural diagram of the local structure. DETAILED DESCRIPTION

[0030] In order to enable those skilled in the art to better understand the present invention, the following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts should fall within the scope of protection of this application.

[0031] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequential order. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the present application described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions. For example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0032] In this application, terms such as "upper," "lower," "left," "right," "front," "back," "top," "bottom," "inner," "outer," "center," "vertical," "horizontal," "transverse," and "longitudinal" indicate positions or locations based on the positions or locations shown in the accompanying drawings. These terms are primarily intended to better describe this application and its embodiments and are not intended to limit the devices, elements, or components indicated to having a specific orientation, or to being constructed or operated in a specific orientation.

[0033] Furthermore, some of the above terms may be used to express other meanings besides indicating a position or location. For example, the term "on" may also be used to indicate a dependency or connection in certain circumstances. Those skilled in the art will understand the specific meanings of these terms in this application based on the specific circumstances.

[0034] Furthermore, the terms "installed," "disposed," "provided with," "connected," "connected," and "socketed" should be interpreted broadly. For example, they can refer to fixed connections, removable connections, or integral structures; mechanical connections or electrical connections; direct connections, indirect connections through an intermediary, or internal communication between two devices, elements, or components. Those skilled in the art will understand the specific meanings of these terms in this application based on the specific circumstances.

[0035] It should be noted that, in the absence of conflict, the embodiments and features of the embodiments in this application can be combined with each other. The present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0036] refer to Figure 1.1 and Figure 1.2 The schematic diagram of a substrate and a chip connected to a pad in the prior art is shown. The substrate in the prior art includes a base material 010 and a metal pad 011 and a solder mask 012 provided on the base material 010. The chip 01 is fixed on the pad. Since the metal pad 011 is too large, although it is beneficial for the solder paste to contact the pad when applying the solder paste, during the reflow process, the solder paste is not directly connected to the pad. Figure 1.2 As shown, after solder paste 013 melts, it flows over a large area on the surface of pad 011, potentially causing chip 014 to move and shift. This can also cause the solder paste flow to shift the chip, leading to a significant difference in solder paste thickness at the bottom of chip 014's electrodes, causing chip 014 to tilt in the height direction. Both chip 014 shifting and tilting can affect product performance. This application aims to improve the aforementioned shortcomings of the prior art.

[0037] Example 1

[0038] refer to Figures 2.1 to 2.4 , the present application embodiment provides a substrate, including a substrate 110, a circuit layer 160 and a solder resist layer 130. In this embodiment, the substrate is a hard PCB board, and the substrate is covered with a circuit layer 160 (refer to Figure 2.2 ), the circuit layer 160 is usually a copper layer, the pad 120 is provided on the circuit layer 160, and the solder resist layer 130 covers the outer surface of the substrate 110 and the circuit layer 160. The solder resist layer 130 is provided with at least one window to expose a portion of the circuit layer 160 to form the pad 120, and at least one pair of symmetrically arranged pads 120 are provided in the window 131 to fix the chip 140. Figure 2.1The connection direction of a pair of pads 120 is the length direction X, and the direction perpendicular to the length direction X is the width direction Y. Each pad 120 includes a first region 121 and a second region 122 connected to each other. The width of the second region 122 is smaller than the width of the first region 121. The second regions 122 of each pad 120 are arranged relative to each other at a certain distance to provide insulation. To facilitate the description of the connection relationship between the pad 120 and the chip, Figure 2.1 and Figure 2.2 The chip 140 is shown by a dotted line; the width of each second region 122 is greater than or equal to the electrode width of the chip 140 so that the electrode of the chip 140 is fully in contact with the pad, and the electrode of the chip 140 at least covers between the first region 121 and the second region 122.

[0039] From the description of the background technology, it can be seen that an area of the pad 120 that is too large or too small is not conducive to die bonding (i.e., fixing the chip 140 on the pad 120). However, the present application divides the area of the pad 120 into a first area 121 and a second area 122 through the above structure, and the width of the second area 122 is smaller than the width of the first area 121. When the chip 140 is die-bonded on the pad 120, the solder paste 150 is first printed on the pad 120, and then the chip 140 is fixed on the solder paste 150, and then passed through the reflow soldering equipment to melt the solder paste 150, thereby soldering the chip 140 to the pad 120. Since the width of the first area 121 is relatively wide, even if the solder paste 150 is offset when printing, it will not offset the pad 120 too much and will still be within an acceptable range. In addition, since the width of the second area 122 is relatively small, the solder paste 150 will generate buoyancy on the chip after melting into liquid, lifting the chip 140, and the solder paste 150 has the characteristic of extending along the metal surface. If there is a position deviation between the solder paste 150 and the pad 120 when brushing the solder paste 150, the range of extension of the solder paste 150 along the second area 122 is relatively small, and the force of the solder paste 150 on the chip 140 is concentrated toward the center of the second area 122, which can prevent the chip 140 from being offset too much, thereby preventing the chip 140 from being offset too much and affecting the optical quality of the backlight module while ensuring the die bonding yield.

[0040] In this embodiment, the curvature of the outer side contour lines of the first region 121 and the second region 122 is discontinuous; there are at least two curvature turning points P (refer to Figure 2.1 ).

[0041] In this embodiment, the pad 120 may include other areas in addition to the first area 121 and the second area 122. The lengths of the first area 121 and the second area 122 are defined by the lengths covered by the wafer in its length direction. That is, the area not covered by the wafer does not belong to the first area 121. Specifically, refer to Figure 2.1The light gray area is the first area 121 , and the dark gray area is the second area 122 .

[0042] In one embodiment, the deviation between the width of the second region 122 and the wafer width is within + / - 10%, and the offset angle of the wafer 140 can be controlled to be within an acceptable range.

[0043] In one embodiment, the solder resist layer 130 is a white ink layer or a black ink layer; the white ink layer has a reflective effect and is suitable for use in backlight panels, which is beneficial to the brightness of the backlight panels; while the black ink is suitable for use in direct display panels, which can improve the contrast of the display image.

[0044] In a specific embodiment, referring to Figure 2.4 The first region 121 and the second region 122 are axially symmetrical, and their axes of symmetry coincide. This has the advantage of making the force exerted on the chip 140 by the solder paste 150 when it extends on the surface of the pad 120 more balanced, thereby reducing the degree of deviation of the chip 140.

[0045] In a specific embodiment, referring to Figure 2.1 、 Figure 2.3 and Figure 2.4 Each pad 120 is provided with a notch 123, and the notch 123 is provided on both sides of the second region 122. The notch 123 can reduce the width of the second region 122, so that the second region 122 and the first region 121 have significantly different widths.

[0046] In a specific embodiment, referring to Figure 2.1 、 Figure 2.4 and Figure 2.5 The outer contours of the second region 122 are provided with two sides parallel to the outer sides of the wafer. This has the advantage that when the solder paste spreads on the surface of the second region 122, it is constrained by the two parallel sides of the second region 122. As a result, the force exerted by the solder paste on the wafer is also constrained by the two parallel sides of the second region 122, thereby correcting the wafer's posture, making the wafer's posture closer to the shape of the second region 122 and reducing the degree of wafer deviation.

[0047] In a specific embodiment, referring to Figure 2.4 The length X2 of the second region 122 is greater than the length X1 of the first region 121. The longer length of the second region 122 can strengthen the constraint effect of the second region 122 on the posture of the wafer 140 and reduce the degree of deviation of the wafer 140.

[0048] In a specific embodiment, the first area 121 is rectangular, and the second area 122 is rectangular (refer to Figure 2.1 and Figure 2.4 ) or hemispherical (not shown) or semi-elliptical (reference Figure 2.3 ) shape, as long as the width of the second region 122 is smaller than the width of the first region 121. If the second region 122 is a shape with an irregular width, such as a hemispherical, semi-elliptical, or trapezoidal shape, the maximum width Y9 of the second region 122 is smaller than the maximum width Y1 of the first region 121.

[0049] In a specific embodiment, the area of the second region 122 is larger than that of the first region 121. The larger area of the second region 122 can enhance the constraint effect of the second region 122 on the posture of the wafer 140 and reduce the degree of deviation of the wafer 140.

[0050] In a specific embodiment, the first region 121 and / or the second region 122 each have multiple different widths in the length direction, wherein the width at the intersection of the first region 121 and the second region 122 is the maximum width of the second region 121, and the minimum width of the first region 121 is greater than or equal to the maximum width of the first region 122. Specifically, referring to Figure 2.3 , the second area 122 is semi-elliptical, and its width in the length direction is not uniform, and the width at the intersection of the first area 121 and the second area 122 is the maximum width of the second area 122, while the first area 121 is rectangular, and its width is fixed, that is, its minimum width is the same as its maximum width, and its minimum width is greater than the maximum width of the second area; referring to Figure 2.5 The first region 121 and the second region 122 each have multiple different widths along their length. Near the first region 121 and the second region 122, the width of the first region decreases toward the second region, and at the end of the second region 122, the width of the second region 122 also decreases. This design allows the shape of the pad to decrease from the first region 121 to the second region 122.

[0051] In this embodiment, the wafer is a flip-chip LED chip.

[0052] Example 2

[0053] Please refer to Figure 2.1 and Figure 2.2 The present application also provides a light board 200, comprising a substrate 210 and at least one chip 140. The substrate 210 comprises the substrate described in the first embodiment above. The bottom of each chip 140 has an electrode 141 corresponding to the solder pad 120, and each electrode 141 covers between the first region 121 and the second region 122. In this embodiment, there are 25 chips 140, arranged in a 5x5 rectangular array. In other embodiments, the number of chips 140 can be other values, and the arrangement is not limited to a rectangular array.

[0054] Through the description of a pair of substrates in the above embodiment, it can be seen that the chip 140 is set on the solder pad 120. The solder paste in the first area 121 and the second area 122 can exert force on the chip 140 during reflow soldering. The first area 121 can ensure that the contact area between the solder pad 120 and the solder paste is sufficient, and the second area 122 can limit the degree of deviation of the chip 140 to prevent the chip 140 from deviating too much and affecting the optical quality of the light board.

[0055] Further, refer to Figure 2.3 and Figure 2.4 The light board 200 further includes an optical lens 220. The optical lens 220 fully covers the chip 140 and the window 131, and at least partially covers the solder resist layer 130. The bottom of the window 131 also exposes a portion of the surface of the substrate 110. The bottom surface of the optical lens 220 also covers a portion of the surface of the substrate 110. The optical lens 220 can adjust the optical properties of the light board 200 and also provide a sealing and protective effect for the chip 140 and the solder pad 120.

[0056] In this embodiment, the optical lens 220 has a convex curved surface to facilitate light diffusion.

[0057] The above are several embodiments of the present invention. It should be understood that the application of the present invention is not limited to the above examples. Those skilled in the art can also make improvements or modifications based on the above description. All such improvements and modifications should fall within the scope of protection of the appended claims of the present invention. In the above embodiments, where there is no conflict, the various features can be combined, interchanged, reused, etc. to form new embodiments. All of these fall within the scope of the embodiments of the present invention and will not be further described herein.

Claims

1. A substrate, characterized in that It includes a substrate, a circuit layer and a solder resist layer, wherein the circuit layer is covered on the substrate, and the solder resist layer is covered on the outer surface of the substrate and the circuit layer. At least one window is provided on the solder resist layer to expose a part of the circuit layer to form a solder pad, and at least one pair of symmetrically arranged solder pads are provided in the window to fix the chip, wherein the connection direction of the pair of symmetrically arranged solder pads is the length direction, and the direction perpendicular to the length direction is the width direction, each of the solder pads includes a first area and a second area connected to each other, the width of the second area is smaller than the width of the first area, the second areas of each of the solder pads are relatively arranged at a certain distance, the width of each second area is greater than or equal to the electrode width of the chip, and when the solder pad is welded to the chip, the electrode of the chip at least covers between the first area and the second area.

2. The substrate according to claim 1, wherein The deviation of the width of the second region from the wafer width is within + / - 10%.

3. The substrate according to claim 1, wherein The first region and the second region are axisymmetric figures, and their axes of symmetry coincide with each other.

4. The substrate according to claim 1, wherein Each of the pads is provided with a notch, and the notch is provided on both sides of the second area; the outer contours on both sides of the second area are provided with two side edges parallel to the outer side of the chip.

5. The substrate according to claim 1, wherein The length of the second region is greater than the length of the first region.

6. The substrate according to claim 1, wherein The area of the second region is greater than that of the first region; the first region is rectangular, and the second region is rectangular, hemispherical, or semi-elliptical.

7. The substrate according to claim 1, wherein The first region and / or the second region have multiple different widths in the length direction, wherein the width at the intersection of the first region and the second region is the maximum width of the second region, and the minimum width of the first region is greater than or equal to the maximum width of the second region.

8. A light board comprising a substrate and at least one chip, characterized in that: The substrate comprises the substrate according to any one of claims 1 to 7, and the bottom of each chip has an electrode corresponding to the pad, and each electrode covers between the first area and the second area.

9. The light board according to claim 8, characterized in that: It also includes an optical lens, which fully covers the chip and the window and at least partially covers the solder resist layer. The bottom of the window also exposes a portion of the surface of the substrate, and the bottom surface of the optical lens also covers the portion of the surface of the substrate.

10. The light board according to claim 9, characterized in that: The optical lens has a convex curved surface.

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