Microdisplay device
By setting up a metal fence around the sub-pixels and semiconductor electrode conduction structure of the microdisplay device, the problem of insufficient heat dissipation of the microdisplay chip is solved, and the heat dissipation ability and display performance are improved.
Patent Information
- Application Number
- CN202422192635.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-09-06
- Publication Date
- 2025-08-19
- Estimated Expiration
- 2034-09-06
AI Technical Summary
The heat dissipation ability of micro-display chips is limited, which leads to an increase in the chip temperature and affects the display performance.
The metal fence is surrounded by sub-pixels and semiconductor electrode conduction structures of the microdisplay device to enhance the heat dissipation capability of the device.
By adding metal fences, the heat dissipation effect of micro-display devices is improved, the impact of poor heat dissipation on display performance is avoided, and the brightness and process stability are improved.
Smart Images
Figure CN223246993U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of semiconductors, in particular to a micro display device. Background Art
[0002] Micro LED display chips are the core chips of devices such as AR (augmented reality) and VR (virtual reality). Due to the small size, high integration and self-luminescence of Micro LED chips, compared with technologies such as LCOS (liquid crystal on silicon) and OLED (organic light-emitting diodes), Micro LED is considered the best solution due to its advantages such as high resolution, low power consumption, high brightness and long life.
[0003] However, as chip size decreases, their surface area and heat dissipation capacity also decrease. Small-sized MicroLED chips have limited heat dissipation capacity, making it difficult to dissipate heat quickly and effectively, leading to increased chip temperature. In high-temperature environments, current efficiency and luminous efficiency will significantly decrease, and even cause thermal failure.
[0004] Therefore, a new technical solution is urgently needed to avoid the impact of limited heat dissipation capacity on the display performance of micro display chips. Utility Model Content
[0005] The purpose of the utility model is to provide a micro display device with better heat dissipation capability.
[0006] In order to achieve the above-mentioned purpose of the utility model, the utility model proposes the following technical solutions:
[0007] A micro display device, comprising a driving wafer and a multi-layer display device layer arranged on the driving wafer;
[0008] Any of the display device layers includes sub-pixels and a semiconductor electrode conduction structure, wherein the semiconductor electrode conduction structure is used to conduct electrodes for the sub-pixels in the upper display device layer;
[0009] In at least one layer of the display device, the sub-pixels and the semiconductor electrode conductive structure are surrounded by a metal fence, and the top height of the metal fence is lower than the top height of the sub-pixels and the semiconductor electrode conductive structure.
[0010] In a possible implementation, the top height of the metal fence is at least 30 nanometers lower than the top height of the sub-pixel and the semiconductor electrode conductive structure in the same display device layer.
[0011] In a possible implementation, the top of the sub-pixel is a first ohmic contact layer;
[0012] A continuous transparent conductive layer is provided on the first ohmic contact layer of each sub-pixel in the display device layer.
[0013] In a possible implementation, in at least one display device layer, the sub-pixel has an upper surface and / or a portion of a side wall exposed compared to a surrounding insulating layer in the same layer.
[0014] In a possible implementation, an insulating medium is provided between the sub-pixel and the metal fence.
[0015] In a possible implementation, the thickness of the insulating medium is not less than 10 nanometers.
[0016] In a possible implementation, the size of the metal fence surrounding the semiconductor electrode conductive structure is smaller than or equal to the size of the metal fence surrounding the sub-pixel.
[0017] In a possible implementation, the ratio of the thickness of the metal fence to the thickness of the semiconductor electrode conductive structure is within a range of 0.01 to 1.
[0018] In a possible implementation, the ratio of the thickness of the metal fence to the thickness of the semiconductor electrode conductive structure is in the range of 1 to 10.
[0019] In a possible implementation, the angle of the metal fence is between 45 degrees and 135 degrees.
[0020] In a possible implementation, in the top display device layer, the sub-pixels in the top display device layer are surrounded by the metal fence.
[0021] In a possible implementation, the display device layer includes isolated and arranged metal layers;
[0022] The bottom of the sub-pixel and the semiconductor electrode conductive structure is connected to the upper surface of the metal layer, and the lower surface of the metal layer is bonded to the driving wafer or the lower display device layer;
[0023] The bottom of the metal fence is connected to the outer edge of the metal layer to surround the sub-pixel and the semiconductor electrode conductive structure.
[0024] In a possible implementation, the sub-pixel includes: an active layer and a first ohmic contact layer vertically stacked in a direction away from the metal layer.
[0025] In a possible implementation, the metal layer includes: a bonding metal layer and a second ohmic contact layer vertically stacked in a direction away from the driver wafer.
[0026] In a possible implementation, a top height of the metal fence is not lower than a top height of the second ohmic contact layer.
[0027] In a possible implementation, the semiconductor electrode conduction structure passes through the second ohmic contact layer, and a bottom surface thereof is connected to an upper surface of the bonding metal layer.
[0028] In a possible implementation, the semiconductor electrode conductive structure runs through the color compound.
[0029] In a possible implementation, the height of the color compound is smaller than the height of the semiconductor electrode conductive structure.
[0030] Compared with the prior art, the present invention has the following beneficial effects:
[0031] The micro-display device includes a driver wafer and a multi-layer display device layer arranged on the driver wafer. Any display device layer includes sub-pixels and a semiconductor electrode conduction structure. The semiconductor electrode conduction structure is used to perform electrode conduction for the sub-pixels in the upper display device layer. In at least one display device layer, the sub-pixels and the semiconductor electrode conduction structure are surrounded by a metal fence, and the top height of the metal fence is lower than the top height of the sub-pixels and the semiconductor electrode conduction structure. By arranging a metal fence around the sub-pixels and the semiconductor electrode conduction structure, the thermal conductivity of the micro-display device can be improved, thereby avoiding the impact of poor heat dissipation on the display performance of the micro-display device.
[0032] Furthermore, in the top display device layer, the sub-pixels in the top display device layer are also surrounded by metal fences, thereby adding more metal structures to the device, thereby improving the heat dissipation capability of the device.
[0033] Furthermore, the metal fence can be formed by reverse sputtering during the etching process of the metal layer on the bottom surface of the sub-pixel, thereby making full use of the fence structure that is inevitable in the ion beam etching process due to physical properties, simplifying the overall process flow, and greatly improving process stability, production efficiency and production capacity. At the same time, the metal fence can also prevent crosstalk and improve the brightness of the micro display device.
[0034] It should be noted that the present invention only needs to achieve at least one of the above technical effects. BRIEF DESCRIPTION OF THE DRAWINGS
[0035] Figure 1 Schematic diagram of the structure of a micro display device provided in an embodiment of the present application;
[0036] Figure 2 Schematic diagram of the structure of a micro display device provided in an embodiment of the present application;
[0037] Figure 3 Schematic diagram of the structure of a micro display device provided in an embodiment of the present application;
[0038] Figure 4 Schematic diagram of the structure of a micro display device provided in an embodiment of the present application;
[0039] Figure 5 Schematic diagram of the structure of a micro display device provided in an embodiment of the present application;
[0040] Figure 6 Schematic diagram of the structure of a micro display device provided in an embodiment of the present application;
[0041] Figure 7 Schematic diagram of the structure of a micro display device provided in an embodiment of the present application;
[0042] Figure 8 It is a structural schematic diagram of a micro display device provided in an embodiment of the present application.
[0043] Markings in the figure: 100-driving wafer, 110-anode contact, 200-first display device layer, 210-first sub-pixel, 220-first insulating layer, 300-second display device layer, 310-second sub-pixel, 320-second insulating layer, 400-third display device layer, 410-third sub-pixel, 420-third insulating layer, 500-metal fence, 600-metal layer, 610-bonding metal layer, 620-second ohmic contact layer, 700-transparent conductive layer, 800-semiconductor electrode conduction structure, 900-color compound. DETAILED DESCRIPTION
[0044] To make the purpose, technical solutions, and advantages of the present invention more clear, the following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts shall fall within the scope of protection of the present invention.
[0045] In the description of the present invention, it should be understood that the terms "vertical", "upper", "lower", "top", "side", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, unless otherwise specified, "multiple" means two or more.
[0046] In the description of this utility model, it should be noted that, unless otherwise expressly specified or limited, the terms "installed," "connected," and "connected" should be understood in a broad sense. For example, they can refer to fixed connections, detachable connections, or integral connections; mechanical connections, electrical connections; direct connections, indirect connections through an intermediate medium, and internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in this utility model based on specific circumstances.
[0047] In order to solve the problem of poor heat dissipation affecting the display effect of the micro-display device, in an embodiment of the present application, a micro-display device is provided with a metal fence surrounding the sub-pixels and semiconductor electrode conductive structure. The metal fence improves the thermal conductivity of the micro-display device and avoids the impact of poor heat dissipation on the display performance of the micro-display device.
[0048] Combined with reference Figure 1 、 Figure 2 An embodiment of the present application provides a micro display device, which includes a driving wafer 100 and a multi-layer display device layer arranged on the driving wafer 100.
[0049] Among them, any display device layer includes sub-pixels and semiconductor electrode conduction structure 800, and the semiconductor electrode conduction structure 800 is used to perform electrode conduction for the sub-pixels in the upper display device layer; in at least one display device layer, the sub-pixels and semiconductor electrode conduction structure 800 are surrounded by a metal fence 500, and the top height of the metal fence 500 is lower than the top height of the sub-pixels and semiconductor electrode conduction structure 800.
[0050] For micro-display devices, the worse the heat dissipation is, the more it affects the overall display performance. Therefore, in the embodiment of the present application, a metal fence 500 is added around the sub-pixels and semiconductor electrode conductive structure 800 in the display device layer. Since the metal fence 500 has good thermal conductivity, it can improve the overall heat dissipation capacity of the micro-display device.
[0051] It can be understood that the present application does not limit the specific number of display device layers on the driver wafer 100. For example, if the number of display device layers is two, the sub-pixels and semiconductor electrode conductive structures 800 in the first display device layer 200 can be surrounded by a metal fence 500; if the number of display device layers is three, the sub-pixels and semiconductor electrode conductive structures 800 in at least one of the first display device layer 200 and the second display device layer 300 can be surrounded by a metal fence 500.
[0052] Exemplary, with reference to Figure 1 The micro display device has two layers, wherein the first sub-pixel 210 , the second sub-pixel 310 and the semiconductor electrode conductive structure 800 in the first display device layer 200 are surrounded by a metal fence 500 .
[0053] Exemplary, with reference to Figure 2 The micro display device has three layers, wherein the first sub-pixel 210, the second sub-pixel 310, the semiconductor electrode conductive structure 800 in the first display device layer 200, and the semiconductor electrode conductive structure 800 in the second display device layer 300 are surrounded by a metal fence 500.
[0054] Among them, the driver wafer 100 can be an active design that combines one or more of thin film transistors (TFT), low temperature polycrystalline silicon (LTPS), CMOS integrated circuits, high mobility transistors (HEMT), etc. Specifically, the driver wafer 100 is provided with a driver circuit, and the driver circuit is provided with at least one anode contact 110. The driver circuit may include an active, passive, or semi-passive control circuit. All anode contacts 110 included in the driver circuit can be arranged linearly or in an array, and any anode contact 110 is located in the middle or at the edge of the driver wafer 100. This embodiment does not impose any restrictions on this.
[0055] Among them, each display device layer is filled with an insulating layer, which includes materials such as silicon oxide, silicon nitride, SiC, SiCN, PSG, BPSG, polyimide, etc. This application does not limit the specific material of the insulating layer, as long as it is used to achieve the insulating function.
[0056] In a possible implementation, the top height of the metal fence 500 is at least 30 nanometers lower than the top height of the sub-pixel and semiconductor electrode conductive structure 800 in the same display device layer.
[0057] In this implementation, since the tops of the sub-pixels generally need to be connected to a common cathode through the transparent conductive layer 700, if the height of the metal fence 500 is too high, the metal fence 500 may be electrically connected to the transparent conductive layer 700 at the top of the sub-pixel. The metal fence 500 itself is electrically connected to the anode contact 110 in the driver wafer 100. Therefore, if it is electrically connected to the transparent conductive layer 700, it may cause a short circuit in the device. Therefore, the top height of the metal fence 500 is limited to be at least 30 nanometers lower than the top height of the sub-pixel and the semiconductor electrode conductive structure 800.
[0058] Furthermore, the top of the sub-pixel is a first ohmic contact layer, and the first ohmic contact layer of the sub-pixel in each display device layer is covered with a continuous transparent conductive layer 700. The sub-pixels in each display device layer are electrically connected through the transparent conductive layer 700.
[0059] Among them, the transparent conductive layer 700 can be a combination of one or more of ITO (Indium Tin Oxide) film, AZO (Antimony doped Zinc Oxide) film, ATO (Antimony doped Tin Oxide) film, FTO (Fluorine doped Tin Oxide) film, or a metal-doped ITO single layer or stacked layer formed by plating Al, Au, or Ag on the ITO surface and then annealing to enhance the current transmission capability of the common cathode.
[0060] Furthermore, in at least one display device layer, the sub-pixel has its top surface and / or part of its sidewall exposed compared to the surrounding insulating layer in the same layer. That is, in at least one display device layer, the top height of the insulating layer surrounding the sub-pixel is flush with the top height of the sub-pixel in the same layer, thereby exposing the top surface of the sub-pixel; alternatively, the top height of the insulating layer surrounding the sub-pixel is lower than the top height of the sub-pixel in the same layer, thereby exposing the top surface and part of the sidewall of the sub-pixel. With the sub-pixel exposed, the insulating layer becomes thinner, thereby facilitating heat dissipation within the micro-display device.
[0061] Exemplary, with reference to Figure 3 In the first display device layer 200 , the first sub-pixel 210 has its upper surface and sidewalls exposed compared to the first insulating layer 220 .
[0062] Exemplary, with reference to Figure 4In the first display device layer 200 , the first sub-pixel 210 exposes its upper surface and sidewalls compared to the first insulating layer 220 ; in the second display device layer 300 , the second sub-pixel 310 exposes its upper surface and sidewalls compared to the second insulating layer 320 ; in the third display device layer 400 , the third sub-pixel 410 exposes its upper surface and sidewalls compared to the third insulating layer 420 .
[0063] In a possible implementation, an insulating medium is provided between the sub-pixel and the metal fence 500. In order to prevent the metal fence 500 from causing a short circuit in the sub-pixel, an insulating medium is provided between the sub-pixel and the metal fence 500.
[0064] Furthermore, the thickness of the insulating medium is not less than 10 nanometers. To prevent the sub-pixels from contacting the metal fence 500 due to the spacing being too short, the thickness of the insulating medium between the sub-pixels and the metal fence 500 needs to be greater than 10 nanometers.
[0065] It is understood that the structure between the sub-pixels and the metal fence (such as the insulating dielectric) can be fabricated using the following process: after completing the pixelation of the sub-pixels, an insulating layer is retained on the epitaxial surface of the sub-pixels. Then, an insulating film layer is formed using methods such as plasma deposition, sputtering, and atomic layer deposition. The insulating layer thickness ranges from 1nm to 1500nm. The insulating layer material may include a single film layer such as silicon oxide, silicon nitride, aluminum oxide, or boron nitride, or a stack of two or more materials. Etching methods such as RIE / ICP / IBE are then used to retain the insulating film layer on the sidewalls. The metal fence is then further formed. This process can reduce the number of photolithography steps and is more suitable for applications in small-scale microdisplay devices.
[0066] Furthermore, in addition to a simple insulating medium, multiple sets of high-reflection layers and sidewall insulating film layers can be designed between the sub-pixels and the metal fence to further enhance the reflection of light emitted from the sidewalls and increase the brightness of the device.
[0067] It is understandable that an insulating medium may be interposed between the semiconductor electrode conductive structure 800 and the metal fence 500 , and the thickness of the insulating medium may be no less than 10 nanometers.
[0068] In one possible implementation, the size of the metal fence 500 surrounding the semiconductor electrode conductive structure 800 is smaller than or equal to the size of the metal fence 500 surrounding the sub-pixel. Within the same display device layer, the size of the semiconductor electrode conductive structure 800 and the surrounding metal fence 500 is designed to be smaller than or equal to the size of the sub-pixel and the surrounding metal fence 500. This prevents the corresponding structures of the former from occupying too much space, affecting the sub-pixel layout, and thus causing low pixel density.
[0069] Furthermore, the angle of the metal fence 500 is between 45 degrees and 135 degrees. That is, the angle of the metal fence 500 can be designed to be 90°±45°.
[0070] In one possible implementation, the ratio of the thickness of the metal fence 500 to the thickness of the semiconductor electrode conductive structure 800 is within a range of 0.01 to 1. The larger the thickness of the semiconductor electrode conductive structure 800, the smaller the thickness of the metal fence 500. When the semiconductor electrode conductive structure 800 is designed to be relatively large, the semiconductor electrode conductive structure 800 is used for electrode conduction, thereby improving the conductivity of the micro display device.
[0071] In another possible implementation, the ratio of the thickness of the metal fence 500 to the thickness of the semiconductor electrode conductive structure 800 is within a range of 1 to 10. The thicker the metal fence 500 is, the thinner the thickness of the semiconductor electrode conductive structure 800 is. Since the contact area between the metal fence 500 and the insulating layer in the display device layer is relatively large, increasing the thickness of the metal fence 500 can further increase the contact area between the metal fence 500 and the insulating layer, thereby facilitating the transfer of heat distributed in the insulating layer and improving the heat dissipation capability of the device.
[0072] In a possible implementation, in the top display device layer, a metal fence 500 surrounds the sub-pixels in the top display device layer.
[0073] In this implementation, if Figure 4 、 Figure 5 As shown, the micro display device has three display device layers, the top display device layer is the third display device layer 400, the third insulating layer 420 is entirely filled in the third display device layer 400, and the third sub-pixel 410 in this display device layer is also provided with a surrounding metal fence 500. Figure 2 For the structure shown in FIG. 5 in which no metal fence 500 is provided in the top display device layer, the entire device can have a larger metal structure, thereby improving the heat dissipation capability of the device.
[0074] In one possible implementation, the display device layer includes an isolated metal layer 600; the bottom of the sub-pixel and semiconductor electrode conductive structure 800 is connected to the upper surface of the metal layer 600, and the lower surface of the metal layer 600 is bonded to the driver wafer 100 or the lower display device layer; the bottom of the metal fence 500 is connected to the outer edge of the metal layer 600 to surround the sub-pixel and semiconductor electrode conductive structure 800.
[0075] In this implementation, if Figures 1 to 5As shown, each display device layer is bonded to the driver wafer 100 or the underlying display device layer via a metal layer 600, and the metal layer 600 is further used to form a metal fence 500. For example, the metal fence 500 can be formed by reverse sputtering during the etching process of the metal layer 600, thereby facilitating the preparation of the metal fence 500.
[0076] Furthermore, the sub-pixel includes an active layer and a first ohmic contact layer vertically stacked in a direction away from the metal layer 600. The sub-pixel emits light through the active layer and is electrically connected through the first ohmic contact layer.
[0077] Furthermore, the metal layer 600 includes: a bonding metal layer 610 and a second ohmic contact layer 620 vertically stacked in a direction away from the driver wafer 100 .
[0078] Furthermore, the top height of the metal fence 500 is not less than the top height of the second ohmic contact layer 620. The metal fence 500 surrounding the sub-pixel must be taller than the top height of the second ohmic contact layer 620 to ensure that the metal fence 500 has a certain height to achieve its function of heat dissipation.
[0079] It is understandable that the first ohmic contact layer and the second ohmic contact layer 620 in the present application can be designed to be a P-type ohmic contact layer and an N-type ohmic contact layer, respectively, or can be designed to be an N-type ohmic contact layer and a P-type ohmic contact layer, respectively.
[0080] For example, the sub-pixels are made of compound wafer materials. The structures of some compound wafers are as follows. In some practical applications, the film layers of the compound wafers will be more complex, or there will be cross-use of materials. The material range is not limited. It typically mainly includes P-type material (corresponding to the second ohmic contact layer or the first ohmic contact layer), N-type material (corresponding to the first ohmic contact layer or the second ohmic contact layer), and an MQW quantum well (corresponding to the active layer) sandwiched between the two, and other functional layers:
[0081]
[0082]
[0083] Furthermore, the semiconductor electrode conductive structure 800 penetrates the second ohmic contact layer 620 , and its bottom surface is connected to the upper surface of the bonding metal layer 610 .
[0084] like Figures 1 to 5As shown, the semiconductor electrode conduction structure 800 can be arranged in the insulating layer by means of through-hole and then metal filling. In order to electrically connect the semiconductor electrode conduction structure 800 with the metal layer 600, the bottom of the semiconductor electrode conduction structure 800 can be connected to the upper surface of the metal layer 600. In the design that the metal layer 600 includes a bonding metal layer 610 and a second ohmic contact layer 620, since the second ohmic contact layer 620 requires a metal that can form an ohmic contact with it in order to be electrically connected, when designing the through-hole, the through-hole can be passed through the second ohmic contact layer 620 in the metal layer 600, and the bottom surface of the semiconductor electrode conduction structure 800 can be connected to the upper surface of the bonding metal layer 610 in the metal layer 600, so that the semiconductor electrode conduction structure 800 is directly electrically connected to the bonding metal layer 610, thereby avoiding the material limitation of the semiconductor electrode conduction structure 800, and it can adopt metals of various material types.
[0085] In one possible implementation, Figure 6 、 Figure 7 As shown, the semiconductor electrode conductive structure 800 runs through the color compound 900. When preparing the sub-pixels in each display device layer, the color compound 900 can be retained at the corresponding position of the semiconductor electrode conductive structure 800. Since the thermal conductivity of the color compound 900 is much better than that of the insulating layer material, the retained color compound 900 can enhance the heat dissipation capacity. In addition, under this design, the angle of the metal fence 500 depends on the angle of the color compound 900, and the angle of the color compound 900 depends on the photolithography angle, and the angle can be designed to be 90°±45°. In addition, the semiconductor electrode conductive structure 800 can be connected to the side wall of the color compound 900, such as Figure 6 As shown; the semiconductor electrode conductive structure 800 may be separated from the color compound 900 by an insulating medium, such as Figure 7 shown.
[0086] Further, such as Figure 8 As shown, the height of the color compound 900 is less than the height of the semiconductor electrode conductive structure 800. While retaining the color compound 900, the height of the insulating layer can be higher than the height of the color compound 900. Accordingly, the height of the color compound 900 is less than the height of the semiconductor electrode conductive structure 800, thereby avoiding the height of the color compound 900 from being limited to the height of the semiconductor electrode conductive structure 800.
[0087] In summary, the present application provides a microdisplay device, which includes a driver wafer and a multi-layer display device layer arranged on the driver wafer. Any display device layer includes sub-pixels and a semiconductor electrode conduction structure, and the semiconductor electrode conduction structure is used to perform electrode conduction for the sub-pixels in the upper display device layer; the sub-pixels and the semiconductor electrode conduction structure are surrounded by a metal fence, and the top height of the metal fence is lower than the top height of the sub-pixels and the semiconductor electrode conduction structure. By arranging a metal fence around the sub-pixels and the semiconductor electrode conduction structure, the thermal conductivity of the microdisplay device can be improved, and the influence of poor heat dissipation on the display performance of the microdisplay device can be avoided.
[0088] All of the above optional technical solutions can be combined in any way to form optional embodiments of the present invention, that is, any multiple embodiments can be combined to meet the needs of different application scenarios. They are all within the scope of protection of this application and will not be described in detail here.
[0089] It should be noted that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.
Claims
1. A micro display device, characterized in that: The micro display device includes a driving wafer and a multi-layer display device layer arranged on the driving wafer; Any of the display device layers includes sub-pixels and a semiconductor electrode conduction structure, wherein the semiconductor electrode conduction structure is used to conduct electrodes for the sub-pixels in the upper display device layer; In at least one layer of the display device, the sub-pixels and the semiconductor electrode conductive structure are surrounded by a metal fence, and the top height of the metal fence is lower than the top height of the sub-pixels and the semiconductor electrode conductive structure.
2. The micro display device according to claim 1, wherein: The top height of the metal fence is at least 30 nanometers lower than the top height of the sub-pixels and the semiconductor electrode conductive structure in the same display device layer.
3. The micro display device according to claim 2, characterized in that The top of the sub-pixel is a first ohmic contact layer; A continuous transparent conductive layer is provided on the first ohmic contact layer of each sub-pixel in the display device layer.
4. The micro display device according to claim 3, characterized in that In at least one display device layer, the sub-pixel has an upper surface and / or a portion of a side wall exposed compared to a surrounding insulating layer in the same layer.
5. The micro display device according to any one of claims 1 to 4, characterized in that: An insulating medium is provided between the sub-pixel and the metal fence.
6. The micro display device according to claim 5, characterized in that The thickness of the insulating medium is not less than 10 nanometers.
7. The micro display device according to any one of claims 1 to 4, characterized in that: The size of the metal fence surrounding the semiconductor electrode conductive structure is smaller than or equal to the size of the metal fence surrounding the sub-pixel.
8. The micro display device according to any one of claims 1 to 4, characterized in that: The ratio of the thickness of the metal fence to the thickness of the semiconductor electrode conductive structure is within the range of 0.01 to 1.
9. The micro display device according to any one of claims 1 to 4, characterized in that: The ratio of the thickness of the metal fence to the thickness of the semiconductor electrode conductive structure is within the range of 1 to 10.
10. The micro display device according to any one of claims 1 to 4, characterized in that: The angle of the metal fence is between 45 degrees and 135 degrees.
11. The micro display device according to any one of claims 1 to 4, characterized in that: In the top display device layer, the sub-pixels in the top display device layer are surrounded by the metal fence.
12. The micro display device according to any one of claims 1 to 4, characterized in that: The display device layer includes isolated and arranged metal layers; The bottom of the sub-pixel and the semiconductor electrode conductive structure is connected to the upper surface of the metal layer, and the lower surface of the metal layer is bonded to the driving wafer or the lower display device layer; The bottom of the metal fence is connected to the outer edge of the metal layer to surround the sub-pixel and the semiconductor electrode conductive structure.
13. The micro display device according to claim 12, characterized in that: The sub-pixel includes: an active layer and a first ohmic contact layer vertically stacked in a direction away from the metal layer.
14. The micro display device according to claim 12, characterized in that: The metal layer includes: a bonding metal layer and a second ohmic contact layer vertically stacked in a direction away from the driving wafer.
15. The micro display device according to claim 14, characterized in that: The top height of the metal fence is not lower than the top height of the second ohmic contact layer.
16. The micro display device according to claim 14, characterized in that The semiconductor electrode conductive structure penetrates the second ohmic contact layer, and a bottom surface thereof is connected to the upper surface of the bonding metal layer.
17. The micro display device according to any one of claims 1 to 4, characterized in that: The semiconductor electrode conductive structure runs through the color compound.
18. The micro display device according to claim 17, characterized in that The height of the color compound is smaller than the height of the semiconductor electrode conductive structure.