LDO (Low Dropout Regulator) filter circuit for reducing digital circuit power supply interference

Abstract

The utility model relates to the technical field of integrated circuit design, in particular to an LDO (Low Dropout Regulator) filter circuit for reducing power supply interference of a digital circuit. The power supply module comprises a power supply module, a voltage stabilization module, a filtering module and an output module, the power supply module comprises a power supply unit and a DC-DC boost circuit, the power supply module is connected with the voltage stabilization module, the voltage stabilization module is connected with the filtering module, and the filtering module is in bidirectional connection with the output module. According to the utility model, the filter circuit is additionally arranged at a high-frequency filtering generation source, and the simple filter circuit composed of the resistor R and the capacitor C is used for absorbing high-frequency filtering energy, so that the influence of high-frequency filtering on each module of the power supply system is reduced, and the influence of high-frequency filtering signals on the analog circuit unit is reduced to the minimum.

Description

Technical Field

[0001] The utility model relates to the technical field of integrated circuit design, in particular to an LDO filter circuit for reducing power supply interference of a digital circuit. Background Art

[0002] In power management, the interference caused by harmonics generated by digital circuits on the power supply is a significant issue, as it can "contaminate" the power supply. To reduce this interference, numerous methods have been proposed, such as circuit shielding, grounding, isolation, and high-frequency filtering. Compared to shielding and other methods, high-frequency filtering can address harmonic issues at the source. High-frequency filtering also reduces development costs and risks, is more flexible, and better adapts to commercial needs. High-frequency harmonics generated by digital circuits propagate through the power supply path. In traditional power management systems, these harmonics propagate through LDO modules to various parts of the power supply system, affecting power supply stability and the performance of analog circuits.

[0003] High-frequency harmonics generated by digital circuits propagate through the power supply path. In traditional power management systems, these harmonics propagate through the LDO module to various parts of the power supply system, thereby affecting the stability of the power supply and the performance of the analog circuits. To reduce the impact of high-frequency harmonics generated by digital circuits on analog circuits, we propose an LDO filter circuit that reduces digital circuit power supply interference. Utility Model Content

[0004] The purpose of the present invention is to provide an LDO filter circuit for reducing power supply interference of a digital circuit, so as to solve the problems raised in the above background technology.

[0005] To achieve the above objectives, the present invention provides an LDO filter circuit for reducing power supply interference in digital circuits, comprising a power supply module, a voltage stabilizing module, a filter module, and an output module. The power supply module comprises a power supply unit and a DC-DC boost circuit. The power supply module is connected to the voltage stabilizing module, which is connected to the filter module. The filter module is bidirectionally connected to the output module.

[0006] The power supply module provides DC power to the entire circuit system through the power supply unit, boosts the DC power using the DC-DC boost circuit, and stabilizes the boosted DC power through the LDO voltage regulator circuit of the voltage regulator module to ensure that stable constant-voltage DC power is provided to the output module. The high-frequency harmonics generated by the digital circuit unit of the output module during operation pass through the filter circuit, which absorbs the energy of the high-frequency harmonics, thereby reducing the impact of the high-frequency harmonics on the power supply and analog circuit units.

[0007] As a further improvement of the present technical solution, the filtering circuit of the filtering module is located between the LDO voltage stabilization circuit and the digital circuit unit, wherein the filtering circuit includes a resistor R and a capacitor C;

[0008] One end of the resistor R is connected to the output end of the LDO voltage stabilizing circuit, the other end of the resistor R is connected to the digital circuit unit and connected to one end of the capacitor C, and the other end of the capacitor C is grounded.

[0009] As a further improvement of the present technical solution, the voltage stabilizing module includes an LDO voltage stabilizing circuit, wherein the LDO voltage stabilizing circuit includes an operational amplifier A, a transistor VT1 and a voltage stabilizing diode VD;

[0010] Pin 2 of the operational amplifier A is connected to the cathode of the Zener diode VD and to the resistor R1 in parallel. The other end of the resistor R1 is connected to the capacitor C1 in parallel. The anode of the Zener diode VD is connected to the other end of the capacitor C1 and to ground. Pin 1 of the operational amplifier A is connected to the resistor R3. The other end of the resistor R3 is connected to the base of the transistor VT1 and to the resistor R2 in parallel. The other end of the resistor R2 is connected to the collector of the transistor VT1. The emitter of the transistor VT1 is connected to the resistor R4 and to the capacitor C2. Pin 3 of the operational amplifier A is connected to the resistor R5 and to the other end of the resistor R4. The other end of the resistor R5 is connected to the other end of the capacitor C2 and to ground.

[0011] As a further improvement of the present technical solution, the DC-DC boost circuit includes an inductor L, a transistor VT2 and a diode D;

[0012] The collector of the transistor VT2 is connected to the inductor L and the anode of the diode D, the cathode of the diode D is connected to the capacitor C3 and the resistor R6, and the emitter of the transistor VT2 is connected to the other end of the capacitor C3 and the other end of the resistor R6.

[0013] As a further improvement of the present technical solution, the power supply for the analog circuit unit of the output module is provided by a power supply through the same DC-DC boost circuit and LDO voltage regulator circuit, and a filter circuit is connected between the output end of the analog circuit unit and the LDO voltage regulator circuit.

[0014] As a further improvement of the present technical solution, the output end of the LDO voltage stabilizing circuit is connected to a capacitor C2, and the output end of the DC-DC boost circuit is connected to a resistor R6 and a capacitor C3.

[0015] Compared with the prior art, the present invention has the following beneficial effects:

[0016] This LDO filter circuit for reducing digital circuit power supply interference adds a filter circuit between the output end of the LDO voltage regulator circuit and the digital circuit unit, and adds an identical filter circuit between the analog circuit unit and the output end of the LDO voltage regulator circuit. Resistors R and C of the filter circuit are used to absorb the energy of high-frequency harmonics generated by the digital circuit unit, thereby reducing the impact of high-frequency harmonics on various circuit modules in the power supply system. One end of capacitor C in the filter circuit is grounded, forming a low-pass filter that effectively diverts high-frequency noise to the ground through capacitor C, thereby reducing interference with the circuit system. Capacitor C2 connected to the output end of the LDO voltage regulator circuit and resistor R6 connected to the output end of the DC-DC boost circuit in conjunction with capacitor C3 absorb the energy of high-frequency harmonics, reducing the impact of high-frequency harmonics on the circuit itself. Furthermore, after the high-frequency harmonics generated by the digital circuit unit are initially attenuated by the filter circuit, the high-frequency harmonics are further absorbed, thereby minimizing interference with the power supply system. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a schematic diagram of the overall structure of the utility model 1;

[0018] Figure 2 This is a schematic diagram of the high-frequency harmonic flow of the utility model 1;

[0019] Figure 3 This is the LDO voltage stabilizing circuit diagram of the utility model 1;

[0020] Figure 4 This is a DC-DC boost circuit diagram of the utility model 1. DETAILED DESCRIPTION

[0021] The following will be combined with the drawings in the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0022] In power management, the interference of harmonics generated by digital circuits on the power supply is a problem that cannot be ignored. It can "contaminate" the power supply. To reduce the interference of harmonics on the power supply, people have proposed many methods, such as circuit shielding, grounding, isolation, high-frequency filtering, etc. Compared with shielding and other methods, high-frequency filtering can solve the harmonic problem at the source. High-frequency filtering can also reduce development costs and risks, and is more flexible and more adaptable to business needs. The high-frequency harmonics generated by digital circuits propagate through the power supply path. In traditional power management systems, these harmonics will spread to various parts of the power supply system through the LDO module, thereby affecting the stability of the power supply and the performance of the analog circuits. See Figures 1-4 As shown, the utility model provides an LDO filter circuit for reducing power supply interference of digital circuits, including a power supply module, a voltage stabilizing module, a filter module and an output module. The power supply module includes a power supply unit and a DC-DC boost circuit. The power supply module is connected to the voltage stabilizing module, the voltage stabilizing module is connected to the filter module, and the filter module is bidirectionally connected to the output module.

[0023] The power supply module provides DC power to the entire circuit system through the power supply unit, boosts the DC power using the DC-DC boost circuit, and stabilizes the boosted DC power through the LDO voltage regulator circuit of the voltage regulator module to ensure that stable constant-voltage DC power is provided to the output module. The high-frequency harmonics generated by the digital circuit unit of the output module during operation pass through the filter circuit, which absorbs the energy of the high-frequency harmonics, thereby reducing the impact of the high-frequency harmonics on the power supply and analog circuit units.

[0024] Principle: This LDO filter circuit for reducing digital circuit power supply interference adds a filter circuit between the output end of the LDO voltage regulator circuit and the digital circuit unit, and adds the same filter circuit between the analog circuit unit and the output end of the LDO voltage regulator circuit. The resistors R and C of the filter circuit are used to absorb the energy of the high-frequency harmonics generated by the digital circuit unit, thereby reducing the impact of the high-frequency harmonics on various circuit modules in the power supply system. One end of the capacitor C in the filter circuit is grounded to form a low-pass filter, which can effectively flow high-frequency noise into the ground through the capacitor C, thereby reducing the interference of high-frequency noise on the circuit system. The capacitor C2 connected to the output end of the LDO voltage regulator circuit and the resistor R6 connected to the output end of the DC-DC boost circuit in conjunction with the capacitor C3, on the one hand, absorb the energy of the high-frequency harmonics and reduce the impact of the high-frequency harmonics on the circuit itself. On the other hand, after the high-frequency harmonics generated by the digital circuit unit are initially attenuated by the filter circuit, the energy of the high-frequency harmonics is absorbed again, thereby minimizing the interference of the high-frequency harmonics on the power supply system.

[0025] In order to achieve the absorption of high-frequency harmonics, the filter circuit of the filter module is located between the LDO voltage regulator circuit and the digital circuit unit, wherein the filter circuit includes a resistor R and a capacitor C;

[0026] One end of the resistor R is connected to the output end of the LDO voltage stabilizing circuit, the other end of the resistor R is connected to the digital circuit unit and connected to one end of the capacitor C, and the other end of the capacitor C is grounded.

[0027] In this circuit, capacitor C has the characteristic of "passing high frequencies and blocking low frequencies". Capacitor C presents a lower impedance to high-frequency signals, so that high-frequency noise signals can form a path to the ground through the capacitor. In this way, the high-frequency noise signal is bypassed to the ground and cannot continue to be transmitted to the subsequent circuit, thereby achieving the purpose of eliminating high-frequency noise. By utilizing the property of capacitor C that can store charge, the capacitor will charge and discharge according to the frequency of the signal during the signal change process. For high-frequency harmonic signals, the charging and discharging speed of capacitor C is relatively fast, and it can quickly respond to changes in high-frequency harmonic signals. Through the continuous charging and discharging of capacitor C, the energy of the high-frequency signal is gradually consumed inside capacitor C and converted into other forms of energy such as heat energy, thereby reducing the amplitude of the high-frequency harmonic signal and achieving attenuation of high-frequency harmonics;

[0028] Resistor R limits the discharge current of capacitor C, thereby controlling the discharge rate of capacitor C. When a high-frequency harmonic signal passes through capacitor C, the presence of resistor R prevents capacitor C from completely releasing its charge instantly, but instead causes it to discharge at a relatively slow rate. This prevents capacitor C from frequently and rapidly charging and discharging under the influence of the high-frequency signal, reducing the impact of the high-frequency harmonic signal on subsequent circuits.

[0029] In order to provide a stable constant voltage direct current, the voltage stabilization module includes an LDO voltage stabilization circuit, wherein the LDO voltage stabilization circuit includes an operational amplifier A, a transistor VT1 and a voltage stabilizing diode VD;

[0030] Pin 2 of the operational amplifier A is connected to the cathode of the Zener diode VD, and to the resistor R1 in parallel. The other end of the resistor R1 is connected to the capacitor C1 in parallel. The positive electrode of the Zener diode VD is connected to the other end of the capacitor C1 and to ground. Pin 1 of the operational amplifier A is connected to resistor R3. The other end of the resistor R3 is connected to the base of the transistor VT1 and to the resistor R2. The other end of the resistor R2 is connected to the collector of the transistor VT1. The emitter of the transistor VT1 is connected to resistor R4 and to capacitor C2. Pin 3 of the operational amplifier A is connected to resistor R5 and to the other end of the resistor R4. The other end of the resistor R5 is connected to the other end of the capacitor C2 and to ground.

[0031] In this circuit, resistors R4 and R5 form a voltage-divider resistor sampling network. When the input voltage UI increases or the output load resistance increases, the output voltage UO will increase instantaneously, and the voltage obtained by voltage-divider sampling through resistors R4 and R5 will also increase. Since the reverse terminal input of the operational amplifier A is used, the output of the operational amplifier A will decrease accordingly, and the difference between the emitter voltage and the base voltage of the transistor VT1 will decrease, thereby reducing the output current and UO, thereby achieving the purpose of voltage regulation.

[0032] In order to boost the power supply voltage and ensure that a sufficiently high voltage signal is provided to the circuit system, the DC-DC boost circuit includes an inductor L, a transistor VT2 and a diode D;

[0033] The collector of transistor VT2 is connected to inductor L and to the positive electrode of diode D, the negative electrode of diode D is connected to capacitor C3 and to resistor R6, and the emitter of transistor VT2 is connected to the other end of capacitor C3 and to the other end of resistor R6.

[0034] In this circuit, when transistor VT2 turns on, the input voltage is transmitted to the load through transistor VT2 and inductor L. At this point, the current in inductor L increases linearly, while inductor L stores magnetic energy. Because inductor L suppresses current changes, the output voltage remains lower than the input voltage, providing a low-impedance path for the output voltage. When transistor VT2 turns off, inductor L discharges through diode D and the load. Due to the current-holding property of inductor L, the current flowing through inductor L does not immediately drop to zero, but rather gradually does. At this point, the inductor L releases magnetic energy, causing the output voltage to rise above the input voltage, thereby boosting the power supply voltage.

[0035] In order to more effectively reduce the impact of high-frequency harmonics on the analog circuit unit, the power supply for the analog circuit unit of the output module is provided by the power supply through the same DC-DC boost circuit and LDO voltage regulator circuit. A filter circuit is connected between the output end of the analog circuit unit and the LDO voltage regulator circuit. The filter circuit between the digital circuit unit and the output end of the LDO voltage regulator circuit initially weakens the generated high-frequency harmonics. When the high-frequency harmonics are transmitted to the analog circuit unit, the filter circuit further weakens the high-frequency harmonics, thereby ensuring that the impact of the high-frequency harmonics on the analog circuit unit is minimized.

[0036] In order to reduce the interference of high-frequency harmonics on the LDO voltage regulator circuit, DC-DC boost circuit and power supply, the output end of the LDO voltage regulator circuit is connected to capacitor C2, and the output end of the DC-DC boost circuit is connected to resistor R6 and capacitor C3. The filtering effect of resistor R6, capacitor C2 and capacitor C3 is used to reduce the impact of high-frequency harmonics on the circuit itself.

[0037] The above shows and describes the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The above embodiments and descriptions are merely preferred examples of the present invention and are not intended to limit the present invention. Various changes and improvements may be made to the present invention without departing from the spirit and scope of the present invention, and such changes and improvements fall within the scope of the present invention. The scope of protection claimed in the present invention is defined by the appended claims and their equivalents.

Claims

1. An LDO filter circuit for reducing power supply interference in digital circuits, characterized by: It includes a power supply module, a voltage stabilizing module, a filtering module and an output module. The power supply module includes a power supply unit and a DC-DC boost circuit. The power supply module is connected to the voltage stabilizing module, the voltage stabilizing module is connected to the filtering module, and the filtering module is bidirectionally connected to the output module. The power supply module provides DC power to the entire circuit system through the power supply unit, boosts the DC power using the DC-DC boost circuit, and stabilizes the boosted DC power through the LDO voltage regulator circuit of the voltage regulator module to ensure that stable constant-voltage DC power is provided to the output module. The high-frequency harmonics generated by the digital circuit unit of the output module during operation pass through the filter circuit, which absorbs the energy of the high-frequency harmonics, thereby reducing the impact of the high-frequency harmonics on the power supply and analog circuit units.

2. The LDO filter circuit for reducing digital circuit power supply interference according to claim 1, characterized in that: The filter circuit of the filter module is located between the LDO voltage stabilization circuit and the digital circuit unit, wherein the filter circuit includes a resistor R and a capacitor C; One end of the resistor R is connected to the output end of the LDO voltage stabilizing circuit, the other end of the resistor R is connected to the digital circuit unit and connected to one end of the capacitor C, and the other end of the capacitor C is grounded.

3. The LDO filter circuit for reducing digital circuit power supply interference according to claim 1, characterized in that: The voltage stabilization module includes an LDO voltage stabilization circuit, wherein the LDO voltage stabilization circuit includes an operational amplifier A, a transistor VT1 and a voltage stabilization diode VD; Pin 2 of the operational amplifier A is connected to the cathode of the Zener diode VD and to the resistor R1 in parallel. The other end of the resistor R1 is connected to the capacitor C1 in parallel. The anode of the Zener diode VD is connected to the other end of the capacitor C1 and to ground. Pin 1 of the operational amplifier A is connected to the resistor R3. The other end of the resistor R3 is connected to the base of the transistor VT1 and to the resistor R2 in parallel. The other end of the resistor R2 is connected to the collector of the transistor VT1. The emitter of the transistor VT1 is connected to the resistor R4 and to the capacitor C2. Pin 3 of the operational amplifier A is connected to the resistor R5 and to the other end of the resistor R4. The other end of the resistor R5 is connected to the other end of the capacitor C2 and to ground.

4. The LDO filter circuit for reducing digital circuit power supply interference according to claim 1, wherein: The DC-DC boost circuit includes an inductor L, a transistor VT2 and a diode D; The collector of the transistor VT2 is connected to the inductor L and the anode of the diode D, the cathode of the diode D is connected to the capacitor C3 and the resistor R6, and the emitter of the transistor VT2 is connected to the other end of the capacitor C3 and the other end of the resistor R6.

5. The LDO filter circuit for reducing digital circuit power supply interference according to claim 1, characterized in that: The power supply of the analog circuit unit of the output module is provided by a power supply through the same DC-DC boost circuit and LDO voltage stabilization circuit. A filter circuit is connected between the output end of the analog circuit unit and the LDO voltage stabilization circuit.

6. The LDO filter circuit for reducing digital circuit power supply interference according to claim 1, characterized in that: The output end of the LDO voltage stabilizing circuit is connected to a capacitor C2 , and the output end of the DC-DC boost circuit is connected to a resistor R6 and a capacitor C3 .

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