Electronic component
By providing conductive bumps and cladding on the crystal back side of the semiconductor chip, the problem of reducing adsorption capacity caused by copper bumps is solved, and effective chip positioning and crystal positioning work are achieved.
Patent Information
- Application Number
- CN202422376321.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2024-09-23
- Filing Date
- 2024-09-29
- Publication Date
- 2025-08-26
- Estimated Expiration
- 2034-09-29
AI Technical Summary
The formation of copper bumps on the non-active surface of the semiconductor chip leads to a reduction in adsorption capacity, resulting in the problem of chip falling during crystallization operation.
A plurality of second conductive bumps are formed on the non-active surface of the semiconductor chip, and a flat cladding layer is covered around it. The crystallization operation is carried out through vacuum adsorption, and the cladding layer is used to ensure effective adsorption and avoid chip falling.
By providing conductive bumps and cladding on the crystal back side of the semiconductor chip, it is ensured that the mobile device can effectively adsorb and position the chip, avoid falling, and improve the success rate of crystal placement operations.
Smart Images
Figure CN223273275U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to a semiconductor device, particularly an electronic component. Background Art
[0002] With the rapid development of portable electronic products in recent years, various related products have gradually moved towards high density, high performance, lightness, thinness, shortness and smallness, and are moving towards heterogeneous integration. Various packaging processes have also been innovated accordingly. For this reason, 2.5D and 3D packaging structures have gradually emerged. At this time, the structure of semiconductor chips has become more and more complex, evolving from the original type of pure silicon on the back of the chip with circuits and solder bumps on the front of the chip to the current type of circuits and copper bumps on the back of the chip.
[0003] For example Figure 1 The semiconductor chip 10 shown has circuits and solder bumps 11 formed on its active surface 10 a and also has circuits and copper bumps 12 formed on its inactive surface 10 b.
[0004] However, during the subsequent wafer placement operation, when the bonding head 13 attempts to place the semiconductor chip 10 on the substrate, the copper bumps 12 formed on the inactive surface 10b of the semiconductor chip 10 cause the contact surface between the semiconductor chip 10 and the bonding head 13 to become smaller and have gaps, resulting in reduced adsorption capacity, and thus causing the semiconductor chip 10 to fall during the wafer placement operation.
[0005] Therefore, how to overcome the above-mentioned problems of the prior art has become a topic that needs to be solved urgently. Utility Model Content
[0006] In view of the various deficiencies of the above-mentioned prior art, the present application provides an electronic component, comprising: an electronic body having a first side and a second side opposite to each other; a plurality of first conductive bumps formed on the first side; a plurality of second conductive bumps formed on the second side; and a coating layer formed on the second side and covering the plurality of second conductive bumps, wherein the coating layer has a first surface and a second surface opposite to each other, the first surface being combined with the electronic body, and the second surface being a flat surface.
[0007] The present application also provides a method for manufacturing an electronic package, including: providing an electronic component, the electronic component including an electronic body, a plurality of first conductive bumps, a plurality of second conductive bumps and a coating layer, wherein the electronic body has a first side and a second side relative to each other, the plurality of first conductive bumps are formed on the first side, the plurality of second conductive bumps are formed on the second side, and the coating layer is formed on the second side and covers the plurality of second conductive bumps; thinning the coating layer, but the coating layer still covers the second conductive bumps, and the coating layer has a first surface and a second surface relative to each other, the first surface is combined with the electronic body, and the second surface is a flat surface; performing a die placement operation, joining the coating layer of the electronic component by a moving device to place the electronic component and electrically connect it to a circuit structure; and removing the coating layer to expose the plurality of second conductive bumps.
[0008] In the aforementioned method for manufacturing the electronic component and the electronic package, the electronic component further includes a circuit layer formed on the first side and the second side.
[0009] In the aforementioned method for manufacturing the electronic component and electronic package, the electronic component further includes a plurality of conductive through-holes formed in the electronic body.
[0010] In the aforementioned method for manufacturing the electronic component and electronic package, the electronic component further includes a plurality of conductive through-holes formed in the electronic body.
[0011] In the aforementioned method for manufacturing the electronic component and the electronic package, the moving device adsorbs and bonds the second surface of the covering layer of the electronic component in a vacuum adsorption manner.
[0012] In the aforementioned method for manufacturing the electronic component and the electronic package, the electronic component is subjected to a reflow process so as to be placed and electrically connected to the circuit structure through the plurality of first conductive bumps.
[0013] In the aforementioned methods for manufacturing electronic components and electronic packages, the coating layer is removed by high temperature during the reflow process, or by laser, water jet, or etching processes.
[0014] The aforementioned method for manufacturing the electronic component and the electronic package further includes: forming a plurality of conductive pillars on the circuit structure.
[0015] The aforementioned method for manufacturing the electronic component and the electronic package further includes: forming a packaging layer covering the electronic component on the circuit structure; and forming a wiring structure electrically connected to the electronic component on the packaging layer.
[0016] The aforementioned method for manufacturing the electronic component and the electronic package further includes: arranging an electronic module on the wiring structure.
[0017] Therefore, in the manufacturing method of the electronic components and electronic packages of the present application, a plurality of first conductive bumps and a plurality of second conductive bumps are mainly provided on both sides of the crystal surface and the crystal back of the electronic components, and a coating layer is formed around the plurality of second conductive bumps to encapsulate and cover the plurality of second conductive bumps. When the mobile device takes and places the electronic component by vacuum adsorption to perform the crystal placement operation, the coating layer not only covers the plurality of second conductive bumps, but also has a flat surface to ensure that the mobile device can effectively adsorb the electronic component by vacuum adsorption, thereby avoiding the problem in the prior art that, due to the formation of copper bumps on the crystal back of the semiconductor chip, the contact surface between the semiconductor chip and the robotic arm becomes smaller and has gaps, resulting in reduced adsorption capacity, and the semiconductor chip falls during the crystal placement operation. BRIEF DESCRIPTION OF THE DRAWINGS
[0018] Figure 1 A cross-sectional schematic diagram of a conventional semiconductor chip placement operation.
[0019] Figures 2A to 2E It is a cross-sectional schematic diagram of the manufacturing method of the electronic component and electronic package of the present application.
[0020] Description of Reference Numerals
[0021] 10 semiconductor chips
[0022] 10a Active surface
[0023] 10b Non-active surface
[0024] 11 Solder bumps
[0025] 12 copper bumps
[0026] 13 Robotic Arm
[0027] 2 Electronic packaging
[0028] 2a Electronic components
[0029] 20 Electronic entities
[0030] 20a First side
[0031] 20b Second side
[0032] 200 Conductive Perforation
[0033] 21 first conductive bump
[0034] 22 second conductive bump
[0035] 23 circuit layer
[0036] 24 cladding
[0037] 24a first surface
[0038] 24b Second surface
[0039] 25 Line structure
[0040] 250 conductive pillars
[0041] 26 Encapsulation Layer
[0042] 27 Wiring Structure
[0043] 28 Electronic Modules
[0044] 29 Conductive elements
[0045] 3 mobile devices. DETAILED DESCRIPTION
[0046] The following describes the implementation of the present application through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification.
[0047] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings attached to this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions for the implementation of this application. Therefore, they have no substantial technical significance. Any modification of the structure, change in the proportional relationship, or adjustment of the size should still fall within the scope of the technical content disclosed in this application without affecting the efficacy and purpose that can be achieved by this application. At the same time, terms such as "on", "first", "second", "one", etc. quoted in this specification are only for the convenience of description and are not used to limit the scope of the implementation of this application. Changes or adjustments in their relative relationships should also be regarded as the scope of the implementation of this application without substantially changing the technical content.
[0048] See also Figures 2A to 2E , which is a cross-sectional schematic diagram of the manufacturing method of the electronic component and electronic package of the present application.
[0049] like Figure 2A As shown, an electronic component 2a is provided, which includes an electronic body 20 having a first side 20a and a second side 20b opposite to each other, a plurality of first conductive bumps 21 formed on the first side 20a, a plurality of second conductive bumps 22 formed on the second side 20b, and a coating layer 24 coating the plurality of second conductive bumps 22.
[0050] The electronic component 2a may further include a circuit layer 23 formed on the first side 20a and the second side 20b, such that the first conductive bump 21 and the second conductive bump 22 are electrically connected to the circuit layer 23. In this embodiment, the electronic body 20 is a semiconductor chip having a plurality of conductive through-vias 200 formed therein, such that the conductive through-vias 200 are electrically connected to the first conductive bump 21 and the second conductive bump 22. The conductive through-vias 200 are, for example, through-silicon vias (TSVs).
[0051] The circuit layer 23 is, for example, a redistribution layer (RDL). The first conductive bumps 21 and the second conductive bumps 22 are metal pillars such as copper pillars.
[0052] The coating layer 24 is a polymer coating formed on the second side by coating and fills the space between the second conductive bumps 22 , so that the coating layer 24 encapsulates and covers the second conductive bumps 22 .
[0053] like Figure 2B As shown, the coating layer 24 is thinned by, for example, grinding, but the coating layer 24 still covers the second conductive bumps 22 without exposing the multiple second conductive bumps 22, wherein the coating layer 24 has a first surface 24a and a second surface 24b relative to each other, the first surface 24a is combined with the electronic body 20 (circuit layer 23), and the second surface 24b is a flat surface.
[0054] like Figure 2C As shown, a placement operation is performed, wherein the electronic component 2a is placed on a circuit structure 25 by a moving device 3 such as a robotic arm. A plurality of conductive pillars 250 may be formed on the circuit structure 25.
[0055] The moving device 3 is adsorbed and adhered to the second surface 24b of the coating layer 24 of the electronic component 2a by vacuum adsorption, wherein the coating layer 24 not only covers the multiple second conductive bumps 22, but also its second surface 24b is a flat surface, to ensure that the moving device 3 can effectively adsorb the electronic component 2a by vacuum adsorption, thereby avoiding the problem of electronic components falling during the wafer placement operation.
[0056] like Figure 2D As shown, the electronic component 2a is placed and electrically connected to the circuit structure 25 through the plurality of first conductive bumps 21 through a reflow process, and the coating layer 24 is removed by the high temperature during the reflow process to expose the plurality of second conductive bumps 22.
[0057] In addition, in other embodiments, the cladding layer 24 may be removed by a process such as laser, water jet, or etching to expose the plurality of second conductive bumps 22 .
[0058] like Figure 2E As shown, a packaging layer 26 is then formed on the circuit structure 25 to cover the electronic component 2a and multiple conductive pillars 250; a wiring structure 27 is formed on the packaging layer 26 to electrically connect the electronic component 2a and the multiple conductive pillars 250; an electronic module 28 is set on the wiring structure 27; and multiple conductive elements 29 are implanted on the other side of the circuit structure 25 opposite to the electronic component 2a to obtain an electronic package 2.
[0059] The electronic module 28 is, for example, a semiconductor chip or a package structure. The wiring structure 27 is electrically connected to the electronic component 2 a through the plurality of second conductive bumps 22 .
[0060] From the above, it can be seen that in the manufacturing method of the electronic components and electronic packages of the present application, a plurality of first conductive bumps and a plurality of second conductive bumps are respectively provided on both sides of the crystal surface and the crystal back of the electronic components, and a coating layer is formed around the plurality of second conductive bumps to encapsulate and cover the plurality of second conductive bumps. When the mobile device takes and places the electronic component by vacuum adsorption to perform the crystal placement operation, the coating layer not only covers the plurality of second conductive bumps, but also has a flat surface to ensure that the mobile device can effectively adsorb the electronic component by vacuum adsorption, thereby avoiding the problem in the prior art that, due to the formation of copper bumps on the crystal back of the semiconductor chip, the contact surface between the semiconductor chip and the robotic arm becomes smaller and has gaps, resulting in reduced adsorption capacity, and the semiconductor chip falls during the crystal placement operation.
[0061] The above embodiments are intended to illustrate the principles and effects of this application and are not intended to limit this application. Those skilled in the art may modify the above embodiments without departing from the spirit and scope of this application. Therefore, the scope of protection of this application shall be as set forth in the claims.
Claims
1. An electronic component, characterized in that: include: an electronic body having a first side and a second side opposite to each other; a plurality of first conductive bumps formed on the first side; a plurality of second conductive bumps formed on the second side; as well as The cladding layer is formed on the second side and covers the plurality of second conductive bumps, wherein the cladding layer has a first surface and a second surface opposite to each other, the first surface is combined with the electronic body, and the second surface is a flat surface.
2. The electronic component according to claim 1, wherein The electronic component further includes a circuit layer formed on the first side and the second side.
3. The electronic component according to claim 2, wherein This circuit layer is a circuit redistribution layer.
4. The electronic component according to claim 1, wherein The electronic component also includes a plurality of conductive through-holes formed in the electronic body.
5. The electronic component according to claim 4, wherein The conductive via is a conductive silicon via.
6. The electronic component according to claim 1, wherein The second surface is used for engaging with a mobile device.
7. The electronic component according to claim 6, wherein The moving device adsorbs and joins the second surface of the covering layer of the electronic component in a vacuum adsorption manner.