Test fixture

Abstract

The utility model provides a test fixture, and relates to the technical field of circuit detection, the test fixture comprises a mainboard, a substrate and a pedestal, a bonding pad is formed on the mainboard, a test hole is formed in the substrate, an accommodating chamber is arranged in the pedestal, a plurality of electric connectors are arranged in the accommodating chamber in an array manner, an IC is crimped in the accommodating chamber, and the IC is arranged in the accommodating chamber. The IC is electrically connected with a bonding pad of the mainboard and a test hole of the substrate through a plurality of electric connectors so as to form a signal transmission path and a signal test contact point; the mainboard is further used for being connected with a system, and different test scripts are operated through the system so as to carry out compatible adaptation tests on ICs of the same type and different models in the containing cavity. Signals respectively flow to the test hole and the mainboard through the electric connector. Signal testing can be carried out when signals are transmitted to the testing holes; after the signal is transmitted to the mainboard, a system of the mainboard runs different test scripts, ICs of the same type and different models are replaced, compatible adaptation testing is carried out, and signal testing and compatible adaptation can be achieved at the same time.

Description

Technical Field

[0001] The present application relates to the field of circuit testing technology, and in particular to a test fixture. Background Art

[0002] Due to the ever-changing influence of Moore's Law, the switching speed of electronic circuits is now faster than before, and the signal transmission rate is constantly increasing. Therefore, the testing of its signals and the compatibility and adaptation of chips have become more important. For example, the current DRAM (Dynamic Random Access Memory) rate has increased from 200MT / s of DDR1 (first-generation double-bit synchronous dynamic random access memory) to 8400MT / s of DDR5 (fifth-generation double-bit synchronous dynamic random access memory).

[0003] Traditional testing methods use soldered probes or interposers to test DRAM compatibility using single-rank DIMMs (Dual-Inline-Memory-Modules). Currently, it's impossible to perform both signal testing and compatibility testing on a single DIMM. Utility Model Content

[0004] The purpose of the embodiments of the present application is to provide a test fixture that can achieve signal testing while taking into account compatibility and adaptation.

[0005] In one aspect of an embodiment of the present application, a test fixture is provided, including a mainboard, a substrate and a base, wherein solder pads are formed on the mainboard, test holes are formed on the substrate, a accommodating chamber is provided in the base, a plurality of electrical connectors are arrayed in the accommodating chamber, an IC is crimped in the accommodating chamber, and the IC is electrically connected to the solder pads of the mainboard and the test holes of the substrate through the plurality of electrical connectors to form a signal transmission path and a signal test contact point; the mainboard is also used to connect to a system, and different test scripts are run through the system to perform compatibility adaptation tests on the ICs of the same type and different models in the accommodating chamber.

[0006] The test holes serve as signal test contact points, enabling signal testing. The test fixture is soldered to a double-rank DIMM strip through the substrate, performing double-sided soldering on both sides. Once the test holes and the double-rank DIMM strip are connected, testing can begin. When the signal is transmitted to the motherboard, the motherboard's system runs different test scripts to perform IC benchmarking and initialization verification. By replacing ICs of the same type or different models, compatibility and adaptation testing can be achieved. The test fixture thus simultaneously implements compatibility adaptation and signal testing.

[0007] Optionally, the electrical connector includes an elastic probe or a conductive tape.

[0008] Optionally, a retractable clip is provided on a side of the base facing the IC for fixing the IC.

[0009] Optionally, the test hole is located on one side of the substrate, and the test hole is used to connect a probe of an oscilloscope to perform signal testing.

[0010] Optionally, solder balls are formed on a surface of the substrate facing the mainboard, and the electrical connector is electrically connected to the pads of the mainboard via the solder balls.

[0011] Optionally, the electrical connector is electrically connected to the test hole and the solder ball via a wire, and the characteristic impedance of the material of the wire is designed to be 50 ohms to 100 ohms.

[0012] Optionally, the solder pads on the mainboard correspond one-to-one to the solder balls and the electrical connectors.

[0013] Optionally, the base and the substrate are connected via a welding layer, or are fixed by crimping with the elastic probe.

[0014] Optionally, the mainboard and the base are connected via a welding layer.

[0015] Optionally, the characteristic impedance of the materials of the mainboard, the substrate, the base and the electrical connector is 50 ohms to 100 ohms.

[0016] The test fixture provided in the embodiment of the present application has a accommodating chamber provided in the base, and a plurality of electrical connectors arranged in an array in the accommodating chamber, wherein the IC is crimped into the accommodating chamber; the electrical connector is also connected to the test hole of the substrate below the base, and the test hole serves as a signal test contact point for performing signal testing. A soldering pad is formed on the mainboard below the substrate, and the electrical connector and the soldering pad are connected. After the IC is crimped onto the base, the IC and the electrical connector in the base are connected, and the signal flows through the electrical connector to the test hole of the substrate and the solder ball below, respectively, and the solder ball is connected to the solder pad of the mainboard; after the signal transmission path is formed in this way, when the signal is transmitted to the test hole, the signal test can be performed through the test hole; the test fixture is soldered to a double-rank (double-sided particle) DIMM strip through the substrate, and when double-sided soldering is performed on the front and back sides, the test hole and the double-rank DIMM strip can be connected, realizing the double-rank signal testing function. After the signal is transmitted to the mainboard, different test scripts are run through the mainboard system, and the same type or different model ICs are replaced, and compatibility adaptation testing can also be performed. The test fixture provided in the embodiment of the present application can realize signal testing while taking into account compatibility and adaptation to meet the testing requirements of different scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for use in the embodiments of the present application. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without creative work.

[0018] Figure 1 Schematic diagram of the test fixture structure provided in this embodiment;

[0019] Figure 2 This is a schematic diagram of the manufacturing process of the mainboard of the test fixture provided in this embodiment.

[0020] Icons: 10-mainboard; 100-solder pad; 11-substrate; 110-test hole; 12-base; 120-accommodating chamber; 121-clip; 13-electrical connector; 20-IC; D-first direction. DETAILED DESCRIPTION

[0021] The technical solutions in the embodiments of the present application will be described clearly and completely below in conjunction with the drawings in the embodiments of the present application.

[0022] In the description of this application, it should be noted that the terms "inner" and "outer" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, or the orientations or positional relationships in which the product of this application is typically placed when in use. These terms are intended solely to facilitate the description of this application and simplify the description, and are not intended to indicate or imply that the device or element referred to must have a specific orientation, be constructed, or operate in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first" and "second" and the like are used solely for distinction and should not be construed as indicating or implying relative importance.

[0023] It should also be noted that, unless otherwise expressly specified or limited, the terms "disposed" and "connected" should be understood broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to direct connections, indirect connections through an intermediate medium, or internal connections between two components. Those skilled in the art will understand the specific meanings of these terms in this application based on the specific circumstances.

[0024] Traditional fixtures have the following main problems: first, testing requires soldering probes or interposers; second, they use single-rank DIMMs for DRAM compatibility adaptation but do not have signal testing capabilities.

[0025] In view of this, in order to solve the above problems, an embodiment of the present application provides a test fixture that can be used for signal testing of IC (integrated circuit) 20, and takes into account the compatibility adaptation testing of IC20 of the same type and different models. Specific test application scenarios include but are not limited to DRAM.

[0026] Figure 1 This is a schematic diagram of the test fixture structure provided in this embodiment. For details, please refer to Figure 1 As shown, the test fixture includes a mainboard 10, a substrate 11 and a base 12. A solder pad 100 is formed on the mainboard 10, a test hole 110 is formed on the substrate 11, and a accommodating chamber 120 is provided in the base 12. A plurality of electrical connectors 13 are arrayed in the accommodating chamber 120. The IC20 is crimped in the accommodating chamber 120. The IC20 is electrically connected to the solder pad 100 of the mainboard 10 and the test hole 110 of the substrate 11 through the plurality of electrical connectors 13 to form a signal transmission path and a signal test contact point. The mainboard 10 is also used to connect to the system, and different test scripts are run by the system to realize compatibility adaptation testing of IC20 of the same type and different models in the accommodating chamber 120.

[0027] In the test fixture of the present application, the main board 10 is located at the bottom layer, and solder pads 100 are formed on the main board 10; for example, the main board 10 can be a PCB printed circuit board.

[0028] A substrate 11 is arranged above the mainboard 10, and solder balls are formed below the substrate 11, that is, on the side of the substrate 11 facing the mainboard 10. The solder balls can be BGA (Ball Grid Array) solder balls. The electrical connector 13 in the accommodating cavity 120 of the base 12 is electrically connected to the solder pad 100 of the mainboard 10 through the solder balls.

[0029] Further, from Figure 1 It can be seen that an array of solder pads 100 is provided on the mainboard 10, and the solder pads 100 are arranged in a rectangular array; correspondingly, the electrical connectors 13 provided in the accommodating chamber 120 of the base 12 are also arranged in a rectangular array, and the solder balls are also arranged in a rectangular array below the substrate 11. The solder pads 100 on the mainboard 10 correspond one-to-one to the solder balls and the electrical connectors 13 to improve the accuracy of signal testing.

[0030] In other embodiments, the solder pads 100, solder balls, and electrical connectors 13 may be arranged in arrays in other shapes, such as diamonds or circles. The shape of the array arrangement is primarily adapted to the shape of the IC 20. When the shape of the IC 20 changes, the base 12, substrate 11, and motherboard 10 may also be adapted to match the shape of the IC 20.

[0031] A base 12 is provided above the substrate 11. The base 12 and the substrate 11 can be fixed by welding or crimping with an elastic probe. When the two are welded, a welding layer is formed at the connection between the two. When the two are crimped, an elastic probe can be used to pass through the base 12 and the substrate 11 to crimp and fix the two.

[0032] In addition, after the substrate 11 and the base 12 are fixedly connected into one, the mainboard 10 and the base 12 are also fixed by welding for precise positioning, thereby fixing the base 12, the substrate 11 and the mainboard 10 to form the test fixture of the present application.

[0033] A receiving chamber 120 is formed on the base 12. The receiving chamber 120 is a recessed structure formed on the base 12. A plurality of electrical connectors 13 are arranged in an array in the receiving chamber 120. The electrical connectors 13 are used to connect the IC 20, the base 12, the substrate 11 and the mainboard 10 for signal testing.

[0034] In the example of this application, electrical connector 13 can be a probe or conductive tape. When a probe is used as electrical connector 13, the probe head should be elastic to ensure better contact with substrate 11, i.e., an elastic probe. The material of base 12 should be easy to process, solder-resistant, and suitable for characteristic impedance design.

[0035] The IC 20 to be tested is located above the base 12. The IC 20 is placed in the receiving chamber 120 of the base 12 so that the IC 20 contacts the electrical connector 13. The electrical connector 13 passes through the base 12 and the substrate 11 and contacts the solder balls below the substrate 11. The solder balls then contact the pads 100 on the mainboard 10, thereby forming a signal transmission path that passes through the IC 20, the electrical connector 13, the solder balls, and the mainboard 10 in sequence.

[0036] Compared with the welding method in the prior art, the IC20 of the present application is pressed into the accommodating chamber 120, and the IC20 of the same type or different models can be replaced to achieve compatible adaptation testing.

[0037] A test hole 110 is formed on the substrate 11 . The signal flows to the test hole 110 after passing through the electrical connector 13 . The test hole 110 serves as a signal test contact point. Signal testing can be performed through the test hole 110 .

[0038] In this example, test hole 110 is located on the side of substrate 11. This hole is used to connect an oscilloscope probe for signal testing. Once the signal reaches test hole 110, the oscilloscope probe is connected to test hole 110 to establish continuity, allowing for signal and power integrity testing.

[0039] Because the test fixture of this application can perform signal testing through test holes 110, the test fixture is soldered to a double-rank (double-sided chip) DIMM strip through substrate 11. When the test fixture is soldered on both sides, the test holes 110 and the double-rank DIMM strip are connected, thus realizing the double-rank signal testing function. In contrast, traditional fixtures do not form test holes 110 similar to the test holes 110 of this application. Therefore, traditional fixtures can only rely on clicking the vias (conductive holes) on the back of the DIMM strip to perform signal integrity testing, and cannot realize the double-rank signal testing of this application.

[0040] On the other hand, when the signal reaches the solder ball of the substrate 11 and is connected to the mainboard 10, the system of the mainboard 10 can perform running tests and initialization verification on IC20 by running different test scripts, and perform compatibility adaptation tests by replacing IC20 of the same type or different models, thereby realizing the functions of compatibility adaptation and testing at the same time.

[0041] Thus, the test fixture provided in the embodiment of the present application has a housing chamber 120 provided within the base 12. A plurality of electrical connectors 13 are arrayed within the housing chamber 120, and an IC 20 is crimped into the housing chamber 120. The electrical connectors 13 are also connected to the test holes 110 of the substrate 11 below the base 12. A solder pad 100 is formed on the mainboard 10 below the substrate 11, and the electrical connectors 13 are connected to the solder pad 100. After the IC 20 is crimped onto the base 12, electrical conduction is established between the IC 20 and the electrical connectors 13 within the base 12. Signals flow through the electrical connectors 13 to the test holes 110 of the substrate 11 and to the solder balls below. The solder balls are then connected to the solder pads 100 on the mainboard 10.

[0042] In this way, after the signal transmission path is formed, when the signal is transmitted to the test hole 110 serving as the signal test contact point, the signal test can be performed through the test hole 110; when the test hole 110 is welded to a double-rank (double-sided particle) DIMM strip and double-sided welding is performed on the front and back sides, the test hole 110 and the double-rank DIMM strip can be connected, realizing the double-rank signal testing function. After the signal is transmitted to the motherboard 10, different test scripts can be run through the system of the motherboard 10, and the same type or different model IC20 can be replaced. Compatibility adaptation testing can also be performed, which can achieve signal testing while taking into account compatibility adaptation to meet the testing needs of different scenarios.

[0043] On this basis, a retractable clip 121 is provided on a side of the base 12 facing the IC 20 for fixing the IC 20 .

[0044] For example, Figure 1The projections of the substrate 11 and the base 12 in the first direction D of the present application are both rectangular; the four corners of the rectangular base 12 are respectively provided with retractable clips 121. When the IC20 is crimped into the accommodating chamber 120 of the base 12, the IC20 can be pressed by the clips 121, so that it can be in good contact with the electrical connector 13 in the accommodating chamber 120, thereby realizing stable signal transmission.

[0045] The clip 121 is retractable along the first direction D, which makes it easy to adapt to ICs 20 of the same type but different models, so that the sizes of ICs 20 of different models match the clip 121, making it convenient for the clip 121 to press ICs 20 of different models.

[0046] As mentioned above, when the signal is transmitted, it passes through the electrical connector 13 to the test hole 110, the solder ball and the mainboard 10 in sequence. Therefore, the electrical connector 13 and the test hole 110, and the electrical connector 13 and the solder ball can be electrically connected by wires, and the solder ball and the pad 100 of the mainboard 10 are in direct contact and conduction. In order to achieve stable signal transmission, the characteristic impedance of the material of the wire is 50 ohms to 100 ohms.

[0047] The material of the conductor that meets this requirement is usually copper. The characteristic impedance of the conductor is determined based on factors such as the dk value (dielectric constant), line width, etching, etc. of the mainboard 10 board, and can be selected according to specific needs.

[0048] Generally, the specific value of characteristic impedance varies depending on the signal type. For example, when the signal is a clock signal, its differential impedance is 100 ohms, and single-ended impedance is 50 ohms. For DDR trace DQ signals, 50 ohms to 55 ohms at the chip end is usually more reasonable; and DQS differential signals are usually 75 ohms.

[0049] In addition, the materials of the mainboard 10 , the substrate 11 , the base 12 and the electrical connector 13 all meet the requirement of a characteristic impedance of 50 ohms to 100 ohms.

[0050] Specifically, the base 12 can be made of aluminum alloy or other synthetic materials. For DDR (Double Data Rate; DDR SDRAM = Double Data Rate Synchronous Dynamic Random Access Memory), the substrate 11 can be made of FR4 (a flame retardant grade) for cost considerations. Probes are typically made of gold-plated beryllium copper. Conductive tape typically consists of a conductive layer (composed of metal powders or particles such as silver, nickel, and copper), an adhesive layer (for bonding, which may be based on a hot-melt or pressure-sensitive polymer such as acetic acrylate), and a base material (for insulation, typically polyester film or polyimide film).

[0051] The above materials can all meet the characteristic impedance requirement of 50 ohms to 100 ohms. Other materials can also be selected according to the situation when they meet the characteristic impedance requirement.

[0052] The test fixture of this application can create a full-link simulation of the test hole 110 of the electrical connector 13 to the substrate 11 and the pad 100 of the mainboard 10 in order to design the mainboard 10 and perform accurate testing. Figure 2 The design process can produce a motherboard 10 that meets the requirements.

[0053] Figure 2 This is a schematic diagram of the manufacturing process of the motherboard 10 of the test fixture provided in this embodiment. Specifically, refer to Figure 2 As shown, the manufacturing process of the motherboard 10 includes:

[0054] Step 200 : Selecting materials for the electrical connector 13 , the base 12 , and the substrate 11 .

[0055] As mentioned above, the material selection for each of the above components requires that the characteristic impedance of the material be 50 ohms to 100 ohms. After the material selection for the above components meets the characteristic impedance requirement, step 201 is executed.

[0056] Step 201: Design the mainboard 10.

[0057] Step 201 specifically includes designing the schematic diagram of the mainboard 10 and designing the structure of the mainboard 10, and requiring the routing to meet the characteristic impedance requirement of 50 ohms to 100 ohms; when designing the structure of the mainboard 10, pads 100 are designed on both sides of the mainboard 10, and the pads 100 correspond to the DRAM pads on the IC20, so that signal transmission from the DRAM pad of the IC20 to the electrical connector 13 to the mainboard 10 pad 100 and the test hole 110 of the substrate 11 can be carried out.

[0058] Step 202: Building links from the electrical connector 13 to the test hole 110 and the electrical connector 13 to the solder pad 100 of the mainboard 10, and performing simulation.

[0059] Step 203: Determine characteristic impedance matching.

[0060] Use the simulation interface to check whether the characteristic impedance simulation meets the requirement of characteristic impedance of 50 ohms to 100 ohms.

[0061] When the characteristic impedance meets the requirement, step 204 is executed.

[0062] Step 204 : Make the main board 10 .

[0063] The mainboard 10 that meets the design requirements is plated and manufactured using SMT (Surface Mount Technology).

[0064] When the characteristic impedance does not meet the requirements, it is necessary to find out the mismatch factors. The mismatch factors can be addressed from two aspects: the selection of materials for the electrical connector 13 , the base 12 , and the substrate 11 , or the design of the mainboard 10 .

[0065] Specifically, step 205: mismatch caused by material selection.

[0066] If the problem is the material selection of the electrical connection body 13 , the base 12 , and the substrate 11 , then the process returns to step 200 after step 205 to reselect the materials of the electrical connection body 13 , the base 12 , and the substrate 11 .

[0067] If the problem is not the material selection of the electrical connector 13 , the base 12 , or the substrate 11 , it can be determined to be a design problem of the mainboard 10 , and step 206 is executed.

[0068] Step 206: Simulation optimization of the mainboard 10.

[0069] Perform simulation optimization on the motherboard 10, then return to step 202 through step 206, and then press Figure 2 The above corresponding steps are performed in the process until the characteristic impedance requirement of 50 ohms to 100 ohms is met, and finally the required mainboard 10 is manufactured.

[0070] The motherboard 10 and test fixture obtained through the above process can meet the test requirements and achieve accurate testing. The test fixture of the present application can realize the signal testing function through the test hole 110, and can also run different test scripts through the system of the motherboard 10. By replacing the same type and different models of IC20, compatibility adaptation testing can be performed, so that the test fixture of the present application can realize signal integrity testing and take into account the compatibility adaptation testing of the same type and different models of IC20, thereby meeting the test requirements of different scenarios.

[0071] The above description is merely an embodiment of the present application and is not intended to limit the scope of protection of the present application. For those skilled in the art, various modifications and variations of the present application are possible. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A test fixture, characterized in that: include: A mainboard (10), a substrate (11) and a base (12); a soldering pad (100) is formed on the mainboard (10); a test hole (110) is formed on the substrate (11); a receiving chamber (120) is provided in the base (12); a plurality of electrical connectors (13) are arrayed in the receiving chamber (120); an IC (20) is crimped in the receiving chamber (120); the IC (20) is electrically connected to the soldering pad (100) of the mainboard (10) and the test hole (110) of the substrate (11) through the plurality of electrical connectors (13) to form a signal transmission path and a signal test contact point; the mainboard (10) is also used to connect to a system, and different test scripts are run through the system to perform compatibility adaptation tests on the ICs (20) of the same type and different models in the receiving chamber (120).

2. The test fixture according to claim 1, characterized in that: The electrical connector (13) comprises an elastic probe or a conductive tape.

3. The test fixture according to claim 1, wherein: A retractable clip (121) is provided on one side of the base (12) facing the IC (20) for fixing the IC (20).

4. The test fixture according to any one of claims 1 to 3, characterized in that: The test hole (110) is located on one side of the substrate (11), and the test hole (110) is used to connect a probe of an oscilloscope to perform signal testing.

5. The test fixture according to claim 1, wherein: A solder ball is also formed on a side of the substrate (11) facing the main board (10), and the electrical connector (13) is electrically connected to the solder pad (100) of the main board (10) via the solder ball.

6. The test fixture according to claim 5, characterized in that: The electrical connection body (13), the test hole (110), and the solder ball are electrically connected via a wire, and the characteristic impedance of the material of the wire is 50 ohms to 100 ohms.

7. The test fixture according to claim 5 or 6, characterized in that: The solder pads (100) on the mainboard (10) correspond one to one with the solder balls and the electrical connectors (13).

8. The test fixture according to any one of claims 1 to 3, characterized in that: The base (12) and the substrate (11) are connected via a welding layer or fixed by crimping with an elastic probe.

9. The test fixture according to any one of claims 1 to 3, characterized in that: The mainboard (10) and the base (12) are connected via a welding layer.

10. The test fixture according to claim 1, wherein: The characteristic impedance of the materials of the mainboard (10), the substrate (11), the base (12) and the electrical connector (13) are all 50 ohms to 100 ohms.

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