Circuit board and electronic equipment

Abstract

The utility model discloses a circuit board and electronic equipment, and belongs to the technical field of electronic products. The circuit board comprises a plurality of conducting layers and a plurality of insulating medium layers. The hollow area is arranged in the second conductive layer, and the orthographic projection of the at least one signal line on the target plane is located in the orthographic projection of the hollow area on the target plane, so that the at least one signal line can be overlapped with the conductive layer located on the side, away from the first conductive layer, of the second conductive layer in the circuit board. Therefore, even if the distance between two adjacent conducting layers in the circuit board is reduced due to the fact that the circuit board is thinned, it can be guaranteed that the distance between at least one signal line and the conducting layer arranged on the side, away from the first conducting layer, of the second conducting layer is large by arranging the hollowed-out area corresponding to the at least one signal line on the second conducting layer; the impedance of the at least one signal line is increased, so that the impedance of the at least one signal line can be matched with the impedance of other parts in the system, and the quality of transmitted signals is better.

Description

Technical Field

[0001] The present application relates to the technical field of electronic products, and in particular to a circuit board and an electronic device. Background Art

[0002] With the advancement of technology, the need to transmit signals in electronic devices is becoming more and more frequent. As the core component of electronic products, circuit boards are not only the physical base for various electronic components, supporting the orderly arrangement of components such as chips, resistors, and capacitors, but also serve as the bridge for electrical connections between these components to achieve signal transmission.

[0003] Circuit boards typically consist of stacked conductive and insulating layers, with signal lines embedded within the conductive layers. The distance between a signal line and its adjacent conductive layer typically affects the impedance of the signal line. With other parameters remaining constant, the smaller the distance between the signal line and its adjacent conductive layer, the lower the signal line impedance. To ensure good signal quality, the impedance of the signal line must be aligned with that of other components in the system, such as the driver and receiver.

[0004] However, as electronic products become increasingly lightweight, circuit boards are becoming thinner. This reduces the distance between signal lines and adjacent conductive layers, which in turn reduces the impedance of the signal lines. Consequently, the impedance of the signal lines may not match the impedance of other parts of the system, resulting in poor signal quality. Utility Model Content

[0005] The present invention provides a circuit board and electronic device. The present invention can solve the problem of poor signal quality of signal lines in the prior art. The technical solution is as follows:

[0006] In one aspect, a circuit board is provided, comprising:

[0007] Multiple conductive layers and multiple insulating dielectric layers;

[0008] The multiple conductive layers and the multiple insulating dielectric layers are stacked and alternately arranged;

[0009] The multi-layer conductive layer includes: a first conductive layer, and a second conductive layer disposed adjacent to the first conductive layer and located on at least one side of the first conductive layer, wherein the second conductive layer has a hollow area;

[0010] The first conductive layer includes: at least one signal line, the orthographic projection of the at least one signal line on a target plane is located within the orthographic projection of the hollow area on the target plane, and the target plane is a plane parallel to the circuit board.

[0011] Optionally, in an extension direction perpendicular to the signal line, a width of the hollow area is greater than a distribution width of the at least one signal line.

[0012] Optionally, in a direction perpendicular to the extension of the signal line, a difference between a width of the hollow area and a distribution width of the at least one signal line is 0.5 to 1.5 times the width of a single signal line.

[0013] Optionally, when there are multiple signal lines of the at least one signal line, the orthographic projection of the gap between any two adjacent signal lines on the target plane is located within the orthographic projection of the hollow area on the target plane.

[0014] Optionally, when the first conductive layer and the second conductive layer are respectively two adjacent conductive layers distributed on the outermost sides of the multi-layer conductive layer, the circuit board further includes: an electromagnetic shielding layer, the electromagnetic shielding layer being located on a side of the first conductive layer and the second conductive layer facing away from other conductive layers in the multi-layer conductive layer;

[0015] The orthographic projection of the at least one signal line on the target plane is located within the orthographic projection of the electromagnetic shielding layer on the target plane.

[0016] Optionally, the multilayer insulating dielectric layer includes: a first insulating dielectric layer and a second insulating dielectric layer, the first insulating dielectric layer is located between the first conductive layer and the second conductive layer, and the second insulating dielectric layer is located on a side of the first insulating dielectric layer facing away from other insulating dielectric layers in the multilayer insulating dielectric layer;

[0017] The electromagnetic shielding layer is located on a side of the second insulating dielectric layer facing away from the first insulating dielectric layer.

[0018] Optionally, the first conductive layer is closer to the electromagnetic shielding layer than the second conductive layer, or the second conductive layer is closer to the electromagnetic shielding layer than the first conductive layer.

[0019] Optionally, the multi-layer conductive layer further includes: a third conductive layer, the third conductive layer being located on a side of the first conductive layer and the second conductive layer away from the electromagnetic shielding layer;

[0020] The orthographic projection of the at least one signal line on the target plane is located within the orthographic projection of the third conductive layer on the target plane.

[0021] Optionally, when the first conductive layer and the second conductive layer are two adjacent conductive layers distributed in the middle of the multi-layer conductive layer, the multi-layer conductive layer further includes: a fourth conductive layer and a fifth conductive layer, and the first conductive layer and the second conductive layer are both distributed between the fourth conductive layer and the fifth conductive layer;

[0022] The orthographic projection of the at least one signal line on the target plane is located within the orthographic projection of the fourth conductive layer on the target plane, and is also located within the orthographic projection of the fifth conductive layer on the target plane.

[0023] On the other hand, an electronic device is provided, comprising: a housing, and a circuit board located in the housing, wherein the circuit board is any of the circuit boards described above.

[0024] The beneficial effects of the technical solutions provided in the embodiments of the present application include at least:

[0025] A circuit board comprises multiple conductive layers and multiple insulating dielectric layers. By providing a hollow region in the second conductive layer and positioning the orthographic projection of at least one signal line on a target plane within the orthographic projection of the hollow region on the target plane, the at least one signal line no longer overlaps the second conductive layer, but instead overlaps with a conductive layer on the side of the second conductive layer facing away from the first conductive layer. Thus, even if the circuit board becomes thinner, resulting in a decrease in the distance between two adjacent conductive layers, the hollow region corresponding to the at least one signal line in the second conductive layer can ensure a greater distance between the at least one signal line and the conductive layer on the side of the second conductive layer facing away from the first conductive layer. This reduces the capacitance between the at least one signal line and the conductive layer on the side of the second conductive layer facing away from the first conductive layer, thereby increasing the impedance of the at least one signal line and matching the impedance of other components of the system (such as a driver and a receiver), thereby improving the quality of the transmitted signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0027] Figure 1 It is a cross-sectional view of a circuit board;

[0028] Figure 2 is a cross-sectional view of a circuit board provided in an embodiment of the present application;

[0029] Figure 3 is a cross-sectional view of another circuit board provided in an embodiment of the present application;

[0030] Figure 4 is a cross-sectional view of another circuit board provided in an embodiment of the present application;

[0031] Figure 5 is a cross-sectional view of another circuit board provided in an embodiment of the present application;

[0032] Figure 6 is a cross-sectional view of a circuit board provided in another embodiment of the present application;

[0033] Figure 7 This is a cross-sectional view of another circuit board provided in another embodiment of the present application. DETAILED DESCRIPTION

[0034] In order to make the objectives, technical solutions and advantages of this application clearer, the implementation methods of this application will be further described in detail below with reference to the accompanying drawings.

[0035] Please refer to Figure 1 , Figure 1 The circuit board 00 may include multiple conductive layers 10 and multiple insulating dielectric layers 20 .

[0036] In the present application, multiple conductive layers 10 and multiple insulating dielectric layers 20 are stacked and alternately arranged. That is, one insulating dielectric layer 20 can be distributed between any two adjacent conductive layers 10, and one conductive layer 10 can be distributed between any two adjacent insulating dielectric layers 20.

[0037] The multi-layer conductive layer 10 in the circuit board 00 may include: a first conductive layer 11 , and a second conductive layer 12 disposed adjacent to the first conductive layer 11 and located on both sides of the first conductive layer 11 .

[0038] The first conductive layer 11 in the multi-layer conductive layer 10 may include a signal line 111. Here, the orthographic projection of the signal line 111 on the target plane (ie, a plane parallel to the circuit board 00) is located within the orthographic projection of the second conductive layer 12 on the target plane.

[0039] However, as current electronic products become thinner and lighter, the multi-layer structure of the circuit board 00 becomes more compact, resulting in the circuit board 00 in electronic devices becoming thinner. As the circuit board 00 becomes thinner, the distance between two adjacent conductive layers 10 in the circuit board 00 decreases, which in turn reduces the distance between the signal line 111 in the first conductive layer 11 and the adjacent second conductive layer 12.

[0040] Furthermore, with other parameters remaining unchanged, a decrease in the distance between the signal line 111 and the adjacent second conductive layer 12 will increase the capacitance between the signal line 111 and the adjacent second conductive layer 12, thereby reducing the impedance of the signal line 111. When the impedance of the signal line 111 decreases, the impedance of the signal line 111 will not match the impedance of other components in the system (such as the driver and receiver), causing reflections or distortion during signal transmission, thereby affecting the quality of signal transmission.

[0041] Please refer to Figure 2 , Figure 2 This is a cross-sectional view of a circuit board provided in an embodiment of the present application. Circuit board 000 may include: a multi-layer conductive layer 100 and a multi-layer insulating dielectric layer 200. It should be noted that the multi-layer conductive layer 100 in circuit board 000 typically has four or more layers. Therefore, the multi-layer insulating dielectric layer 200 in circuit board 000 typically has five or more layers.

[0042] In the present application, multiple conductive layers 100 and multiple insulating dielectric layers 200 are stacked and alternately arranged. That is, one insulating dielectric layer 200 can be distributed between any two adjacent conductive layers 100, and one conductive layer 100 can be distributed between any two adjacent insulating dielectric layers 200.

[0043] In this case, the insulating dielectric layer 200 located between two adjacent conductive layers 100 in the circuit board 000 can be used to provide necessary electrical isolation for the two adjacent conductive layers 100, preventing current from flowing between the conductive layers 100 that should not be connected, thereby ensuring the normal operation of the circuit board 000.

[0044] In the embodiments of this application, Figure 2 As shown, the multi-layer conductive layer 100 in the circuit board 000 may include: a first conductive layer 101, and a second conductive layer 102 disposed adjacent to the first conductive layer 101 and located on at least one side of the first conductive layer 101. The second conductive layer 102 has a hollow area K1.

[0045] The first conductive layer 101 in the multilayer conductive layer 100 may include at least one signal line 1011. Here, the at least one signal line 1011 in the first conductive layer 101 may be a differential signal line for transmitting high-frequency signals. The orthographic projection of the at least one signal line 1011 on the target plane lies within the orthographic projection of the hollowed-out area K1 on the target plane. The target plane is a plane parallel to the circuit board 000.

[0046] In this case, by setting a hollow area K1 in the second conductive layer 102 and allowing the orthographic projection of at least one signal line 1011 on the target plane to be located within the orthographic projection of the hollow area K1 on the target plane, at least one signal line 1011 will no longer overlap with the second conductive layer 102, but will overlap with the conductive layer 100 in the circuit board 000 that is located on the side of the second conductive layer 102 away from the first conductive layer 101. In this way, even after the circuit board 000 becomes thinner and the distance between two adjacent conductive layers 100 in the circuit board 000 becomes smaller, a hollow area K1 corresponding to at least one signal line 1011 can be set on the second conductive layer 102 to ensure that the distance between at least one signal line 1011 and the conductive layer 100 set on the side of the second conductive layer 102 away from the first conductive layer 101 is larger, thereby reducing the capacitance between at least one signal line 1011 and the conductive layer 100 set on the side of the second conductive layer 102 away from the first conductive layer 101, thereby increasing the impedance of at least one signal line 1011, so that the impedance of at least one signal line 1011 can match the impedance of other parts of the system (such as the driver and receiver), thereby improving the quality of the transmitted signal.

[0047] In summary, the present application proposes a circuit board comprising: multiple conductive layers and multiple insulating dielectric layers. By providing a hollow region in the second conductive layer and positioning the orthographic projection of at least one signal line on a target plane within the orthographic projection of the hollow region on the target plane, the at least one signal line no longer overlaps the second conductive layer, but instead overlaps with a conductive layer on the side of the second conductive layer facing away from the first conductive layer. In this way, even if the circuit board becomes thinner, resulting in a decrease in the distance between two adjacent conductive layers in the circuit board, the hollow region corresponding to the at least one signal line can be provided in the second conductive layer to ensure a greater distance between the at least one signal line and the conductive layer on the side of the second conductive layer facing away from the first conductive layer. This, in turn, reduces the capacitance between the at least one signal line and the conductive layer on the side of the second conductive layer facing away from the first conductive layer, thereby increasing the impedance of the at least one signal line and matching the impedance of the at least one signal line with the impedance of other components of the system (such as a driver and a receiver), thereby improving the quality of the transmitted signal.

[0048] In the examples of this application, please refer to Figure 3 , Figure 3This is a cross-sectional view of another circuit board provided in an embodiment of the present application. In the direction perpendicular to the extension of the signal lines, the width d1 of the hollow area K1 in the second conductive layer 102 is greater than the distribution width d2 of at least one signal line 1011. Here, if there is only one signal line 1011 in the first conductive layer 100, the distribution width of this signal line 1011 is the width of the signal line 1011 itself. If there are two or more signal lines 1011 in the first conductive layer 100, the distribution width of these signal lines 1011 is the sum of the widths of all signal lines 1011 and the distance between each two adjacent signal lines 1011.

[0049] Illustratively, the difference between the width d1 of the hollow area K1 in the second conductive layer 102 and the distribution width d2 of the at least one signal line 1011 in a direction perpendicular to the extension of the signal line is related to the manufacturing accuracy of the circuit board 000. In the present application, the difference between the width d1 of the hollow area K1 in the second conductive layer 102 and the distribution width d2 of the at least one signal line 1011 needs to be greater than the maximum width of lateral misalignment allowed between two adjacent conductive layers 100 during the manufacturing process of the circuit board 000.

[0050] In this case, even if a lateral misalignment occurs between the first conductive layer 101 and the second conductive layer 102 due to a preparation error during the preparation process of the circuit board 000, it can be ensured that the orthographic projection of at least one signal line 1011 on the target plane can be located within the orthographic projection of the hollow area K1 on the target plane, and the orthographic projection of at least one signal line 1011 and the second conductive layer 102 on the target plane will not overlap.

[0051] Optional, such as Figure 3 As shown, in the extending direction perpendicular to the signal line, the difference between the width d1 of the hollow area K1 in the second conductive layer 102 and the distribution width d2 of at least one signal line 1011 is 0.5 to 1.5 times the width of the single signal line 1011 .

[0052] For example, in the extending direction perpendicular to the signal line, the difference between the width d1 of the hollow area K1 in the second conductive layer 102 and the distribution width d2 of at least one signal line 1011 may be approximately equal to the width of the single signal line 1011 .

[0053] In this way, while ensuring that the orthographic projection of at least one signal line 1011 on the target plane is located within the orthographic projection of the hollow area K1 on the target plane, it is possible to ensure that the width of the hollow area K1 set in the second conductive layer 102 is not too wide, so as to ensure that the first hollow groove K1 set in the second conductive layer 102 does not interfere with the wiring in the second conductive layer 102.

[0054] In the embodiments of this application, Figure 3 As shown, when there are multiple signal lines 1011 in the first conductive layer 101 , the orthographic projection of the gap between any two adjacent signal lines 1011 on the target plane is located within the orthographic projection of the hollow area K1 on the target plane.

[0055] In the present application, the distance between two adjacent signal lines 1011 is generally small. Therefore, in the second conductive layer 102, not only can the region overlapping with the plurality of signal lines 1011 be hollowed out, but also the space between each two adjacent signal lines 1011 can be hollowed out. This can reduce the difficulty of manufacturing the second conductive layer 102, thereby effectively simplifying the manufacturing process of the circuit board 000.

[0056] In the present application, since the signal line 1011 can be arranged in various ways on the circuit board 000, the first conductive layer 101 and the second conductive layer 102 can be either two adjacent conductive layers 100 located on the outermost sides of the multi-layer conductive layer 100 or two adjacent conductive layers 100 located in the middle of the multi-layer conductive layer 100. For clarity, the present application will use the following two optional implementations as examples for schematic illustration:

[0057] For the first optional implementation, please refer to Figure 4 , Figure 4 This is a cross-sectional view of another circuit board provided in an embodiment of the present application. In the case where the first conductive layer 101 and the second conductive layer 102 in the multilayer conductive layer 100 are the two adjacent outermost conductive layers 100 in the multilayer conductive layer 100, the circuit board 000 further includes an electromagnetic shielding layer 300. The electromagnetic shielding layer 300 is located on the side of the first conductive layer 101 and the second conductive layer 102 facing away from the other conductive layers 100 in the multilayer conductive layer 100.

[0058] The orthographic projection of at least one signal line 1011 in the first conductive layer 101 on the target plane is located within the orthographic projection of the electromagnetic shielding layer 300 on the target plane.

[0059] In the embodiment of the present application, after the hollow region K1 corresponding to the signal line 1011 in the first conductive layer 101 is provided in the second conductive layer 102, the second conductive layer 102 no longer blocks the signal line 1011 in the first conductive layer 101, resulting in the second conductive layer 102 no longer providing electromagnetic shielding for the signal line 1011. Thus, when the first conductive layer 101 and the second conductive layer 102 are the two outermost adjacent conductive layers 100 in the multi-layer conductive layer 100, the side of the signal line 1011 in the first conductive layer 101 facing away from the other conductive layers 100 in the multi-layer conductive layer 100 will not be blocked by the other conductive layers 100. Therefore, a separate electromagnetic shielding layer 300 is provided to block the side of the signal line 1011 facing away from the other conductive layers 100 in the multi-layer conductive layer 100, thereby ensuring that the electromagnetic shielding layer 300 can provide electromagnetic shielding for the side of the signal line 1011 facing away from the other conductive layers 100 in the multi-layer conductive layer 100. In this way, the influence of external electromagnetic waves on at least one signal line 1011 can be effectively weakened, thereby ensuring the quality of signal line transmission.

[0060] For example, Figure 4 As shown, the multilayer insulating dielectric layer 200 in the circuit board 000 includes: a first insulating dielectric layer 201 and a second insulating dielectric layer 202, the first insulating dielectric layer 201 is located between the first conductive layer 101 and the second conductive layer 102, and the second insulating dielectric layer 202 is located on the side of the first insulating dielectric layer 201 away from the other insulating dielectric layers in the multilayer insulating dielectric layer 200.

[0061] The electromagnetic shielding layer 300 is located on a side of the second insulating dielectric layer 202 facing away from the first insulating dielectric layer 201 .

[0062] In this way, the electromagnetic shielding layer 300 can be located at the outermost side of the circuit board 000 and connected to the second insulating medium layer 202, thereby effectively isolating external electromagnetic interference to reduce the impact of external electromagnetic interference on at least one signal line 1011 in the first conductive layer 101 on the circuit board 000.

[0063] In the embodiment of the present application, when the first conductive layer 101 and the second conductive layer 102 are respectively two adjacent conductive layers 100 distributed on the outermost sides of the multi-layer conductive layer 100, there are various distribution situations of the first conductive layer 101 and the second conductive layer 102.

[0064] In one possible scenario, Figure 4 As shown, the first conductive layer 101 is closer to the electromagnetic shielding layer 300 than the second conductive layer 102. That is, the first conductive layer 101 is located at the outermost side of the multi-layer conductive layer 100.

[0065] In another possible situation, Figure 5 As shown, Figure 5 1 is a cross-sectional view of another circuit board provided in an embodiment of the present application. The second conductive layer 102 is closer to the electromagnetic shielding layer 300 than the first conductive layer 101. That is, the second conductive layer 102 is located on the outermost side of the multi-layer conductive layer 100.

[0066] In the present application, regardless of whether the first conductive layer 101 is located at the outermost side of the multi-layer conductive layer 100 or the second conductive layer 102 is located at the outermost side of the multi-layer conductive layer 100, the electromagnetic shielding layer 300 can effectively shield at least one signal line 1011 in the first conductive layer 101 on the side facing away from other conductive layers 100, thereby ensuring the quality of signal transmission.

[0067] In the embodiments of this application, Figure 4 and Figure 5 As shown, the multi-layer conductive layer 100 in the circuit board 000 further includes: a third conductive layer 103 , which is located on a side of the first conductive layer 101 and the second conductive layer 102 away from the electromagnetic shielding layer 300 in the circuit board 000 .

[0068] The orthographic projection of at least one signal line 1011 in the first conductive layer 101 on the target plane is located within the orthographic projection of the third conductive layer 103 on the target plane.

[0069] In this way, the third conductive layer 103 can effectively shield the side of the first conductive layer 101 facing away from the electromagnetic shielding layer 300, so that both sides of at least one signal line 1011 in the first conductive layer 101 can be effectively electromagnetically shielded, thereby ensuring that at least one signal line 1011 in the first conductive layer 101 is not affected by external electromagnetic interference.

[0070] For the second optional implementation, please refer to Figure 6 , Figure 6 This is a cross-sectional view of a circuit board provided in another embodiment of the present application. In the case where the first conductive layer 101 and the second conductive layer 102 in the multilayer conductive layer 100 are two adjacent conductive layers 100 located in the middle of the multilayer conductive layer 100, the multilayer conductive layer 100 further includes: a fourth conductive layer 104 and a fifth conductive layer 105, with the first conductive layer 101 and the second conductive layer 102 both located between the fourth conductive layer 104 and the fifth conductive layer 105.

[0071] The orthographic projection of at least one signal line 1011 in the first conductive layer 101 on the target plane is located within the orthographic projection of the fourth conductive layer 104 on the target plane and within the orthographic projection of the fifth conductive layer 105 on the target plane.

[0072] In this case, one side of at least one signal line 1011 in the first conductive layer 101 can be shielded and protected by the fourth conductive layer 104, and the other side of at least one signal line 1011 in the first conductive layer 101 can be shielded and protected by the fifth conductive layer 105. In this case, the double shielding effect provided by the fourth conductive layer 104 and the fifth conductive layer 105 can be utilized to improve the quality of signal transmission by at least one signal line 1011.

[0073] It should be noted that the above embodiment is described by taking the case where the second conductive layer is distributed on one side of the first conductive layer as an example. In other possible implementations, the second conductive layer may also be distributed on both sides of the first conductive layer.

[0074] For example, see Figure 7 , Figure 7 FIG2 is a cross-sectional view of another circuit board provided in another embodiment of the present application. In the present application, when second conductive layers 102 are distributed on both sides of first conductive layer 101 in multi-layer conductive layer 100, multi-layer conductive layer 100 further includes: sixth conductive layer 106 and seventh conductive layer 107, with first conductive layer 101 and second conductive layer 102 distributed between sixth conductive layer 106 and seventh conductive layer 107.

[0075] The orthographic projection of at least one signal line 1011 in the first conductive layer 101 on the target plane is located within the orthographic projection of the sixth conductive layer 107 on the target plane, and is also located within the orthographic projection of the seventh conductive layer 107 on the target plane. This ensures that the at least one signal line 1011 no longer overlaps with the second conductive layer 102 on either side of the first conductive layer 101, but instead overlaps with the sixth conductive layer 106 and the seventh conductive layer 107 on the side of the second conductive layer 102 facing away from the first conductive layer 101 in the circuit board 000. Thus, by providing a hollow area K1 corresponding to the at least one signal line 1011 on the second conductive layer 102, the distance between the at least one signal line 1011 and the conductive layer 100 located on the side of the second conductive layer 102 facing away from the first conductive layer 101 can be further increased. This reduces the capacitance between the at least one signal line 1011 and the conductive layer 100 located on the side of the second conductive layer 102 facing away from the first conductive layer 101, thereby further increasing the impedance of the at least one signal line 1011.

[0076] In summary, the present application proposes a circuit board comprising: multiple conductive layers and multiple insulating dielectric layers. By providing a hollow region in the second conductive layer and positioning the orthographic projection of at least one signal line on a target plane within the orthographic projection of the hollow region on the target plane, the at least one signal line no longer overlaps the second conductive layer, but instead overlaps with a conductive layer on the side of the second conductive layer facing away from the first conductive layer. In this way, even if the circuit board becomes thinner, resulting in a decrease in the distance between two adjacent conductive layers in the circuit board, the hollow region corresponding to the at least one signal line can be provided in the second conductive layer to ensure a greater distance between the at least one signal line and the conductive layer on the side of the second conductive layer facing away from the first conductive layer. This, in turn, reduces the capacitance between the at least one signal line and the conductive layer on the side of the second conductive layer facing away from the first conductive layer, thereby increasing the impedance of the at least one signal line and matching the impedance of the at least one signal line with the impedance of other components of the system (such as a driver and a receiver), thereby improving the quality of the transmitted signal.

[0077] The present application also provides an electronic device, which may be a mobile phone, a tablet computer, a laptop computer, an e-book, etc. The electronic device may include: a housing, and a circuit board located within the housing. The circuit board may be any of the above-mentioned circuit boards.

[0078] In this application, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance. The term "plurality" refers to two or more than two, unless expressly limited otherwise.

[0079] The above description is merely an optional embodiment of the present application and is not intended to limit the present application. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present application shall be included in the scope of protection of the present application.

Claims

1. A circuit board, characterized in that: include: Multiple conductive layers (100) and multiple insulating dielectric layers (200); The multi-layer conductive layers (100) and the multi-layer insulating dielectric layers (200) are stacked and alternately arranged; The multi-layer conductive layer (100) comprises: a first conductive layer (101), and a second conductive layer (102) disposed adjacent to the first conductive layer (101) and located on at least one side of the first conductive layer (101), wherein the second conductive layer (102) has a hollow area (K1); The first conductive layer (101) comprises: at least one signal line (1011), the orthographic projection of the at least one signal line (1011) on a target plane is located within the orthographic projection of the hollow area (K1) on the target plane, and the target plane is a plane parallel to the circuit board.

2. The circuit board according to claim 1, wherein: In an extension direction perpendicular to the signal line (1011), the width of the hollow area (K1) is greater than the distribution width of the at least one signal line (1011).

3. The circuit board according to claim 2, wherein: In an extension direction perpendicular to the signal line (1011), the difference between the width of the hollow area (K1) and the distribution width of the at least one signal line (1011) is 0.5 to 1.5 times the width of a single signal line (1011).

4. The circuit board according to claim 1, wherein: In the case where there are a plurality of at least one signal line (1011), the orthographic projection of the gap between any two adjacent signal lines (1011) on the target plane is located within the orthographic projection of the hollow area (K1) on the target plane.

5. The circuit board according to any one of claims 1 to 4, characterized in that: In the case where the first conductive layer (101) and the second conductive layer (102) are respectively two adjacent conductive layers (100) distributed on the outermost sides of the multi-layer conductive layer (100), the circuit board (000) further comprises: an electromagnetic shielding layer (300), the electromagnetic shielding layer (300) being located on a side of the first conductive layer (101) and the second conductive layer (102) facing away from the other conductive layers (100) in the multi-layer conductive layer (100); The orthographic projection of the at least one signal line (1011) on the target plane is located within the orthographic projection of the electromagnetic shielding layer (300) on the target plane.

6. The circuit board according to claim 5, characterized in that The multi-layer insulating dielectric layer (200) comprises: a first insulating dielectric layer (201) and a second insulating dielectric layer (202), wherein the first insulating dielectric layer (201) is located between the first conductive layer (101) and the second conductive layer (102), and the second insulating dielectric layer (202) is located on a side of the first insulating dielectric layer (201) that is away from other insulating dielectric layers (200) in the multi-layer insulating dielectric layer (200); The electromagnetic shielding layer (300) is located on a side of the second insulating medium layer (202) facing away from the first insulating medium layer (201).

7. The circuit board according to claim 5, characterized in that The first conductive layer (101) is closer to the electromagnetic shielding layer (300) than the second conductive layer (102), or the second conductive layer (102) is closer to the electromagnetic shielding layer (300) than the first conductive layer (101).

8. The circuit board according to claim 5, wherein: The multi-layer conductive layer (100) further comprises: a third conductive layer (103), the third conductive layer (103) being located on a side of the first conductive layer (101) and the second conductive layer (102) facing away from the electromagnetic shielding layer (300); The orthographic projection of the at least one signal line (1011) on the target plane is located within the orthographic projection of the third conductive layer (103) on the target plane.

9. The circuit board according to any one of claims 1 to 4, characterized in that: In the case where the first conductive layer (101) and the second conductive layer (102) are respectively two adjacent conductive layers (100) distributed in the middle of the multi-layer conductive layer (100), the multi-layer conductive layer (100) further comprises: a fourth conductive layer (104) and a fifth conductive layer (105), and the first conductive layer (101) and the second conductive layer (102) are both distributed between the fourth conductive layer (104) and the fifth conductive layer (105); The orthographic projection of the at least one signal line (1011) on the target plane is located within the orthographic projection of the fourth conductive layer (104) on the target plane, and is also located within the orthographic projection of the fifth conductive layer (105) on the target plane.

10. An electronic device, characterized in that: The invention comprises: a shell, and a circuit board located in the shell, wherein the circuit board is the circuit board according to any one of claims 1 to 9.

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