Transformer-driven MOS tube circuit added with turn-off clamping function
By adding a shutdown clamp circuit to the transformer-driven MOS tube circuit, the problem of MOS tube failure caused by changes in the DC blocking capacitor bias voltage is solved, and the stability and reliability of the circuit are improved.
Patent Information
- Application Number
- CN202422665999.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-01
- Publication Date
- 2025-09-09
- Estimated Expiration
- 2034-11-01
AI Technical Summary
In traditional isolated MOS transistor circuits, the bias voltage on the DC blocking capacitor varies with the duty cycle, leading to the risk of failure of the driven MOS transistor.
A shutdown clamp circuit is added to the transformer-driven MOS tube circuit. Through the circuit structure composed of the voltage regulator tube and the MOS tube, the bias voltage change on the DC blocking capacitor is offset to ensure that the MOS tube can be completely shut down.
The robustness of the circuit is enhanced, the MOS tube is prevented from being turned on by mistake, and the stability and reliability of the circuit are improved.
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Figure CN223322064U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of MOS tube driving, in particular to a transformer driving MOS tube circuit with an additional shutdown clamping function. Background Art
[0002] A DC blocking capacitor is usually introduced into the traditional isolation drive MOS tube circuit. During the operation of the isolation drive MOS tube circuit, the isolation transformer couples the PWM input signal 1:1 to the secondary drive MOS tube. During this period, the DC blocking capacitor prevents the transformer from saturating due to the driving DC component.
[0003] However, the introduction of the DC blocking capacitor brings a problem: since the PWM input signal will charge the DC blocking capacitor, there will be a fixed DC bias voltage amplitude on the DC blocking capacitor in steady state, and the drive waveform coupled to the transformer secondary will shift downward.
[0004] When the driver circuit operates in steady state (with a fixed PWM frequency and duty cycle), the MOSFET turns on and off normally. However, in an actual operating circuit, the PWM frequency and duty cycle are constantly adjusting. As the duty cycle changes, the bias voltage on the DC-blocking capacitor also fluctuates, causing the PWM waveform to fluctuate. This can prevent the driven MOSFET from fully shutting down, posing a risk of failure. Utility Model Content
[0005] In view of this, it is necessary to provide a transformer-driven MOS tube circuit with an added shutdown clamping function to solve the technical problem in the prior art that the bias voltage on the DC blocking capacitor changes with the duty cycle, causing the driven MOS tube to have a failure risk.
[0006] In order to solve the above problems, the utility model provides a transformer-driven MOS tube circuit with an additional shutdown clamping function, comprising: a transformer, a first MOS tube, a voltage regulator tube, and a shutdown clamping circuit;
[0007] A first end of the primary coil of the transformer is grounded via a first capacitor, a first end of the secondary coil of the transformer is electrically connected to the gate of the first MOS transistor via a second capacitor and a first resistor in sequence, and a second end of the secondary coil and the source of the first MOS transistor are grounded;
[0008] The cathode of the voltage regulator tube is electrically connected to the gate of the first MOS tube, and the anode is grounded;
[0009] The turn-off clamping circuit is electrically connected to the first end of the secondary coil of the transformer and the gate of the first MOS transistor respectively.
[0010] In a possible implementation, the second end of the primary coil of the transformer is electrically connected to an external PWM signal source for receiving a PWM input signal.
[0011] In a possible implementation, the shutdown clamping circuit includes: a second MOS tube, a second resistor, and a first transistor;
[0012] The drain of the second MOS transistor is electrically connected to the first end of the second resistor, and the gate is grounded;
[0013] The base of the first transistor is electrically connected to the second end of the second resistor, and the collector is grounded.
[0014] In a possible implementation, the first MOS transistor and the second MOS transistor are N-channel MOS transistors.
[0015] In a possible implementation, the turn-off clamping circuit is electrically connected to the first end of the secondary coil of the transformer through the source of the second MOS transistor and the emitter of the first transistor.
[0016] In a possible implementation, the source of the second MOS transistor is electrically connected to the first end of the secondary coil of the transformer;
[0017] The emitter of the first transistor is electrically connected to the gate of the first MOS tube.
[0018] In a possible implementation, the shutdown clamping circuit includes: a third MOS transistor, a fourth MOS transistor, a third resistor, a fourth resistor, and a second transistor;
[0019] The drain of the third MOS transistor is electrically connected to the first end of the third resistor, and the source is grounded;
[0020] The gate of the fourth MOS transistor is also electrically connected to the first end of the third resistor, and the drain is electrically connected to the first end of the fourth resistor;
[0021] The base of the second transistor is electrically connected to the second end of the fourth resistor, the emitter is electrically connected to the gate of the first MOS transistor, and the collector is grounded.
[0022] In a possible implementation, the third MOS transistor and the fourth MOS transistor are N-channel MOS transistors.
[0023] In a possible implementation, the turn-off clamping circuit is electrically connected to the first end of the secondary coil of the transformer through the gate of the third MOS transistor, the second end of the third resistor, and the emitter of the second transistor.
[0024] In a possible implementation, the gate of the third MOS transistor is electrically connected to the first end of the second capacitor;
[0025] The second end of the third resistor is electrically connected to the second end of the second capacitor;
[0026] The emitter of the second transistor is electrically connected to the gate of the first MOS transistor.
[0027] The beneficial effect of the utility model is as follows: the utility model provides a transformer-driven MOS tube circuit with an additional shutdown clamping function. By providing a shutdown clamping circuit on the transformer-driven MOS tube circuit with an additional DC blocking capacitor, the first driven MOS tube is prevented from being mistakenly turned on. Thus, the transformer-driven MOS tube circuit enhances the robustness of the circuit while introducing the DC blocking capacitor to prevent transformer saturation, thereby effectively solving the technical problem in the prior art that the bias voltage on the DC blocking capacitor changes with the duty cycle, resulting in the risk of failure of the driven MOS tube. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 This is a structural diagram of an embodiment of a transformer-driven MOS tube circuit with an additional shutdown clamping function provided by the present invention;
[0029] Figure 2 This is a waveform diagram of the voltage on the primary coil and secondary coil of the transformer after the DC blocking capacitor is introduced into the utility model;
[0030] Figure 3 The waveform diagram of the front-end and rear-end voltages on the second capacitor provided by the present invention;
[0031] Figure 4 This is the waveform diagram of the PWM input signal and the voltage on the MOS tube provided by the utility model;
[0032] Figure 5 A schematic structural diagram of a turn-off clamping circuit provided by the present invention, which is composed of a second MOS tube, a second resistor and a first transistor;
[0033] Figure 6 A schematic structural diagram of a transformer-driven MOS transistor circuit provided by the present invention with a turn-off clamping circuit consisting of a second MOS transistor, a second resistor, and a first transistor;
[0034] Figure 7 A schematic structural diagram of a turn-off clamping circuit provided by the present invention, which is composed of a third MOS transistor, a fourth MOS transistor, a third resistor, a fourth resistor, and a second transistor;
[0035] Figure 8This is a structural diagram of a transformer-driven MOS tube circuit provided by the utility model with a turn-off clamping circuit composed of a third MOS tube, a fourth MOS tube, a third resistor, a fourth resistor and a second transistor. DETAILED DESCRIPTION
[0036] It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.
[0037] The following will be combined with the accompanying drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only some of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without making any creative efforts shall fall within the scope of protection of the present invention.
[0038] It should be noted that all directional indications (such as up, down, left, right, front, back, etc.) in the embodiments of the present invention are only used to explain the relative position relationship, movement status, etc. between the various components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.
[0039] In addition, the descriptions of "first," "second," etc. in this utility model are for descriptive purposes only and should not be understood as indicating or implying their relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of such features. In addition, the technical solutions between the various embodiments can be combined with each other, but this must be based on the fact that they can be implemented by ordinary technicians in this field. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by this utility model.
[0040] References to "embodiments" herein mean that a particular feature, structure, or characteristic described in connection with the embodiments may be included in at least one embodiment of the present invention. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor does it constitute an independent or alternative embodiment that is mutually exclusive of other embodiments. It is understood, both explicitly and implicitly, by those skilled in the art that the embodiments described herein may be combined with other embodiments.
[0041] like Figure 1 As shown, a specific embodiment of the present invention discloses a transformer-driven MOS transistor circuit 10 with an additional shutdown clamping function, comprising:
[0042] Transformer T1, first MOS transistor QX1, voltage regulator diode ZD1, and shutdown clamp circuit 110. A first end of the primary coil of transformer T1 is grounded via a first capacitor C1. A first end of the secondary coil of transformer T1 is electrically connected to the gate of the first MOS transistor QX1 via a second capacitor C2 and a first resistor R1. A second end of the secondary coil and the source of the first MOS transistor QX1 are grounded.
[0043] The cathode of the voltage regulator tube ZD1 is electrically connected to the gate of the first MOS tube QX1, and the anode is grounded;
[0044] The turn-off clamp circuit 110 is electrically connected to the first end of the secondary coil of the transformer T1 and the gate of the first MOS transistor QX1 respectively.
[0045] It should be noted that, in this embodiment, the first MOS transistor QX1 is a driven MOS transistor, and C1 is a DC blocking capacitor, whose function is to prevent the transformer T1 from being saturated due to the driving DC component. The introduction of C1 will bring about a problem: since the PWM input signal will charge C1, there will be a fixed DC bias voltage amplitude Vc1 on C1 in the steady state, and the driving waveform VS_T1 coupled to the secondary of T1 will be shifted downward, such as Figure 2 shown.
[0046] After -Vc1 is offset by capacitor C2, the gate drive waveform PWM driven to the MOS tube QX1 will be raised to a positive voltage again, such as Figure 3 shown.
[0047] From the above analysis, we can see that when the drive circuit is working in steady state (PWM frequency and duty cycle are fixed), the MOS tube is turned on and off normally. However, in the actual working circuit, the PWM frequency and duty cycle are constantly adjusting. Due to the change of duty cycle, the bias voltage on capacitor C1 will also change continuously, so the PWM waveform will fluctuate up and down, such as Figure 4 As shown in the figure, compared with the initial input signal PWM_IN, it can be seen that when the MOS tube QX1 should be turned off, the gate still has a voltage of 2V. Usually, the threshold voltage of the MOS tube is around 3V-4V. Incomplete shutdown will cause excessive loss of the MOS tube and even the risk of failure.
[0048] Compared with the prior art, the utility model provides a transformer-driven MOS tube circuit with an additional shutdown clamping function. By providing a shutdown clamping circuit on the transformer-driven MOS tube circuit with an additional DC blocking capacitor, the MOS tube is prevented from being accidentally turned on. Thus, the transformer-driven MOS tube circuit enhances the robustness of the circuit while introducing the DC blocking capacitor to prevent transformer saturation, thereby effectively solving the technical problem in the prior art of the risk of MOS tube failure caused by the bias voltage on the DC blocking capacitor changing with the duty cycle.
[0049] The utility model provides two different structures of shutdown clamp circuits, such as Figure 5 In a possible implementation, the shutdown clamp circuit 110 includes: a second MOS transistor Q2, a second resistor R2, and a first transistor TR1;
[0050] The drain of the second MOS transistor Q2 is electrically connected to the first end of the second resistor R2, and the gate is grounded; the base of the first transistor TR1 is electrically connected to the second end of the second resistor R2, and the collector is grounded.
[0051] Furthermore, both the first MOS transistor QX1 and the second MOS transistor Q2 are N-channel MOS transistors.
[0052] Accordingly, if Figure 6 In a possible implementation, the turn-off clamp circuit 110 is electrically connected to the secondary coil of the transformer T1 through the source of the second MOS transistor Q2 and the emitter of the first transistor TR1.
[0053] Furthermore, the source of the second MOS transistor Q2 is electrically connected to the first end of the secondary coil of the transformer T1 ; the emitter of the first transistor TR1 is electrically connected to the gate of the first MOS transistor QX1 .
[0054] Specifically, the implementation principle of the shutdown clamp circuit provided in this embodiment is as follows: By adding Q2, R2, and TR1 to form a shutdown clamp circuit, when the drive is high, the S-to-G of Q2 is high, the MOS transistor Q2 is turned off, no current flows through R2, the transistor TR1 is turned off, and the transformer T1 charges the gate of QX1 to a high level through the capacitors C4 and R2. When the drive is low, the G-to-S of Q2 is high, the MOS transistor Q2 is turned on, and current flows through the emitter e of TR1 to the base b, to the resistor R2, and then through the D-S of the MOS transistor Q2. The transistor TR1 is turned on e-c, thereby clamping the gate of the first MOS transistor QX2 to approximately 0.7V, effectively preventing the first MOS transistor QX1 from accidentally turning on.
[0055] like Figure 7 In another possible implementation, the shutdown clamp circuit 110 may further include: a third MOS transistor Q3, a fourth MOS transistor Q4, a third resistor R3, a fourth resistor R4, and a second transistor TR2;
[0056] The drain of the third MOS transistor Q3 is electrically connected to the first end of the third resistor R3, and the source is grounded; the gate of the fourth MOS transistor Q4 is also electrically connected to the first end of the third resistor R3, and the drain is electrically connected to the first end of the fourth resistor R4; the base of the second transistor TR2 is electrically connected to the second end of the fourth resistor R4, the emitter is electrically connected to the gate of the first MOS transistor QX1, and the collector is grounded.
[0057] Furthermore, the third MOS transistor and the fourth MOS transistor are both N-channel MOS transistors.
[0058] Accordingly, if Figure 8 The turn-off clamp circuit 110 is electrically connected to the first end of the secondary coil of the transformer T1 through the gate of the third MOS transistor Q3, the second end of the third resistor R3 and the emitter of the second transistor TR2.
[0059] Furthermore, the gate of the third MOS transistor Q3 is electrically connected to the first end of the second capacitor C2; the second end of the third resistor R3 is electrically connected to the second end of the second capacitor C2; and the emitter of the second transistor TR2 is electrically connected to the gate of the first MOS transistor QX1.
[0060] Specifically, the implementation principle of the shutdown clamp circuit provided in this embodiment is as follows: The shutdown clamp circuit is formed by adding Q3, Q4, R4, and TR2. When the drive is high, the G-to-S of Q3 is high, MOS transistor Q3 is turned on, pulling the G-to-S of Q4 low. Q4 is turned off, and no current flows through R4. Transistor TR2 is turned off, and transformer T1 charges the gate of QX2 to a high level through capacitor C6 and R4. When the drive is low, the G-to-S of Q3 is low, MOS transistor Q3 is turned off, and the voltage on capacitor C6 is applied to the G-to-S of MOS transistor Q4 through R3, turning MOS transistor Q4 on. Current flows through the emitter e of TR2 to the base b, to resistor R4, and then through the D-to-S of MOS transistor Q4. Transistor TR2 is turned on e-c, thereby clamping the gate of the first MOS transistor QX1 to approximately 0.7V, effectively preventing MOS transistor QX1 from accidentally turning on.
[0061] The above is only a preferred specific implementation method of the present invention, but the protection scope of the present invention is not limited to this. Any changes or replacements that can be easily thought of by any technician familiar with this technical field within the technical scope disclosed in the present invention should be covered by the protection scope of the present invention.
Claims
1. A transformer-driven MOS tube circuit with an additional shutdown clamping function, characterized in that: include: Transformer, first MOS tube, voltage regulator tube and shutdown clamping circuit; A first end of the primary coil of the transformer is grounded via a first capacitor, a first end of the secondary coil of the transformer is electrically connected to the gate of the first MOS transistor via a second capacitor and a first resistor in sequence, and a second end of the secondary coil and the source of the first MOS transistor are grounded; The cathode of the voltage regulator tube is electrically connected to the gate of the first MOS tube, and the anode is grounded; The turn-off clamping circuit is electrically connected to the first end of the secondary coil of the transformer and the gate of the first MOS transistor respectively.
2. The transformer driving MOS tube circuit according to claim 1, characterized in that: The second end of the primary coil of the transformer is electrically connected to an external PWM signal source for receiving a PWM input signal.
3. The transformer driving MOS tube circuit according to claim 1, characterized in that: The shutdown clamping circuit includes: a second MOS tube, a second resistor and a first transistor; The drain of the second MOS transistor is electrically connected to the first end of the second resistor, and the gate is grounded; The base of the first transistor is electrically connected to the second end of the second resistor, and the collector is grounded.
4. The transformer driving MOS tube circuit according to claim 3, characterized in that: The first MOS transistor and the second MOS transistor are N-channel MOS transistors.
5. The transformer driving MOS tube circuit according to claim 3, characterized in that: The turn-off clamping circuit is electrically connected to the first end of the secondary coil of the transformer through the source of the second MOS transistor and the emitter of the first transistor.
6. The transformer driving MOS tube circuit according to claim 5, characterized in that: The source of the second MOS transistor is electrically connected to the first end of the secondary coil of the transformer; The emitter of the first transistor is electrically connected to the gate of the first MOS tube.
7. The transformer driving MOS tube circuit according to claim 1, characterized in that: The shutdown clamping circuit includes: a third MOS transistor, a fourth MOS transistor, a third resistor, a fourth resistor and a second transistor; The drain of the third MOS transistor is electrically connected to the first end of the third resistor, and the source is grounded; The gate of the fourth MOS transistor is also electrically connected to the first end of the third resistor, and the drain is electrically connected to the first end of the fourth resistor; The base of the second transistor is electrically connected to the second end of the fourth resistor, the emitter is electrically connected to the gate of the first MOS transistor, and the collector is grounded.
8. The transformer driving MOS tube circuit according to claim 7, characterized in that: The third MOS transistor and the fourth MOS transistor are N-channel MOS transistors.
9. The transformer driving MOS tube circuit according to claim 7, characterized in that: The turn-off clamping circuit is electrically connected to the first end of the secondary coil of the transformer through the gate of the third MOS tube, the second end of the third resistor and the emitter of the second transistor.
10. The transformer driving MOS tube circuit according to claim 9, characterized in that: The gate of the third MOS transistor is electrically connected to the first end of the second capacitor; The second end of the third resistor is electrically connected to the second end of the second capacitor; The emitter of the second transistor is electrically connected to the gate of the first MOS transistor.