Array circuit and narrow-frame liquid crystal display screen

Abstract

The utility model discloses an array circuit and a narrow-frame liquid crystal display screen. The array circuit comprises a plurality of pixel units, a plurality of data lines, a plurality of gate lines and a plurality of GIP units. Pixels in the plurality of pixel units form a pixel array; the plurality of data lines are longitudinally and electrically connected with pixels in the pixel array respectively; the plurality of gate lines are electrically connected with pixel steps in the pixel array; the plurality of GIP units are electrically connected with the plurality of gate lines respectively, and the GIP units are placed at the positions of an upper frame and / or a lower frame of the liquid crystal display screen. The GIP units are arranged on the upper frame and the lower frame, the frames on the left side and the right side can be narrowed, the gate lines and the pixels are electrically connected in a stepped mode, coupling between the gate lines and the signal lines can be avoided, and the problem that the GIP units are placed on the left frame and the right frame of the liquid crystal display screen, and the display effect is poor is solved. And the problems of narrow frame of the liquid crystal display screen and display cross grains caused by easy coupling of a gate line and other signal lines are solved.

Description

Technical Field

[0001] The utility model relates to the technical field of array circuits of display screens, in particular to an array circuit and a narrow-frame liquid crystal display screen. Background Art

[0002] A liquid crystal display (LCD) consists of an array substrate, an opposing substrate, and a liquid crystal layer located between the two substrates. Thin-film transistors (TFTs) and pixel electrodes are located on the side of the array substrate facing the liquid crystal layer. The array substrate typically includes multiple pixel units, each of which is equipped with a thin-film transistor (TFT).

[0003] The operating principle of a liquid crystal display panel is that the electric field between the opposing substrate and the array substrate causes the liquid crystal to rotate. By adjusting the electric field strength by varying the voltage, the twist and angle of the liquid crystal material can be controlled, thereby controlling the amount of light transmitted in that area, ultimately producing the desired image. The array circuit includes gate lines, data lines, pixel electrodes, and thin-film transistors.

[0004] The left and right borders of existing LCDs cannot be further reduced due to the placement of GIP units, and the gate scan lines are easily coupled with other signal lines, resulting in display horizontal stripes. Utility Model Content

[0005] Existing LCDs place GIP units on the left and right borders, which limits the narrow borders of the LCDs. In addition, the horizontally connected gate lines are easily coupled with other signal lines, resulting in horizontal stripes on the display.

[0006] To address the above problems, an array circuit and a narrow-border liquid crystal display are proposed. By arranging GIP units at the upper and lower borders, the left and right borders can be narrowed. By electrically connecting the gate lines and pixels in a stepped manner, coupling between the gate lines and signal lines can be avoided. This solves the problem that placing GIP units at the left and right borders of liquid crystal displays limits the narrow border of liquid crystal displays and that the gate lines are easily coupled with other signal lines, resulting in horizontal stripes on the display.

[0007] In a first aspect, an array circuit includes:

[0008] multiple pixel units;

[0009] Multiple data lines;

[0010] multiple gate lines;

[0011] Multiple GIP units;

[0012] The pixels in the plurality of pixel units form a pixel array;

[0013] The plurality of data lines are respectively electrically connected to the pixels in the pixel array in a longitudinal direction;

[0014] The plurality of gate lines are electrically connected to pixel ladders in the pixel array;

[0015] The plurality of GIP units are electrically connected to a plurality of gate lines respectively, and the GIP units are placed at the upper frame and / or lower frame of the liquid crystal display.

[0016] In conjunction with the array circuit described in the first aspect of the present invention, in a first possible implementation manner, the pixel unit includes:

[0017] R pixel, G pixel, B pixel;

[0018] The R pixels, G pixels, and B pixels in the plurality of pixel units are arranged horizontally in the pixel array.

[0019] In conjunction with the array circuit described in the first aspect of the present invention, in a first possible implementation, the pixel array includes:

[0020] A plurality of R pixel columns, G pixel columns, and B pixel columns;

[0021] The data lines are electrically connected to drains of elements in the R pixel column, the G pixel column, and the B pixel column, respectively.

[0022] In combination with the first possible implementation of the first aspect of the present utility model, in a second possible implementation, the GIP unit is placed at the upper frame / lower frame position of the liquid crystal display screen;

[0023] The GIP units are electrically connected to the gates of the pixels at the oblique positions of the pixel array in sequence.

[0024] In combination with the first possible implementation of the first aspect of the present utility model, in a third possible implementation, the GIP units are sequentially and spaced apart at the upper and lower borders of the liquid crystal display screen;

[0025] The GIP units are electrically connected to the gates of the pixels at the oblique positions of the pixel array in sequence.

[0026] In combination with the second possible implementation of the first aspect of the present invention, in a fourth possible implementation, the GIP unit on the leftmost side is electrically connected to the gate of the pixel on the bottommost oblique line in the first direction, and the GIP unit on the rightmost side is electrically connected to the gate of the pixel on the bottommost oblique line in the second direction, and the first direction is perpendicular to the second direction.

[0027] In combination with the second possible implementation of the first aspect of the present invention, in a fifth possible implementation, the GIP units connected to the pixels on the odd-numbered oblique lines in the first direction of the pixel array are placed at the upper border position of the liquid crystal display screen, and the GIP units connected to the pixels on the even-numbered oblique lines in the first direction of the pixel array are placed at the lower border position of the liquid crystal display screen.

[0028] In combination with the second possible implementation of the first aspect of the present invention, in a sixth possible implementation, the GIP units connected to the pixels on the odd-numbered oblique lines in the second direction of the pixel array are placed at the upper frame position of the liquid crystal display screen, and the GIP units connected to the pixels on the even-numbered oblique lines in the second direction of the pixel array are placed at the lower frame position of the liquid crystal display screen.

[0029] In a second aspect, a narrow-border liquid crystal display screen includes the array circuit described in the first aspect.

[0030] By implementing the array circuit and narrow-border LCD screen described in the present invention, by arranging the GIP units at the upper and lower border positions, the left and right borders can be narrowed. By electrically connecting the gate lines and pixels in a stepped manner, coupling between the gate lines and the signal lines can be avoided. This solves the problem that placing the GIP units at the left and right border positions of the LCD screen limits the narrowing of the border and that the gate lines are easily coupled with other signal lines, resulting in horizontal stripes on the display. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0032] Figure 1 It is a schematic diagram of the GIP unit layout of a liquid crystal display screen in the prior art;

[0033] Figure 2 This is a schematic diagram of the GIP unit layout of the liquid crystal display screen of Example 1 of the present utility model;

[0034] Figure 3 This is a schematic diagram of an array circuit of Example 1 of the present utility model;

[0035] Figure 4 This is a schematic diagram of the GIP unit layout of the liquid crystal display screen of Example 3 of the present utility model;

[0036] Figure 5 This is a schematic diagram of an array circuit of Example 3 of the present utility model;

[0037] Figure 6 This is a schematic diagram of the pixel array layout in the first direction of the present invention;

[0038] Figure 7 This is a schematic diagram of the pixel array layout in the second direction of the present invention; DETAILED DESCRIPTION

[0039] The following is a clear and complete description of the technical solutions of the present invention in conjunction with the accompanying drawings. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of them. Based on the embodiments of the present invention, other embodiments obtained by ordinary technicians in this field without creative work are all within the scope of protection of the present invention.

[0040] Unless otherwise defined, all technical and scientific terms used herein have the same meanings as commonly understood by those skilled in the art to which this invention pertains. The terms used in this specification are for the purpose of describing specific embodiments only and are not intended to limit the present invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0041] It should be noted that when an element is referred to as being “fixed on” or “disposed on” another element, it may be directly on the other element or indirectly on the other element. When an element is referred to as being “connected to” another element, it may be directly connected to the other element or indirectly connected to the other element.

[0042] It should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on this application.

[0043] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of the technical features being referred to. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. Throughout the description of this application, "plurality" means two or more, unless otherwise specifically defined.

[0044] The existing LCD displays place the GIP units at the left and right borders, which limits the narrow borders of the LCD displays. In addition, the horizontally connected gate lines are easily coupled with other signal lines, resulting in horizontal stripes on the display. Figure 1 , Figure 1 It is a schematic diagram of the GIP unit layout of a liquid crystal display screen in the prior art.

[0045] To solve the above problems, an array circuit and a narrow-frame liquid crystal display are proposed.

[0046] In a first aspect, an array circuit includes a plurality of pixel units, a plurality of data lines, a plurality of gate lines, and a plurality of GIP units; the pixels in the plurality of pixel units form a pixel array; the plurality of data lines are respectively electrically connected to the pixels in the pixel array in a longitudinal direction; the plurality of gate lines are electrically connected to the pixels in the pixel array in a step-by-step manner; the plurality of GIP units are respectively electrically connected to the plurality of gate lines, and the GIP units are positioned at the top and / or bottom frames of a liquid crystal display. By placing the GIP units at the top and bottom frames, the left and right frames can be narrowed; by electrically connecting the gate lines to the pixels in a step-by-step manner, coupling between the gate lines and the signal lines can be avoided, thereby resolving the problem of placing the GIP units at the left and right frames of a liquid crystal display, which limits the narrowness of the frame and easily causes the gate lines to couple with other signal lines, resulting in horizontal stripes on the display.

[0047] Specifically, the pixel unit includes R pixels, G pixels, and B pixels; the R pixels, G pixels, and B pixels in the plurality of pixel units are arranged horizontally in the pixel array.

[0048] Assume that the pixel array size is 4*4, such as Figure 6 and 7 , Figure 6 This is a schematic diagram of the pixel array layout in the first direction of the present invention. Figure 7 This is a schematic diagram of the pixel array layout in the second direction of the present invention; the pixel array includes multiple R pixel columns, G pixel columns, and B pixel columns; the data lines are electrically connected to the drains of the elements in the R pixel columns / G pixel columns / B pixel columns, respectively.

[0049] In this embodiment, the GIP unit is placed at the upper frame / lower frame of the liquid crystal display screen; the GIP unit is electrically connected to the gates of the pixels at the oblique positions of the pixel array in sequence.

[0050] Specifically, the leftmost GIP unit is electrically connected to the gate of the pixel on the bottommost oblique line in the first direction, and the rightmost GIP unit is electrically connected to the gate of the pixel on the bottommost oblique line in the second direction. The first direction is perpendicular to the second direction.

[0051] In this embodiment, the layout diagram of the GIP unit is as follows: Figure 2 , Figure 2 This is a schematic diagram of the GIP unit layout of the liquid crystal display screen of Example 1 of the present utility model, wherein the array circuit is as follows Figure 3 , Figure 3 This is a schematic diagram of the array circuit of Example 1 of the present utility model. Figure 3 In the figure, not all of the GIP units at the top are shown. Figure 3 The GIP unit on the far left is performing a step connection, connecting pixel 12, pixel 23, and pixel 34.

[0052] In order to better wire and arrange the GIP units, Example 1 stipulates:

[0053] like Figure 6 In the first direction, the leftmost GIP unit placed on the top border or the bottom border is connected to the gate of pixel 14, and the GIP to the right of the leftmost GIP unit is electrically connected to the gates of pixels 13 and 14. Then, the next GIP unit is electrically connected to the gates of pixels 12, 23, and 34. The next GIP unit is electrically connected to the gates of pixels 11, 22, 33, and 44, and so on, until it is connected to the gate of the last pixel 41.

[0054] Different from the first embodiment, this embodiment adopts the second direction. Specifically, in order to better wire and arrange the GIP units, the second embodiment provides:

[0055] like Figure 7 In the second direction, the rightmost GIP unit placed on the top border or the bottom border is connected to the gate of pixel 44, and the GIP to the right of the rightmost GIP unit is electrically connected to the gates of pixel 43 and pixel 34. Then, the next GIP unit is electrically connected to the gates of pixel 42, pixel 33, and pixel 24. The next GIP unit is electrically connected to the gates of pixel 41, pixel 32, pixel 23, and pixel 14, and so on, until it is connected to the gate of the last pixel 11.

[0056] In this embodiment, the GIP units are sequentially placed at intervals on the upper and lower frames of the liquid crystal display; the GIP units are sequentially electrically connected to the gates of the pixels at the oblique positions of the pixel array.

[0057] like Figure 4 and Figure 5 , Figure 4 This is a schematic diagram of the GIP unit layout of the liquid crystal display screen of Example 3 of the present utility model. Figure 5 This is a schematic diagram of the array circuit of Example 3 of the present invention; the GIP units connected to the pixels on the odd-numbered oblique lines of the pixel array in the first direction are placed at the upper frame position of the liquid crystal display screen, and the GIP units connected to the pixels on the even-numbered oblique lines of the pixel array in the first direction are placed at the lower frame position of the liquid crystal display screen.

[0058] It is worth noting that in Figure 5 , not all of the GIP units in the upper frame are shown.

[0059] The order of the ladder connection circuits in Example 3 is the same as that in Example 1, except that the direction of the ladder connection is different.

[0060] In this embodiment, it is specified that Figure 6 The pixel matrix shown, specifically:

[0061] The GIP unit on the leftmost side of the upper frame is electrically connected to pixel 14, the GIP unit on the leftmost side of the lower frame is electrically connected to pixel 24 and pixel 13, the next GIP unit on the upper frame is electrically connected to pixel 12, pixel 23, and pixel 34, the next GIP unit on the lower frame is electrically connected to pixel 44, pixel 33, pixel 22, and pixel 11, and so on, until all pixels are connected.

[0062] The GIP units connected to the pixels on the odd-numbered oblique lines in the second direction of the pixel array are placed at the upper frame position of the liquid crystal display, and the GIP units connected to the pixels on the even-numbered oblique lines in the second direction of the pixel array are placed at the lower frame position of the liquid crystal display.

[0063] In this embodiment, it is specified that Figure 7 The pixel matrix shown, specifically:

[0064] The rightmost GIP unit on the upper frame is electrically connected to pixel 44, the rightmost GIP unit on the lower frame is electrically connected to pixel 34 and pixel 43, the next GIP unit on the upper frame is electrically connected to pixel 42, pixel 33, and pixel 24, the next GIP unit on the lower frame is electrically connected to pixel 41, pixel 32, pixel 23, and pixel 14, and so on, until all pixels are connected.

[0065] In a second aspect, a narrow-frame liquid crystal display screen includes the array circuit of the first aspect.

[0066] By implementing the array circuit and narrow-border LCD display of the present invention, the left and right borders can be narrowed by arranging the GIP units at the upper and lower borders. By electrically connecting the gate lines and pixels in a stepped manner, coupling between the gate lines and the signal lines can be avoided. This solves the problem that the placement of the GIP units at the left and right borders of the LCD restricts the narrowing of the border and that the gate lines are easily coupled with other signal lines, resulting in horizontal stripes on the display.

[0067] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. An array circuit, characterized in that: include: multiple pixel units; Multiple data lines; multiple gate lines; Multiple GIP units; The pixels in the plurality of pixel units form a pixel array; The plurality of data lines are respectively electrically connected to the pixels in the pixel array in a longitudinal direction; The plurality of gate lines are electrically connected to pixel ladders in the pixel array; The plurality of GIP units are electrically connected to a plurality of gate lines respectively, and the GIP units are placed at the upper frame and / or lower frame of the liquid crystal display.

2. The array circuit according to claim 1, wherein: The pixel unit includes: R pixel, G pixel, B pixel; The R pixels, G pixels, and B pixels in the pixel unit are arranged horizontally in the pixel array.

3. The array circuit according to claim 2, wherein: The pixel array comprises: A plurality of R pixel columns, G pixel columns, and B pixel columns; The data lines are electrically connected to drains of elements in the R pixel column, the G pixel column, and the B pixel column, respectively.

4. The array circuit according to claim 3, wherein: The GIP unit is placed at the upper frame / lower frame position of the liquid crystal display screen; The GIP units are electrically connected to the gates of the pixels at the oblique positions of the pixel array in sequence.

5. The array circuit according to claim 3, wherein: The GIP units are sequentially placed at intervals on the upper and lower frames of the liquid crystal display; The GIP units are electrically connected to the gates of the pixels at the oblique positions of the pixel array in sequence.

6. The array circuit according to claim 4, characterized in that: The leftmost GIP unit is electrically connected to the gate of the pixel on the bottommost oblique line in the first direction, and the rightmost GIP unit is electrically connected to the gate of the pixel on the bottommost oblique line in the second direction, where the first direction is perpendicular to the second direction.

7. The array circuit according to claim 5, characterized in that: The GIP units connected to the pixels on the odd-numbered oblique lines in the first direction of the pixel array are placed at the upper frame position of the liquid crystal display, and the GIP units connected to the pixels on the even-numbered oblique lines in the first direction of the pixel array are placed at the lower frame position of the liquid crystal display.

8. The array circuit according to claim 5, wherein: The GIP units connected to the pixels on the odd-numbered oblique lines in the second direction of the pixel array are placed at the upper frame position of the liquid crystal display, and the GIP units connected to the pixels on the even-numbered oblique lines in the second direction of the pixel array are placed at the lower frame position of the liquid crystal display.

9. A narrow-frame liquid crystal display, characterized in that: The array circuit comprises the array circuit according to any one of claims 1 to 8.

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