Digital audio amplifier

Abstract

The utility model relates to a digital audio amplifier, which comprises a voltage stabilizing circuit for supplying power and an audio input device for providing audio input, and further comprises an operational amplification circuit for receiving audio from the audio input device; the adjusting multiple amplifying circuit comprises a plurality of resistors and / or resistor groups with different resistance values and a multi-throw switch, and the adjusting multiple amplifying circuit receives the audio frequency amplified by the operational amplifying circuit and then outputs the audio frequency to response equipment; and the key circuit is connected to the multi-throw switch and is used for adjusting the on-off of the multi-throw switch and the resistor and / or the resistor group.

Description

Technical Field

[0001] The utility model belongs to the field of audio equipment, and in particular relates to a digital audio amplifier. Background Art

[0002] With the development of social economy and the increasing popularization of digital technology, people have higher and higher requirements for audio fidelity. When amplifying audio, the distortion coefficient should be kept as low as possible. Circuit design, as the basis of system application, is the key to ensuring the normal operation of system application. Therefore, how to design audio circuits to reduce audio distortion is an urgent problem to be solved in audio equipment circuit design.

[0003] In view of this, the present application provides a digital audio amplifier. Utility Model Content

[0004] To this end, the utility model provides a digital audio amplifier.

[0005] The digital audio amplifier of the utility model includes a voltage stabilizing circuit for power supply and an audio input device for providing audio input, and further includes:

[0006] an operational amplifier circuit, receiving audio from the audio input device;

[0007] an adjustable multiplier amplifier circuit, comprising a plurality of resistors and / or resistor groups with different resistance values ​​and a multi-throw switch, wherein the adjustable multiplier amplifier circuit receives the audio amplified by the operational amplifier circuit and outputs the audio to a response device;

[0008] A key circuit is connected to the multi-throw switch to adjust the on-off state of the multi-throw switch and the resistor and / or resistor group.

[0009] Furthermore, the operational amplifier circuit includes an LM324 operational amplifier, and the audio input is output to the power amplifier circuit after passing through the positive electrode of the LM324 operational amplifier.

[0010] Furthermore, the power amplification circuit includes a TDA2003 power amplifier, which receives the audio output from the LM324 operational amplifier and outputs it to the response device.

[0011] Furthermore, it also includes a volume detection circuit, which receives audio from the power amplifier and is connected to the light emitting diode.

[0012] Furthermore, it also includes a counter circuit connected between the key circuit and the adjustment multiplication amplifier circuit.

[0013] Furthermore, it also includes a key anti-jitter circuit connected between the key circuit and the counter circuit.

[0014] Furthermore, it also includes a decoding display circuit for indicating the value of the key circuit.

[0015] The above technical solution of the present invention has the following advantages compared with the prior art:

[0016] In this utility model, the weak signal output by the sound source is amplified by the voltage of the preamplifier, and the distortion coefficient should be kept as small as possible. The volume level of the input audio is changed by adjusting the size of the resistor between the preamplifier pins. After passing through the preamplifier, the sound source signal enters the power amplifier for energy boosting to drive the speaker to work and restore it to a sound signal. At the same time, a volume amplifier circuit is designed to detect the volume of the amplified sound source signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 A circuit diagram of a digital audio amplifier provided by the utility model;

[0018] Figure 2 A signal flow diagram of a sound source signal and an operational amplifier of a digital audio amplifier provided by the present invention;

[0019] Figure 3 A signal flow diagram of a sound source signal and a power amplifier of a digital audio amplifier provided by the present invention;

[0020] Figure 4 This is a connection diagram of an analog selection switch and a decoder of a digital audio amplifier provided by the present invention;

[0021] Figure 5 This is a connection diagram of a transformer and LM7805 voltage regulator tube of a digital audio amplifier provided by the utility model;

[0022] Figure 6 This is a connection diagram of LM3914, a digital audio amplifier provided by the present invention;

[0023] Figure 7 This is a schematic diagram of the main part of an operational amplifier of a digital audio amplifier provided by the utility model;

[0024] Figure 8 This is a schematic diagram of the voltage-stabilizing power amplifier portion of a digital audio amplifier provided by the utility model;

[0025] Figure 9 This is a schematic diagram of the volume detection part of a digital audio amplifier provided by the utility model;

[0026] Figure 10 This is a schematic diagram of a power supply voltage stabilization circuit for a digital audio amplifier provided by the present invention;

[0027] Figure 11 This is a schematic diagram of a key anti-shake circuit for a digital audio amplifier provided by the present invention;

[0028] Figure 12 This is a schematic diagram of an operational amplifier circuit of a digital audio amplifier provided by the present invention;

[0029] Figure 13 This is a schematic diagram of a circuit for adjusting the amplification factor of a digital audio amplifier provided by the present invention;

[0030] Figure 14 A counter circuit schematic diagram of a digital audio amplifier provided by the utility model;

[0031] Figure 15 A schematic diagram of a decoding circuit of a digital audio amplifier provided by the present invention;

[0032] Figure 16 A power amplification circuit schematic diagram of a digital audio amplifier provided by the utility model;

[0033] Figure 17 This is a schematic diagram of a volume detection circuit for a digital audio amplifier provided by the utility model. DETAILED DESCRIPTION

[0034] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0035] The working principle of a digitally controlled audio amplifier is to amplify the weak signal output by the sound source through the preamplifier, and the distortion coefficient should be kept as small as possible. The volume level of the input audio is changed by adjusting the resistance between the preamplifier pins. After passing through the preamplifier, the sound source signal enters the power amplifier for energy boosting, so as to drive the speaker to work and restore it to a sound signal. At the same time, a volume amplifier circuit is designed to detect the volume of the amplified sound source signal.

[0036] The digital audio amplifier provided by the embodiment of the present disclosure realizes the integrated design of power supply voltage stabilization circuit, key circuit, operational amplifier circuit, magnification adjustment circuit, volume detection circuit, power amplifier circuit, counter circuit, decoding and display circuit, etc. Figure 1 shown.

[0037] The embodiment of the present disclosure selects LM324 as the operational amplifier for the digitally controlled audio amplifier application. Compared to standard operational amplifiers in single-power applications, this quad amplifier can operate with a power supply as low as 3.0 volts or as high as 32 volts, with a quiescent current of one-fifth that of the MC1741. The common-mode input range includes the negative power supply, thus eliminating the need for external bias components in many applications. The audio source signal is amplified by the operational amplifier, thereby changing the audio volume. The signal flow diagram of the audio source signal and the operational amplifier is shown in the figure below. Figure 2 shown.

[0038] The disclosed embodiment uses the TDA2003 as the power amplifier for this digitally controlled audio amplifier application. The TDA2003 offers low power, minimal distortion, strong current output capability, low harmonic distortion, and low crossover distortion. Each pin is protected against AC and DC short circuits, ensuring safe operation. The load voltage can reach 40V. After passing through the preamplifier, the audio signal enters the TDA2003 power amplifier, where it is boosted to drive the speaker and converted back into a sound signal. The signal flow diagram for the audio signal and the power amplifier is shown in the figure below. Figure 3 shown.

[0039] The disclosed embodiment uses the NE555 as the key anti-jitter chip for the digitally controlled audio amplifier application, and the 74LS191 as the counter. To prevent key jitter, a delay is required when pressing. The NE555 only requires simple resistors and capacitors to achieve a specific oscillation delay function, with high timing accuracy and good temperature stability. The 74LS191 is a synchronous decimal reversible counter with dual clock inputs and functions such as clearing and preset numbers. By pressing the key, the NE555 outputs a short high level, generating a pulse signal that is input into the 74LS191 counter, thereby adding or subtracting the count value.

[0040] The disclosed embodiment selects CD4051 as the analog selection switch chip for the digital control audio amplifier application, and selects CD4511 as the decoder. CD4511 is a BCD code-seven-segment code decoder for driving a common cathode LED (digital tube) display. It can provide a large pull current and can directly drive the LED display. When the button is pressed, the pulse signal is input to the 74LS191 counter to add or subtract the value, and the binary is output to the analog selection switch CD4051 through the Q0, Q1, Q2, and Q3 pins, changing the conduction pin of CD4051, thereby changing the resistance of the operational amplifier to change the audio amplification level. At the same time, the 74LS191 counter value is also output to the decoder CD4511, and after decoding by the decoder, the current value of the counter is displayed on the common cathode digital tube, that is, the current audio volume level. The connection diagram of the analog selection switch and the decoder is shown as follows. Figure 4 shown.

[0041] In this embodiment, the LM7805 is selected as the voltage regulator chip for the digital audio amplifier application, and a 10:1 transformer is selected. 220V AC is output through the 10:1 transformer to provide 11V power to the power amplifier, and also to the LM7805 for voltage regulation. Finally, the voltage regulator outputs a 5V stable voltage to power other chips. The connection diagram of the transformer and the LM7805 voltage regulator is shown in the figure. Figure 5 shown.

[0042] The embodiment of the present disclosure selects LM3914 as the LED driver chip for volume detection in the digital control audio amplifier application. LM3914 contains an input buffer, a 10-level precision voltage comparator, a 1.25V reference voltage source, and a dot / bar display mode selection circuit, etc., and is provided with a hysteresis circuit. The display does not jump immediately from one LED to another, but transitions smoothly, which can eliminate noise interference and improve the flickering phenomenon caused by rapid changes in the input signal. And because the internal resistor divider is floating, the voltage measurement range is very wide. The sound source signal passes through the power amplifier and is input into the LM3914. The LM3914 drives the light-emitting diode to perform dot display or bar display, thereby realizing the volume detection function. The connection diagram of LM3914 is shown as follows Figure 6 shown.

[0043] Specifically, in the embodiment of the present disclosure, each circuit in the embodiment of the present disclosure is described. The digital control audio amplifier application is mainly divided into three parts, namely the operational amplifier main part, the volume detection part and the voltage stabilizing amplifier part. The schematic diagrams are shown as follows: Figure 7-Figure 9 shown.

[0044] The digital control audio amplifier application mainly consists of eight parts: power supply voltage stabilization circuit, key anti-jitter circuit, operational amplifier circuit, amplification adjustment circuit, volume detection circuit, power amplifier circuit, counter circuit, and decoding display circuit.

[0045] (1) Regulated power supply circuit

[0046] 220V AC passes through a 10:1 transformer. During the positive half cycle, the current flows through the circuit where D1 and C1 are located, and the output voltage is 11V. During the negative half cycle, the current flows through the circuit where D2 and C1 are located, and the output voltage is also 11V. Part of the output 11V voltage is supplied to the two power amplifier circuits through V1 and V2, and the other part is supplied to the LM7805 voltage regulator for voltage stabilization. Finally, a stable 5V voltage is output from pin 3 of the voltage regulator LM7805 to supply other chip circuits. The schematic diagram of the power supply voltage regulator circuit is as follows: Figure 10 shown.

[0047] (2) Key anti-jitter circuit

[0048] When the button is not pressed, pins 2 and 4 input a high level, and pin 3 outputs a low level. When the button is pressed, pins 2 and 4 input a low level, and pin 3 outputs a high level. When the button is pressed, capacitor C9 is charged, and when it is charged to 2 / 3 VCC, pin 3 outputs a low level again. During the charging process, regardless of whether the levels of pins 2 and 4 become high or low, pin 3 outputs a high level, thus forming a short high level, which is called a quasi-steady state, and a low level is called a steady state. The duration of the high level is determined by the length of time the capacitor is charged. The formula is T=1.1*R15*C10=1.1*10000*10*0.000001=0.110s=110ms, so the button delay time is 110ms. The button anti-jitter circuit is as follows Figure 11 shown.

[0049] (3) Operational amplifier circuit

[0050] The op amp circuit is used to adjust the volume level of the input audio. It is a non-inverting input proportional amplifier composed of an integrated op amp. If an equivalent variable resistor Rf is connected between pins 1 and 2, its voltage amplification factor Auf = 1 + (Rf / R1). If R1 = 10K, then when Rf = 0, Auf = 1; when Rf = 10K, Auf = 2; when Rf = 20K, Auf = 3; when Rf = 70K, Auf = 8. Therefore, the purpose of adjusting the audio volume level can be achieved by simply changing the resistance value of Rf. The schematic diagram of the operational amplifier circuit is shown below. Figure 12 shown.

[0051] (4) Adjusting the amplification factor circuit

[0052] The method of manually adjusting the amplification factor generally uses a potentiometer, but in order to achieve the purpose of digitally controlling the amplification factor, this application replaces the potentiometer with a group of resistor networks and uses a group of conversion switches to control the connection of different resistors to the circuit. When the conversion switches connect different resistors to replace Rf, the purpose of graded change of the amplification factor is achieved.

[0053] CD4051 is equivalent to a single-pole eight-throw switch. Which channel the switch is connected to is determined by the input 3-bit address code ABC. The signal of the three-bit address code ABC comes from the three-bit binary code generated by the counter. For example, when the counter counts to "1", the corresponding binary code is "001", and the address code input to ABC is "001". At this time, X1 and X terminals are connected, and the equivalent resistance between pins 1 and 2 of the operational amplifier is 20K. The calculation shows that the amplification factor of the operational amplifier is 2 times. The schematic diagram of the circuit for adjusting the amplification factor is as follows: Figure 13 shown.

[0054] (5) Counter circuit

[0055] Pins P0-P3 are parallel data inputs. Initially, if all are grounded, the preset count is 0. However, the 74LS191's preset count function requires pin 11 to be low, while other functions require pin 11 to be high. Therefore, a charge-discharge circuit consisting of a resistor and capacitor is incorporated into this circuit. Initially, the capacitor charges when pin 11 is low, then discharges when pin 11 is high, restarting the counter from 0. When a pulse is received on the CLK pin, the counter performs a calculation, and the value is output in binary form on pins Q0-Q3.

[0056] When adding counts, press button S1. At this time, pin 1 of the OR gate inputs a high level, and pin 2 of the OR gate is grounded, so after the OR operation, a high level is output from pin 3 of the OR gate. After releasing button S1, pin 1 of the OR gate inputs a low level, and after the OR operation, a low level is output at pin 3, so a pulse is input to the CLK pin of the counter 74LS191. At the same time, when pin 2 of S2 is grounded, pin 5 of the counter 74LS191, that is, the addition and subtraction counting control terminal input is a low level. At this time, addition count is selected, so the count value is increased by 1. Similarly, after pressing button S1, pin 3 of the OR gate outputs a high level as a pulse input to the CLK pin of the counter 74LS191. At the same time, when pin 2 of S2 is connected to VCC, pin 5 of the counter 74LS191 inputs a high level, and subtraction count is selected, and the count value is reduced by 1. The schematic diagram of the counter circuit is as follows Figure 14 shown.

[0057] (6) Decoding display circuit

[0058] When BI=0, no matter what the status of other input terminals is, the seven-segment digital tube is off (blank) and no numbers are displayed;

[0059] When BI=1, LT=0, the decoding output is all 1, no matter what the input ABCD status is, the seven segments are all lit and display "8". It is mainly used to detect whether the digital tube is damaged, so the digital tube will display BCD code numbers only when BI=1, LT=1;

[0060] When LE=0, decoding output is allowed. When LE=1, the decoder is in the locked hold state, and the decoder output is maintained at the value when LE=0;

[0061] Therefore, in this decoding display circuit, the BI and LT pins of CD4511 are connected to VCC, and the LE pin is grounded. Figure 15 shown.

[0062] (7) Power amplifier circuit

[0063] The power amplifier circuit is mainly used to amplify the power of the audio signal passing through the op amp circuit to drive the speaker to produce sound. It should be noted that the resistors R5 and R10 should be less than 5 ohms or can be directly replaced by wires to prevent self-excitation. And it should be noted that this circuit cannot be open, otherwise the circuit will heat up in seconds. The negative feedback circuit, that is, the circuit with resistors R3 and R4 in series and R8 and R9 cannot be open, otherwise the circuit will also heat up. The schematic diagram of the power amplifier circuit is as follows Figure 16 shown.

[0064] (8) Volume detection circuit

[0065] The LM3914 is a 10-bit LED driver that converts analog input into digital output to drive 10-bit LEDs for dot or bar display. Ten precision voltage divider resistors are connected between pins 4 and 6. The LM3914 reference voltage source is set to output approximately 5V, that is, a 5V reference voltage Vref is maintained between pins 7 and 8. This reference can be directly used for the internal voltage divider. In this way, when a 0-5V voltage is input to pin 5, 0-10 LEDs can be lit through the comparator. The volume detection circuit schematic is shown in the figure. Figure 17 shown.

[0066] Obviously, the above embodiments are merely examples for clarity of explanation and are not intended to limit the implementation methods. Those skilled in the art will readily appreciate that other variations or modifications based on the above descriptions are possible. It is not necessary and impossible to enumerate all implementation methods here. Obvious variations or modifications arising therefrom remain within the scope of protection of the present invention.

Claims

1. A digital audio amplifier, comprising a voltage stabilizing circuit for power supply and an audio input device for providing audio input, characterized in that: Also includes: an operational amplifier circuit, receiving audio from the audio input device; an adjustable multiplier amplifier circuit, comprising a plurality of resistors and / or resistor groups with different resistance values ​​and a multi-throw switch, wherein the adjustable multiplier amplifier circuit receives the audio amplified by the operational amplifier circuit and outputs the audio to a response device; A key circuit is connected to the multi-throw switch to adjust the on-off state of the multi-throw switch and the resistor and / or resistor group.

2. The digital audio amplifier according to claim 1, wherein: The operational amplifier circuit includes an LM324 operational amplifier, and the audio input is output to the power amplifier circuit after passing through the positive electrode of the LM324 operational amplifier.

3. The digital audio amplifier according to claim 2, wherein: The power amplification circuit includes a TDA2003 power amplifier, which receives the audio output from the LM324 operational amplifier and outputs it to a response device.

4. The digital audio amplifier according to claim 3, wherein: The invention also includes a volume detection circuit, which receives audio from the TDA2003 power amplifier and connects to the light emitting diode.

5. The digital audio amplifier according to claim 1, wherein: It also includes a counter circuit connected between the key circuit and the adjustment multiple amplification circuit.

6. The digital audio amplifier according to claim 5, wherein: It also includes a key anti-jitter circuit connected between the key circuit and the counter circuit.

7. The digital audio amplifier according to claim 1, wherein: It also includes a decoding display circuit for indicating the value of the key circuit.

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