Voltage and current isolation sampling circuit
By designing current and voltage isolation sampling circuits and using current isolation sampling chips and voltage isolation sampling chips, high-precision current and voltage isolation acquisition is achieved, which solves the problems of poor sampling accuracy and cumbersome circuits in the existing technology and simplifies the circuit structure.
Patent Information
- Application Number
- CN202422498795.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-15
- Publication Date
- 2025-09-23
- Estimated Expiration
- 2034-10-15
AI Technical Summary
In the existing technology, the voltage and current sampling accuracy is poor, the circuit is complicated and isolated collection cannot be achieved.
A voltage and current isolation sampling circuit is designed. A current isolation sampling chip and a voltage isolation sampling chip are used. By connecting them in series in the circuit to be sampled and connecting them to the signal acquisition port of the central processing unit, isolated current and voltage acquisition can be achieved.
It achieves high-precision current and voltage isolation acquisition, simplifies the circuit structure, and prevents noise interference. It is suitable for most isolated power supply circuits that need to acquire current and voltage.
Smart Images
Figure CN223377387U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of voltage and current sampling, and in particular relates to an isolation sampling circuit for voltage and current. Background Art
[0002] In various switching isolated power supplies, sampling of input and output voltage and current is often necessary. In existing technologies, DC voltage and current sampling typically involves first dividing the voltage signal through resistors into tens of millivolts, then amplifying it through an amplifier circuit to a few volts before feeding it into an analog-to-digital converter chip. However, this sampling circuit suffers from poor sampling accuracy, complex circuitry, numerous components, poor temperature stability, and inability to achieve isolated data acquisition.
[0003] From the above, it is urgent to design an isolated sampling circuit with high sampling accuracy and fewer circuit components. Summary of the Invention
[0004] The purpose of the utility model is to provide a voltage and current isolation sampling circuit to solve the problems of poor sampling accuracy, complicated circuits and inability to achieve isolated sampling in the prior art.
[0005] In order to achieve the above purpose, the technical solution of the utility model is:
[0006] A voltage and current isolation sampling circuit comprises a current isolation sampling circuit and a voltage isolation sampling circuit, wherein current sampling terminals A and B of the current isolation sampling circuit are connected in series in a circuit bus to be sampled, and a current sampling output terminal C of the current isolation sampling circuit is connected to a signal acquisition port of a central processing unit; a voltage sampling terminal D of the voltage isolation sampling circuit is connected to a voltage to be sampled in the circuit to be sampled, and an output voltage sampling signal terminal E of the voltage isolation sampling circuit is connected to a signal acquisition port of a central processing unit.
[0007] Furthermore, it includes resistor R3, resistor R4, resistor R5, resistor R6, resistor R7, resistor R8, resistor R9, resistor R10, capacitor C5, capacitor C6, capacitor C9, capacitor C10, capacitor C11, capacitor C10, capacitor C12, capacitor C20, capacitor C21, current isolation sampling chip U2, voltage isolation sampling chip U3 and isolation converter U4; wherein, pin 1 and pin 2 of the current isolation sampling chip U2 are connected as the current sampling terminal A of the current isolation sampling circuit, and pin 3 and pin 4 of the current isolation sampling chip U2 are connected as the current sampling terminal A of the current isolation sampling circuit. Terminal B, the current sampling terminal A of the current isolation sampling circuit and the current sampling terminal B of the current isolation sampling circuit are connected in series in the circuit bus to be sampled; the 8th pin of the current isolation sampling chip U2 is connected to one end of the capacitor C5, and the other end of the capacitor C5 is connected to one end of the capacitor C6, one end of the resistor R4, and the 5th pin of the current isolation sampling chip U2 and grounded; the 7th pin of the current isolation sampling chip U2 is connected to one end of the resistor R3, and the other end of the resistor R3, the other end of the capacitor C6, and the other end of the resistor R4 are connected to the current sampling output terminal C of the current isolation sampling circuit, and the current sampling output terminal C is connected to the signal acquisition port of the central processing unit;
[0008] Pins 1 and 4 of the voltage isolation sampling chip U3 are connected to the two ends of the capacitor C12 respectively; Pin 2 of the voltage isolation sampling chip U3 is connected to the resistor R8 and capacitor C9, and capacitor C9 is connected to the resistor R9 and pin 3 of the voltage isolation sampling chip U3; the other end of the resistor R8 is connected to one end of the resistor R5, one end of the resistor R6, and one end of the resistor R7; the other end of the resistor R7 and the other end of the resistor R9 are connected to the ground VOUTGND; the other end of the resistor R5 is connected to the other end of the resistor R6, and this connection point serves as the voltage sampling terminal D of the voltage isolation sampling circuit and the current isolation The current sampling terminal B of the sampling circuit is connected; the 8th pin of the voltage isolation sampling chip U3 is commonly connected to the capacitor C10, the 8th pin of the current isolation sampling chip U2, and one end of the capacitor C5; the 5th pin of the voltage isolation sampling chip U3 is connected to the other end of the capacitor C10 and is grounded; the 7th pin of the voltage isolation sampling chip U3 is connected to the signal acquisition port of the central processing unit as the output voltage sampling signal terminal E of the voltage isolation sampling circuit; the 6th pin of the voltage isolation sampling chip U3 is commonly connected to one end of the resistor R10 and one end of the capacitor C11, and the other end of the resistor R10 and the other end of the capacitor C11 are grounded;
[0009] Pin 5 of the isolation converter U4 is connected to the input voltage VIN of the isolation voltage converter, pin 3 is left floating, and pin 4 is grounded VOUTGND; pin 1 of the isolation converter U4 is connected to one end of capacitor C20 and one end of capacitor C21, and this connection point is connected to pin 8 of the voltage isolation sampling chip U3 and pin 8 of the current isolation sampling chip U2.
[0010] Furthermore, it also includes a voltage stabilizing chip U5, a capacitor C7 and a capacitor C8, wherein pin 1 of the voltage stabilizing chip U5 is connected to the current sampling terminal A of the current isolation sampling circuit, and pin 3 of the voltage stabilizing chip U5 is connected to pin 1 of the current isolation sampling chip U2.
[0011] Compared with the prior art, the technical effects of the present invention are as follows:
[0012] The utility model is connected to the current in the sampled circuit and the signal acquisition port of the central processing unit through the current isolation sampling terminals A and B and the output sampling signal terminal C, respectively, and the isolation voltage sampling chip U3 and the isolation current sampling chip U2 are used to achieve isolation (different reference grounds for the front and back stages) and acquisition of current and voltage, with high integration precision. Due to the use of the isolation circuit, the detection signal is isolated from the control signal ground, thus preventing noise interference and enabling isolated acquisition. It is suitable for the vast majority of isolated power supply circuits that need to acquire current and voltage. At the same time, the circuit of the utility model is simplified and easy to implement. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 This is a structural diagram of the utility model.
[0014] Figure 2 This is a specific circuit diagram of an embodiment of the present utility model. DETAILED DESCRIPTION
[0015] The present invention is further explained below with reference to the accompanying drawings and specific embodiments.
[0016] like Figure 1 As shown, the voltage and current isolation sampling circuit provided by the present invention includes a current isolation sampling circuit 1 and a voltage isolation sampling circuit 2, wherein the current sampling terminals A and B of the current isolation sampling circuit 1 are connected in series in the circuit bus to be sampled, and the current sampling output terminal C of the current isolation sampling circuit 1 is connected to the signal acquisition port of the central processing unit; the voltage sampling terminal D of the voltage isolation sampling circuit 2 is connected to the voltage to be sampled in the circuit to be sampled, and the output voltage sampling signal terminal E of the voltage isolation sampling circuit 2 is connected to the signal acquisition port of the central processing unit.
[0017] Example 1:
[0018] See also Figure 2, which is a voltage and current isolation sampling circuit provided in the first preferred embodiment of the utility model, includes a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, a resistor R9, a resistor R10, a capacitor C5, a capacitor C6, a capacitor C9, a capacitor C10, a capacitor C11, a capacitor C10, a capacitor C12, a capacitor C20, a capacitor C21, a current isolation sampling chip U2, a voltage isolation sampling chip U3 and an isolation converter U4. Among them, pins 1 and 2 of the current isolation sampling chip U2 are connected as the current sampling terminal A of the current isolation sampling circuit, and pins 3 and 4 of the current isolation sampling chip U2 are connected as the current sampling terminal B of the current isolation sampling circuit. The current sampling terminal A of the current isolation sampling circuit and the current sampling terminal B of the current isolation sampling circuit are connected in series in the circuit bus to be sampled; pin 8 of the current isolation sampling chip U2 is connected to one end of the capacitor C5, and the other end of the capacitor C5 is connected to one end of the capacitor C6, one end of the resistor R4, and pin 5 of the current isolation sampling chip U2 and grounded; pin 7 of the current isolation sampling chip U2 is connected to one end of the resistor R3, and the other end of the resistor R3, the other end of the capacitor C6, and the other end of the resistor R4 are connected to the current sampling output terminal C of the current isolation sampling circuit, and the current sampling output terminal C is connected to the signal acquisition port of the central processing unit.
[0019] Pin 1 and pin 4 of the voltage isolation sampling chip U3 are connected to the two ends of the capacitor C12 respectively; pin 2 of the voltage isolation sampling chip U3 is connected to the resistor R8 and the capacitor C9, and the capacitor C9 is connected to the resistor R9 and the pin 3 of the voltage isolation sampling chip U3; the other end of the resistor R8 is connected to one end of the resistor R5, one end of the resistor R6, and one end of the resistor R7; the other end of the resistor R7 and the other end of the resistor R9 are connected to the ground VOUTGND; the other end of the resistor R5 is connected to the other end of the resistor R6, and this connection point serves as the voltage sampling terminal D of the voltage isolation sampling circuit 2 and the current isolation sampling terminal D. The current sampling terminal B of the sampling circuit is connected; the 8th pin of the voltage isolation sampling chip U3 is connected to the capacitor C10, the 8th pin of the current isolation sampling chip U2, and one end of the capacitor C5; the 5th pin of the voltage isolation sampling chip U3 is connected to the other end of the capacitor C10 and is grounded; the 7th pin of the voltage isolation sampling chip U3 is connected to the signal acquisition port of the central processing unit as the output voltage sampling signal terminal (E) of the voltage isolation sampling circuit 2; the 6th pin of the voltage isolation sampling chip U3 is connected to one end of the resistor R10 and one end of the capacitor C11, and the other end of the resistor R10 and the other end of the capacitor C11 are grounded.
[0020] Pin 5 of the isolation converter U4 is connected to the input voltage VIN of the isolation power converter U1, pin 3 is left floating, and pin 4 is grounded VOUTGND; pin 1 of the isolation converter U4 is connected to one end of capacitor C20 and one end of capacitor C21, and this connection point is connected to pin 8 of the voltage isolation sampling chip U3 and pin 8 of the current isolation sampling chip U2.
[0021] The specific connection between the above-mentioned voltage and current isolation sampling circuit and the isolated switching power supply it samples is as follows:
[0022] The current sampling terminals A and B of the current isolation sampling chip U2 are connected in series to the output busbar of the isolated power converter U1 to be sampled. The current sampling output terminal C is connected to resistor R3 to output the current sampling signal. The output current sampling signal is connected to ground through decoupling capacitor C6. This reference ground is the reference ground GND of the output after isolation. Resistors R3 and R4 act as voltage dividers to adjust the output current sampling signal. When the sampling current changes, the voltage at the current sampling output terminal C changes accordingly. Pin 8 of the current isolation sampling chip U2 is the chip power pin; pin 1 of the isolation converter U4 is connected to pin 8 of the current isolation sampling chip U2, providing the power supply voltage for U2. Pin 8 of U2 is connected to decoupling capacitor C5 and then to ground. This reference ground is the reference ground GND of the output after isolation.
[0023] The voltage sampling terminal D of the voltage isolation sampling chip U3 is connected to the output voltage of the U1 isolated power converter circuit to be sampled. The voltage sampling terminal D is input into the voltage isolation sampling chip U3 through resistors R5 to R8. Resistors R5, R6, and R7 are voltage dividing resistors, and resistor R8 is a current limiting resistor. After passing through the voltage isolation sampling chip U3, the output voltage sampling signal terminal E of the voltage isolation sampling circuit 2 is connected to the signal acquisition port of the central processing unit.
[0024] The detailed working process of the present invention is as follows: the current detection terminals A and B are connected to the current detection circuit of the isolated switching power supply used in the present invention. When the load current of the controlled switching power supply changes, the load current signal is isolated by the current isolation sampling circuit composed of the current isolation sampling chip U2, resistors R3, R4, capacitors C5, C6, and the isolated signal is sent to the central processing unit.
[0025] The voltage isolation sampling terminal D is connected to the output sampling voltage of the isolated switching power supply. When the output voltage of the controlled switching power supply changes, the voltage signal is isolated by the voltage isolation sampling circuit composed of the voltage isolation sampling chip U3, resistors R5~R9, and capacitors C9~C12. The isolated signal is sent to the central processing unit, thereby sampling the output current and voltage of the controlled isolated switching power supply.
[0026] More preferably, the voltage and current isolation sampling circuit of Example 1 may further include a voltage stabilizing chip U5, a capacitor C7, and a capacitor C8, wherein pin 1 of the voltage stabilizing chip U5 is connected to the current sampling terminal A of the current isolation sampling circuit; pin 3 of the voltage stabilizing chip U5 is connected to pin 1 of the current isolation sampling chip U2, for providing a stable input voltage to the primary side of the current isolation sampling chip U2.
[0027] Figure 2 In the figure, U3 uses the NSI1312S chip, U2 uses the CC6920BS0 chip, U1, G1, G2, C1, C2, C3, and C4 are isolated power modules and filtering circuits around the power supply, U4 and U5 are 3.3V and 5V voltage regulators, C5, C6, C12, C9, C10, and C11 are 0.1uF / 35V capacitors, C7, C8, C20, and C21 are 4.7uF / 50V capacitors, R5, R6, and R7 are voltage isolation sampling divider resistors. If the voltage at point D is 10V, R5 and R6 are selected as 10KΩ, R7 is selected as 1KΩ, R8 is a current limiting resistor of 1KΩ, and R9 is 10Ω; R3 and R4 are current isolation sampling resistors, and the selection is 100Ω.
[0028] The above is only a specific implementation method of the present invention, but the scope of protection of the present invention is not limited to this. Any changes or substitutions that can be thought of by any technician familiar with the field within the technical scope disclosed by the present invention without creative work should be included in the scope of protection of the present invention.
Claims
1. A voltage and current isolation sampling circuit, characterized in that: The invention comprises a current isolation sampling circuit (1) and a voltage isolation sampling circuit (2), wherein current sampling terminals A and B of the current isolation sampling circuit (1) are connected in series in a circuit bus to be sampled, and a current sampling output terminal C of the current isolation sampling circuit (1) is connected to a signal acquisition port of a central processing unit; a voltage sampling terminal D of the voltage isolation sampling circuit (2) is connected to a voltage to be sampled in the circuit to be sampled, and an output voltage sampling signal terminal E of the voltage isolation sampling circuit (2) is connected to a signal acquisition port of a central processing unit.
2. The isolated voltage and current sampling circuit according to claim 1, characterized in that: It includes resistor R3, resistor R4, resistor R5, resistor R6, resistor R7, resistor R8, resistor R9, resistor R10, capacitor C5, capacitor C6, capacitor C9, capacitor C10, capacitor C11, capacitor C10, capacitor C12, capacitor C20, capacitor C21, current isolation sampling chip U2, voltage isolation sampling chip U3 and isolation converter U4; wherein, pin 1 and pin 2 of the current isolation sampling chip U2 are connected as the current sampling terminal A of the current isolation sampling circuit, and pin 3 and pin 4 of the current isolation sampling chip U2 are connected as the current sampling terminal B of the current isolation sampling circuit. The current sampling terminal A of the current isolation sampling circuit and the current sampling terminal B of the current isolation sampling circuit are connected in series in the circuit bus to be sampled; the 8th pin of the current isolation sampling chip U2 is connected to one end of the capacitor C5, and the other end of the capacitor C5 is connected to one end of the capacitor C6, one end of the resistor R4, and the 5th pin of the current isolation sampling chip U2 and grounded; the 7th pin of the current isolation sampling chip U2 is connected to one end of the resistor R3, and the other end of the resistor R3, the other end of the capacitor C6, and the other end of the resistor R4 are connected to the current sampling output terminal C of the current isolation sampling circuit, and the current sampling output terminal C is connected to the signal acquisition port of the central processing unit; Pin 1 and pin 4 of the voltage isolation sampling chip U3 are connected to the two ends of the capacitor C12 respectively; Pin 2 of the voltage isolation sampling chip U3 is connected to the resistor R8 and the capacitor C9, and the capacitor C9 is connected to the resistor R9 and the pin 3 of the voltage isolation sampling chip U3; the other end of the resistor R8 is connected to one end of the resistor R5, one end of the resistor R6, and one end of the resistor R7; the other end of the resistor R7 and the other end of the resistor R9 are connected to the ground VOUTGND; the other end of the resistor R5 is connected to the other end of the resistor R6, and this connection point serves as the voltage sampling terminal D of the voltage isolation sampling circuit (2) and the current isolation terminal. The current sampling terminal B of the sampling circuit is connected; the 8th pin of the voltage isolation sampling chip U3 is connected to the capacitor C10, the 8th pin of the current isolation sampling chip U2, and one end of the capacitor C5; the 5th pin of the voltage isolation sampling chip U3 is connected to the other end of the capacitor C10 and is grounded; the 7th pin of the voltage isolation sampling chip U3 is connected to the signal acquisition port of the central processing unit as the output voltage sampling signal terminal E of the voltage isolation sampling circuit (2); the 6th pin of the voltage isolation sampling chip U3 is connected to one end of the resistor R10 and one end of the capacitor C11, and the other end of the resistor R10 and the other end of the capacitor C11 are grounded; Pin 5 of the isolation converter U4 is connected to the input voltage of the isolation voltage converter, pin 3 of the isolation converter U4 is left floating, pin 4 of the isolation converter U4 is grounded to VOUTGND, and pin 1 of the isolation converter U4 is connected to one end of capacitor C20 and one end of capacitor C21. This connection point is connected to pin 8 of the voltage isolation sampling chip U3 and pin 8 of the current isolation sampling chip U2.
3. The isolated voltage and current sampling circuit according to claim 2, characterized in that: It also includes a voltage stabilizing chip U5, a capacitor C7 and a capacitor C8, wherein pin 1 of the voltage stabilizing chip U5 is connected to the current sampling terminal A of the current isolation sampling circuit, and pin 3 of the voltage stabilizing chip U5 is connected to pin 1 of the current isolation sampling chip U2.