Bus capacitor overvoltage discharge circuit
By designing a bus capacitor overvoltage discharge circuit, using the power module, control module and regulation module, combined with the comparator and MOS tube, the stable discharge of the bus capacitor voltage is achieved, solving the problem of difficult control of the discharge speed caused by poor control of the resistance value, and improving the safety and reliability of the system.
Patent Information
- Application Number
- CN202422769371.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-13
- Publication Date
- 2025-09-23
- Estimated Expiration
- 2034-11-13
AI Technical Summary
In the existing bus capacitor overvoltage protection circuit, when the voltage is reduced by a parallel resistor, the resistance value is difficult to control, resulting in difficulty in controlling the discharge speed and poor safety.
A busbar capacitor overvoltage discharge circuit is designed, including a power module, a control module, a determination module, and a regulation module. The capacitor voltage is determined by a comparator and an amplifier, the discharge is controlled by a MOS tube, and the discharge speed is adjusted by a feedback resistor to ensure that the voltage is stably reduced within a safe range.
The stable and reliable discharge of the bus capacitor voltage is achieved, the problems of resistor overheating and uncontrollable discharge speed are avoided, and the safety and reliability of the system are ensured.
Smart Images

Figure CN223379076U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of power electronics technology, mainly to a three-phase four-wire photovoltaic inverter / hybrid inverter product, and is a method for safely and stably discharging a bus capacitor when overvoltage occurs, specifically to a bus capacitor overvoltage discharge circuit. Background Art
[0002] Small and medium-sized string-based on-grid and off-grid photovoltaic inverters are designed with a bus voltage overvoltage protection circuit. When the bus voltage is overvoltage, the overvoltage protection circuit can quickly reduce the bus voltage, but the voltage on the bus capacitor drops more slowly, making it less safe. Existing discharge methods generally involve connecting a resistor in parallel across the bus capacitor. However, this method has two major problems: first, when the resistance of the parallel resistor is too large, the discharge speed is extremely slow, requiring a long wait time; second, when the resistance of the parallel resistor is small, the discharge speed is difficult to control, resulting in the resistor easily overheating and exceeding its rated power. Utility Model Content
[0003] In view of this, the present application provides a bus capacitor overvoltage discharge circuit. When the bus capacitor voltage is too low, the power is cut off. When the bus capacitor is overvoltage, the bus is controlled to discharge stably, and the dangerous voltage is promptly reduced to a safe range, so that the discharge system can operate stably and reliably. This solves the problem in the above-mentioned prior art of connecting a resistor in parallel at both ends of the bus capacitor to reduce the voltage, but the discharge speed is difficult to control due to the difficulty in controlling the resistance value. The specific solution is as follows:
[0004] A busbar capacitor overvoltage discharge circuit, comprising:
[0005] A power supply module, comprising a reference power supply and a power supply, wherein the reference power supply provides a reference voltage potential for the discharge circuit, and the power supply provides a power supply voltage potential for the discharge circuit;
[0006] The control module is connected to both ends of the bus capacitor and is used to control the on and off of the discharge circuit;
[0007] A determination module, whose input ends are respectively connected to a reference power supply, a power supply, and one end of a bus capacitor, and the determination module determines the conduction status of the discharge circuit according to a voltage value input by the bus capacitor;
[0008] The regulating module has its input end connected to the power supply and the output end of the determination module respectively, and its output end is connected to the control module. The regulating module regulates the voltage value provided by the determination module to control the discharge speed of the discharge circuit.
[0009] Preferably, the determination module includes a comparator, the positive electrode of the comparator is connected to the power supply, the negative electrode of the comparator is grounded, the positive input terminal of the comparator is connected to the bus capacitor, and the negative input terminal of the comparator is connected to the reference power supply;
[0010] The regulating module includes an amplifier, wherein the positive electrode of the amplifier is connected to the power supply, the negative electrode of the amplifier is grounded, the non-inverting input terminal of the amplifier is connected to the output terminal of the comparator, and the inverting input terminal of the amplifier is grounded;
[0011] The control module includes a MOS transistor, the gate of the MOS transistor is connected to the output end of the amplifier, the drain of the MOS transistor is connected to one end of the bus capacitor, and the source of the MOS transistor is respectively connected to the other end of the bus capacitor and the inverting input end of the amplifier.
[0012] Preferably, a hysteresis resistor is provided between the negative input terminal and the output terminal of the comparator, and a voltage divider resistor is provided at the positive input terminal of the comparator.
[0013] Preferably, the inverting input terminal and the non-inverting input terminal of the amplifier are respectively provided with feedback resistors;
[0014] One end of the feedback resistor is connected to the MOS tube and the inverting input end of the amplifier respectively, and the other end of the feedback resistor is connected to the capacitor and the non-inverting input end of the amplifier respectively.
[0015] Preferably, the non-inverting input terminal and the inverting input terminal of the amplifier are provided with voltage dividing resistors.
[0016] Preferably, a current limiting resistor is provided at the output end of the amplifier.
[0017] Preferably, the MOS transistor is a depletion-type N-channel transistor.
[0018] Compared with the prior art, the present invention has the following advantages:
[0019] The present application provides a reference voltage potential and a supply voltage potential for the discharge circuit respectively through the power supply module set up; the judgment module set up makes a judgment on whether the bus voltage is undervoltage or overvoltage according to the voltage value of the bus capacitor input; the control module set up controls the on-off status of the discharge circuit accordingly according to the judgment result of the bus capacitor voltage by the judgment module, specifically, when it is judged that the bus capacitor voltage is too low, the bus is controlled to be powered off, and when the bus capacitor is overvoltage, the bus is controlled to discharge stably, and after the voltage drops to a reasonable voltage range, the discharge is stopped and restored to use in time, so as to realize the on-off control of the discharge circuit according to the voltage at both ends of the bus capacitor; the voltage value provided by the judgment module is adjusted by the adjustment module to control the discharge speed of the discharge circuit, thereby solving the problem in the prior art that the voltage is reduced by connecting a parallel resistor at both ends of the bus capacitor, but the discharge speed is difficult to control due to the difficulty in controlling the resistance value of the resistor. BRIEF DESCRIPTION OF THE DRAWINGS
[0020] Figure 1 This is a schematic diagram of the principle of a bus capacitor overvoltage discharge circuit in an embodiment of the application. DETAILED DESCRIPTION
[0021] A busbar capacitor overvoltage discharge circuit, comprising:
[0022] A power supply module, comprising a reference power supply and a power supply, wherein the reference power supply provides a reference voltage potential for the discharge circuit, and the power supply provides a power supply voltage potential for the discharge circuit;
[0023] The control module is connected to both ends of the bus capacitor and is used to control the on and off of the discharge circuit;
[0024] A determination module, whose input ends are respectively connected to a reference power supply, a power supply, and one end of a bus capacitor, and the determination module determines the conduction status of the discharge circuit according to a voltage value input by the bus capacitor;
[0025] The regulating module has its input end connected to the power supply and the output end of the determination module respectively, and its output end is connected to the control module. The regulating module regulates the voltage value provided by the determination module to control the discharge speed of the discharge circuit.
[0026] Furthermore, the determination module includes a comparator, wherein the positive electrode of the comparator is connected to the power supply, the negative electrode of the comparator is grounded, the positive input terminal of the comparator is connected to the bus capacitor, and the negative input terminal of the comparator is connected to the reference power supply;
[0027] The regulating module includes an amplifier, wherein the positive electrode of the amplifier is connected to the power supply, the negative electrode of the amplifier is grounded, the non-inverting input terminal of the amplifier is connected to the output terminal of the comparator, and the inverting input terminal of the amplifier is grounded;
[0028] The control module includes a MOS transistor, the gate of the MOS transistor is connected to the output end of the amplifier, the drain of the MOS transistor is connected to one end of the bus capacitor, and the source of the MOS transistor is respectively connected to the other end of the bus capacitor and the inverting input end of the amplifier.
[0029] Furthermore, a hysteresis resistor is provided between the negative input terminal and the output terminal of the comparator, and a voltage divider resistor is provided at the positive input terminal of the comparator.
[0030] Furthermore, the inverting input terminal and the non-inverting input terminal of the amplifier are respectively provided with feedback resistors;
[0031] One end of the feedback resistor is connected to the MOS tube and the inverting input end of the amplifier respectively, and the other end of the feedback resistor is connected to the capacitor and the non-inverting input end of the amplifier respectively.
[0032] Furthermore, the non-inverting input terminal and the inverting input terminal of the amplifier are provided with voltage dividing resistors.
[0033] Furthermore, a current limiting resistor is provided at the output end of the amplifier.
[0034] Furthermore, the MOS transistor is a depletion-type N-channel transistor.
[0035] In the present application, in the determination module, the voltage of the bus capacitor is determined by a comparator, the discharge voltage of the bus capacitor is adjusted by an amplifier in the regulation module, and the MOS tube in the control module is used to control whether the discharge circuit is discharged. After the voltage of the bus capacitor drops to a reasonable voltage range, the discharge is stopped and the use is resumed in time, thereby solving the problem in the prior art of connecting a resistor in parallel at both ends of the bus capacitor to reduce the voltage, but the discharge speed is difficult to control due to the difficulty in controlling the resistance value.
[0036] At the same time, a feedback resistor is provided between the MOS tube and the amplifier. The voltage input to the amplifier is fed back to the inverting input and the non-inverting input of the amplifier through the potential difference across the feedback resistor. This controls the voltage difference between the non-inverting input and the inverting input of the amplifier to control the discharge speed. The discharge speed is stabilized to a fixed value by setting the resistance value of the feedback resistor.
[0037] The following will be combined with the drawings in the embodiments of this application to clearly and completely describe the technical solutions in the embodiments of this application. Obviously, the embodiments described are only part of the embodiments of this application, not all of the embodiments. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of this application.
[0038] Example
[0039] See also Figure 1 , a bus capacitor overvoltage discharge circuit provided in this embodiment includes: a power supply module, a control module, a determination module and a regulation module;
[0040] The power supply module includes a reference power supply VDC1 and a power supply VDC2.
[0041] The determination module includes a comparator U1, wherein the positive electrode of the comparator U1 is connected to the power supply VDC2, the positive electrode of the power supply VDC2 is connected to the positive electrode of the comparator U1, and the negative electrode of the power supply VDC2 is grounded; the negative electrode of the comparator U1 is grounded; the positive input terminal of the comparator U1 is connected to the bus capacitor C1; the negative input terminal of the comparator U1 is connected to the reference power supply VDC1, the positive electrode of VDC1 is connected to the negative input terminal of the comparator U1, and the negative electrode of VDC1 is grounded;
[0042] The regulating module includes an amplifier U2, the positive electrode of the amplifier U2 is connected to the power supply VDC2, the negative electrode of the amplifier U2 is grounded, the non-inverting input terminal of the amplifier U2 is connected to the output terminal of the comparator U1, and the inverting input terminal of the amplifier U2 is grounded;
[0043] The control module includes a MOS transistor, the gate of the MOS transistor is connected to the output end of the amplifier U2, the drain (d pole) of the MOS transistor is connected to one end of the bus capacitor C1, and the source (s pole) of the MOS transistor is respectively connected to the other end of the bus capacitor C1 and the inverting input end of the amplifier U2.
[0044] In order to maintain the hysteresis space of the comparator U1, in this embodiment, a hysteresis resistor R1 is provided between the negative input terminal of the comparator U1 and the output terminal of the comparator U1. One end of the hysteresis resistor R1 is connected to the connection circuit between the negative input terminal of the comparator U1 and the reference power supply VDC1, and the other end of the hysteresis resistor R1 is connected to the output terminal of the comparator U1.
[0045] To prevent the input current of the comparator U1 from affecting the voltage of the preceding stage of the comparator U1, in this embodiment, a voltage divider resistor R8 and a voltage divider resistor R9 are provided at the positive input terminal of the comparator U1, respectively. One end of the voltage divider resistor R8 is connected to the positive input terminal of the comparator U1, and the other end of the voltage divider resistor R8 is connected to one end of the bus capacitor C1 and the d-pole of the MOS tube; one end of the voltage divider resistor R9 is connected to the circuit between the voltage divider resistor R8 and the positive input terminal of U1, and the other end of the voltage divider resistor R9 is grounded.
[0046] In order to feed back the voltage input to the amplifier U2 to the inverting input terminal and the non-inverting input terminal of the amplifier U2, in this embodiment, a feedback resistor R7 is provided between the amplifier U2 and the MOS tube. One end of the feedback resistor R7 is respectively connected to one end of the bus capacitor C1 and the inverting input terminal of the amplifier U2, and the other end of the feedback resistor R7 is connected to the non-inverting input terminal of the amplifier U2.
[0047] To improve the gain of amplifier U2, this embodiment provides voltage divider resistors R3 and R5 at the inverting input of amplifier U2, and voltage divider resistors R2 and R4 at the non-inverting input of amplifier U2. One end of voltage divider resistor R3 is grounded, and the other end is connected to one end of voltage divider resistor R5 and the inverting input of amplifier U2. One end of voltage divider resistor R5 is connected to the circuit between voltage divider resistor R3 and the inverting input of amplifier U2, and the other end is connected to the circuit between feedback resistor R7 and the s-pole of the MOS transistor. The two ends of voltage divider resistor R2 are connected to the output of comparator U1 and the non-inverting input of amplifier U2, respectively. One end of voltage divider resistor R4 is connected to the circuit between voltage divider resistor R2 and the non-inverting input of amplifier U2, and the other end is connected to the circuit between voltage divider resistor R7 and bus capacitor C1.
[0048] In order to prevent excessive current from entering the MOS transistor and causing damage to the MOS transistor and to improve the safety of the MOS transistor, in this embodiment, a current-limiting resistor R6 is provided between the output end of the amplifier U2 and the input end of the MOS transistor. One end of the current-limiting resistor R6 is connected to the output end of the amplifier U2, and the other end of the current-limiting resistor R6 is connected to the gate of the MOS transistor.
[0049] In this embodiment, the amplifier U2 is an operational amplifier.
[0050] From the start to the completion of the discharge of bus capacitor C1, the discharge steps are as follows:
[0051] When the voltage of bus capacitor C1 is insufficient, the voltage of the positive input terminal of comparator U1 is lower than the voltage of basic power supply VDC1, and the discharge circuit will not be turned on.
[0052] When the capacitor voltage C1 exceeds the threshold of the discharge circuit, the voltage at the positive input of the comparator U1 is higher than the voltage of the basic power supply VDC1. The output of the comparator U1 is at a high level, which pulls up the voltage at the non-inverting input of the subsequent amplifier U2. The voltage at the non-inverting input of the amplifier U2 is greater than the voltage at the inverting input. At this time, the voltage at the output of the amplifier U2 begins to rise, turning on the MOS transistor. At this time, the MOS transistor operates in the linear region. After the MOS transistor is turned on, the bus capacitor C1 begins to discharge. As the current begins to rise, the potential difference across the feedback resistor R7 gradually increases and is fed back to the inverting input of the amplifier U2. At this time, the difference between the non-inverting input and the inverting input of the amplifier U2 becomes smaller, which will reduce the degree of conduction of the MOS transistor and reduce the discharge current of the bus capacitor C1, thereby achieving the purpose of controlling the discharge speed of the discharge circuit.
[0053] When the voltage of the bus capacitor C1 is lower than the threshold of the discharge circuit, the voltage of the positive input terminal of the comparator U1 will be lower than the voltage of the basic power supply VDC1 at the inverting input terminal (the range below the threshold trigger is determined by the value of R1), and the output terminal of the comparator U1 will be set to a low level, so that the output terminal of the amplifier U2 is set to a low level, the MOS tube is turned off, and the discharge stops. At this point, the entire discharge process ends.
Claims
1. A busbar capacitor overvoltage discharge circuit, characterized in that: The discharge circuit comprises: A power supply module, comprising a reference power supply and a power supply, wherein the reference power supply provides a reference voltage potential for the discharge circuit, and the power supply provides a power supply voltage potential for the discharge circuit; The control module is connected to both ends of the bus capacitor and is used to control the on and off of the discharge circuit; A determination module, whose input ends are respectively connected to a reference power supply, a power supply, and one end of a bus capacitor, and the determination module determines the conduction status of the discharge circuit according to a voltage value input by the bus capacitor; The regulating module has its input end connected to the power supply and the output end of the determination module respectively, and its output end is connected to the control module. The regulating module regulates the voltage value provided by the determination module to control the discharge speed of the discharge circuit.
2. A busbar capacitor overvoltage discharge circuit according to claim 1, characterized in that: The determination module includes a comparator, wherein the positive electrode of the comparator is connected to the power supply, the negative electrode of the comparator is grounded, the positive input end of the comparator is connected to the bus capacitor, and the negative input end of the comparator is connected to the reference power supply; The regulating module includes an amplifier, wherein the positive electrode of the amplifier is connected to the power supply, the negative electrode of the amplifier is grounded, the non-inverting input terminal of the amplifier is connected to the output terminal of the comparator, and the inverting input terminal of the amplifier is grounded; The control module includes a MOS transistor, the gate of the MOS transistor is connected to the output end of the amplifier, the drain of the MOS transistor is connected to one end of the bus capacitor, and the source of the MOS transistor is respectively connected to the other end of the bus capacitor and the inverting input end of the amplifier.
3. A busbar capacitor overvoltage discharge circuit according to claim 2, characterized in that: A hysteresis resistor is provided between the negative input terminal and the output terminal of the comparator, and a voltage dividing resistor is provided at each positive input terminal of the comparator.
4. A busbar capacitor overvoltage discharge circuit according to claim 2, characterized in that: The inverting input terminal and the non-inverting input terminal of the amplifier are respectively provided with feedback resistors; One end of the feedback resistor is connected to the MOS tube and the inverting input end of the amplifier respectively, and the other end of the feedback resistor is connected to the capacitor and the non-inverting input end of the amplifier respectively.
5. The bus capacitor overvoltage discharge circuit according to claim 2, characterized in that: The non-inverting input terminal and the inverting input terminal of the amplifier are provided with voltage dividing resistors.
6. A busbar capacitor overvoltage discharge circuit according to claim 2, characterized in that: A current limiting resistor is provided at the output end of the amplifier.
7. A busbar capacitor overvoltage discharge circuit according to claim 2, characterized in that: The MOS tube is a depletion-type N-channel tube.