Conversion transmission and detection device suitable for different signals

By integrating the detection device of CPU, signal transmission and power module, the problems of single function and high space occupancy of equipment in the existing technology are solved, the integrated detection of multiple signals is realized, the chip utilization rate is improved and the development cost is reduced.

CN223401165UActive Publication Date: 2025-09-30CHONGQING YAZAKI METER
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Patent Information

Application Number
CN202420636395.3
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-03-29
Publication Date
2025-09-30
Estimated Expiration
2034-03-29

AI Technical Summary

Technical Problem

In the existing technology, the equipment used for debugging and testing has a single function, which means that each function requires a separate MCU/CPU to control, build power supply and anti-interference circuits, resulting in low chip utilization, high development costs, and high space occupancy.

Method used

A conversion, transmission, and detection device suitable for different signals is designed. It integrates a CPU, a signal transmission module, a power module, and an Ethernet module. It realizes the conversion and transmission of voltage, CAN signals, LIN signals, and network signals through a single PCB board. The monitoring module detects when the voltage or current exceeds the threshold and disconnects the power supply to reduce equipment dependence.

Benefits of technology

It improves chip utilization, reduces space occupancy, shortens development costs and project cycles, facilitates management and maintenance, and realizes integrated detection of multiple functions.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a conversion transmission and detection device suitable for different signals. The conversion transmission and detection device comprises a CPU, a signal transmission module, a power supply module and an Ethernet module. The signal transmission module, the power supply module and the Ethernet module are respectively in bidirectional connection with the CPU; the signal transmission module is an interface integrating various signals and comprises a CAN communication unit, an LIN communication unit, a USB serial port unit and a voltage input unit. Different circuits and interfaces are arranged on the same PCB, input signals (American information and TI) are recognized through the designed detection circuit, the corresponding interface is selected, meanwhile, the detection circuit has voltage and current recognition, and safety is improved; meanwhile, an Ethernet interaction circuit is designed so as to support network conversion and realize signal conversion and communication, so that the instrument can be directly upgraded through software; meanwhile, different circuits are integrated on one PCB, various functions of voltage input, CAN signal modulation conversion, LIN signal modulation conversion, network modulation conversion and the like can be achieved only through one CPU, one power supply management module, power supply voltage reduction and various protections, and then converted voltage, CAN signals, LIN signals and network signals are transmitted to a rear end (instrument) to be tested. The chip utilization rate is greatly increased, and the space occupancy rate is reduced.
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Description

Technical Field

[0001] The utility model relates to the technical field of electronic circuits, in particular to a conversion, transmission and detection device suitable for different signals. Background Art

[0002] The company's R&D products need debugging and testing. There are many types of equipment available on the market that can be used for debugging and testing, but their functions are too single and cannot meet the testing needs.

[0003] The following functions are designed and used separately on the market, such as LVDS video signal debugging, serial touch screen parameter selection and setting, CAN and LIN communication, switching power supply output control, current monitoring, USB serial port debugging, Ethernet signal conversion, etc. In order to realize each function, all parts of the components need to form a complete circuit to work normally.

[0004] In existing technologies, each individual function requires an MCU / CPU to control it, and power supply, protection circuits, anti-interference circuits, etc. must be built to stabilize its normal operation. This leads to low utilization of many chips in the product, high development costs, and long cycles; each test device requires individually designed structural parts, which also leads to high space occupancy. Summary of the Invention

[0005] In view of the technical problem of high complexity in testing multiple signals in the prior art, the utility model proposes a conversion, transmission and detection device suitable for different signals.

[0006] In order to achieve the above objectives, the present invention provides the following technical solutions:

[0007] A conversion, transmission and detection device suitable for different signals, comprising a CPU, a signal transmission module, a power module and an Ethernet module; the signal transmission module, the power module and the Ethernet module are bidirectionally connected to the CPU respectively;

[0008] The signal transmission module is an interface that integrates various signals, including a CAN communication unit, a LIN communication unit, a USB serial port unit and a voltage input unit.

[0009] Preferably, it also includes a switch module and a monitoring module; when the monitoring module detects that the voltage or current exceeds a threshold, it sends an alarm signal to control the switch module to disconnect the power module.

[0010] Preferably, the power module includes a filter circuit and a voltage conversion circuit connected in series; the filter circuit includes a first common-mode inductor:

[0011] The vehicle-mounted end is connected to the positive electrode of the first diode, the positive electrode of the power supply is connected to the positive electrode of the second diode, the negative electrode of the first diode, the negative electrode of the second diode, one end of the first capacitor, one end of the third capacitor, and one end of the third transistor are connected in parallel and then connected to the first end of the first common-mode inductor; the other end of the first capacitor is connected to one end of the second capacitor, the other end of the third capacitor is connected to one end of the fourth capacitor, the negative electrode of the power supply, the other end of the second capacitor, the other end of the fourth capacitor, and the other end of the third transistor are connected in parallel and then connected to the second end of the first common-mode inductor;

[0012] The fourth end of the first common-mode inductor is respectively connected to one end of the fifth capacitor, one end of the sixth capacitor, one end of the seventh capacitor, one end of the eighth capacitor, one end of the ninth capacitor, one end of the tenth capacitor, one end of the eleventh capacitor, and one end of the second inductor; the other end of the second inductor is respectively connected in parallel to one end of the twelfth capacitor, one end of the thirteenth capacitor, one end of the fourteenth capacitor, one end of the fifteenth capacitor, one end of the sixteenth capacitor, one end of the seventeenth capacitor, one end of the eighteenth capacitor, and one end of the first resistor, and then output to the first chip;

[0013] The third end of the first common-mode inductor, the other end of the fifth capacitor, the other end of the sixth capacitor, the other end of the seventh capacitor, the other end of the eighth capacitor, the other end of the ninth capacitor, the other end of the tenth capacitor, the other end of the eleventh capacitor, the other end of the twelfth capacitor, the other end of the thirteenth capacitor, the other end of the fourteenth capacitor, the other end of the fifteenth capacitor, the other end of the sixteenth capacitor, the other end of the seventeenth capacitor, the other end of the eighteenth capacitor, and the other end of the first resistor are connected in parallel and grounded.

[0014] Preferably, the voltage conversion circuit includes a first chip:

[0015] One end of the first resistor and one end of the second resistor are connected in parallel to the 12V IN serial port and the VIN end of the first chip respectively; the other end of the second resistor is connected to one end of the third resistor;

[0016] The EN terminal of the first chip is connected to one end of the nineteenth capacitor; the VCC terminal of the first chip is connected to one end of the twentieth capacitor; the GND terminal of the first chip, the other end of the twentieth capacitor, the other end of the nineteenth capacitor, and the other end of the third resistor are connected in parallel and then grounded;

[0017] The BOOT terminal of the first chip is connected to one end of the twenty-first capacitor, the other end of the twenty-first capacitor is connected to one end of the twenty-second capacitor, the other end of the twenty-second capacitor is connected to one end of the fourth resistor, and the other end of the fourth resistor is grounded;

[0018] The SW terminal of the first chip is connected to one end of the third inductor, and the other end of the third inductor, one end of the twenty-fourth capacitor, one end of the twenty-fifth capacitor, one end of the twenty-sixth capacitor, one end of the twenty-seventh capacitor, one end of the twenty-eighth capacitor, and one end of the twenty-ninth capacitor are connected to output a 5V voltage; the other end of the 24th capacitor, the other end of the 25th capacitor, the other end of the 26th capacitor, the other end of the 27th capacitor, the other end of the 28th capacitor, and the other end of the 29th capacitor are connected in parallel and then grounded.

[0019] The PG terminal of the first chip is connected to one end of the fifth resistor, and the other end of the fifth resistor outputs a 5V voltage; the FB terminal of the first chip is respectively connected to one end of the sixth resistor, one end of the seventh resistor, and one end of the twenty-third capacitor, the other end of the sixth resistor, the other end of the twenty-third capacitor, and the other end of the third inductor are connected in parallel and then connected to one end of the eighth resistor, and the other end of the eighth resistor is grounded; the AGND terminal of the first chip and the other end of the seventh resistor are connected in parallel and then grounded.

[0020] Preferably, the switch module includes a second chip:

[0021] The SEL terminal of the second chip is connected to one end of the ninth resistor and one end of the tenth resistor respectively, the other end of the ninth resistor is connected to the first power supply terminal, and the other end of the tenth resistor is grounded; the IN terminal of the second chip is connected to one end of the eleventh resistor, and the other end of the eleventh resistor is connected to the MCU_SW_BAT port of the CPU;

[0022] The DIAG_EN terminal of the second chip is connected to one end of the twelfth resistor and one end of the thirteenth resistor respectively, the other end of the twelfth resistor is connected to the second power supply terminal, and the other end of the thirteenth resistor is grounded;

[0023] The CS terminal of the second chip is connected to one end of the fourteenth resistor and one end of the fifteenth resistor, respectively. The other end of the fourteenth resistor is connected to one end of the 30th capacitor. The CL terminal of the second chip is connected to one end of the sixteenth resistor. The other end of the 30th capacitor, the other end of the fifteenth resistor, and the other end of the sixteenth resistor are connected in parallel and then grounded.

[0024] The VS terminal of the second chip is connected to the 12V IN serial port and one end of the 31st capacitor respectively, and the other end of the 31st capacitor is grounded; the OUT1 terminal and OUT2 terminal of the second chip are connected in parallel and output a 12V voltage; the GND terminal of the second chip is grounded.

[0025] Preferably, the monitoring module includes a third chip:

[0026] The A1 terminal of the third chip is connected to one end of the seventeenth resistor and one end of the eighteenth resistor, respectively, and the other end of the eighteenth resistor is grounded; the A0 terminal of the third chip is connected to one end of the nineteenth resistor and one end of the twentieth resistor, respectively, and the other end of the twentieth resistor is grounded; the Alert terminal of the third chip is connected to one end of the twenty-first resistor and one end of the twenty-second resistor, respectively, and the other end of the twenty-second resistor is grounded; the other end of the seventeenth resistor, the other end of the nineteenth resistor, and the other end of the twenty-first resistor are connected in parallel to the third power supply terminal;

[0027] The In+ terminal of the third chip and one end of the twenty-third resistor are connected in parallel to the OUT1 terminal of the second chip. The In- terminal of the third chip, the VBUS terminal, and the other end of the twenty-third resistor are connected in parallel to the OUT2 terminal of the second chip.

[0028] The GND terminal of the third chip and one end of the thirty-second capacitor are connected in parallel and then grounded; the VS terminal of the third chip and the other end of the thirty-second capacitor are connected in parallel to the fourth power supply terminal.

[0029] Preferably, the LIN communication unit includes a fourth chip:

[0030] The WAKE_N terminal of the fourth chip is connected to one end of the twenty-fourth resistor, and the other end of the twenty-fourth resistor is connected to the 12V voltage;

[0031] The SLP_N terminal of the fourth chip is connected to one end of the 27th resistor, the other end of the 27th resistor is connected to one end of the 25th resistor and one end of the 26th resistor respectively, the other end of the 25th resistor is grounded, and the other end of the 26th resistor is connected to the 3.3V voltage;

[0032] The RXD terminal of the fourth chip is connected to one end of the 28th resistor and one end of the 29th resistor respectively, the other end of the 28th resistor is connected to the LIN_X_N terminal, and the other end of the 29th resistor is connected to a 3.3V voltage; the TXD terminal of the fourth chip is connected to one end of the 30th resistor, and the other end of the 30th resistor is connected to the LIN_X_P terminal;

[0033] The VBAT terminal of the fourth chip and one end of the thirty-fourth capacitor are connected in parallel to the 12V voltage, and the other end of the thirty-fourth capacitor is grounded;

[0034] The INH terminal of the fourth chip is connected to the positive electrode of the fourth diode, and the negative electrode of the fourth diode is connected to one end of the thirty-first resistor; the other end of the thirty-first resistor, the LIN terminal of the fourth chip, one end of the thirty-third capacitor, and one end of the fifth diode are connected in parallel and connected to the first output terminal; the GND terminal of the fourth chip, the other end of the thirty-third capacitor, and the other end of the fifth diode are connected in parallel and grounded.

[0035] Preferably, the CAN communication unit includes a fifth chip:

[0036] The RXD terminal of the fifth chip is connected to one end of the 32nd resistor, the other end of the 32nd resistor and one end of the 33rd resistor are connected in parallel and connected to CAN_X_N; the TXD terminal of the fifth chip is connected to one end of the 34th resistor, the other end of the 34th resistor is connected to CAN_X_P; the other end of the 33rd resistor and the VIO terminal of the fifth chip are connected in parallel and connected to the 3.3V voltage;

[0037] The STB terminal of the fifth chip is connected to one end of the thirty-fifth resistor, the other end of the thirty-fifth resistor and one end of the thirty-sixth resistor are connected in parallel to one end of the thirty-seventh resistor, and the other end of the thirty-seventh resistor is grounded; the other end of the thirty-sixth resistor, one end of the thirty-eighth resistor, and one end of the thirty-fifth capacitor are connected in parallel to the VCC terminal of the fifth chip; the other end of the thirty-eighth resistor is connected to a 5V voltage; the other end of the thirty-fifth capacitor is grounded;

[0038] The CANL end of the fifth chip is connected to the first end of the fourth inductor, and the CANH end of the fifth chip is connected to the second end of the fourth inductor; the fourth end of the fourth inductor, one end of the thirty-sixth capacitor, one end of the thirty-ninth resistor, and one end of the sixth diode are connected in parallel and connected to the CAN_N end; the third end of the fourth inductor, one end of the thirty-seventh capacitor, one end of the fortieth resistor, and one end of the seventh diode are connected in parallel and connected to the CAN_P end; the other end of the thirty-sixth capacitor is grounded, and the other end of the thirty-seventh capacitor is grounded; the other end of the thirty-ninth resistor and the other end of the fortieth resistor are connected in parallel to one end of the thirty-eighth capacitor, and the other end of the thirty-eighth capacitor, the other end of the sixth diode, and the other end of the seventh diode are connected in parallel and grounded.

[0039] Preferably, the Ethernet module includes a seventh chip and an interface U6:

[0040] The SH1 and SH2 terminals of U6 are connected in parallel and then grounded;

[0041] The TD+ terminal of U6 is connected to one end of the forty-first resistor and one end of the eighth diode, respectively. The TD- terminal of U6 is connected to one end of the forty-second resistor and one end of the ninth diode, respectively. The other ends of the forty-first resistor and the forty-second resistor are connected in parallel and then connected to one end of the thirty-ninth capacitor, and the other end of the thirty-ninth capacitor is grounded. The other ends of the eighth diode and the ninth diode are connected in parallel and then grounded.

[0042] The RD+ terminal of U6 is connected to one end of the forty-third resistor and one end of the tenth diode, respectively. The RD- terminal of U6 is connected to one end of the forty-fourth resistor and one end of the eleventh diode, respectively. The other ends of the forty-third resistor and the forty-fourth resistor are connected in parallel and then connected to one end of the fortieth capacitor, and the other end of the fortieth capacitor is grounded. The other ends of the tenth diode and the eleventh diode are connected in parallel and then grounded.

[0043] The M1 and M2 terminals of U6 are connected in parallel to one end of the 41st capacitor, one end of the 42nd capacitor, and one end of the 45th resistor, respectively. The other end of the 45th resistor is connected to a 3.3V voltage. The other ends of the 41st capacitor and the 42nd capacitor are connected in parallel and then grounded.

[0044] The LED_G+ and LED_R- terminals of U6, one end of the 46th resistor, and one end of the 47th resistor are connected in parallel to a 3.3V voltage supply. The LED_G- terminal of U6 is connected to the other end of the 46th resistor and one end of the 48th resistor, respectively. The LED_R+ terminal of U6 is connected to the other end of the 47th resistor and one end of the 49th resistor, respectively.

[0045] The other end of the forty-eighth resistor is connected to the LED0 terminal of the seventh chip, and the other end of the forty-ninth resistor is connected to the LED1 / speed terminal of the seventh chip;

[0046] The REXT terminal of the seventh chip is connected to one end of the 43rd capacitor and one end of the 50th resistor respectively; the RST terminal of the seventh chip is connected to one end of the 44th capacitor and one end of the 51st resistor respectively; the other end of the 51st resistor is connected to a 3.3V voltage; the other end of the 50th resistor, the other end of the 43rd capacitor, and the other end of the 44th capacitor are connected in parallel and then grounded;

[0047] The VDD terminal of the seventh chip, one end of the forty-fifth capacitor, one end of the forty-sixth capacitor, one end of the forty-seventh capacitor, and one end of the forty-eighth capacitor are connected in parallel to one end of the fifty-second resistor. The other end of the fifty-second resistor is connected to a 3.3V voltage. The other end of the forty-fifth capacitor, the other end of the forty-sixth capacitor, the other end of the forty-seventh capacitor, and the other end of the forty-eighth capacitor are connected in parallel to ground.

[0048] The TXD0 terminal of the seventh chip outputs a signal through the fifty-third resistor; the TXD1 terminal of the seventh chip outputs a signal through the fifty-fourth resistor; the RXD0 terminal of the seventh chip outputs a signal through the fifty-fifth resistor; the RXD1 terminal of the seventh chip outputs a signal through the fifty-sixth resistor; the CONFIG0 terminal of the seventh chip outputs a signal, and the CONFIG1 terminal of the seventh chip U7 outputs a signal;

[0049] The MDC end of the seventh chip is connected to one end of the fifty-seventh resistor, the MDIO end of the seventh chip is connected to one end of the fifty-eighth resistor, and the other end of the fifty-seventh resistor and the other end of the fifty-eighth resistor are connected in parallel to the 3.3V voltage.

[0050] In summary, due to the adoption of the above technical solution, compared with the prior art, the present invention has at least the following beneficial effects:

[0051] The utility model arranges different circuits and interfaces on a PCB board, and selects the corresponding interface through the designed detection circuit to identify the input signal (Maxim, TI). At the same time, the detection circuit has voltage and current identification to improve safety. At the same time, an Ethernet interactive circuit is designed to support network conversion, realize signal conversion and communication, and facilitate direct upgrade of the instrument through software.

[0052] The utility model integrates different circuits on a PCB, and only uses a CPU, a power management module, power supply voltage reduction and various protections to realize multiple functions such as voltage input, CAN signal modulation and conversion, LIN signal modulation and conversion, and network modulation and conversion. The converted voltage, CAN signal, LIN signal, and network signal are then transmitted to the back-end (instrument) for testing, which greatly increases chip utilization and reduces space occupancy. It overcomes and gets rid of dependence on test equipment on the market, solves the problems of purchasing test equipment and customizing test functions, effectively shortens project development cycle, reduces purchase costs, and facilitates later management and maintenance. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] Figure 1 The figure is a schematic diagram of an exemplary conversion, transmission and detection device suitable for different signals according to the present invention.

[0054] Figure 2 Schematic diagram of a filter circuit in an exemplary power module according to the present invention.

[0055] Figure 3 Schematic diagram of a voltage conversion circuit in an exemplary power module according to the present invention.

[0056] Figure 4 Schematic diagram of an exemplary switch module according to the present invention.

[0057] Figure 5 Schematic diagram of an exemplary monitoring module according to the present invention.

[0058] Figure 6 Schematic diagram of an exemplary LIN communication unit according to the present invention.

[0059] Figure 7Schematic diagram of an exemplary CAN communication unit according to the present invention.

[0060] Figure 8 Schematic diagram of an exemplary Ethernet module according to the present invention.

[0061] Figure 9 Schematic diagram of an exemplary pull-up resistor and a pull-down resistor according to the present invention. DETAILED DESCRIPTION

[0062] The present invention will be further described in detail below with reference to the following examples and specific implementation methods. However, this should not be construed as limiting the scope of the present invention to the following examples. All technologies implemented based on the present invention fall within the scope of the present invention.

[0063] In the description of the present invention, it should be understood that the terms "longitudinal", "transverse", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", etc., indicating the orientation or position relationship, are based on the orientation or position relationship shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0064] like Figure 1 As shown, the utility model provides a conversion, transmission and detection device suitable for different signals, including a CPU (SIMX8UX5AVLF1BB), a signal transmission module, a power module and an Ethernet module; the signal transmission module, the power module and the Ethernet module are respectively bidirectionally connected to the CPU.

[0065] After receiving the external signal, the signal transmission module transmits it to the CPU for processing (such as encoding or decoding, etc.), and then performs signal conversion and communication through the Ethernet module, and finally sends it to the instrument; the power module is responsible for converting the 12V voltage into 5V, 3.3V and other voltages, and then powers each module.

[0066] In this embodiment, the signal transmission module is an interface that integrates various signals, including a CAN communication unit, a LIN communication unit, a USB serial port unit, and a voltage input unit.

[0067] In this embodiment, the voltage input unit of the signal transmission module can be directly connected to the 12V voltage output by the vehicle, thereby powering each module in the detection device, making it easy to operate and carry, and avoiding the situation where it cannot work without mains power.

[0068] This embodiment further includes a switch module and a monitoring module. When the monitoring module detects that the voltage or current exceeds a threshold, it sends an alarm signal to control the switch module to disconnect the power module, thereby ensuring the safety of each module.

[0069] In this embodiment, the signal transmission module realizes multiple functions such as voltage input, CAN signal modulation and conversion, LIN signal modulation and conversion, and network modulation and conversion. The converted voltage, CAN signal, LIN signal, and network signal are then transmitted to the back-end (instrument) for testing, which greatly increases chip utilization and reduces space occupancy.

[0070] In this embodiment, the power module includes a filter circuit and a voltage conversion circuit connected in series.

[0071] like Figure 2 As shown, the filtering circuit includes a first common-mode inductor L1:

[0072] The vehicle-mounted terminal (+B) is connected to the anode of the first diode D1, the positive terminal of the power supply (V+) is connected to the anode of the second diode D2, the cathode of the first diode D1, the cathode of the second diode D2, one end of the first capacitor C1, one end of the third capacitor C3, and one end of the third transistor D3 (bidirectional diode) are connected in parallel to the first end 1 of the first common-mode inductor L1; the other end of the first capacitor C1 is connected to one end of the second capacitor C2, the other end of the third capacitor C3 is connected to one end of the fourth capacitor C4, the negative terminal of the power supply (V-), the other end of the second capacitor C2, the other end of the fourth capacitor C4, and the other end of the third transistor D3 are connected in parallel to the second end 2 of the first common-mode inductor L1;

[0073] The fourth end 4 of the first common-mode inductor L1 is respectively connected to one end of the fifth capacitor C5, one end of the sixth capacitor C6, one end of the seventh capacitor C7, one end of the eighth capacitor C8, one end of the ninth capacitor C9, one end of the tenth capacitor C10, one end of the eleventh capacitor C11, and one end of the second inductor L2; the other end of the second inductor L2 is respectively connected in parallel to one end of the twelfth capacitor C12, one end of the thirteenth capacitor C13, one end of the fourteenth capacitor C14, one end of the fifteenth capacitor C15, one end of the sixteenth capacitor C16, one end of the seventeenth capacitor C17, one end of the eighteenth capacitor C18, and one end of the first resistor R1, and then output to the first chip U1;

[0074] The third end 3 of the first common-mode inductor L1, the other end of the fifth capacitor C5, the other end of the sixth capacitor C6, the other end of the seventh capacitor C7, the other end of the eighth capacitor C8, the other end of the ninth capacitor C9, the other end of the tenth capacitor C10, the other end of the eleventh capacitor C11, the other end of the twelfth capacitor C12, the other end of the thirteenth capacitor C13, the other end of the fourteenth capacitor C14, the other end of the fifteenth capacitor C15, the other end of the sixteenth capacitor C16, the other end of the seventeenth capacitor C17, the other end of the eighteenth capacitor C18, and the other end of the first resistor R1 are connected in parallel and grounded;

[0075] The function of the filter circuit is to filter and prevent interference from the external interface, thereby protecting the stable operation of the back-end circuit from the input end; at the same time, preventing internal radiation from escaping.

[0076] like Figure 3 As shown, the voltage conversion circuit includes a first chip U1 (LMR33630BQRNXRQ1):

[0077] One end of the first resistor R1 and one end of the second resistor R2 are connected in parallel to the 12V IN serial port and the VIN end of the first chip U1 respectively; the other end of the second resistor R2 is connected to one end of the third resistor R3;

[0078] The EN terminal of the first chip U1 is connected to one end of the nineteenth capacitor C19; the VCC terminal of the first chip U1 is connected to one end of the twentieth capacitor C20; the GND terminal of the first chip U1, the other end of the twentieth capacitor C20, the other end of the nineteenth capacitor C19, and the other end of the third resistor R3 are connected in parallel and then grounded;

[0079] The BOOT terminal of the first chip U1 is connected to one end of the twenty-first capacitor C21, the other end of the twenty-first capacitor C21 is connected to one end of the twenty-second capacitor C22, the other end of the twenty-second capacitor C22 is connected to one end of the fourth resistor R4, and the other end of the fourth resistor R4 is grounded;

[0080] The SW terminal of the first chip U1 is connected to one end of the third inductor L3, and the other end of the third inductor L3, one end of the 24th capacitor C24, one end of the 25th capacitor C25, one end of the 26th capacitor C26, one end of the 27th capacitor C27, one end of the 28th capacitor C28, and one end of the 29th capacitor C29 output a 5V voltage; the other end of the 24th capacitor C24, the other end of the 25th capacitor C25, the other end of the 26th capacitor C26, the other end of the 27th capacitor C27, the other end of the 28th capacitor C28, and the other end of the 29th capacitor C29 are connected in parallel and then grounded.

[0081] The PG terminal of the first chip U1 is connected to one end of the fifth resistor R5, and the other end of the fifth resistor R5 outputs a 5V voltage; the FB terminal of the first chip U1 is respectively connected to one end of the sixth resistor R6, one end of the seventh resistor R7, and one end of the twenty-third capacitor C23, the other end of the sixth resistor R6, the other end of the twenty-third capacitor C23, and the other end of the third inductor L3 are connected in parallel to one end of the eighth resistor R8, and the other end of the eighth resistor R8 is grounded; the AGND terminal of the first chip U1 and the other end of the seventh resistor R7 are connected in parallel and then grounded.

[0082] The function of the voltage conversion circuit is to convert the external input 12V voltage into 5V voltage to power other modules.

[0083] like Figure 4 As shown, the switch module includes a second chip U2 (TPS2H160BQPWPRQ1), which can be used to control the on-board terminal (B+) on and off:

[0084] The SEL terminal of the second chip U2 is connected to one end of a ninth resistor R9 and one end of a tenth resistor R10, respectively. The other end of the ninth resistor R9 is connected to the first power supply terminal VCC1 (3.3V), and the other end of the tenth resistor R10 is grounded. The ninth resistor R9 serves as a pull-up resistor, and the tenth resistor R10 serves as a pull-down resistor. The output voltage can be selected by changing the resistance values ​​of the ninth resistor R9 and the tenth resistor R10.

[0085] The IN terminal of the second chip U2 is connected to one end of the eleventh resistor R11, and the other end of the eleventh resistor R11 is connected to the MCU_SW_BAT port of the CPU (used to shut down the vehicle terminal when an alarm is issued);

[0086] The DIAG_EN terminal of the second chip U2 is connected to one end of a twelfth resistor R12 and one end of a thirteenth resistor R13, respectively. The other end of the twelfth resistor R12 is connected to the second power supply terminal VCC2 (3.3V), and the other end of the thirteenth resistor R13 is grounded. The twelfth resistor R12 serves as a pull-up resistor, and the thirteenth resistor R13 serves as a pull-down resistor. The output voltage can be selected by changing the resistance values ​​of the twelfth resistor R12 and the thirteenth resistor R13.

[0087] The CS terminal of the second chip U2 is connected to one end of the fourteenth resistor R14 and one end of the fifteenth resistor R15, respectively. The other end of the fourteenth resistor R14 is connected to one end of the 30th capacitor C30. The CL terminal of the second chip U2 is connected to one end of the sixteenth resistor R16. The other end of the 30th capacitor C30, the other end of the fifteenth resistor R15, and the other end of the sixteenth resistor R16 are connected in parallel and then grounded.

[0088] The VS terminal of the second chip U2 is connected to the 12V IN serial port and one end of the 31st capacitor C31 respectively, and the other end of the 31st capacitor C31 is grounded; the OUT1 terminal and OUT2 terminal of the second chip U2 are connected in parallel and output a 12V voltage; the GND terminal of the second chip U2 is grounded.

[0089] like Figure 5 As shown, the monitoring module includes a third chip U3 (INA226AIDGSR) for detecting voltage and current:

[0090] The A1 terminal (slave terminal) of the third chip U3 is connected to one end of the seventeenth resistor R17 and one end of the eighteenth resistor R18, respectively. The other end of the eighteenth resistor R18 is grounded. The A0 terminal (slave terminal) of the third chip U3 is connected to one end of the nineteenth resistor R19 and one end of the twentieth resistor R20, respectively. The other end of the twentieth resistor R20 is grounded. The Alert terminal of the third chip U3 is connected to one end of the twenty-first resistor R21 and one end of the twenty-second resistor R22, respectively. The other end of the twenty-second resistor R22 is grounded. The other end of the seventeenth resistor R17, the other end of the nineteenth resistor R19, and the other end of the twenty-first resistor R21 are connected in parallel to the third power supply terminal VCC3 (3.3V).

[0091] The In+ terminal of the third chip U3 and one end of the twenty-third resistor R23 are connected in parallel to the OUT1 terminal of the second chip U2. The In- terminal, the VBUS terminal of the third chip U3 and the other end of the twenty-third resistor R23 are connected in parallel to the OUT2 terminal of the second chip U2.

[0092] The GND terminal of the third chip U3 and one end of the 32nd capacitor C32 are connected in parallel and then grounded; the VS terminal of the third chip U3 and the other end of the 32nd capacitor C32 are connected in parallel to the fourth power supply terminal VCC4 (3.3V).

[0093] In this embodiment, the VS terminal of the third chip U3 provides a 3.3V voltage for detecting whether the voltage and current exceed the threshold. If so, the Alert terminal sends an alarm signal to the CPU, and the CPU sends information to the second chip U2 through the MCU_SW_BAT port, thereby shutting down the vehicle-mounted terminal (B+) to improve the safety of the device.

[0094] In this embodiment, the signal transmission module is an interface (DB9 interface) that integrates various signals, including a CAN communication unit, a LIN communication unit, a USB serial port unit, and a voltage input unit; that is, the transmission of different signals can be realized through one interface. The interface has a total of 9 lines, and the data definition of each transmission is fixed; because there are 9 lines, there are CAN (2 lines), LIN (1 line), power input (2 lines), power output (2 lines), and interface external enable and error reporting (2 lines); when the interface is connected to other signal lines, the corresponding communication unit can be selected for signal transmission according to the type of signal.

[0095] like Figure 6 As shown, the LIN communication unit includes a fourth chip U4 (TJA1021T), which is used to modulate and convert the input LIN signal so that it can match the back-end instrument, thereby achieving communication:

[0096] The WAKE_N terminal of the fourth chip U4 is connected to one end of the twenty-fourth resistor R24, and the other end of the twenty-fourth resistor R24 ​​is connected to a 12V voltage (which can be powered by a power module or a signal transmission module);

[0097] The SLP_N terminal of the fourth chip U4 is connected to one end of the 27th resistor R27. The other end of the 27th resistor R27 is connected to one end of the 25th resistor R25 and one end of the 26th resistor R26 respectively. The other end of the 25th resistor R25 is grounded. The other end of the 26th resistor R26 is connected to the 3.3V voltage.

[0098] The RXD terminal of the fourth chip U4 is connected to one end of the 28th resistor R28 and one end of the 29th resistor R29, respectively. The other end of the 28th resistor R28 is connected to the LIN_X_N terminal, and the other end of the 29th resistor R29 is connected to a 3.3V voltage. The TXD terminal of the fourth chip U4 is connected to one end of the 30th resistor R30, and the other end of the 30th resistor R30 is connected to the LIN_X_P terminal.

[0099] The VBAT terminal of the fourth chip U4 and one end of the thirty-fourth capacitor C34 are connected in parallel to the 12V voltage, and the other end of the thirty-fourth capacitor C34 is grounded;

[0100] The INH terminal of the fourth chip U4 is connected to the positive electrode of the fourth diode D4, and the negative electrode of the fourth diode D4 is connected to one end of the thirty-first resistor R31; the other end of the thirty-first resistor R31, the LIN terminal of the fourth chip U4, one end of the thirty-third capacitor C33, and one end of the fifth diode D5 (bidirectional diode) are connected in parallel to the first output terminal (OUT1) (outputting the LIN signal to the CPU); the GND terminal of the fourth chip U4, the other end of the thirty-third capacitor C33, and the other end of the fifth diode D5 are connected in parallel and grounded.

[0101] In this embodiment, the fourth chip is permanently in working state when powered on, and the SLP_N terminal needs to be pulled up to a high level; one end of the thirty-third capacitor C33 and the fifth diode D5 function to filter and prevent interference from the external interface, thereby maintaining the stability of signal interaction.

[0102] like Figure 7 As shown, the CAN communication unit includes the fifth chip U5 (TJA1021T), which is used to modulate and convert the input CAN signal so that it can match the back-end instrument, thereby realizing communication:

[0103] The RXD terminal of the fifth chip U5 is connected to one end of the 32nd resistor R32. The other end of the 32nd resistor R32 and one end of the 33rd resistor R33 are connected in parallel to CAN_X_N. The TXD terminal of the fifth chip U5 is connected to one end of the 34th resistor R34. The other end of the 34th resistor R34 is connected to CAN_X_P. The other end of the 33rd resistor R33 and the VIO terminal of the fifth chip U5 are connected in parallel to a 3.3V voltage.

[0104] The STB terminal of the fifth chip U5 is connected to one end of the 35th resistor R35. The other end of the 35th resistor R35 and one end of the 36th resistor R36 are connected in parallel to one end of the 37th resistor R37. The other end of the 37th resistor R37 is grounded. The other end of the 36th resistor R36, one end of the 38th resistor R38, and one end of the 35th capacitor C35 are connected in parallel to the VCC terminal of the fifth chip U5. The other end of the 38th resistor R38 is connected to a 5V voltage. The other end of the 35th capacitor C35 is grounded.

[0105] The GND terminal of the fifth chip U5 is grounded; the CANL terminal of the fifth chip U5 is connected to the first end 1 of the fourth inductor L4, and the CANH terminal of the fifth chip U5 is connected to the second end 2 of the fourth inductor L4; the fourth end 4 of the fourth inductor L4, one end of the thirty-sixth capacitor C36, one end of the thirty-ninth resistor R39, and one end of the sixth diode D6 (bidirectional diode) are connected in parallel and connected to the CAN_N terminal; the third end 3 of the fourth inductor L4, one end of the thirty-seventh capacitor C37, one end of the fortieth resistor R40, and one end of the seventh diode D7 (bidirectional diode) are connected in parallel and connected to the CAN_P terminal; the other end of the thirty-sixth capacitor C36 is grounded, and the other end of the thirty-seventh capacitor C37 is grounded; the other end of the thirty-ninth resistor R39 and the other end of the fortieth resistor R40 are connected in parallel to one end of the thirty-eighth capacitor C38, and the other end of the thirty-eighth capacitor C38, the other end of the sixth diode D6, and the other end of the seventh diode D7 are connected in parallel and grounded.

[0106] In this embodiment, the fifth chip U5 is permanently in working state when powered on, and the STB pin needs to be pulled down to ground; at the same time, the fourth inductor L4, the other end of the sixth diode D6, the seventh diode D7, and the third capacitor C38 serve to filter and prevent interference from the external interface, thereby maintaining the stability of signal interaction.

[0107] In this embodiment, the fifth chip U5 is a TJA1044 (CAN chip), a high-speed CAN transceiver. It provides an interface between the Controller Area Network (CAN) protocol controller and the physical two-wire CAN bus. This transceiver is designed specifically for high-speed CAN applications in the automotive industry, providing differential transmit and receive capabilities for the CAN protocol controller (microcontroller).

[0108] like Figure 8 As shown, the Ethernet module includes the seventh chip U7 (KSZ8041NL AM), which supports 10M / 100M network modulation conversion; it is used to connect the vehicle Ethernet and the home network (RJ45) to realize network signal conversion and communication, making it convenient for the software to debug and upgrade the instrument through the network.

[0109] Connect the SH1 and SH2 terminals of U6 (Ethernet interface) in parallel and then ground them.

[0110] The TD+ terminal of U6 (outputting the TX_PHY_P signal) is connected to one end of the forty-first resistor R41 and one end of the eighth diode D8 (a bidirectional diode), respectively. The TD- terminal of U6 (outputting the TX_PHY_N signal) is connected to one end of the forty-second resistor R42 and one end of the ninth diode D9 (a bidirectional diode), respectively. The other end of the forty-first resistor R41 and the other end of the forty-second resistor R42 are connected in parallel to one end of the thirty-ninth capacitor C39, and the other end of the thirty-ninth capacitor C39 is grounded. The other end of the eighth diode D8 and the other end of the ninth diode D9 are connected in parallel to ground.

[0111] The RD+ terminal of U6 (outputting the RX_PHY_P signal) is connected to one end of the forty-third resistor R43 and one end of the tenth diode D10 (a bidirectional diode), respectively. The RD- terminal of U6 (outputting the RX_PHY_N signal) is connected to one end of the forty-fourth resistor R44 and one end of the eleventh diode D11 (a bidirectional diode), respectively. The other end of the forty-third resistor R43 and the other end of the forty-fourth resistor R44 are connected in parallel to one end of the fortieth capacitor C40, and the other end of the fortieth capacitor C40 is grounded. The other end of the tenth diode D10 and the other end of the eleventh diode D11 are connected in parallel to ground.

[0112] Terminals M1 and M2 of U6 are connected in parallel to one end of a forty-first capacitor C41, one end of a forty-second capacitor C42, and one end of a forty-fifth resistor R45, respectively. The other end of the forty-fifth resistor R45 is connected to a 3.3V voltage. The other end of the forty-first capacitor C41 and the other end of the forty-second capacitor C42 are connected in parallel and then grounded.

[0113] The LED_G+ and LED_R- terminals of U6, one end of the 46th resistor R46, and one end of the 47th resistor R47 are connected in parallel to a 3.3V voltage. The LED_G- terminal of the sixth chip U6 is connected to the other end of the 46th resistor R46 and one end of the 48th resistor R48, respectively. The LED_R+ terminal of the sixth chip U6 is connected to the other end of the 47th resistor R47 and one end of the 49th resistor R49, respectively.

[0114] The other end of the forty-eighth resistor R48 is connected to the LED0 terminal of the seventh chip U7, and the other end of the forty-ninth resistor R49 is connected to the LED1 terminal of the seventh chip U7;

[0115] The RX-end of the seventh chip U7 receives the RX_PHY_N signal, the RX+end of the seventh chip U7 receives the RX_PHY_P signal, the TX-end of the seventh chip U7 receives the TX_PHY_N signal, and the TX-end of the seventh chip U7 receives the TX_PHY_P signal;

[0116] The REXT terminal of the seventh chip U7 is connected to one end of the forty-third capacitor C43 and one end of the fiftieth resistor R50. The RST terminal of the seventh chip U7 is connected to one end of the forty-fourth capacitor C44 and one end of the fifty-first resistor R51. The other end of the fifty-first resistor R51 is connected to a 3.3V voltage. The other end of the fiftieth resistor R50, the other end of the forty-third capacitor C43, and the other end of the forty-fourth capacitor C44 are connected in parallel and then grounded.

[0117] The VDD terminal of the seventh chip U7, one end of the forty-fifth capacitor C45, one end of the forty-sixth capacitor C46, ​​one end of the forty-seventh capacitor C47, and one end of the forty-eighth capacitor C48 are connected in parallel to one end of the fifty-second resistor R52. The other end of the fifty-second resistor R52 is connected to 3.3V. The other end of the forty-fifth capacitor C45, the other end of the forty-sixth capacitor C46, ​​the other end of the forty-seventh capacitor C47, and the other end of the forty-eighth capacitor C48 are connected in parallel to ground.

[0118] The TXD0 end of the seventh chip U7 outputs a signal through the fifty-third resistor R53; the TXD1 end of the seventh chip U7 outputs a signal through the fifty-fourth resistor R54; the RXD0 end of the seventh chip U7 outputs a signal through the fifty-fifth resistor R55; the RXD1 end of the seventh chip U7 outputs a signal through the fifty-sixth resistor R56; the CONFIG0 end of the seventh chip U7 outputs a signal, and the CONFIG1 end of the seventh chip U7 outputs a signal.

[0119] The MDC end of the seventh chip U7 is connected to one end of the fifty-seventh resistor R57, the MDIO end of the seventh chip U7 is connected to one end of the fifty-eighth resistor R58, and the other end of the fifty-seventh resistor R57 and the other end of the fifty-eighth resistor R58 are connected in parallel to the 3.3V voltage.

[0120] In this embodiment, the TXD0 terminal, TXD1 terminal, RXD1 terminal, RXD0 terminal, CONFIG0 terminal, CONFIG1 terminal, and CONFIG2 terminal of the seventh chip U7 are all provided with pull-up resistors and pull-down resistors.

[0121] like Figure 9 As shown, for example, the CONFIG0 end of the seventh chip U7, one end of the fifty-ninth resistor R59 (pull-up resistor), and one end of the sixtieth resistor R60 (pull-down resistor) are connected in parallel to output a signal; the other end of the fifty-ninth resistor R59 is connected to the 3.3V voltage, and the other end of the sixtieth resistor R60 is grounded.

[0122] In this embodiment, the pull-up and pull-down resistors at CONFIG0, CONFIG1, and CONFIG2 can be used to directly change their level states, thereby selecting the corresponding mode. For example, when the levels at CONFIG0, CONFIG1, and CONFIG2 are 001, the mode is RMII; when the levels are 100, the mode is MII 100Mbps Preamble Restore.

[0123] In this embodiment, when the resistor at the LED1 / speed terminal in the seventh chip is pulled up, the communication frequency is 100 MHz, and when the resistor is pulled down, the communication frequency is 10 MHz.

[0124] In this embodiment, the resistance of the 50th resistor R50 is 6.49KΩ, and the capacitance of the 43rd capacitor C3 is 100pF; the resistance of the 51st resistor R51 is 10KΩ, and the capacitance of the 44th capacitor C4 is 10uF.

[0125] Those skilled in the art will appreciate that the above-mentioned embodiments are specific examples for implementing the present invention, and in actual applications, various changes may be made thereto in form and detail without departing from the spirit and scope of the present invention.

Claims

1. A device for converting, transmitting and detecting different signals, characterized in that , including CPU, signal transmission module, power module and Ethernet module; the signal transmission module, power module and Ethernet module are bidirectionally connected to the CPU respectively; The signal transmission module is an interface that integrates various signals, including a CAN communication unit, a LIN communication unit, a USB serial port unit and a voltage input unit.

2. A conversion, transmission and detection device suitable for different signals as claimed in claim 1, characterized in that , also includes a switch module and a monitoring module; when the monitoring module detects that the voltage or current exceeds the threshold, it sends an alarm signal to control the switch module to disconnect the power module.

3. A conversion, transmission and detection device suitable for different signals as claimed in claim 1, characterized in that The power supply module includes a filter circuit and a voltage conversion circuit connected in series; the filter circuit includes a first common-mode inductor: The vehicle-mounted end is connected to the positive electrode of the first diode, the positive electrode of the power supply is connected to the positive electrode of the second diode, the negative electrode of the first diode, the negative electrode of the second diode, one end of the first capacitor, one end of the third capacitor, and one end of the third transistor are connected in parallel and then connected to the first end of the first common-mode inductor; the other end of the first capacitor is connected to one end of the second capacitor, the other end of the third capacitor is connected to one end of the fourth capacitor, the negative electrode of the power supply, the other end of the second capacitor, the other end of the fourth capacitor, and the other end of the third transistor are connected in parallel and then connected to the second end of the first common-mode inductor; The fourth end of the first common-mode inductor is respectively connected to one end of the fifth capacitor, one end of the sixth capacitor, one end of the seventh capacitor, one end of the eighth capacitor, one end of the ninth capacitor, one end of the tenth capacitor, one end of the eleventh capacitor, and one end of the second inductor; the other end of the second inductor is respectively connected in parallel to one end of the twelfth capacitor, one end of the thirteenth capacitor, one end of the fourteenth capacitor, one end of the fifteenth capacitor, one end of the sixteenth capacitor, one end of the seventeenth capacitor, one end of the eighteenth capacitor, and one end of the first resistor, and then output to the first chip; The third end of the first common-mode inductor, the other end of the fifth capacitor, the other end of the sixth capacitor, the other end of the seventh capacitor, the other end of the eighth capacitor, the other end of the ninth capacitor, the other end of the tenth capacitor, the other end of the eleventh capacitor, the other end of the twelfth capacitor, the other end of the thirteenth capacitor, the other end of the fourteenth capacitor, the other end of the fifteenth capacitor, the other end of the sixteenth capacitor, the other end of the seventeenth capacitor, the other end of the eighteenth capacitor, and the other end of the first resistor are connected in parallel and grounded.

4. A conversion, transmission and detection device suitable for different signals as claimed in claim 3, characterized in that , the voltage conversion circuit includes a first chip: One end of the first resistor and one end of the second resistor are connected in parallel to the 12V IN serial port and the VIN end of the first chip respectively; the other end of the second resistor is connected to one end of the third resistor; The EN terminal of the first chip is connected to one end of the nineteenth capacitor; the VCC terminal of the first chip is connected to one end of the twentieth capacitor; the GND terminal of the first chip, the other end of the twentieth capacitor, the other end of the nineteenth capacitor, and the other end of the third resistor are connected in parallel and then grounded; The BOOT terminal of the first chip is connected to one end of the twenty-first capacitor, the other end of the twenty-first capacitor is connected to one end of the twenty-second capacitor, the other end of the twenty-second capacitor is connected to one end of the fourth resistor, and the other end of the fourth resistor is grounded; The SW terminal of the first chip is connected to one end of the third inductor, and the other end of the third inductor, one end of the twenty-fourth capacitor, one end of the twenty-fifth capacitor, one end of the twenty-sixth capacitor, one end of the twenty-seventh capacitor, one end of the twenty-eighth capacitor, and one end of the twenty-ninth capacitor are connected to output a 5V voltage; the other end of the 24th capacitor, the other end of the 25th capacitor, the other end of the 26th capacitor, the other end of the 27th capacitor, the other end of the 28th capacitor, and the other end of the 29th capacitor are connected in parallel and then grounded. The PG terminal of the first chip is connected to one end of the fifth resistor, and the other end of the fifth resistor outputs a 5V voltage; the FB terminal of the first chip is respectively connected to one end of the sixth resistor, one end of the seventh resistor, and one end of the twenty-third capacitor, the other end of the sixth resistor, the other end of the twenty-third capacitor, and the other end of the third inductor are connected in parallel and then connected to one end of the eighth resistor, and the other end of the eighth resistor is grounded; the AGND terminal of the first chip and the other end of the seventh resistor are connected in parallel and then grounded.

5. A conversion, transmission and detection device suitable for different signals as claimed in claim 2, characterized in that ,The switch module includes a second chip: The SEL terminal of the second chip is connected to one end of the ninth resistor and one end of the tenth resistor respectively, the other end of the ninth resistor is connected to the first power supply terminal, and the other end of the tenth resistor is grounded; the IN terminal of the second chip is connected to one end of the eleventh resistor, and the other end of the eleventh resistor is connected to the MCU_SW_BAT port of the CPU; The DIAG_EN terminal of the second chip is connected to one end of the twelfth resistor and one end of the thirteenth resistor respectively, the other end of the twelfth resistor is connected to the second power supply terminal, and the other end of the thirteenth resistor is grounded; The CS terminal of the second chip is connected to one end of the fourteenth resistor and one end of the fifteenth resistor, respectively. The other end of the fourteenth resistor is connected to one end of the 30th capacitor. The CL terminal of the second chip is connected to one end of the sixteenth resistor. The other end of the 30th capacitor, the other end of the fifteenth resistor, and the other end of the sixteenth resistor are connected in parallel and then grounded. The VS end of the second chip is connected to the 12VIN serial port and one end of the 31st capacitor respectively, and the other end of the 31st capacitor is grounded; the OUT1 end and OUT2 end of the second chip are connected in parallel to output a 12V voltage; the GND end of the second chip is grounded.

6. A conversion, transmission and detection device suitable for different signals as claimed in claim 2, characterized in that , the monitoring module includes a third chip: The A1 terminal of the third chip is connected to one end of the seventeenth resistor and one end of the eighteenth resistor, respectively, and the other end of the eighteenth resistor is grounded; the A0 terminal of the third chip is connected to one end of the nineteenth resistor and one end of the twentieth resistor, respectively, and the other end of the twentieth resistor is grounded; the Alert terminal of the third chip is connected to one end of the twenty-first resistor and one end of the twenty-second resistor, respectively, and the other end of the twenty-second resistor is grounded; the other end of the seventeenth resistor, the other end of the nineteenth resistor, and the other end of the twenty-first resistor are connected in parallel to the third power supply terminal; The In+ terminal of the third chip and one end of the twenty-third resistor are connected in parallel to the OUT1 terminal of the second chip. The In- terminal of the third chip, the VBUS terminal, and the other end of the twenty-third resistor are connected in parallel to the OUT2 terminal of the second chip. The GND terminal of the third chip and one end of the thirty-second capacitor are connected in parallel and then grounded; the VS terminal of the third chip and the other end of the thirty-second capacitor are connected in parallel to the fourth power supply terminal.

7. A conversion, transmission and detection device suitable for different signals as claimed in claim 1, characterized in that , the LIN communication unit includes a fourth chip: The WAKE_N terminal of the fourth chip is connected to one end of the twenty-fourth resistor, and the other end of the twenty-fourth resistor is connected to the 12V voltage; The SLP_N terminal of the fourth chip is connected to one end of the 27th resistor, the other end of the 27th resistor is connected to one end of the 25th resistor and one end of the 26th resistor respectively, the other end of the 25th resistor is grounded, and the other end of the 26th resistor is connected to the 3.3V voltage; The RXD terminal of the fourth chip is connected to one end of the 28th resistor and one end of the 29th resistor respectively, the other end of the 28th resistor is connected to the LIN_X_N terminal, and the other end of the 29th resistor is connected to a 3.3V voltage; the TXD terminal of the fourth chip is connected to one end of the 30th resistor, and the other end of the 30th resistor is connected to the LIN_X_P terminal; The VBAT terminal of the fourth chip and one end of the thirty-fourth capacitor are connected in parallel to the 12V voltage, and the other end of the thirty-fourth capacitor is grounded; The INH terminal of the fourth chip is connected to the positive electrode of the fourth diode, and the negative electrode of the fourth diode is connected to one end of the thirty-first resistor; the other end of the thirty-first resistor, the LIN terminal of the fourth chip, one end of the thirty-third capacitor, and one end of the fifth diode are connected in parallel and connected to the first output terminal; the GND terminal of the fourth chip, the other end of the thirty-third capacitor, and the other end of the fifth diode are connected in parallel and grounded.

8. A conversion, transmission and detection device suitable for different signals as claimed in claim 1, characterized in that , the CAN communication unit includes a fifth chip: The RXD terminal of the fifth chip is connected to one end of the 32nd resistor, the other end of the 32nd resistor and one end of the 33rd resistor are connected in parallel and connected to CAN_X_N; the TXD terminal of the fifth chip is connected to one end of the 34th resistor, the other end of the 34th resistor is connected to CAN_X_P; the other end of the 33rd resistor and the VIO terminal of the fifth chip are connected in parallel and connected to the 3.3V voltage; The STB terminal of the fifth chip is connected to one end of the thirty-fifth resistor, the other end of the thirty-fifth resistor and one end of the thirty-sixth resistor are connected in parallel to one end of the thirty-seventh resistor, and the other end of the thirty-seventh resistor is grounded; the other end of the thirty-sixth resistor, one end of the thirty-eighth resistor, and one end of the thirty-fifth capacitor are connected in parallel to the VCC terminal of the fifth chip; the other end of the thirty-eighth resistor is connected to a 5V voltage; the other end of the thirty-fifth capacitor is grounded; The CANL end of the fifth chip is connected to the first end of the fourth inductor, and the CANH end of the fifth chip is connected to the second end of the fourth inductor; the fourth end of the fourth inductor, one end of the thirty-sixth capacitor, one end of the thirty-ninth resistor, and one end of the sixth diode are connected in parallel and connected to the CAN_N end; the third end of the fourth inductor, one end of the thirty-seventh capacitor, one end of the fortieth resistor, and one end of the seventh diode are connected in parallel and connected to the CAN_P end; the other end of the thirty-sixth capacitor is grounded, and the other end of the thirty-seventh capacitor is grounded; the other end of the thirty-ninth resistor and the other end of the fortieth resistor are connected in parallel to one end of the thirty-eighth capacitor, and the other end of the thirty-eighth capacitor, the other end of the sixth diode, and the other end of the seventh diode are connected in parallel and grounded.

9. A conversion, transmission and detection device suitable for different signals as claimed in claim 1, characterized in that , the Ethernet module includes a seventh chip and an interface U6: The SH1 and SH2 terminals of U6 are connected in parallel and then grounded; The TD+ terminal of U6 is connected to one end of the forty-first resistor and one end of the eighth diode, respectively. The TD- terminal of U6 is connected to one end of the forty-second resistor and one end of the ninth diode, respectively. The other ends of the forty-first resistor and the forty-second resistor are connected in parallel and then connected to one end of the thirty-ninth capacitor, and the other end of the thirty-ninth capacitor is grounded. The other ends of the eighth diode and the ninth diode are connected in parallel and then grounded. The RD+ terminal of U6 is connected to one end of the forty-third resistor and one end of the tenth diode, respectively. The RD- terminal of U6 is connected to one end of the forty-fourth resistor and one end of the eleventh diode, respectively. The other ends of the forty-third resistor and the forty-fourth resistor are connected in parallel and then connected to one end of the fortieth capacitor, and the other end of the fortieth capacitor is grounded. The other ends of the tenth diode and the eleventh diode are connected in parallel and then grounded. The M1 and M2 terminals of U6 are connected in parallel to one end of the 41st capacitor, one end of the 42nd capacitor, and one end of the 45th resistor, respectively. The other end of the 45th resistor is connected to a 3.3V voltage. The other ends of the 41st capacitor and the 42nd capacitor are connected in parallel and then grounded. The LED_G+ and LED_R- terminals of U6, one end of the 46th resistor, and one end of the 47th resistor are connected in parallel to a 3.3V voltage supply. The LED_G- terminal of U6 is connected to the other end of the 46th resistor and one end of the 48th resistor, respectively. The LED_R+ terminal of U6 is connected to the other end of the 47th resistor and one end of the 49th resistor, respectively. The other end of the forty-eighth resistor is connected to the LED0 terminal of the seventh chip, and the other end of the forty-ninth resistor is connected to the LED1 / speed terminal of the seventh chip; The REXT terminal of the seventh chip is connected to one end of the 43rd capacitor and one end of the 50th resistor respectively; the RST terminal of the seventh chip is connected to one end of the 44th capacitor and one end of the 51st resistor respectively; the other end of the 51st resistor is connected to a 3.3V voltage; the other end of the 50th resistor, the other end of the 43rd capacitor, and the other end of the 44th capacitor are connected in parallel and then grounded; The VDD terminal of the seventh chip, one end of the forty-fifth capacitor, one end of the forty-sixth capacitor, one end of the forty-seventh capacitor, and one end of the forty-eighth capacitor are connected in parallel to one end of the fifty-second resistor. The other end of the fifty-second resistor is connected to a 3.3V voltage. The other end of the forty-fifth capacitor, the other end of the forty-sixth capacitor, the other end of the forty-seventh capacitor, and the other end of the forty-eighth capacitor are connected in parallel to ground. The TXD0 terminal of the seventh chip outputs a signal through the fifty-third resistor; the TXD1 terminal of the seventh chip outputs a signal through the fifty-fourth resistor; the RXD0 terminal of the seventh chip outputs a signal through the fifty-fifth resistor; the RXD1 terminal of the seventh chip outputs a signal through the fifty-sixth resistor; the CONFIG0 terminal of the seventh chip outputs a signal, and the CONFIG1 terminal of the seventh chip U7 outputs a signal; The MDC end of the seventh chip is connected to one end of the fifty-seventh resistor, the MDIO end of the seventh chip is connected to one end of the fifty-eighth resistor, and the other end of the fifty-seventh resistor and the other end of the fifty-eighth resistor are connected in parallel to the 3.3V voltage.