Circuit for realizing digital audio differential output

Abstract

The utility model belongs to the field of audio digital-to-analog conversion, and relates to a circuit for realizing digital audio differential output, which comprises an inverting circuit, a shift register circuit, an either-or gate circuit and an audio conversion circuit, the phase inverting circuit inverts the phase of the received signal and inputs the signal to the shift register circuit and the either-or gate circuit. The output end of the shift register circuit is connected with the input end of the either-or gate circuit; when differential output is achieved, the differential output is achieved by simplifying the circuit design and using a common DAC chip, the cost is remarkably reduced, and the advantages of differential signals can be applied to more low-cost devices and systems. And meanwhile, by utilizing the characteristics of the differential signals, the influence of external interference on the audio signals is effectively reduced, and the clarity and the purity of the tone quality can be kept even in an environment with relatively large noise.

Description

Technical Field

[0001] The present invention relates to the field of audio digital-to-analog conversion, and in particular to a circuit for realizing digital audio differential output. Background Art

[0002] In audio equipment, a digital-to-analog converter (DAC) is a core component that converts digital signals into analog signals for use with speakers or other analog devices. I2S, or Inter-IC Sound Bus, is a common digital audio transmission protocol, commonly used to connect digital audio devices such as microprocessors and DACs. A standard I2S interface typically consists of three lines: a bit clock line (BCK), a word select line (WS), and a data line (DATA).

[0003] Differential signaling plays a crucial role in the audio field, particularly in noisy environments, where differential signals exhibit greater immunity to interference than single-ended signals. However, traditional DACs often only support single-ended outputs and lack differential outputs. Alternatively, those that do support differential outputs are expensive and complex. Therefore, a cost-effective solution for achieving differential outputs is needed. Utility Model Content

[0004] The purpose of this application is to provide a circuit for realizing digital audio differential output, so as to solve the problem that it is difficult for existing DAC to realize differential output through a simple circuit.

[0005] The technical solution of the present application is: a circuit for realizing digital audio differential output, comprising an inverting circuit, a shift register circuit, a two-select gate circuit and an audio conversion circuit; the inverting circuit inverts the received signal and inputs it into the shift register circuit and the two-select gate circuit respectively; the output end of the shift register circuit is connected to the input end of the two-select gate circuit; the two-select gate circuit is used to output left channel data and right channel data to the audio conversion circuit respectively; the audio conversion circuit comprises a left channel conversion circuit and a right channel conversion circuit, and the left channel conversion circuit and the right channel conversion circuit can respectively receive left channel and right channel data for digital-to-analog conversion; the two-select gate circuit can respectively output different channel data according to the different received data.

[0006] Preferably, the inverting circuit includes a first NOT gate inverting chip and a second NOT gate inverting chip; the output end of the first NOT gate inverting chip is connected to the shift register circuit, and the output end of the second NOT gate inverting chip is connected to the two-select gate circuit. The first NOT gate inverting chip and the second NOT gate inverting chip receive the DATA signal and the WS signal respectively. The first NOT gate inverting chip inverts the DATA signal and outputs it to the shift register circuit, and the second NOT gate inverting chip inverts the WS signal and outputs it to the two-select gate circuit.

[0007] Preferably, the shift register circuit includes a shift register, pin 7 of the shift register is connected to the DATA signal, pin 9 is connected to the output end of the first NOT gate inverting chip, and pins 10 and 11 are connected to a two-select gate circuit; wherein pin 10 of the shift register outputs the right channel signal, and pin 11 outputs the left channel signal.

[0008] Preferably, the two-to-one gate circuit includes a two-to-one multiplexer, wherein pin 1 of the two-to-one multiplexer is connected to the output end of the second NOT gate inversion chip, pin 5 is directly connected to the DATA signal, and pins 2, 3 and 6 are connected to the output end of the shift register, for receiving right-shifted data and left-shifted data respectively.

[0009] Preferably, the circuit structure of the channel conversion circuit and the right channel conversion circuit is the same, and the right channel conversion circuit includes a digital-to-analog conversion chip, a first resistor, a second resistor and a third resistor; pins 13-15 of the digital-to-analog conversion chip are respectively connected to the first resistor, the second resistor and the third resistor, the first resistor is connected to the BCK signal, the second resistor is connected to the DATA signal, and the third resistor is connected to the WS signal; pin 6 of the digital-to-analog conversion chip outputs the left channel analog signal, and pin 7 outputs the right channel analog signal.

[0010] The circuit for realizing digital audio differential output of the present application has the following advantages:

[0011] 1. While achieving differential output, the cost is significantly reduced by simplifying the circuit design and using ordinary DAC chips to achieve differential output, so that the advantages of differential signals can be applied to more low-cost devices and systems.

[0012] 2. At the same time, the characteristics of differential signals are utilized to effectively reduce the impact of external interference on audio signals, and the clarity and purity of the sound quality can be maintained even in a noisy environment.

[0013] 3. Differential output can be achieved through simple hardware modification, which reduces the complexity of the equipment and makes it easy to maintain and upgrade.

[0014] 4. Innovative circuit design simplifies the production process, thereby significantly improving production efficiency and helping to quickly meet market demand.

[0015] 5. It can make full use of existing common DAC resources and realize differential output function without investing a lot of additional resources, thus improving resource utilization.

[0016] 6. Because the cost and complexity have been significantly reduced, this technology can be widely used in various audio equipment, from professional-grade applications to consumer-grade products. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions provided by this application, the following is a brief introduction to the accompanying drawings. Obviously, the accompanying drawings described below are only some embodiments of this application.

[0018] Figure 1 This is a circuit structure diagram of the inverter circuit, shift register circuit, and two-select gate circuit of the present application;

[0019] Figure 2 This is a circuit structure diagram of the audio conversion circuit of this application.

[0020] 1. First NOT gate inverting chip; 2. Second NOT gate inverting chip; 3. Shift register; 4. Two-to-one multiplexer; 5. Digital-to-analog conversion chip; 6. First resistor; 7. Second resistor; 8. Third resistor. DETAILED DESCRIPTION

[0021] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention.

[0022] A circuit for realizing digital audio differential output, such as Figure 1-Figure 2 As shown, the system includes an inverting circuit, a shift register circuit, a two-choice gate circuit, and an audio conversion circuit. The inverting circuit inverts the received signal and inputs it into the shift register circuit and the two-choice gate circuit, respectively. The output of the shift register circuit is connected to the input of the two-choice gate circuit. The two-choice gate circuit is used to output left and right channel data, respectively, to the audio conversion circuit. The audio conversion circuit includes a left channel conversion circuit and a right channel conversion circuit, which can respectively receive left and right channel data and perform digital-to-analog conversion. The two-choice gate circuit can output different channel data based on the different received data.

[0023] Preferably, the inverting circuit includes a first NOT gate inverting chip 1 and a second NOT gate inverting chip 2. The output end of the first NOT gate inverting chip 1 is connected to the shift register circuit, and the output end of the second NOT gate inverting chip 2 is connected to the two-select gate circuit. The first NOT gate inverting chip 1 and the second NOT gate inverting chip 2 receive the DATA signal and the WS signal, respectively. The first NOT gate inverting chip 1 inverts the DATA signal and outputs it to the shift register circuit, and the second NOT gate inverting chip 2 inverts the WS signal and outputs it to the two-select gate circuit.

[0024] In digital circuits, a shift register circuit is a flip-flop-based device that operates under several identical time pulses. Data is input into the device in parallel or serial mode, and then each time pulse shifts one bit to the left or right and outputs it at the output end.

[0025] Preferably, the shift register circuit includes a shift register 3, wherein pin 7 of the shift register 3 receives the DATA signal, pin 9 is connected to the output of the first NOT gate inverting chip 1, and pins 10 and 11 are connected to a two-select gate circuit. Pin 10 of the shift register 3 outputs the right channel signal, and pin 11 outputs the left channel signal. The shift register 3 contains two 64-bit shift registers 3 for storing and shifting data. Driven by the BCK (clock), the DATA signal is stored and shifted by the shift register 3 during each clock cycle.

[0026] The DATA signal forms four data flow directions, specifically:

[0027] DATA data flow direction 1: DATA is directly connected to the two-choose-one gate circuit.

[0028] DATA data flow two: The input DATA signal is inverted by the first NOT gate inversion chip 1 and input to the 9-pin 2D input of the shift register 3. Under the beat of the BCK input of the 12-pin 2CP, the right-shifted data DATA_R~ is output through the 10-pin of the shift register 3 and connected to the two-select gate circuit.

[0029] DATA data flow three: The input DATA signal is input through pin 7 1D of shift register 3. Under the beat of BCK input at pin 4 1CP, it outputs DATA_L+ through pin 6 of shift register 3 and then inputs 1A of the two-select gate circuit.

[0030] DATA data flow four: The input DATA signal is inverted by the first NOT gate inversion chip 1 and input to the 2D input of pin 9 of the shift register 3. Under the beat of BCK input at pin 12, the left-shifted data DATA_L~ is output through pin 11 of the shift register 3, and then input to 1B of the two-select gate circuit.

[0031] Preferably, the two-to-one gate circuit includes a two-to-one multiplexer 4. Pin 1 of the two-to-one multiplexer 4 is connected to the output of the second NOT gate inverting chip 2, pin 5 is directly connected to the DATA signal, and pins 2, 3, and 6 are connected to the output of the shift register 3, respectively receiving right-shifted data and left-shifted data. The WS signal output by the second NOT gate inverting chip 2 is used to switch data between the left and right channels. When WS is "1," it indicates that the left channel data is being transmitted; when WS is "0," it indicates that the right channel data is being transmitted. Pins 4 and 7 of the two-to-one gate circuit output the left and right channel data, respectively.

[0032] Preferably, the circuit structures of the left channel conversion circuit and the right channel conversion circuit are the same. The right channel conversion circuit is now described as an example: the right channel conversion circuit includes a digital-to-analog conversion chip 5, a first resistor 6, a second resistor 7 and a third resistor 8; pins 13-15 of the digital-to-analog conversion chip 5 are respectively connected to the first resistor 6, the second resistor 7 and the third resistor 8, and at the same time, the first resistor 6 is connected to the BCK signal, the second resistor 7 is connected to the DATA signal, and the third resistor 8 is connected to the WS signal; pin 6 of the digital-to-analog conversion chip 5 outputs the left channel analog signal, and pin 7 outputs the right channel analog signal.

[0033] The raw data from the audio device is an I²S data stream:

[0034] The I²S data contains a left channel (L) and a right channel (R), and each sample is 16 bits.

[0035] Invert and delay DATA:

[0036] Invert `DATA`, that is, reverse each bit.

[0037] Delayed by 32 BCK pulses, which is one complete audio frame.

[0038] Use WS to control the binary gate circuit to select the data source:

[0039] After the WS signal passes through the NOT gate, it controls the binary gate circuit to select the original `DATA_R+` or the inverted and delayed `DATA_R~`. And select the original `DATA_L+` or the inverted and delayed `DATA_L~`.

[0040] When WS is low, pin 2 1A (i.e. original DATA_L+) of the two-choice gate circuit is selected.

[0041] When WS is high, pin 3 1B of the two-choice gate circuit is selected (that is, DATA_L~ after inversion and delay).

[0042] When WS is low, the 5-pin 2A (i.e. the original DATA_R+) of the two-choice gate circuit is selected.

[0043] When WS is high, pin 6 2B of the two-choice gate circuit is selected (that is, the inverted and delayed DATA_R~).

[0044] In summary, this application has the following advantages:

[0045] 1. While achieving differential output, the cost is significantly reduced by simplifying the circuit design and using ordinary DAC chips to achieve differential output, so that the advantages of differential signals can be applied to more low-cost devices and systems.

[0046] 2. At the same time, the characteristics of differential signals are utilized to effectively reduce the impact of external interference on audio signals, and the clarity and purity of the sound quality can be maintained even in a noisy environment.

[0047] 3. Differential output can be achieved through simple hardware modification, which reduces the complexity of the equipment and makes it easy to maintain and upgrade.

[0048] 4. Innovative circuit design simplifies the production process, thereby significantly improving production efficiency and helping to quickly meet market demand.

[0049] 5. It can make full use of existing common DAC resources and realize differential output function without investing a lot of additional resources, thus improving resource utilization.

[0050] 6. Because the cost and complexity have been significantly reduced, this technology can be widely used in various audio equipment, from professional-grade applications to consumer-grade products.

[0051] Finally, it should be noted that the drawings of the embodiments disclosed in this utility model only involve structures related to the embodiments disclosed in this utility model. Other structures can refer to common designs. In the absence of conflicts, the same embodiment and different embodiments of the utility model can be combined with each other.

[0052] Finally: The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention should be included in the scope of protection of the present invention.

Claims

1. A circuit for realizing digital audio differential output, characterized in that: It includes an inverting circuit, a shift register circuit, a two-choice gate circuit and an audio conversion circuit; the inverting circuit inverts the received signal and inputs it into the shift register circuit and the two-choice gate circuit respectively; the output end of the shift register circuit is connected to the input end of the two-choice gate circuit; the two-choice gate circuit is used to output left channel data and right channel data to the audio conversion circuit respectively; the audio conversion circuit includes a left channel conversion circuit and a right channel conversion circuit, and the left channel conversion circuit and the right channel conversion circuit can respectively receive left channel and right channel data for digital-to-analog conversion; the two-choice gate circuit can respectively output different channel data according to different received data.

2. The circuit for realizing digital audio differential output according to claim 1, wherein: The inverting circuit comprises a first NOT gate inverting chip (1) and a second NOT gate inverting chip (2); the output end of the first NOT gate inverting chip (1) is connected to a shift register circuit, and the output end of the second NOT gate inverting chip (2) is connected to a two-select gate circuit; the first NOT gate inverting chip (1) and the second NOT gate inverting chip (2) receive a DATA signal and a WS signal respectively; the first NOT gate inverting chip (1) inverts the DATA signal and outputs it to the shift register circuit; the second NOT gate inverting chip (2) inverts the WS signal and outputs it to the two-select gate circuit.

3. The circuit for realizing digital audio differential output according to claim 2, wherein: The shift register circuit comprises a shift register (3), wherein pin 7 of the shift register (3) is connected to a DATA signal, pin 9 is connected to the output end of a first NOT gate inverting chip (1), and pins 10 and 11 are connected to a two-select-one gate circuit; wherein pin 10 of the shift register (3) outputs a right channel signal, and pin 11 outputs a left channel signal.

4. The circuit for realizing digital audio differential output according to claim 3, wherein: The two-to-one gate circuit comprises a two-to-one multiplexer (4), wherein pin 1 of the two-to-one multiplexer (4) is connected to the output end of the second NOT gate inversion chip (2), pin 5 is directly connected to the DATA signal, and pins 2, 3 and 6 are connected to the output end of the shift register (3), for respectively receiving right-shifted data and left-shifted data.

5. The circuit for realizing digital audio differential output according to claim 1, wherein: The circuit structures of the channel conversion circuit and the right channel conversion circuit are the same. The right channel conversion circuit comprises a digital-to-analog conversion chip (5), a first resistor (6), a second resistor (7) and a third resistor (8); pins 13-15 of the digital-to-analog conversion chip (5) are respectively connected to the first resistor (6), the second resistor (7) and the third resistor (8); the first resistor (6) is connected to a BCK signal, the second resistor (7) is connected to a DATA signal, and the third resistor (8) is connected to a WS signal; pin 6 of the digital-to-analog conversion chip (5) outputs a left channel analog signal, and pin 7 outputs a right channel analog signal.

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