Storage control circuit

Abstract

The utility model provides a storage control circuit, and relates to the technical field of storage, and the storage control circuit comprises a main controller; a first memory card; the memory card slot is used for inserting a second memory card; the fixed end of the change-over switch is connected to the main controller, and the movable end of the change-over switch can be connected with the first memory card or the memory card slot. According to the utility model, the free switching of the connection between the single-interface main controller and the first memory card and the memory card slot is realized.

Description

Technical Field

[0001] This utility model relates to the field of storage technology, and in particular to a storage control circuit. Background Technology

[0002] As vehicle architecture evolves from a distributed architecture to a regional controller architecture, the vehicle's computing power is mainly concentrated on one or a few central controllers. Therefore, high-performance SOCs (System on Chip) are needed to process different data in real time. Currently, mainstream SOCs are divided into two categories: dual SDIO interfaces (Secure Digital Input and Output) and single SDIO interfaces. Dual SDIO interfaces integrate two controllers within the SOC and can simultaneously support both SD cards (Secure Digital Memory Cards) and eMMC cards (Embedded Multi Media Cards). Single SDIO interface SOCs are designed only for eMMC cards and have certain advantages in terms of software and hardware development complexity, layout and wiring, and cost.

[0003] However, dual SDIO interfaces increase the hardware complexity and material costs of the SOC, and if the EMMC with a single SDIO interface fails, the entire system will be paralyzed. Utility Model Content

[0004] In view of this, this application provides a storage control circuit designed to overcome at least one of the aforementioned drawbacks.

[0005] This application provides a storage control circuit, comprising: a main controller; a first memory card; a memory card slot for inserting a second memory card; and a switch, wherein the fixed end of the switch is connected to the main controller, and the movable end of the switch can be connected to the first memory card or the memory card slot.

[0006] Preferably, it further includes: a connectivity controller, which is connected to the control terminal of the switch to control the connection state of the switch.

[0007] Preferably, the connectivity controller includes a first input pin and a second input pin. The first input pin is used to receive a first control signal, and the second input pin is used to receive a second control signal. When both the first and second control signals are at an invalid level, the output pin of the connectivity controller provides a first level signal to control the main controller to connect with the first memory card. When at least one of the first and second control signals is at an active level, the output pin of the connectivity controller provides a second level signal to control the main controller to connect with the memory card slot.

[0008] Preferably, the first control signal is received from an external control device, wherein the storage control circuit further includes a chip, wherein the chip's general purpose input / output pins are connected to the second input pin to provide the second control signal to the second input pin.

[0009] Preferably, the input pin of the chip is used to receive a mode selection signal, wherein when the mode selection signal indicates a read / write operation with the first memory card, the chip controls the second control signal to be at an invalid level, and when the mode selection signal indicates a read / write operation with the second memory card, the chip controls the second control signal to be at an active level.

[0010] Preferably, the external control device includes a mobile testing device, which is connected to the first input pin via a wired or wireless connection.

[0011] Preferably, the connectivity controller includes a control subcircuit, a transistor, and an output subcircuit. The first input terminal of the control subcircuit serves as the first input pin of the connectivity controller to receive a first control signal. The second input terminal of the control subcircuit serves as the second input pin of the connectivity controller to receive a second control signal. The output terminal of the control subcircuit is connected to the base of the transistor. The emitter of the transistor is connected to a power supply. The collector of the transistor is connected to the first terminal of the output subcircuit. The second terminal of the output subcircuit is grounded. The third terminal of the output subcircuit serves as the output pin of the connectivity controller. When both the first and second control signals are at an invalid level, the control subcircuit provides a cutoff level to the base of the transistor to control the transistor to be in a cutoff state. When at least one of the first and second control signals is at an active level, the control subcircuit provides a conduction level to the base of the transistor to control the transistor to be in a conduction state.

[0012] Preferably, the control sub-circuit includes a first diode, a second diode, a first resistor, and a second resistor, wherein the cathode of the first diode serves as the first input terminal of the control sub-circuit, the anode of the first diode is connected to the first end of the first resistor, and the second end of the first resistor serves as the output terminal of the control sub-circuit and is connected to the base of the transistor; the cathode of the second diode serves as the second input terminal of the control sub-circuit, the anode of the second diode is connected to the first end of the first resistor, the first end of the second resistor is connected to the power supply, and the second end of the second resistor is connected to the base of the transistor.

[0013] Preferably, the control sub-circuit further includes: a first capacitor, the first end of which is connected to the cathode of the first diode, and the second end of which is grounded; and a second capacitor, the first end of which is connected to the cathode of the second diode, and the second end of which is grounded.

[0014] Preferably, the output sub-circuit includes: a third resistor, the first end of which is connected to the collector of the transistor as the first terminal of the output sub-circuit, and the second end of which is grounded as the second terminal of the output sub-circuit; a fourth resistor, the first end of which is connected to the collector of the transistor, and the second end of which is the third terminal of the output sub-circuit; and a third capacitor, the first end of which is connected to the second terminal of the third resistor, and the second end of which is connected to the second terminal of the fourth resistor.

[0015] This application provides a storage control circuit, relating to the field of storage technology. The storage control circuit includes a main controller; a first memory card; a memory card slot for inserting a second memory card; and a switch, the fixed end of which is connected to the main controller, and the movable end of which can be connected to either the first memory card or the memory card slot. This invention enables free switching between the connection between a single-interface controller and the first memory card and the memory card slot.

[0016] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, preferred embodiments are described below in detail with reference to the accompanying drawings. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This paper shows one of the structural schematic diagrams of the storage control circuit provided in an embodiment of this application;

[0019] Figure 2 A second schematic diagram of the storage control circuit provided in an embodiment of this application is shown;

[0020] Figure 3 The third schematic diagram of the storage control circuit provided in the embodiment of this application is shown;

[0021] Figure 4 One of the structural schematic diagrams of the connectivity controller provided in the embodiments of this application is shown;

[0022] Figure 5 This is a second schematic diagram of the structure of the connectivity controller provided in an embodiment of this application.

[0023] Reference numerals: 100-Main controller; 110-Chip; 200-Changeover switch; 300-First memory card; 400-Memory card slot; 410-Protector; 500-Connection controller; 501-Control sub-circuit; 502-Power supply; 503-Output sub-circuit; 600-External control device. Detailed Implementation

[0024] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely represents selected embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0025] In the description of the embodiments of this application, it should be noted that the terms "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the utility model product is in use. They are only for the convenience of describing the utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the utility model. In addition, the terms "first," "second," and "third," etc., are only used to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0026] Furthermore, terms such as "horizontal" and "vertical" do not imply that components must be absolutely horizontal or suspended, but rather that they can be slightly tilted. For example, "horizontal" simply means that its direction is more horizontal than "vertical," and does not mean that the structure must be completely horizontal, but can be slightly tilted.

[0027] In the description of the embodiments of this application, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set," "install," "connect," and "connect" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.

[0028] like Figure 1 As shown in the figure, this application embodiment provides a storage control circuit, including: a main controller 100, a first memory card 300, a memory card slot 400, and a switching switch 200.

[0029] In this application embodiment, the main controller 100 refers to a core control unit that is responsible for the control and data processing of the entire system. In this application, the main controller 100 is responsible for coordinating data read and write operations.

[0030] The first memory card 300 refers to a memory card that is directly soldered onto the circuit. It can be an EMMC (Embedded Multi Media Card). EMMC is an embedded storage solution that reduces connectivity issues and provides higher data transfer speeds compared to traditional SD cards.

[0031] The memory card slot 400 is a physical interface for inserting and securing an external second memory card. The memory card slot 400 is designed with an interface that matches the second memory card for proper connection and communication. The second memory card, as opposed to the first memory card 300, refers to an external memory card that can be inserted through the memory card slot 400, such as an SD card.

[0032] The switch 200 is a switch that can switch between different circuit paths to select whether to connect to the internal first memory card 300 or the memory card slot 400. Specifically, the fixed end of the switch 200 is connected to the main controller 100. The connection between the fixed end and the main controller 100 ensures that the switch 200 can receive and respond to instructions from the main controller 100.

[0033] In this embodiment, the active end of the switch 200 can be changed. The active end has two connected objects: one is the first memory card 300, and the other is the memory card slot 400. By operating the switch 200, the active end can switch between these two connected objects. This makes the storage control circuit more flexible and scalable. Users can choose to use the first memory card or the second memory card as needed without making complex modifications or redesigns to the circuit. It also provides convenience for data backup, migration and recovery.

[0034] like Figure 2 As shown, the storage control circuit also includes a connectivity controller 500.

[0035] The connection controller 500 is connected to the control terminal of the switch 200 to control the connection status of the switch 200.

[0036] In a preferred embodiment of this application, the connectivity controller 500 has two input pins, a first input pin T1 and a second input pin T2, which are used to receive a first control signal and a second control signal, respectively. The first input pin T1 of the connectivity controller 500 is used to receive the first control signal, and the second input pin T2 of the connectivity controller 500 is used to receive the second control signal. When both the first control signal and the second control signal are at an invalid level, the output pin T3 of the connectivity controller 500 provides a first level signal to control the main controller 100 to connect with the first memory card 300. When at least one of the first control signal and the second control signal is at an active level, the output pin T3 of the connectivity controller 500 provides a second level signal to control the main controller 100 to connect with the memory card slot 400.

[0037] Specifically, an invalid level refers to a level that will not trigger the controller 500 to change its output state, while an effective level is a level that can trigger a change. Both invalid and effective levels can be high or low, and this application does not impose any restrictions. The output pin T3 of the connectivity controller 500 controls the connectivity between the main controller 100 and the first memory card 300 or the memory card slot 400 based on the input first and second level signals. When both the first and second control signals are at an invalid level, the output pin T3 of the connectivity controller 500 provides the first level signal, which instructs the switch 200 to connect the main controller 100 to the first memory card 300. When at least one of the first and second control signals is at an active level, the output pin T3 of the connectivity controller 500 provides the second level signal, which instructs the switch 200 to connect the main controller 100 to the memory card slot 400. This design allows the storage control circuit to flexibly switch the connection status of the internal and external memory cards according to the external control signal, thereby improving the flexibility and scalability of the circuit. Meanwhile, by default, both the first and second control signals are at an invalid level, and the main controller 100 is connected to the first memory card 300 by default to provide secure data backup or access.

[0038] like Figure 3 As shown, the storage control circuit also includes: chip 110.

[0039] The general-purpose input / output (GPIO) pin of chip 110 is connected to the second input pin T2 to provide a second control signal to the second input pin T2. ​​Chip 110 refers to a tiny integrated circuit that contains a large number of electronic components and wires connecting them to perform a specific function. In this application, chip 110 can be a SOC chip, responsible for providing the second control signal to the second input pin T2 of the communication controller 500. The GPIO pin on chip 110 is a multi-functional pin used to send the second control signal to the second input pin T2 of the communication controller 500. When chip 110 receives instructions from other circuits or components (these instructions may come from user input, sensor signals, outputs of other controllers, etc.), it will send a specific level signal to the second input pin T2 of the communication controller 500 through the GPIO pin. This specific level signal is the second control signal. The main controller 100 is integrated on the main controller 100.

[0040] In a preferred embodiment of this application, the input pin of chip 110 is used to receive a mode selection signal. When the mode selection signal indicates that a read / write operation is to be performed with the first memory card 300, chip 110 controls the second control signal to be at an invalid level, and when the mode selection signal indicates that a read / write operation is to be performed with the second memory card, it controls the second control signal to be at an active level.

[0041] The input pin of chip 110 is a pin on chip 110 used to receive external signals. This pin is used to receive a mode selection signal, which is a signal from an external source used to tell the storage control circuit which operating mode it should be in. Specifically, the mode selection signal can indicate whether the circuit is performing read and write operations with the internal first memory card 300 or with the external second memory card through the memory card slot 400.

[0042] like Figure 3 As shown, the storage control circuit also includes an external control device 600 and a wireless communication module.

[0043] The external control device 600 includes a mobile test device, which is connected to the first input pin T1 via a wired connection or a wireless communication module. The mobile test device provides a first control signal to the first input pin T1 via the wireless communication module.

[0044] Specifically, a wirelessly connected mobile test device can be a portable device, such as a smartphone, tablet, or dedicated test instrument. It can communicate wirelessly with the storage control circuit. The mobile test device typically has a user interface that allows users to input commands or view test results. The wireless communication module is integrated into the storage control circuit and connected to the first input pin T1. This allows the mobile test device to send a first control signal to the storage control circuit wirelessly (e.g., Bluetooth, Wi-Fi, NFC). Wireless connectivity is a communication method that does not require a physical connection. It transmits information between devices using electromagnetic waves (e.g., radio waves, microwaves). Compared to wired connections, wireless connectivity offers greater flexibility and mobility, but may be affected by factors such as signal interference and distance limitations.

[0045] Alternatively, the external control device 600 includes physical buttons electrically connected to the first input pin T1. A physical button is a mechanical switch whose state is changed by a user's physical operation (such as pressing or releasing). Physical buttons are commonly used in input devices such as keyboards, remote controls, and control panels to execute specific functions or commands. Electrical connection refers to connecting the physical button to the first input pin T1 of the storage control circuit via wires, circuit boards, or other conductive materials to achieve the transmission of electrical signals. Electrical connection can be direct (e.g., via wires) or through intermediate circuits or components (e.g., logic gates, amplifiers).

[0046] like Figure 3 As shown, the storage control circuit also includes a protector 410.

[0047] The protector 410 is disposed between the memory card slot 400 and the switch 200. The main function of the protector 410 is to prevent damage from electrostatic discharge. When an external memory card is inserted into or removed from the memory card slot 400, electrostatic discharge may occur. The protector 410 can absorb or disperse the energy generated by these electrostatic discharges, thereby protecting the circuit from damage.

[0048] like Figure 4 As shown, the connection controller 500 includes: a control sub-circuit 501, a transistor Q1, and an output sub-circuit 503.

[0049] Specifically, the first input terminal of the control sub-circuit 501 serves as the first input pin T1 of the controller 500 to receive the first control signal, and the second input terminal of the control sub-circuit 501 serves as the second input pin T2 of the controller 500 to receive the second control signal. The output terminal of the control sub-circuit 501 is connected to the base of transistor Q1, the emitter of transistor Q1 is connected to the power supply 502, the collector of transistor Q1 is connected to the first terminal of the output sub-circuit 503, the second terminal of the output sub-circuit 503 is grounded, and the third terminal of the output sub-circuit 503 serves as the output pin T3 of the controller 500. When both the first and second control signals are at an invalid level, the control sub-circuit 501 provides a cutoff level to the base of transistor Q1 to control transistor Q1 to be in a cutoff state. When at least one of the first and second control signals is at an active level, it provides a conduction level to the base of transistor Q1 to control transistor Q1 to be in a conduction state.

[0050] Specifically, in the off state, when both the first and second control signals are at an invalid level, the control sub-circuit 501 provides a cutoff level to the base of transistor Q1. At this time, transistor Q1 is in the off state, and almost no current flows between the collector and emitter. The third terminal of the output sub-circuit 503 (connected to the output pin T3 of the controller 500) does not provide a control signal to the external circuit. In the on state, when at least one of the first and second control signals is at an valid level, the control sub-circuit 501 provides a conduction level to the base of transistor Q1. At this time, transistor Q1 is in the on state, and current flows between the collector and emitter. This current forms a loop through the output sub-circuit 503, causing the third terminal of the output sub-circuit 503 (connected to the output pin T3 of the controller 500) to provide a control signal to the external circuit (switch 200), thereby changing the connection state of the switch 200. With this design, the storage control circuit can flexibly control the connection state of the switching switch 200 according to the first control signal and the second control signal, thereby switching between read and write operations for the first memory card 300 or the memory card slot 400.

[0051] like Figure 5 As shown, the control sub-circuit 501 includes: a first diode L1, a second diode L2, a first resistor R1, a second resistor R2, a first capacitor C1, and a second capacitor C2.

[0052] Specifically, the cathode of the first diode L1 serves as the first input terminal of the control sub-circuit 501, the anode of the first diode L1 is connected to the first end of the first resistor R1, and the second end of the first resistor R1 serves as the output terminal of the control sub-circuit 501, connected to the base of the transistor Q1. The cathode of the second diode L2 serves as the second input terminal of the control sub-circuit 501, the anode of the second diode L2 is connected to the first end of the first resistor R1, the first end of the second resistor R2 is connected to the power supply 502, and the second end of the second resistor R2 is connected to the base of the transistor Q1. The first end of the first capacitor C1 is connected to the cathode of the first diode L1, and the second end of the first capacitor C1 is grounded. The first end of the second capacitor C2 is connected to the cathode of the second diode L2, and the second end of the second capacitor C2 is grounded.

[0053] Here, the first diode L1 and the second diode L2 serve as rectifier or detector diodes for the first input pin T1 and the second input pin T2, respectively, reducing the AC component of the first and second control signals for subsequent circuit processing and protecting the base of transistor Q1 from excessive voltage surges. The first resistor R1 and the second resistor R2 together form a voltage divider circuit to adjust the voltage level at the base of transistor Q1. The first capacitor C1 and the second capacitor C2 are used for filtering and decoupling, smoothing high-frequency noise in the input signal and preventing DC components from passing through.

[0054] like Figure 5 As shown, the output sub-circuit 503 includes: a third resistor R3, a fourth resistor R4, and a third capacitor C3.

[0055] The first end of the third resistor R3 is connected to the collector of transistor Q1 as the first end of the output sub-circuit 503, and the second end of the third resistor R3 is grounded as the second end of the output sub-circuit 503. The first end of the fourth resistor R4 is connected to the collector of transistor Q1, and the second end of the fourth resistor R4 is the third end of the output sub-circuit 503. The first end of the third capacitor C3 is connected to the second end of the third resistor R3, and the second end of the third capacitor C3 is connected to the second end of the fourth resistor R4.

[0056] Here, the third resistor R3 is used to provide the load resistance for the collector of transistor Q1. The third resistor R3 and the fourth resistor R4 together form a voltage divider circuit to adjust the voltage level of the first level signal or the second level signal. The third capacitor C3 is used for filtering to reduce high-frequency noise in the first level signal or the second level signal. TP1, TP2, TP3, TP4, TP5, TP6 and TP7 are used as detection points for circuit testing or analysis on the control sub-circuit 501 and the output sub-circuit 503.

[0057] Compared to existing technologies, this application proposes a storage control circuit that utilizes a switch to enable switching between a first memory card and a memory card slot. This allows for perfect compatibility with two mainstream storage devices even on a SOC chip equipped with only a single SDIO controller, meeting the diverse needs of different customers. For example, users can determine the capacity of the SD card themselves, greatly improving flexibility. Furthermore, during the early development stages of the SOC chip, developers can use different SD cards in the memory card slot for auxiliary debugging, shortening the development cycle and improving work efficiency.

[0058] Finally, it should be noted that the above-described embodiments are merely specific implementations of this application, used to illustrate the technical solutions of this application, and not to limit them. The scope of protection of this application is not limited thereto. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features, within the scope of the technology disclosed in this application. Such modifications, changes, or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of protection of the claims.

Claims

1. A storage control circuit, characterized in that, include: Main controller; First memory card; A memory card slot for inserting a second memory card; A switching switch, the fixed end of which is connected to the main controller, and the movable end of which can be connected to the first memory card or the memory card slot.

2. The storage control circuit according to claim 1, characterized in that, Also includes: A connectivity controller is connected to the control terminal of the switch to control the connection status of the switch.

3. The storage control circuit according to claim 2, characterized in that, The connectivity controller includes a first input pin and a second input pin. The first input pin is used to receive a first control signal, and the second input pin is used to receive a second control signal. Specifically, when both the first control signal and the second control signal are at an invalid level, the output pin of the connectivity controller provides a first-level signal to control the main controller to connect with the first memory card. When at least one of the first control signal and the second control signal is at an active level, the output pin of the connectivity controller provides a second level signal to control the main controller to connect with the memory card slot.

4. The storage control circuit according to claim 3, characterized in that, The first control signal is received from an external control device. The storage control circuit further includes: A chip, wherein the chip’s general purpose input / output pins are connected to the second input pin to provide the second control signal to the second input pin.

5. The storage control circuit according to claim 4, characterized in that, The input pin of the chip is used to receive a mode selection signal. When the mode selection signal indicates that a read / write operation is to be performed with the first memory card, the chip controls the second control signal to be at an invalid level. When the mode selection signal indicates that a read / write operation is to be performed with the second memory card, the chip controls the second control signal to be at an active level.

6. The storage control circuit according to claim 4, characterized in that, The external control device includes a mobile testing device, which is connected to the first input pin via a wired or wireless connection.

7. The storage control circuit according to claim 3, characterized in that, The connectivity controller includes a control sub-circuit, a transistor, and an output sub-circuit. In this circuit, the first input terminal of the control subcircuit serves as the first input pin of the connectivity controller to receive a first control signal; the second input terminal of the control subcircuit serves as the second input pin of the connectivity controller to receive a second control signal; the output terminal of the control subcircuit is connected to the base of the transistor; the emitter of the transistor is connected to the power supply; the collector of the transistor is connected to the first terminal of the output subcircuit; the second terminal of the output subcircuit is grounded; and the third terminal of the output subcircuit serves as the output pin of the connectivity controller. When both the first control signal and the second control signal are at an invalid level, the control sub-circuit provides a cutoff level to the base of the transistor to control the transistor to be in a cutoff state; when at least one of the first control signal and the second control signal is at an active level, it provides a conduction level to the base of the transistor to control the transistor to be in a conduction state.

8. The storage control circuit according to claim 7, characterized in that, The control sub-circuit includes a first diode, a second diode, a first resistor, and a second resistor. Wherein, the cathode of the first diode serves as the first input terminal of the control sub-circuit, the anode of the first diode is connected to the first terminal of the first resistor, and the second terminal of the first resistor serves as the output terminal of the control sub-circuit and is connected to the base of the transistor. The cathode of the second diode serves as the second input terminal of the control sub-circuit, the anode of the second diode is connected to the first terminal of the first resistor, the first terminal of the second resistor is connected to the power supply, and the second terminal of the second resistor is connected to the base of the transistor.

9. The storage control circuit according to claim 8, characterized in that, The control sub-circuit also includes: A first capacitor, the first terminal of which is connected to the cathode of the first diode, and the second terminal of which is grounded; The second capacitor has its first terminal connected to the cathode of the second diode and its second terminal grounded.

10. The storage control circuit according to claim 7, characterized in that, The output sub-circuit includes: The third resistor has its first end connected to the collector of the transistor as the first end of the output sub-circuit, and its second end grounded as the second end of the output sub-circuit. A fourth resistor, the first end of which is connected to the collector of the transistor, and the second end of which serves as the third end of the output sub-circuit; The third capacitor has its first terminal connected to the second terminal of the third resistor, and its second terminal connected to the second terminal of the fourth resistor.

Images