Conditioning amplifying circuit based on domestic chip

Abstract

The utility model discloses a conditioning amplifying circuit based on a domestic chip, which belongs to the field of domestic chips and comprises a programmable gain amplifier and a band-pass filter. The program control gain amplifier is connected with a band-pass filter after being cascaded in two stages; wherein the program control gain amplifier adopts the combination of an in-phase amplifier composed of operational amplifiers and an analog switch, and the amplification factor is switched through the switch, so that the time variable gain function is realized. According to the utility model, the function of weak signal gain amplification is realized; and the method is realized based on a domestic chip and is easier to obtain. The design has the advantages of low power consumption, low noise and the like on the basis of meeting conditioning amplification.

Description

Technical Field

[0001] This utility model relates to the field of domestic chip technology, and in particular to a conditioning amplifier circuit based on domestic chips. Background Technology

[0002] The SGM8052 is a high-speed operational amplifier featuring rail-to-rail output, low cost, and high speed. It operates with a wide input voltage range of +2.5V to +5.5V and a temperature range of -40°C to +125°C. It can be widely used in image processing, photodiode amplifiers, professional video equipment and cameras, handheld devices, base stations, filters, and many other fields. Utility Model Content

[0003] The purpose of this invention is to provide a conditioning amplifier circuit based on domestically produced chips to solve the problems in the background technology.

[0004] To solve the above-mentioned technical problems, this utility model provides a conditioning amplifier circuit based on domestically produced chips, which consists of a programmable gain amplifier and a bandpass filter;

[0005] The programmable gain amplifier consists of two cascaded stages, which are then connected to a bandpass filter; among them,

[0006] The programmable gain amplifier uses a combination of an operational amplifier-based inverting amplifier and an analog switch to switch the amplification factor, thus achieving time-variable gain functionality.

[0007] In one embodiment, the single-stage programmable gain amplifier provides eight levels: x1, x2, x4, x8, x16, x32, x64, and x128. The passband range of the bandpass filter is 190kHz to 210kHz, and it is implemented using a second-order active RC bandpass filter.

[0008] In one embodiment, the programmable gain amplifier is composed of a high-speed operational amplifier chip and an eight-channel analog switch chip to form an in-phase amplifier circuit with eight adjustable gain levels. The amplification factors are switched by an analog switch to be 1, 2, 4, 8, 16, 32, 64, and 128, respectively.

[0009] In one embodiment, the high-speed operational amplifier chip has low noise and low distortion characteristics, with an input voltage noise of 8.1nV / √Hz, a bandwidth of 250MHz, a slew rate of 130V / μs, an 8-pin MSOP package, a 5V power supply, and a quiescent operating current of 2.3mA.

[0010] In one embodiment, the eight-channel analog switcher chip is powered by a single 3.6V to 11V supply, has an on-resistance of 84 ohms, and is packaged in a 16-pin TQFN-3x3-16L package.

[0011] In one embodiment, the bandpass filter circuit adopts a second-order MFB structure with a center frequency of 200kHz and a bandwidth of 20kHz.

[0012] In one embodiment, the time-variable gain function is implemented by the following method: the acquisition board sends instructions via the SPI bus provided by the interface, and after serial-to-parallel conversion by the serial shift register, controls the analog switch to generate different gains, thereby realizing the time-variable gain function.

[0013] In one implementation, the minimum interval time of the time-variable gain is determined by the corresponding time of the shift register.

[0014] This invention provides a conditioning amplifier circuit based on domestically produced chips, which realizes the function of amplifying weak signals; and because it is implemented based on domestically produced chips, it is easier to obtain. This design, while meeting the requirements of conditioning amplification, also has the advantages of low power consumption and low noise. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of a conditioning amplifier circuit based on a domestically produced chip, provided by this utility model.

[0016] Figure 2 This is a schematic diagram of the principle of the single-stage programmable gain amplifier provided by this utility model.

[0017] Figure 3 This is a schematic diagram of the bandpass filter circuit provided by this utility model.

[0018] Figure 4 This is a schematic diagram of the simulation results of the bandpass filter circuit provided by this utility model. Detailed Implementation

[0019] The following detailed description, in conjunction with the accompanying drawings and specific embodiments, provides a further detailed explanation of the conditioning amplifier circuit based on domestically produced chips proposed in this utility model. The advantages and features of this utility model will become clearer from the following description. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of this utility model.

[0020] This invention provides a conditioning amplifier circuit, consisting of a programmable gain amplifier (PGA) and a bandpass filter. Due to research, no domestically produced voltage-controlled or numerically controlled (DC-CNC) chips are currently available for the PGA. Therefore, a combination of a domestically produced operational amplifier (SGM8052) in-phase amplifier and a domestically produced analog switch (SGM4581) is used. The amplification factor is switched via the switch to achieve TVG (Time-Variable Gain) functionality. A single-stage PGA provides eight gain levels: x1, x2, x4, x8, x16, x32, x64, and x128. To meet a variable gain range of at least 75dB, two stages of PGA are cascaded. The bandpass filter has a passband range of 190kHz to 210kHz and is implemented using a second-order active RC bandpass filter. The theoretical maximum total gain of this conditioning amplifier circuit is 84dB. Its circuit block diagram is as follows. Figure 1 As shown.

[0021] The programmable gain amplifier uses a high-speed operational amplifier chip and an eight-channel analog switch chip to form a non-inverting amplifier circuit with eight adjustable gain levels. The amplification factors are switched via an analog switch to 1, 2, 4, 8, 16, 32, 64, and 128. Cascading two such programmable gain amplifiers can achieve a controllable gain range of 0-84 dB.

[0022] TVG Function Implementation: The acquisition board sends commands via the SPI bus provided by the interface. After serial-to-parallel conversion by the serial shift register, the commands control the analog switches to generate different gains, thereby realizing the TVG function. The minimum TVG interval time is determined by the response time of the shift register, and theoretically, a response time of 0.1ms can be achieved.

[0023] The high-speed operational amplifier chip used has low noise and low distortion characteristics, with an input voltage noise of 8.1nV / √Hz, a bandwidth of 250MHz, a slew rate of 130V / μs, an 8-pin MSOP package (3mm×3mm), a power supply of 5V, and a quiescent operating current of 2.3mA.

[0024] This is an eight-channel analog switcher chip, powered by a single 3.6V to 11V supply, with an on-resistance of 84 ohms, packaged in a 16-pin TQFN-3x3-16L (3.1mm × 3.1mm) package. The schematic of a single-stage programmable gain amplifier is shown below. Figure 2 As shown.

[0025] The bandpass filter circuit adopts a second-order MFB structure with a center frequency of 200kHz and a bandwidth of 20kHz. The schematic diagram is shown below. Figure 3 As shown, the simulation results are as follows: Figure 4 As shown.

[0026] The above description is only a description of the preferred embodiment of the present utility model and is not intended to limit the scope of the present utility model in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A conditioning amplifier circuit based on domestically produced chips, characterized in that, It consists of a programmable gain amplifier and a bandpass filter; The programmable gain amplifier consists of two cascaded stages, which are then connected to a bandpass filter; among them, The programmable gain amplifier uses a combination of an operational amplifier-based inverting amplifier and an analog switch. The amplification factor is switched by the switch. The acquisition board sends commands via the SPI bus provided by the interface. After serial-to-parallel conversion by the serial shift register, the analog switch is controlled to generate different gains, thereby realizing the time-variable gain function. The programmable gain amplifier provides eight levels: x1, x2, x4, x8, x16, x32, x64, and x128. The passband range of the bandpass filter is 190kHz to 210kHz, and it is implemented using a second-order active RC bandpass filter. The programmable gain amplifier uses a high-speed operational amplifier chip and an eight-channel analog switch chip to form a non-inverting amplifier circuit with eight adjustable gain levels. The amplification factors are 1, 2, 4, 8, 16, 32, 64, and 128 respectively, which are switched by an analog switch. The high-speed operational amplifier chip features low noise and low distortion, with an input voltage noise of 8.1 nV / √Hz, a bandwidth of 250 MHz, a slew rate of 130 V / μs, an 8-pin MSOP package, a 5V power supply, and a quiescent current of 2.3 mA. The eight-channel analog switcher chip is powered by a single 3.6V to 11V supply, has an on-resistance of 84 ohms, and is packaged in a 16-pin TQFN-3x3-16L package.

2. The conditioning amplifier circuit based on domestically produced chips as described in claim 1, characterized in that, The bandpass filter adopts a second-order MFB structure with a center frequency of 200kHz and a bandwidth of 20kHz.

3. The conditioning amplifier circuit based on domestically produced chips as described in claim 1, characterized in that, The minimum interval time of the time-variable gain is determined by the corresponding time of the shift register.

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