Intelligent door lock
By employing a low-power clock source and clock source switching design in the smart door lock, combined with the mode switching of the video processing chip, the problems of high power consumption and high cost in the existing technology are solved, realizing a low-power and low-cost monitoring system, extending battery life and ensuring image quality.
Patent Information
- Application Number
- CN202423185428.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-23
- Publication Date
- 2025-11-21
- Estimated Expiration
- 2034-12-23
AI Technical Summary
Existing smart door lock monitoring systems suffer from high power consumption and high cost while ensuring image quality. In particular, low-power micro-program controllers are complex to design and produce poor image quality, while high-performance video processing chip computing units operate frequently, leading to shortened battery life.
The monitoring module adopts a low-power clock source, combined with a clock source switching switch and a video processing chip. By switching the camera clock source between low frame rate and high frame rate modes, the overall power consumption is reduced, and the monitoring video is processed by the video processing chip to ensure image quality.
While ensuring image quality, the power consumption and electronic costs of smart door locks have been significantly reduced, battery life has been extended, and user experience has been improved.
Smart Images

Figure CN223582519U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of intelligent security, and in particular to an intelligent door lock. Background Technology
[0002] Currently, battery-powered monitoring modules in smart door locks typically involve two technical solutions: The first is a solution that uses a low-power microprogram controller and a high-power, high-performance video processing chip. The low-power monitoring system uses the low-power microprogram controller's related circuits to pre-record small-resolution images or short segments of small-resolution (usually 300,000 pixels) video recordings. During normal recording, the high-power video processing chip circuit is activated to output high-resolution video recordings (2 million pixels or more). The second solution is to directly use a high-performance video processing chip to intermittently take pictures or record videos. However, each time a picture is captured, the computing unit of the high-performance video processing chip must be activated to output the camera's master clock signal.
[0003] However, both technical solutions have some problems. The low-power microcontroller in the first solution makes the design of the entire monitoring system more complex and increases the cost of electronic materials. Moreover, the low-power microcontroller is used to capture small-resolution images during 24-hour recording, and it generally does not have image signal processing capabilities, resulting in poor image quality. The second technical solution requires the computing unit of the high-performance video processing chip to work every time an image is captured, which increases the power consumption of the monitoring system, shortens the battery life of the monitoring system, and increases the frequency of battery replacement for users.
[0004] Therefore, how to achieve low power consumption and low cost for smart door locks while ensuring image quality is an urgent technical problem to be solved. Utility Model Content
[0005] To address the aforementioned issues, this invention provides a smart door lock that achieves low power consumption and low cost while maintaining image quality.
[0006] The present invention discloses the following technical solutions:
[0007] This utility model provides an intelligent door lock, which includes: a monitoring module based on a low-power clock source, a camera, and a power supply unit; the module includes: a video processing chip, a first clock source, and a clock source switching switch;
[0008] The power supply unit is connected to the camera and the module, and supplies power to the camera and the module;
[0009] The first clock source is connected to the clock source switching switch and provides a clock signal to the camera;
[0010] The clock source switching switch is connected to the first clock source, the video processing chip, and the camera. It switches between the clock signal provided by the first clock source and the clock signal provided by the second clock source of the video processing chip, and selects one of the clock sources for output.
[0011] The camera is connected to the clock source switch and the video processing chip. It receives the clock signal switched in by the clock source switch, monitors and collects data according to the mode corresponding to the clock signal switched in by the clock source switch, and sends the collected monitoring video to the video processing chip. The mode includes a low frame rate mode or a high frame rate mode. The mode corresponding to the first clock source is the low frame rate mode, and the mode corresponding to the clock circuit of the video processing chip is the high frame rate mode.
[0012] The video processing chip is connected to the clock source switch and the camera. When the module is powered on, it receives the monitoring video captured by the camera and processes the captured monitoring video.
[0013] Optionally, the clock source switching switch includes a clock signal pin, a clock signal input pin for a first clock source, a clock signal input pin for a second clock source, and a selection pin;
[0014] The clock signal input pin of the first clock source is connected to the first clock source, the clock signal input pin of the second clock source is connected to the clock circuit of the video processing chip, the selection pin is connected to the central processing unit of the video processing chip, and the clock signal pin is connected to the camera.
[0015] When the central processing unit of the video processing chip is powered off, the selection pin is at a low level, and the clock signal pin switches to the camera with the clock signal provided by the first clock source; when the central processing unit of the video processing chip is powered on, the selection pin is at a high level, and the clock signal pin switches to the camera with the clock signal provided by the clock circuit of the video processing chip.
[0016] Optionally, when the clock source switching switch receives a control signal from the video processing chip, the central processing unit of the video processing chip is powered on, the selection pin is at a high level, and the clock signal switched into the clock signal pin is switched from the clock signal provided by the first clock source to the clock signal provided by the clock circuit of the video processing chip, and the clock circuit of the video processing chip provides a clock signal to the camera; the control signal is issued by the video processing chip when it receives an interrupt signal from the camera, PIR sensor or ultrasonic radar; the interrupt signal is issued by the camera, PIR sensor or ultrasonic radar when it detects target image information.
[0017] Optionally, the video processing chip includes an image storage unit and a central processing unit;
[0018] When the image storage unit is full, the central processing unit of the video processing chip is powered on, and the surveillance video cached in the image storage unit is transferred to the memory or network storage unit.
[0019] Optionally, the door lock further includes: a memory;
[0020] The memory is connected to the video processing chip. When the image storage unit is full, the central processing unit in the video processing chip is powered on, and the monitoring video cached in the image storage unit is transferred to the memory.
[0021] Optionally, the door lock further includes: a network connection unit and a network storage unit;
[0022] The network connection unit is connected to the video processing chip; the network storage unit is connected to the video processing chip through the network connection unit.
[0023] When the image storage unit is full, the central processing unit in the video processing chip is powered on, and the surveillance video cached in the image storage unit is transferred to the network storage unit.
[0024] Optionally, the door lock further includes: a PIR sensor and an ultrasonic radar;
[0025] The PIR sensor is connected to the network connection unit and the video processing chip; the ultrasonic radar is connected to the network connection unit and the video processing chip.
[0026] When the PIR sensor or the ultrasonic radar detects target image information, it sends an interrupt signal to the video processing chip.
[0027] Optionally, when the camera receives the clock signal provided by the clock circuit of the video processing chip, it monitors in the high frame rate mode and captures data according to the second frame rate. The captured monitoring video is sent to the video processing chip for processing. After the data capture is completed within a preset time, the camera returns to the low frame rate mode. The capture frame rate corresponding to the low frame rate mode is the first frame rate, which is lower than the second frame rate.
[0028] Optionally, the video processing chip includes: an image receiving unit, an image processing unit, an image storage unit, a clock circuit, and a power management module; the image processing unit includes a central processing unit.
[0029] The image receiving unit is connected to the camera and receives the surveillance video captured by the camera;
[0030] The image processing unit is connected to the image receiving unit and processes the surveillance video received by the image receiving unit.
[0031] The image storage unit is connected to the image processing unit and caches the surveillance video processed by the image processing unit.
[0032] The clock circuit is connected to the clock signal input pin of the second clock source of the clock source switching switch to provide a clock signal;
[0033] The power management module is connected to the image receiving unit, image processing unit, image storage unit, and clock circuit, and supplies power to the video processing chip.
[0034] This utility model provides a door, which includes any of the smart door locks described above.
[0035] Compared with the prior art, the present invention has the following beneficial effects:
[0036] This utility model provides an intelligent door lock, which includes a monitoring module based on a low-power clock source, a camera, and a power supply unit. The module includes a video processing chip, a first clock source, and a clock source switching switch. The first clock source is a low-power clock source, and the camera clock source is switched using the clock source switching switch. The camera monitors and acquires data according to the clock signal of the different clock sources switched to by the clock source switching switch, and sends the acquired monitoring video to the video processing chip, which processes the acquired video.
[0037] This invention does not solely rely on the clock signal provided by the video processing chip's clock circuit. The camera switches between a low-power clock source and the video processing chip's clock source, reducing the overall power consumption of the monitoring module. This invention also reduces the circuitry associated with the low-power microcontroller, lowering electronic costs. Furthermore, unlike existing low-power microcontrollers that lack image processing capabilities, this invention processes the video captured by the camera using a video processing chip, ensuring the quality of the monitored images. Therefore, this invention achieves low power consumption and low cost for smart door locks while maintaining image quality. Attached Figure Description
[0038] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0039] Figure 1 A schematic diagram of the structure of an intelligent door lock provided in an embodiment of this utility model;
[0040] Figure 2 This is a schematic diagram of another smart door lock provided in an embodiment of the present utility model;
[0041] Figure 3 A schematic diagram of the structure of another smart door lock provided in this embodiment of the present utility model;
[0042] Figure 4 A circuit diagram of a clock source switching switch provided in an embodiment of this utility model. Detailed Implementation
[0043] As described earlier, the current solution using low-power microprogrammed controllers and high-power high-performance video processing chips makes the entire design complex and increases the cost of electronic components. Moreover, during 24-hour recording, the low-power microprogrammed controller captures low-resolution images, and it generally lacks image signal processing capabilities, resulting in poor image quality. On the other hand, the technical solution of using high-performance video processing chips to intermittently capture images or record video requires the computing unit of the high-performance video processing chip to work every time an image is captured, increasing the power consumption of the monitoring system, shortening its battery life, and increasing the frequency of battery replacements required by users.
[0044] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0045] See Figure 1 This figure is a structural schematic diagram of a smart door lock provided in an embodiment of this utility model. Figure 1 As shown, the door lock includes a monitoring module based on a low-power clock source, a camera, and a power supply unit; the module includes a video processing chip, a first clock source, and a clock source switching switch.
[0046] The power supply unit is connected to the camera and the module, and supplies power to the camera and the module.
[0047] The power supply unit includes a battery, a buck converter, and a low-dropout regulator. The battery provides initial energy storage and output; common battery types include lithium-ion batteries, nickel-cadmium batteries, and nickel-metal hydride batteries. The buck converter reduces the higher voltage provided by the battery to the lower voltage required by the system; common buck converters include switching regulators and linear regulators. The low-dropout regulator further stabilizes the output voltage of the buck converter, ensuring the stability and accuracy of the output voltage.
[0048] The battery supply unit can efficiently and stably provide the power required by various electronic devices, ensuring the normal operation of the system.
[0049] The first clock source is connected to the clock source switching switch and provides a clock signal to the camera.
[0050] The first clock source is a low-power clock source, which has the characteristic of low power consumption. For example, in this embodiment, the first clock source is an active crystal with an operating current of less than 1mA. As long as power is provided, it can automatically provide the clock signal required by the camera. The clock signal is usually 6MHz, 8MHz or 24MHz.
[0051] The clock source switching switch is connected to the first clock source, the video processing chip, and the camera. It switches between the clock signal provided by the first clock source and the clock signal provided by the second clock source of the video processing chip, and selects one of the clock sources for output.
[0052] The clock switching switch needs to have low power consumption and a bandwidth of over 100MHz.
[0053] The camera is connected to the clock source switch and the video processing chip. It receives the clock signal switched in by the clock source switch, monitors and collects data according to the mode corresponding to the clock signal switched in by the clock source switch, and sends the collected monitoring video to the video processing chip. The mode includes a low frame rate mode or a high frame rate mode. The mode corresponding to the first clock source is the low frame rate mode, and the mode corresponding to the clock circuit of the video processing chip is the high frame rate mode.
[0054] Frame rate refers to the number of image frames captured or displayed per second, usually measured in frames per second (FPS). A low frame rate typically means fewer frames captured or displayed per second, such as 1 FPS, 2 FPS, or 5 FPS. A high frame rate means more frames captured or displayed per second, typically 30 FPS, 60 FPS, or higher. Low frame rate mode can significantly reduce camera power consumption and extend battery life. The camera supports low-power standby functionality; when receiving a clock signal from a first clock source, it can record or capture images at a low frame rate to achieve 24-hour low-power recording or image capture. When receiving a clock signal from a second clock source, it can record or capture images at a high frame rate. High frame rate mode can capture more details and dynamic changes, providing smoother and clearer video. High frame rate mode offers good real-time performance but consumes more power.
[0055] The video processing chip is connected to the clock source switch and the camera. When the module is powered on, it receives the monitoring video captured by the camera and processes the captured monitoring video.
[0056] The video processing chip includes an image storage unit and a central processing unit;
[0057] When the image storage unit is full, the central processing unit of the video processing chip is powered on, and the surveillance video cached in the image storage unit is transferred to the memory or network storage unit.
[0058] The video processing chip includes: an image receiving unit, an image processing unit, an image storage unit, a clock circuit, and a power management module; the image processing unit includes a central processing unit.
[0059] The image receiving unit is connected to the camera and receives the surveillance video captured by the camera.
[0060] The image processing unit is connected to the image receiving unit and processes the surveillance video received by the image receiving unit.
[0061] The image storage unit is connected to the image processing unit and stores the surveillance video processed by the image processing unit.
[0062] The clock circuit is connected to the clock signal input pin of the second clock source of the clock source switching switch, and provides a clock signal to the camera.
[0063] The power management module is connected to the image receiving unit, image processing unit, image storage unit, and clock circuit, and supplies power to the video processing chip.
[0064] This embodiment provides a smart door lock in which the camera's clock signal switches between a low-power clock source and the clock circuit of the video processing chip. This reduces the overall power consumption of the smart door lock, as it does not rely solely on the video processing chip's clock circuit. This embodiment also reduces the amount of circuitry related to the low-power microcontroller, lowering electronic costs. Furthermore, this embodiment processes the video captured by the camera using a video processing chip, ensuring the quality of the monitored images. Therefore, this embodiment provides a smart door lock that achieves low power consumption and low cost while maintaining image quality.
[0065] See Figure 2 This figure is a schematic diagram of another smart door lock provided in an embodiment of this utility model. This embodiment uses a clock signal provided by a first clock source for monitoring. To further improve the structure of the smart door lock, a memory has been added. For example... Figure 2 As shown, the door lock includes a monitoring module based on a low-power clock source, a camera, a memory, and a power supply unit; the module includes: a video processing chip, a first clock source, and a clock source switching switch.
[0066] The power supply unit is connected to the camera and the video processing chip, and supplies power to the module.
[0067] The first clock source is connected to the clock source switching switch and provides a clock signal to the camera.
[0068] The clock source switching switch is connected to the first clock source, the video processing chip, and the camera. It switches between the clock signal provided by the first clock source and the clock signal provided by the second clock source of the video processing chip, and selects one of the clock sources for output.
[0069] The camera is connected to the clock source switch and the video processing chip. It receives the clock signal switched in by the clock source switch, monitors and collects data according to the mode corresponding to the clock signal switched in by the clock source switch, and sends the collected monitoring video to the video processing chip.
[0070] The modes include a low frame rate mode or a high frame rate mode; the mode corresponding to the first clock source is the low frame rate mode, and the mode corresponding to the clock circuit of the video processing chip is the high frame rate mode.
[0071] Compared to high frame rates, low frame rates typically refer to capturing or displaying fewer frames per second, such as 1 FPS, 2 FPS, or 5 FPS. Low frame rate mode can significantly reduce camera power consumption and extend battery life. Therefore, low frame rate mode has significant advantages in various application scenarios, especially those requiring power saving, reduced data volume, and extended monitoring time.
[0072] The video processing chip is connected to the clock source switch and the camera. When the module is powered on, it receives the monitoring video captured by the camera and processes the captured monitoring video.
[0073] The video processing chip receives and processes images captured by the camera in low frame rate mode. At this time, the high-power central processing unit (CPU) of the video processing chip is not powered on. Therefore, this method enables the monitoring module to save power while ensuring the quality of the monitoring images.
[0074] The video processing chip includes an image storage unit and a central processing unit;
[0075] When the image storage unit is full, the central processing unit of the video processing chip is powered on, and the surveillance video cached in the image storage unit is transferred to the memory.
[0076] The memory is connected to the video processing chip. When the image storage unit is full, the central processing unit in the video processing chip is powered on, and the monitoring video cached in the image storage unit is transferred to the memory.
[0077] When the memory unit of the video processing chip is full of captured images, the video processing chip will store the full images in an external memory, including an embedded storage device EMMC.
[0078] This embodiment provides another type of smart lock. When the camera operates under the clock signal provided by the first clock source, it captures images in a low frame rate mode, which can significantly reduce the power consumption of the smart lock and extend battery life. Although the frame rate is low, it can still guarantee basic monitoring needs and is suitable for scenarios requiring long-term monitoring.
[0079] See Figure 3This figure is a schematic diagram of another smart door lock provided by an embodiment of the present invention. This embodiment uses a clock signal provided by a first clock source for monitoring. When a control signal is received from the video processing chip, the clock signal provided by the first clock source is switched to a clock signal provided by a second clock source of the video processing chip. To further improve the structure of the smart door lock, a PIR sensor, ultrasonic radar, network connection unit, and network storage unit are added. Figure 3 As shown, the door lock includes a monitoring module based on a low-power clock source, a PIR sensor, an ultrasonic radar, a network connection unit, a network storage unit, a camera, and a power supply unit; the module includes: a video processing chip, a first clock source, and a clock source switching switch.
[0080] The power supply unit is connected to the camera and the module, and supplies power to the camera and the module.
[0081] The first clock source is connected to the clock source switching switch and provides a clock signal to the camera.
[0082] The clock source switching switch is connected to the first clock source, the video processing chip, and the camera. It switches between the clock signal provided by the first clock source and the clock signal provided by the second clock source of the video processing chip, and selects one of the clock sources for output.
[0083] The clock source switching switch includes a clock signal pin, a clock signal input pin for a first clock source, a clock signal input pin for a second clock source, and a selection pin.
[0084] The clock signal input pin of the first clock source is connected to the first clock source, the clock signal input pin of the second clock source is connected to the clock circuit of the video processing chip, the selection pin is connected to the central processing unit of the video processing chip, and the clock signal pin is connected to the camera.
[0085] When the central processing unit of the video processing chip is powered off, the selection pin is at a low level, and the clock signal pin switches to the camera with the clock signal provided by the first clock source; when the central processing unit of the video processing chip is powered on, the selection pin is at a high level, and the clock signal pin switches to the camera with the clock signal provided by the clock circuit of the video processing chip.
[0086] Therefore, when the camera receives the clock signal from the first clock source, the central processing unit of the video processing chip is powered off. This method reduces the overall power consumption of the smart lock and increases its battery life.
[0087] like Figure 4 As shown, Figure 4 The circuit diagram of the clock source switching switch provided in this embodiment is shown. The clock source switching switch (MCLK Switch) includes: a selection pin (SEL), a clock signal pin (A), a clock signal input pin for the first clock source (B0), a clock signal input pin for the second clock source (B1), a power supply pin (VCC), and a ground pin (GND).
[0088] The SEL pin is connected to one end of resistors R3918, R3919, R3921, and capacitor C3909. The other end of resistor R3918 is connected to CPU_PWR_EN, the other end of resistor R3919 is connected to SOC_1V8, and the other ends of resistor R3921 and capacitor C3909 are both connected to ground. CPU_PWR_EN is the power management signal for the central processing unit, and SOC_1V8 is a power supply voltage signal.
[0089] Pin A is connected to one end of resistor R3928, and the other end of R3928 is connected to one end of R3931 and CAM2_MCLK. CAM2_MCLK is the camera's clock signal.
[0090] Pin B0 is connected to the first clock source.
[0091] Pin B1 is connected to the other end of R3931.
[0092] The VCC pin is connected to one end of resistor R3927, one end of capacitor C3911, and VCC1V8_TOSC. The GND pin is connected to the other end of capacitor C3911 and ground. The other end of resistor R3927 is connected to VCC1V8_DOVDD_S. Both VCC1V8_TOSC and VCC1V8_DOVDD_S are power supply voltage signals.
[0093] When the CPU is powered on, the SEL pin is at a high level, and the input pin A is connected to the clock signal of the second clock source; in low frame rate mode, the CPU is powered off, the SEL pin is at a low level, and the input pin A is connected to the clock signal of the first clock source.
[0094] When the clock source switching switch receives a control signal from the video processing chip, the central processing unit of the video processing chip is powered on, the selection pin is at a high level, and the clock signal switched into the clock signal pin is changed from the clock signal provided by the first clock source to the clock signal provided by the clock circuit of the video processing chip. The clock circuit of the video processing chip provides a clock signal to the camera. The control signal is issued by the video processing chip when it receives an interrupt signal from the camera, PIR sensor, or ultrasonic radar. The interrupt signal is issued by the camera, PIR sensor, or ultrasonic radar when it detects target image information.
[0095] The PIR sensor is connected to the network connection unit and the video processing chip.
[0096] The ultrasonic radar is connected to the network connection unit and the video processing chip.
[0097] When the PIR sensor or the ultrasonic radar detects target image information, it sends an interrupt signal to the video processing chip.
[0098] Passive infrared (PIR) sensors are widely used in security systems, smart home devices, and automatic control devices. They detect movement or presence by detecting infrared radiation emitted by people or animals. Ultrasonic radar can accurately measure the distance between objects and doors, helping to determine if there are obstacles approaching the door lock, such as pets or children trying to open the door.
[0099] In the monitoring module, the video processing chip can send control signals by detecting target image information, thereby triggering subsequent operations or events. The target image information can be specific objects, faces, or behavioral features. By detecting specific target image information, the smart door lock can be monitored.
[0100] The camera is connected to the clock source switch and the video processing chip. It receives the clock signal switched in by the clock source switch, monitors and collects data according to the mode corresponding to the clock signal switched in by the clock source switch, and sends the collected monitoring video to the video processing chip. The mode includes a low frame rate mode or a high frame rate mode. The mode corresponding to the first clock source is the low frame rate mode, and the mode corresponding to the clock circuit of the video processing chip is the high frame rate mode.
[0101] When the camera receives the clock signal provided by the clock circuit of the video processing chip, it monitors in the high frame rate mode and captures data according to the second frame rate. The captured monitoring video is sent to the video processing chip for processing. After the data capture is completed within a preset time, the camera returns to the low frame rate mode. The capture frame rate corresponding to the low frame rate mode is the first frame rate, which is lower than the second frame rate.
[0102] In high frame rate mode, a higher number of image frames are captured or displayed per second, typically 30 FPS, 60 FPS, or higher. High frame rate mode consumes more power, but the camera will return to low frame rate mode after completing the acquisition within the preset time; it will not operate in high frame rate mode indefinitely.
[0103] The video processing chip is connected to the clock source switch and the camera. When the module is powered on, it receives the monitoring video captured by the camera and processes the captured monitoring video.
[0104] The video processing chip includes an image storage unit and a central processing unit;
[0105] When the image storage unit is full, the central processing unit of the video processing chip is powered on, and the surveillance video cached in the image storage unit is transferred to the network storage unit.
[0106] The network connection unit is connected to the video processing chip; the network storage unit is connected to the video processing chip through the network connection unit.
[0107] When the image storage unit is full, the central processing unit in the video processing chip is powered on, and the surveillance video cached in the image storage unit is transferred to the network storage unit.
[0108] When the memory unit of the video processing chip is full of captured images, the video processing chip will upload all the images at once to the network storage unit through the network connection unit. The network connection unit includes wireless communication technology WIFI, and the network storage unit includes cloud disk.
[0109] This embodiment provides another type of smart lock. When the camera receives a clock signal from the first clock source, the central processing unit of the video processing chip is powered off, and the camera operates in low frame rate mode, significantly reducing the power consumption of the entire smart lock and extending battery life. When a control signal is received from the video processing chip, the system switches to the clock signal provided by the second clock source of the video processing chip, the central processing unit of the video processing chip is powered on, and the camera operates in high frame rate mode for a preset time before resuming low frame rate mode.
[0110] By switching the camera's clock source, the camera can operate in different frame rate modes, reducing the overall power consumption of the smart lock and extending its battery life. Moreover, regardless of the mode, the video processing chip is used to process the surveillance video, ensuring the image quality of the surveillance video and improving the user experience.
[0111] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.
[0112] The above description of the disclosed embodiments enables those skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims
1. A smart door lock, characterized in that, The door lock includes a monitoring module based on a low-power clock source, a camera, and a power supply unit; the module includes: a video processing chip, a first clock source, and a clock source switching switch; The power supply unit is connected to the camera and the module, and supplies power to the camera and the module; The first clock source is connected to the clock source switching switch and provides a clock signal to the camera; The clock source switching switch is connected to the first clock source, the video processing chip, and the camera. It switches between the clock signal provided by the first clock source and the clock signal provided by the second clock source of the video processing chip, and selects one of the clock sources for output. The camera is connected to the clock source switch and the video processing chip. It receives the clock signal switched in by the clock source switch, monitors and collects data according to the mode corresponding to the clock signal switched in by the clock source switch, and sends the collected monitoring video to the video processing chip. The mode includes a low frame rate mode or a high frame rate mode. The mode corresponding to the first clock source is the low frame rate mode, and the mode corresponding to the clock circuit of the video processing chip is the high frame rate mode. The video processing chip is connected to the clock source switch and the camera. When the module is powered on, it receives the monitoring video captured by the camera and processes the captured monitoring video.
2. The door lock according to claim 1, characterized in that, The clock source switching switch includes a clock signal pin, a clock signal input pin for a first clock source, a clock signal input pin for a second clock source, and a selection pin; The clock signal input pin of the first clock source is connected to the first clock source, the clock signal input pin of the second clock source is connected to the clock circuit of the video processing chip, the selection pin is connected to the central processing unit of the video processing chip, and the clock signal pin is connected to the camera. When the central processing unit of the video processing chip is powered off, the selection pin is at a low level, and the clock signal pin switches to the camera with the clock signal provided by the first clock source; when the central processing unit of the video processing chip is powered on, the selection pin is at a high level, and the clock signal pin switches to the camera with the clock signal provided by the clock circuit of the video processing chip.
3. The door lock according to claim 2, characterized in that, When the clock source switching switch receives a control signal from the video processing chip, the central processing unit of the video processing chip is powered on, the selection pin is at a high level, and the clock signal switched into the clock signal pin is changed from the clock signal provided by the first clock source to the clock signal provided by the clock circuit of the video processing chip. The clock circuit of the video processing chip provides a clock signal to the camera. The control signal is issued by the video processing chip when it receives an interrupt signal from the camera, PIR sensor, or ultrasonic radar. The interrupt signal is issued by the camera, PIR sensor, or ultrasonic radar when it detects target image information.
4. The door lock according to claim 1, characterized in that, The video processing chip includes an image storage unit and a central processing unit; When the image storage unit is full, the central processing unit of the video processing chip is powered on, and the surveillance video cached in the image storage unit is transferred to the memory or network storage unit.
5. The door lock according to claim 4, characterized in that, The door lock also includes: a memory; The memory is connected to the video processing chip. When the image storage unit is full, the central processing unit in the video processing chip is powered on, and the monitoring video cached in the image storage unit is transferred to the memory.
6. The door lock according to claim 4, characterized in that, The door lock also includes: a network connection unit and a network storage unit; The network connection unit is connected to the video processing chip; the network storage unit is connected to the video processing chip through the network connection unit. When the image storage unit is full, the central processing unit in the video processing chip is powered on, and the surveillance video cached in the image storage unit is transferred to the network storage unit.
7. The door lock according to claim 3, characterized in that, The door lock also includes: a PIR sensor and an ultrasonic radar; The PIR sensor is connected to the network connection unit and the video processing chip; the ultrasonic radar is connected to the network connection unit and the video processing chip. When the PIR sensor or the ultrasonic radar detects target image information, it sends an interrupt signal to the video processing chip.
8. The door lock according to claim 1, characterized in that, When the camera receives the clock signal provided by the clock circuit of the video processing chip, it monitors in the high frame rate mode and captures data according to the second frame rate. The captured monitoring video is sent to the video processing chip for processing. After the data capture is completed within a preset time, the camera returns to the low frame rate mode. The capture frame rate corresponding to the low frame rate mode is the first frame rate, which is lower than the second frame rate.
9. The door lock according to claim 2, characterized in that, The video processing chip includes: an image receiving unit, an image processing unit, an image storage unit, a clock circuit, and a power management module; the image processing unit includes a central processing unit. The image receiving unit is connected to the camera and receives the surveillance video captured by the camera; The image processing unit is connected to the image receiving unit and processes the surveillance video received by the image receiving unit. The image storage unit is connected to the image processing unit and caches the surveillance video processed by the image processing unit. The clock circuit is connected to the clock signal input pin of the second clock source of the clock source switching switch to provide a clock signal; The power management module is connected to the image receiving unit, image processing unit, image storage unit, and clock circuit, and supplies power to the video processing chip.
10. A door, characterized in that, The door includes the door lock as described in any one of claims 1-9.