A PD power management controller and a PD power system

Abstract

The utility model discloses a PD power management controller and PD power system for connecting the system switch of PD power supply voltage not less than 20V, including voltage source, gate drive power supply pin, voltage acquisition pin, control unit, gate drive output pin and drive voltage regulation unit. The utility model can effectively avoid the MOS pipe of the bidirectional switch structure in the PD power system switch and be high -voltage breakdown, need not additional increase zener diode, reduce the cost of existing application scheme.

Description

Technical Field

[0001] This utility model relates to the field of electronic circuits for power supply systems, and in particular to a PD power management controller and a PD power supply system. Background Technology

[0002] In PD fast charging applications that require bidirectional power supply or protection against reverse power flow, there is typically a power switch between the power supply and the receiving end, usually employing a back-to-back NMOS (N-channel MOSFET) bidirectional switching structure. Figure 1 In the diagram, N1 and N2 are connected, with the drains of N1 and N2 respectively, to the VBUS pins of the Type-C interface (labeled VBUS1 and VBUS2 in the diagram). Commonly available NMOS transistors only support a maximum gate-source voltage (VGS) of ±20V. When the gate-source voltage exceeds 20V, the NMOS transistor is at risk of breakdown. In the past, the VBUS voltage of USB interfaces was generally less than 20V, allowing the NMOS gate to be driven by a fixed voltage. However, in recent years, with the rapid development of the PD protocol, the output voltage of USB interfaces has reached 28V. Under these wide voltage operating conditions, it is difficult to select a fixed gate drive voltage that simultaneously meets the requirements of applying low or high VBUS voltages to the source. This poses a risk of gate-source breakdown for the NMOS transistor, potentially damaging the power supply or receiving device and creating a significant safety hazard.

[0003] To protect the gate-source junction of an NMOS transistor from breakdown, the traditional solution is to connect a Zener diode between the gate and source, such as... Figure 2 As shown in the diagram, this structure clamps the gate-source voltage within a safe range, effectively preventing gate-source breakdown of the NMOS transistor under high gate drive voltage. However, the addition of a Zener diode increases cost. Furthermore, when the gate drive voltage (VGate) is higher than the supply voltage (VSource) + Zener diode voltage (VZ) + NMOS body diode voltage drop (VSD), the NMOS transistor drive port draws some current (I1) into the receiving terminal, potentially causing unpredictable effects on the system and adding extra power consumption to the gate drive circuit. Increasing the resistor R0 can reduce the sink current, but it also reduces the switching speed of the NMOS transistor, thereby increasing switching losses and affecting switching performance. If a PMOS transistor is used as the switch, the gate drive voltage is negative relative to the source terminal; other cases are similar to the above. Utility Model Content

[0004] Purpose of the utility model: In order to solve the problem of MOSFET breakdown caused by gate-source high voltage difference in the switch of PD power system in the prior art, and to achieve low-cost protection of MOSFET from breakdown, this utility model provides a PD power management controller and PD power system.

[0005] Technical solution: A PD power management controller for connecting a system switch to a PD power supply with a power supply voltage of not less than 20V, comprising: a voltage source, a gate drive power supply pin, a voltage acquisition pin, a control unit, a gate drive output pin, and a drive voltage adjustment unit. The voltage source is connected to the gate drive power supply pin; the voltage acquisition pin is connected to the control unit; the control unit is connected to the drive voltage adjustment unit; and the drive voltage adjustment unit is connected to the gate drive output pin.

[0006] Furthermore, the drive voltage adjustment unit includes an adjustable current source, and the control unit is connected to the adjustable current source, wherein the adjustable current source is an adjustable sink current.

[0007] Furthermore, the drive voltage adjustment unit includes at least a first branch and a second branch. The first branch and the second branch respectively include a first switch and a second switch. At least the first branch includes a resistor R2, which is connected in series with the first switch. One end of the first branch and the second branch are both connected to the gate drive output pin, and the other end is both grounded. The control unit is connected to the first switch and the second switch.

[0008] Furthermore, let the output voltage of the voltage source be Vs, the power supply voltage be Vbus, and Vs ≥ Vbus + 4V.

[0009] Furthermore, the voltage acquisition pin is a CC pin, used to connect to the Type-C interface of the power supply or the power receiving end.

[0010] Furthermore, it also includes a resistor R1, one end of which is connected to the gate drive power supply pin, and the other end of which is connected to the gate drive output pin.

[0011] A PD power supply system includes the aforementioned PD power management controller, resistor R1, and a system switch for the PD power supply. The system switch includes a first MOSFET and a second MOSFET. The source of the first MOSFET is connected to the source of the second MOSFET, and the drain of the first MOSFET is connected to the Type-C interface of the power supply terminal and the power receiving terminal, respectively. The gate of the first MOSFET and the gate of the second MOSFET are connected to one end of resistor R1 and the gate drive output pin of the PD power management controller. The other end of resistor R1 is connected to the gate drive power supply pin of the PD power management controller. The voltage acquisition pin of the PD power management controller is connected to the Type-C interface of the power supply terminal or the power receiving terminal.

[0012] Furthermore, it includes at least a first system switch, a second system switch, resistor R1 and resistor R4, the first system switch being connected between the power supply terminal and the first power receiving terminal, and the second system switch being connected between the power supply terminal and the second power receiving terminal;

[0013] The PD power management controller includes at least a first drive voltage regulation unit, a second drive voltage regulation unit, a first gate drive output pin, and a second gate drive output pin, and the control unit is connected to the first drive voltage regulation unit and the second drive voltage regulation unit;

[0014] The gate drive power supply pin is connected to the gate of the first system switch through resistor R1, and the gate drive power supply pin is connected to the gate of the second system switch through resistor R4; the first gate drive output pin is connected to the gate of the first system switch, and the second gate drive output pin is connected to the gate of the second system switch.

[0015] A PD power supply system includes the aforementioned PD power management controller and a system switch for the PD power supply. The system switch includes a first MOSFET and a second MOSFET. The source of the first MOSFET is connected to the source of the second MOSFET, and the drain of the first MOSFET and the drain of the second MOSFET are respectively connected to the Type-C interface of the power supply terminal and the power receiving terminal. The gate of the first MOSFET and the gate of the second MOSFET are connected to the gate drive output pin of the PD power management controller, and the voltage acquisition pin of the PD power management controller is connected to the Type-C interface of the power supply terminal or the power receiving terminal.

[0016] Furthermore, it includes at least a first system switch and a second system switch, wherein the first system switch is connected between the power supply end and the first power receiving end, and the second system switch is connected between the power supply end and the second power receiving end;

[0017] The PD power management controller includes at least a first drive voltage regulation unit, a second drive voltage regulation unit, a first gate drive output pin, a second gate drive output pin, and a resistor R4. The control unit is connected to the first drive voltage regulation unit and the second drive voltage regulation unit. One end of the resistor R4 is connected to the gate drive power supply pin, and the other end is connected to the second gate drive output pin.

[0018] The first gate drive output pin is connected to the gate of the first system switch, and the second gate drive output pin is connected to the gate of the second system switch.

[0019] Compared with the prior art, this utility model provides a PD power management controller (microcontroller) and a PD power system, which has the following advantages: It proposes a low-cost protection scheme, effectively preventing the bidirectional switching structure MOSFET in the PD power system from being broken down by high voltage; it does not require an additional Zener diode, thus not increasing costs; it can effectively prevent the MOSFET drive port from sinking current to the power receiving end, eliminating the uncertainty risk caused by sinking current; because there is no sinking current, it also reduces additional power consumption, and there is no need to increase the resistor R1 due to the sinking current problem, so it will not affect the switching performance. Attached Figure Description

[0020] Figure 1 This is a schematic diagram of the existing technology when the PD power supply voltage is low;

[0021] Figure 2 A schematic diagram of the circuit structure for a traditional solution to protect the MOSFET;

[0022] Figure 3 This is a schematic diagram of the structure of a PD power system containing a PD power management controller, as shown in Example 1.

[0023] Figure 4 This is a schematic diagram of the PD power supply system using PMOS transistors for system switching in Example 1;

[0024] Figure 5 This is a schematic diagram of the structure of resistor R1 built into the PD power management controller in Example 1;

[0025] Figure 6 This is a schematic diagram of the PD power system containing a PD power management controller, as shown in Example 2.

[0026] Figure 7 This is a schematic diagram of the structure of resistor R1 built into the PD power management controller in Example 2;

[0027] Figure 8 This is a schematic diagram of the voltage regulation unit in Embodiment 2, which includes three branches.

[0028] Figure 9 This is a schematic diagram of the structure of the one-to-two PD power supply system in Example 3;

[0029] Figure 10 This is a schematic diagram of the structure of resistors R1 and R4 built into the PD power management controller in Example 3. Detailed Implementation

[0030] The present invention will be further explained and described below with reference to the accompanying drawings and specific embodiments.

[0031] Example 1:

[0032] A PD power management controller is disclosed for connecting a system switch to a PD power supply with a voltage not lower than 20V. The controller includes: a voltage source Vs, a gate drive power supply pin, a voltage acquisition pin, a control unit, a gate drive output pin, and a drive voltage regulation unit. The voltage source is connected to the gate drive power supply pin; the voltage acquisition pin is connected to the control unit; the control unit is connected to the drive voltage regulation unit; and the drive voltage regulation unit is connected to the gate drive output pin. Since the PD power supply controlled by this PD power management controller is not lower than 20V, the voltage source in the PD power management controller needs to output a voltage not lower than 20V.

[0033] The drive voltage regulation unit includes an adjustable current source ISink. The control unit is connected to the adjustable current source, which is an adjustable sink current and typically has a certain constant current effect. Figure 3 In this design, the positive terminal of the adjustable current source is connected to the gate drive output pin, and the negative terminal is grounded. The control unit adjusts the voltage drop across resistor R1 caused by the current source, thus changing the voltage level of the gate drive output pin. In a simplified design, the adjustable sink current can be selected from several built-in NMOS devices with different conduction capabilities, resulting in multi-stage sink current conduction capability. For example, with two built-in NMOS devices, selecting one or both to conduct simultaneously can result in two stages of conduction capability; or, if three built-in NMOS devices of different sizes are used in the circuit, selecting one to conduct can result in three stages of conduction capability.

[0034] The PD power management controller can be a single chip or a combination of two or more chips. The voltage source Vs, gate drive power supply pin, voltage acquisition pin, control unit, gate drive output pin, and drive voltage regulation unit are not limited to being located in the same chip.

[0035] A PD power supply system includes the aforementioned PD power management controller, resistor R1, and a system switch for the PD power supply, as shown below. Figure 3 As shown, the system switch includes a first MOSFET and a second MOSFET. The source of the first MOSFET is connected to the source of the second MOSFET, and the drain of the first MOSFET is connected to the Type-C interface of the power supply terminal and the power receiving terminal, respectively. The gate of the first MOSFET and the gate of the second MOSFET are connected to one end of resistor R1 and the gate drive output pin of the PD power management controller. The other end of resistor R1 is connected to the gate drive power supply pin of the PD power management controller. The voltage acquisition pin of the PD power management controller is connected to the Type-C interface of the power supply terminal or the power receiving terminal. The first MOSFET and the second MOSFET can be NMOS transistors or PMOS transistors. This embodiment uses an NMOS transistor as an example. Figure 4 The diagram shows a system switch using a PMOS transistor. The following examples are also applicable to scenarios where the system switch uses a PMOS transistor.

[0036] Furthermore, for applications where the first and second MOSFETs are N-channel MOSFETs, the voltage at the gate drive power supply pin must be no less than the power supply voltage plus 4V. Assuming the output voltage of the voltage source is Vs and the power supply voltage is Vbus, Vs must be ≥ Vbus + 4V.

[0037] In this embodiment, the voltage acquisition pin of the PD power management controller is the CC pin as shown in the figure, which is directly connected to the CC pin of the Type-C interface, allowing the control unit to directly obtain the voltage value using the PD fast charging protocol. Besides obtaining the voltage value through the CC pin, the control unit can also use a general-purpose ADC or other voltage testing unit connected to the Type-C interface to sense the voltage value. The control unit adjusts the adjustable current source according to the acquired voltage value, generating different voltage drops across resistor R1, ensuring that the gate drive voltage can safely control the system switch and prevent the MOSFET of the system switch from being damaged by high voltage.

[0038] Since the PD power management chip of this embodiment controls the gate of the system switch, it can effectively prevent the NMOS transistor in the bidirectional switch from being broken down by high voltage. Therefore, no additional Zener diode is needed between the gate and source of the NMOS transistor, which will not increase the cost. It can also effectively prevent the NMOS transistor drive port from sinking current to the power receiving end, eliminating the uncertainty risk caused by sinking current. Since there is no sinking current, the additional power consumption is also reduced. There is no need to increase the resistor R1 due to the sinking current problem, which will not affect the switching performance.

[0039] Here, resistor R1 can also be a resistor built into the PD power management controller. One end of resistor R1 is connected to the gate drive power supply pin, and the other end is connected to the gate drive output pin, such as... Figure 5 As shown.

[0040] Example 2:

[0041] The difference between Embodiment 2 and Embodiment 1 lies in the structure of the driving voltage regulation unit in Embodiment 2. Figure 6 As shown, the driving voltage regulation unit in Embodiment 2 includes at least a first branch and a second branch. The first branch and the second branch respectively include a first switch and a second switch. At least the first branch includes a resistor R2, which is connected in series with the first switch. One end of both the first branch and the second branch is connected to the gate drive output pin, and the other end is grounded. The control unit is connected to the first switch and the second switch. Furthermore, the switches can be implemented using built-in NMOS devices.

[0042] The connection method between the PD power system and the PD power management controller is the same as in Embodiment 1. Furthermore, resistor R1 can also be a resistor built into the PD power management controller, such as... Figure 7 As shown.

[0043] The drive voltage regulation unit in this embodiment includes two branches, one of which contains a resistor R2. The control unit can achieve three effects by controlling the opening and closing of the first and second switches: both the first and second switches are open, resulting in a gate drive voltage V1; the first switch is closed, and the second switch is open, resulting in a gate drive voltage V2; the first switch is open, and the second switch is closed, resulting in a gate ground. 28V≤V1≤40V, 20V≤V2≤25V. V1 is suitable for VBUS voltages of 20~28V; V2 is suitable for VBUS voltages of 5~20V. In short, by selecting the switch according to R1 and the target voltage, the gate-source voltage difference between the first MOSFET and the second MOSFET is kept within a safe range.

[0044] Furthermore, the number of branches in the drive voltage regulation unit can be increased according to actual needs, such as adding a third branch. The third branch has the same structure as the first branch, the difference being the resistance value. Figure 8 As shown, resistor R3 is different from resistor R2. 48V≤V1≤68V, 28V≤V2≤40V, 20V≤V3≤25V. V1 is suitable for VBUS voltage of 48V; V2 is suitable for VBUS voltage of 20~28V; V3 is suitable for VBUS voltage of 5~20V.

[0045] Example 3:

[0046] The PD power supply system in Embodiment 3 includes at least a first system switch, a second system switch, resistor R1, and resistor R4, such as Figure 9 As shown. For example, the PD power system in this embodiment can be a one-to-two charging cable, with a first system switch connected between the power supply end and the first power receiving end, and a second system switch connected between the power supply end and the second power receiving end. Depending on actual needs, the PD power system can include more than two system switches, each used to control the power supply status of multiple power receiving devices.

[0047] The PD power management controller includes at least a voltage source Vs, a gate drive power pin o1, a voltage acquisition pin, a control unit, a first drive voltage adjustment unit, a second drive voltage adjustment unit, a first gate drive output pin o2, a second gate drive output pin o3, and the control unit is connected to the first drive voltage adjustment unit and the second drive voltage adjustment unit.

[0048] The gate drive power supply pin is connected to the gate of the first system switch through resistor R1, and the gate drive power supply pin is connected to the gate of the second system switch through resistor R4; the first gate drive output pin is connected to the gate of the first system switch, and the second gate drive output pin is connected to the gate of the second system switch.

[0049] In the PD power system, resistors R1 and R4 can both be resistors built into the PD power management controller, such as... Figure 10 As shown, one end of resistor R1 is connected to the gate drive power supply pin, and the other end is connected to the first gate drive output pin; one end of resistor R4 is connected to the gate drive power supply pin, and the other end is connected to the second gate drive output pin.

[0050] The following is based on Figure 10 Let's take an example to illustrate the operation of a PD power system. In a dual-charger application, a PD power management controller manages two power paths. When VBUS1=5V and VBUS3=28V, the gate drive voltage required for the VBUS3 branch (≥32V) will cause the MOS transistor in the VBUS1 branch to break down, making it impossible to drive both system switches simultaneously with a single gate drive voltage. In this case, Vs=36V, R1=R2=R4=R5=10kΩ. Through the internal configuration of the PD power management controller (closing switch K1, opening switches K2, K3, and K4), the first gate drive output pin outputs 18V, and the second gate drive output pin outputs 36V. Both gate drive output pins can output reasonable voltages, ensuring that the gate-source voltage of the MOS transistors in both branches does not exceed ±20V, thus effectively preventing gate-source breakdown of the bidirectional switching structure MOS transistors in the PD power system switches.

Claims

1. A PD power management controller, characterized by, The application discloses a system switch for connecting a PD power supply with a power supply voltage not lower than 20V, which comprises a voltage source, a gate drive power supply pin, a voltage collection pin, a control unit, a gate drive output pin and a drive voltage adjusting unit, the voltage source is connected with the gate drive power supply pin; the voltage collection pin is connected with the control unit, the control unit is connected with the drive voltage adjusting unit, and the drive voltage adjusting unit is connected with the gate drive output pin.

2. The PD power management controller of claim 1, wherein, The drive voltage adjusting unit comprises an adjustable current source, the control unit is connected with the adjustable current source, the adjustable current source is an adjustable current source, the positive electrode is connected with the gate drive output pin, and the negative electrode is connected with the ground.

3. The PD power management controller of claim 1, wherein, The drive voltage adjusting unit comprises at least a first branch and a second branch, the first branch and the second branch respectively comprise a first switch and a second switch, at least the first branch comprises a resistor R2, the resistor R2 is connected with the first switch in series, one end of the first branch and the second branch is connected with the gate drive output pin, and the other end is connected with the ground, and the control unit is connected with the first switch and the second switch.

4. The PD power management controller of any of claims 1-3, wherein, Supposing that the output voltage of the voltage source is Vs, the power supply voltage is Vbus, and Vs is greater than Vbus+4V.

5. The PD power management controller of any of claims 1-3, wherein, The voltage collection pin is a CC pin, which is used for connecting a Type-C interface of a power supply end or a power receiving end.

6. The PD power management controller of any of claims 1-3, wherein, The system switch further comprises a resistor R1, one end of the resistor R1 is connected with the gate drive power supply pin, and the other end is connected with the gate drive output pin.

7. A PD power supply system characterized by comprising: The system switch comprises a PD power management controller, a resistor R1 and a PD power supply, the system switch comprises a first MOS tube and a second MOS tube, the source of the first MOS tube is connected with the source of the second MOS tube, the drain of the first MOS tube and the drain of the second MOS tube are respectively connected with a Type-C interface of a power supply end and a power receiving end, the gate of the first MOS tube and the gate of the second MOS tube are connected with one end of the resistor R1 and the gate drive output pin of the PD power management controller, the other end of the resistor R1 is connected with the gate drive power supply pin of the PD power management controller, and the voltage collection pin of the PD power management controller is connected with the Type-C interface of the power supply end or the power receiving end.

8. The PD power supply system of claim 7, wherein, The system switch comprises at least a first system switch, a second system switch, a resistor R1 and a resistor R4, the first system switch is connected between the power supply end and a first power receiving end, and the second system switch is connected between the power supply end and a second power receiving end. The PD power management controller comprises at least a first drive voltage adjusting unit, a second drive voltage adjusting unit, a first gate drive output pin and a second gate drive output pin, and the control unit is connected with the first drive voltage adjusting unit and the second drive voltage adjusting unit. The gate drive power supply pin is connected with the gate of the first system switch through the resistor R1, the gate drive power supply pin is connected with the gate of the second system switch through the resistor R4, the first gate drive output pin is connected with the gate of the first system switch, and the second gate drive output pin is connected with the gate of the second system switch.

9. A PD power supply system characterized by comprising: The system switch comprising the PD power management controller and the PD power supply as claimed in claim 6 comprises a first MOS tube and a second MOS tube, the source of the first MOS tube is connected with the source of the second MOS tube, the drain of the first MOS tube and the drain of the second MOS tube are respectively connected with the Type-C interface of the power supply end and the power receiving end; the gate of the first MOS tube and the gate of the second MOS tube are connected with the gate drive output pin of the PD power management controller, and the voltage collection pin of the PD power management controller is connected with the Type-C interface of the power supply end or the power receiving end.

10. The PD power supply system of claim 9, wherein, At least comprising a first system switch and a second system switch, the first system switch is connected between the power supply end and the first power receiving end, and the second system switch is connected between the power supply end and the second power receiving end. The PD power management controller at least comprises a first drive voltage adjusting unit, a second drive voltage adjusting unit, a first gate drive output pin, a second gate drive output pin and a resistor R4, the control unit is connected with the first drive voltage adjusting unit and the second drive voltage adjusting unit, one end of the resistor R1 is connected with the gate drive power supply pin, and the other end is connected with the first gate drive output pin; one end of the resistor R4 is connected with the gate drive power supply pin, and the other end is connected with the second gate drive output pin. The first gate drive output pin is connected with the gate of the first system switch, and the second gate drive output pin is connected with the gate of the second system switch.

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